1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
5 * Copyright (C) 2016 Linaro Ltd
6 * Copyright (C) 2014 Sony Mobile Communications AB
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
10 #include <linux/clk.h>
11 #include <linux/firmware.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_domain.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/qcom_scm.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/remoteproc.h>
23 #include <linux/soc/qcom/mdt_loader.h>
24 #include <linux/soc/qcom/smem.h>
25 #include <linux/soc/qcom/smem_state.h>
27 #include "qcom_common.h"
28 #include "qcom_pil_info.h"
29 #include "qcom_q6v5.h"
30 #include "remoteproc_internal.h"
33 int crash_reason_smem;
34 const char *firmware_name;
36 unsigned int minidump_id;
40 char **proxy_pd_names;
42 const char *load_state;
44 const char *sysmon_name;
52 struct qcom_q6v5 q6v5;
55 struct clk *aggre2_clk;
57 struct regulator *cx_supply;
58 struct regulator *px_supply;
60 struct device *proxy_pds[3];
65 unsigned int minidump_id;
66 int crash_reason_smem;
68 const char *info_name;
70 struct completion start_done;
71 struct completion stop_done;
74 phys_addr_t mem_reloc;
78 struct qcom_rproc_glink glink_subdev;
79 struct qcom_rproc_subdev smd_subdev;
80 struct qcom_rproc_ssr ssr_subdev;
81 struct qcom_sysmon *sysmon;
84 static void adsp_minidump(struct rproc *rproc)
86 struct qcom_adsp *adsp = rproc->priv;
88 qcom_minidump(rproc, adsp->minidump_id);
91 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
97 for (i = 0; i < pd_count; i++) {
98 dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
99 ret = pm_runtime_get_sync(pds[i]);
101 pm_runtime_put_noidle(pds[i]);
102 dev_pm_genpd_set_performance_state(pds[i], 0);
103 goto unroll_pd_votes;
110 for (i--; i >= 0; i--) {
111 dev_pm_genpd_set_performance_state(pds[i], 0);
112 pm_runtime_put(pds[i]);
118 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
123 for (i = 0; i < pd_count; i++) {
124 dev_pm_genpd_set_performance_state(pds[i], 0);
125 pm_runtime_put(pds[i]);
129 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
131 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
134 ret = qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
135 adsp->mem_region, adsp->mem_phys, adsp->mem_size,
140 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
145 static int adsp_start(struct rproc *rproc)
147 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
150 ret = qcom_q6v5_prepare(&adsp->q6v5);
154 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
158 ret = clk_prepare_enable(adsp->xo);
160 goto disable_proxy_pds;
162 ret = clk_prepare_enable(adsp->aggre2_clk);
166 ret = regulator_enable(adsp->cx_supply);
168 goto disable_aggre2_clk;
170 ret = regulator_enable(adsp->px_supply);
172 goto disable_cx_supply;
174 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
177 "failed to authenticate image and release reset\n");
178 goto disable_px_supply;
181 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
182 if (ret == -ETIMEDOUT) {
183 dev_err(adsp->dev, "start timed out\n");
184 qcom_scm_pas_shutdown(adsp->pas_id);
185 goto disable_px_supply;
191 regulator_disable(adsp->px_supply);
193 regulator_disable(adsp->cx_supply);
195 clk_disable_unprepare(adsp->aggre2_clk);
197 clk_disable_unprepare(adsp->xo);
199 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
201 qcom_q6v5_unprepare(&adsp->q6v5);
206 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
208 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
210 regulator_disable(adsp->px_supply);
211 regulator_disable(adsp->cx_supply);
212 clk_disable_unprepare(adsp->aggre2_clk);
213 clk_disable_unprepare(adsp->xo);
214 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
217 static int adsp_stop(struct rproc *rproc)
219 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
223 ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
224 if (ret == -ETIMEDOUT)
225 dev_err(adsp->dev, "timed out on wait\n");
227 ret = qcom_scm_pas_shutdown(adsp->pas_id);
229 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
231 handover = qcom_q6v5_unprepare(&adsp->q6v5);
233 qcom_pas_handover(&adsp->q6v5);
238 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
240 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
243 offset = da - adsp->mem_reloc;
244 if (offset < 0 || offset + len > adsp->mem_size)
247 return adsp->mem_region + offset;
250 static unsigned long adsp_panic(struct rproc *rproc)
252 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
254 return qcom_q6v5_panic(&adsp->q6v5);
257 static const struct rproc_ops adsp_ops = {
260 .da_to_va = adsp_da_to_va,
261 .parse_fw = qcom_register_dump_segments,
266 static const struct rproc_ops adsp_minidump_ops = {
269 .da_to_va = adsp_da_to_va,
272 .coredump = adsp_minidump,
275 static int adsp_init_clock(struct qcom_adsp *adsp)
279 adsp->xo = devm_clk_get(adsp->dev, "xo");
280 if (IS_ERR(adsp->xo)) {
281 ret = PTR_ERR(adsp->xo);
282 if (ret != -EPROBE_DEFER)
283 dev_err(adsp->dev, "failed to get xo clock");
287 if (adsp->has_aggre2_clk) {
288 adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
289 if (IS_ERR(adsp->aggre2_clk)) {
290 ret = PTR_ERR(adsp->aggre2_clk);
291 if (ret != -EPROBE_DEFER)
293 "failed to get aggre2 clock");
301 static int adsp_init_regulator(struct qcom_adsp *adsp)
303 adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
304 if (IS_ERR(adsp->cx_supply))
305 return PTR_ERR(adsp->cx_supply);
307 regulator_set_load(adsp->cx_supply, 100000);
309 adsp->px_supply = devm_regulator_get(adsp->dev, "px");
310 return PTR_ERR_OR_ZERO(adsp->px_supply);
313 static int adsp_pds_attach(struct device *dev, struct device **devs,
323 /* Handle single power domain */
324 if (dev->pm_domain) {
326 pm_runtime_enable(dev);
330 while (pd_names[num_pds])
333 for (i = 0; i < num_pds; i++) {
334 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
335 if (IS_ERR_OR_NULL(devs[i])) {
336 ret = PTR_ERR(devs[i]) ? : -ENODATA;
344 for (i--; i >= 0; i--)
345 dev_pm_domain_detach(devs[i], false);
350 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
353 struct device *dev = adsp->dev;
356 /* Handle single power domain */
357 if (dev->pm_domain && pd_count) {
358 pm_runtime_disable(dev);
362 for (i = 0; i < pd_count; i++)
363 dev_pm_domain_detach(pds[i], false);
366 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
368 struct device_node *node;
372 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
374 dev_err(adsp->dev, "no memory-region specified\n");
378 ret = of_address_to_resource(node, 0, &r);
382 adsp->mem_phys = adsp->mem_reloc = r.start;
383 adsp->mem_size = resource_size(&r);
384 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
385 if (!adsp->mem_region) {
386 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
387 &r.start, adsp->mem_size);
394 static int adsp_probe(struct platform_device *pdev)
396 const struct adsp_data *desc;
397 struct qcom_adsp *adsp;
400 const struct rproc_ops *ops = &adsp_ops;
403 desc = of_device_get_match_data(&pdev->dev);
407 if (!qcom_scm_is_available())
408 return -EPROBE_DEFER;
410 fw_name = desc->firmware_name;
411 ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
413 if (ret < 0 && ret != -EINVAL)
416 if (desc->minidump_id)
417 ops = &adsp_minidump_ops;
419 rproc = rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
422 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
426 rproc->auto_boot = desc->auto_boot;
427 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
429 adsp = (struct qcom_adsp *)rproc->priv;
430 adsp->dev = &pdev->dev;
432 adsp->minidump_id = desc->minidump_id;
433 adsp->pas_id = desc->pas_id;
434 adsp->has_aggre2_clk = desc->has_aggre2_clk;
435 adsp->info_name = desc->sysmon_name;
436 platform_set_drvdata(pdev, adsp);
438 device_wakeup_enable(adsp->dev);
440 ret = adsp_alloc_memory_region(adsp);
444 ret = adsp_init_clock(adsp);
448 ret = adsp_init_regulator(adsp);
452 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
453 desc->proxy_pd_names);
456 adsp->proxy_pd_count = ret;
458 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
461 goto detach_proxy_pds;
463 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
464 qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
465 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
466 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
469 if (IS_ERR(adsp->sysmon)) {
470 ret = PTR_ERR(adsp->sysmon);
471 goto detach_proxy_pds;
474 ret = rproc_add(rproc);
476 goto detach_proxy_pds;
481 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
488 static int adsp_remove(struct platform_device *pdev)
490 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
492 rproc_del(adsp->rproc);
494 qcom_q6v5_deinit(&adsp->q6v5);
495 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
496 qcom_remove_sysmon_subdev(adsp->sysmon);
497 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
498 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
499 rproc_free(adsp->rproc);
504 static const struct adsp_data adsp_resource_init = {
505 .crash_reason_smem = 423,
506 .firmware_name = "adsp.mdt",
508 .has_aggre2_clk = false,
511 .sysmon_name = "adsp",
515 static const struct adsp_data sdm845_adsp_resource_init = {
516 .crash_reason_smem = 423,
517 .firmware_name = "adsp.mdt",
519 .has_aggre2_clk = false,
521 .load_state = "adsp",
523 .sysmon_name = "adsp",
527 static const struct adsp_data sm6350_adsp_resource = {
528 .crash_reason_smem = 423,
529 .firmware_name = "adsp.mdt",
531 .has_aggre2_clk = false,
533 .proxy_pd_names = (char*[]){
538 .load_state = "adsp",
540 .sysmon_name = "adsp",
544 static const struct adsp_data sm8150_adsp_resource = {
545 .crash_reason_smem = 423,
546 .firmware_name = "adsp.mdt",
548 .has_aggre2_clk = false,
550 .proxy_pd_names = (char*[]){
554 .load_state = "adsp",
556 .sysmon_name = "adsp",
560 static const struct adsp_data sm8250_adsp_resource = {
561 .crash_reason_smem = 423,
562 .firmware_name = "adsp.mdt",
564 .has_aggre2_clk = false,
566 .proxy_pd_names = (char*[]){
571 .load_state = "adsp",
573 .sysmon_name = "adsp",
577 static const struct adsp_data sm8350_adsp_resource = {
578 .crash_reason_smem = 423,
579 .firmware_name = "adsp.mdt",
581 .has_aggre2_clk = false,
583 .proxy_pd_names = (char*[]){
588 .load_state = "adsp",
590 .sysmon_name = "adsp",
594 static const struct adsp_data msm8996_adsp_resource = {
595 .crash_reason_smem = 423,
596 .firmware_name = "adsp.mdt",
598 .has_aggre2_clk = false,
600 .proxy_pd_names = (char*[]){
605 .sysmon_name = "adsp",
609 static const struct adsp_data cdsp_resource_init = {
610 .crash_reason_smem = 601,
611 .firmware_name = "cdsp.mdt",
613 .has_aggre2_clk = false,
616 .sysmon_name = "cdsp",
620 static const struct adsp_data sdm845_cdsp_resource_init = {
621 .crash_reason_smem = 601,
622 .firmware_name = "cdsp.mdt",
624 .has_aggre2_clk = false,
626 .load_state = "cdsp",
628 .sysmon_name = "cdsp",
632 static const struct adsp_data sm6350_cdsp_resource = {
633 .crash_reason_smem = 601,
634 .firmware_name = "cdsp.mdt",
636 .has_aggre2_clk = false,
638 .proxy_pd_names = (char*[]){
643 .load_state = "cdsp",
645 .sysmon_name = "cdsp",
649 static const struct adsp_data sm8150_cdsp_resource = {
650 .crash_reason_smem = 601,
651 .firmware_name = "cdsp.mdt",
653 .has_aggre2_clk = false,
655 .proxy_pd_names = (char*[]){
659 .load_state = "cdsp",
661 .sysmon_name = "cdsp",
665 static const struct adsp_data sm8250_cdsp_resource = {
666 .crash_reason_smem = 601,
667 .firmware_name = "cdsp.mdt",
669 .has_aggre2_clk = false,
671 .proxy_pd_names = (char*[]){
675 .load_state = "cdsp",
677 .sysmon_name = "cdsp",
681 static const struct adsp_data sm8350_cdsp_resource = {
682 .crash_reason_smem = 601,
683 .firmware_name = "cdsp.mdt",
685 .has_aggre2_clk = false,
687 .proxy_pd_names = (char*[]){
692 .load_state = "cdsp",
694 .sysmon_name = "cdsp",
698 static const struct adsp_data mpss_resource_init = {
699 .crash_reason_smem = 421,
700 .firmware_name = "modem.mdt",
703 .has_aggre2_clk = false,
705 .proxy_pd_names = (char*[]){
710 .load_state = "modem",
712 .sysmon_name = "modem",
716 static const struct adsp_data sc8180x_mpss_resource = {
717 .crash_reason_smem = 421,
718 .firmware_name = "modem.mdt",
720 .has_aggre2_clk = false,
722 .proxy_pd_names = (char*[]){
726 .load_state = "modem",
728 .sysmon_name = "modem",
732 static const struct adsp_data slpi_resource_init = {
733 .crash_reason_smem = 424,
734 .firmware_name = "slpi.mdt",
736 .has_aggre2_clk = true,
738 .proxy_pd_names = (char*[]){
743 .sysmon_name = "slpi",
747 static const struct adsp_data sm8150_slpi_resource = {
748 .crash_reason_smem = 424,
749 .firmware_name = "slpi.mdt",
751 .has_aggre2_clk = false,
753 .proxy_pd_names = (char*[]){
758 .load_state = "slpi",
760 .sysmon_name = "slpi",
764 static const struct adsp_data sm8250_slpi_resource = {
765 .crash_reason_smem = 424,
766 .firmware_name = "slpi.mdt",
768 .has_aggre2_clk = false,
770 .proxy_pd_names = (char*[]){
775 .load_state = "slpi",
777 .sysmon_name = "slpi",
781 static const struct adsp_data sm8350_slpi_resource = {
782 .crash_reason_smem = 424,
783 .firmware_name = "slpi.mdt",
785 .has_aggre2_clk = false,
787 .proxy_pd_names = (char*[]){
792 .load_state = "slpi",
794 .sysmon_name = "slpi",
798 static const struct adsp_data wcss_resource_init = {
799 .crash_reason_smem = 421,
800 .firmware_name = "wcnss.mdt",
804 .sysmon_name = "wcnss",
808 static const struct adsp_data sdx55_mpss_resource = {
809 .crash_reason_smem = 421,
810 .firmware_name = "modem.mdt",
812 .has_aggre2_clk = false,
814 .proxy_pd_names = (char*[]){
820 .sysmon_name = "modem",
824 static const struct of_device_id adsp_of_match[] = {
825 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
826 { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
827 { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
828 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
829 { .compatible = "qcom,msm8998-slpi-pas", .data = &slpi_resource_init},
830 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
831 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
832 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
833 { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
834 { .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
835 { .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
836 { .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
837 { .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
838 { .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
839 { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
840 { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
841 { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
842 { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
843 { .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource},
844 { .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init},
845 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
846 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
847 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
848 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
849 { .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
850 { .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
851 { .compatible = "qcom,sm8250-slpi-pas", .data = &sm8250_slpi_resource},
852 { .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
853 { .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
854 { .compatible = "qcom,sm8350-slpi-pas", .data = &sm8350_slpi_resource},
855 { .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
858 MODULE_DEVICE_TABLE(of, adsp_of_match);
860 static struct platform_driver adsp_driver = {
862 .remove = adsp_remove,
864 .name = "qcom_q6v5_pas",
865 .of_match_table = adsp_of_match,
869 module_platform_driver(adsp_driver);
870 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
871 MODULE_LICENSE("GPL v2");