2 * "RTT as Real Time Clock" driver for AT91SAM9 SoC family
4 * (C) 2007 Michel Benoit
6 * Based on rtc-at91rm9200.c by Rick Bronson
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/time.h>
18 #include <linux/rtc.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioctl.h>
21 #include <linux/slab.h>
22 #include <linux/platform_data/atmel.h>
26 * This driver uses two configurable hardware resources that live in the
27 * AT91SAM9 backup power domain (intended to be powered at all times)
28 * to implement the Real Time Clock interfaces
30 * - A "Real-time Timer" (RTT) counts up in seconds from a base time.
31 * We can't assign the counter value (CRTV) ... but we can reset it.
33 * - One of the "General Purpose Backup Registers" (GPBRs) holds the
34 * base time, normally an offset from the beginning of the POSIX
35 * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
36 * local timezone's offset.
38 * The RTC's value is the RTT counter plus that offset. The RTC's alarm
39 * is likewise a base (ALMV) plus that offset.
41 * Not all RTTs will be used as RTCs; some systems have multiple RTTs to
42 * choose from, or a "real" RTC module. All systems have multiple GPBR
43 * registers available, likewise usable for more than "RTC" support.
46 #define AT91_RTT_MR 0x00 /* Real-time Mode Register */
47 #define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */
48 #define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */
49 #define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */
50 #define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */
52 #define AT91_RTT_AR 0x04 /* Real-time Alarm Register */
53 #define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */
55 #define AT91_RTT_VR 0x08 /* Real-time Value Register */
56 #define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */
58 #define AT91_RTT_SR 0x0c /* Real-time Status Register */
59 #define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */
60 #define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */
62 #define AT91_SLOW_CLOCK 32768
65 * We store ALARM_DISABLED in ALMV to record that no alarm is set.
66 * It's also the reset value for that field.
68 #define ALARM_DISABLED ((u32)~0)
73 struct rtc_device *rtcdev;
79 #define rtt_readl(rtc, field) \
80 __raw_readl((rtc)->rtt + AT91_RTT_ ## field)
81 #define rtt_writel(rtc, field, val) \
82 __raw_writel((val), (rtc)->rtt + AT91_RTT_ ## field)
84 #define gpbr_readl(rtc) \
85 __raw_readl((rtc)->gpbr)
86 #define gpbr_writel(rtc, val) \
87 __raw_writel((val), (rtc)->gpbr)
90 * Read current time and date in RTC
92 static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
94 struct sam9_rtc *rtc = dev_get_drvdata(dev);
98 /* read current time offset */
99 offset = gpbr_readl(rtc);
103 /* reread the counter to help sync the two clock domains */
104 secs = rtt_readl(rtc, VR);
105 secs2 = rtt_readl(rtc, VR);
107 secs = rtt_readl(rtc, VR);
109 rtc_time_to_tm(offset + secs, tm);
111 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readtime",
112 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
113 tm->tm_hour, tm->tm_min, tm->tm_sec);
119 * Set current time and date in RTC
121 static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
123 struct sam9_rtc *rtc = dev_get_drvdata(dev);
125 u32 offset, alarm, mr;
128 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "settime",
129 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
130 tm->tm_hour, tm->tm_min, tm->tm_sec);
132 err = rtc_tm_to_time(tm, &secs);
136 mr = rtt_readl(rtc, MR);
138 /* disable interrupts */
139 rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
141 /* read current time offset */
142 offset = gpbr_readl(rtc);
144 /* store the new base time in a battery backup register */
146 gpbr_writel(rtc, secs);
148 /* adjust the alarm time for the new base */
149 alarm = rtt_readl(rtc, AR);
150 if (alarm != ALARM_DISABLED) {
152 /* time jumped backwards, increase time until alarm */
153 alarm += (offset - secs);
154 } else if ((alarm + offset) > secs) {
155 /* time jumped forwards, decrease time until alarm */
156 alarm -= (secs - offset);
158 /* time jumped past the alarm, disable alarm */
159 alarm = ALARM_DISABLED;
160 mr &= ~AT91_RTT_ALMIEN;
162 rtt_writel(rtc, AR, alarm);
165 /* reset the timer, and re-enable interrupts */
166 rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST);
171 static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
173 struct sam9_rtc *rtc = dev_get_drvdata(dev);
174 struct rtc_time *tm = &alrm->time;
175 u32 alarm = rtt_readl(rtc, AR);
178 offset = gpbr_readl(rtc);
182 memset(alrm, 0, sizeof(*alrm));
183 if (alarm != ALARM_DISABLED && offset != 0) {
184 rtc_time_to_tm(offset + alarm, tm);
186 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readalarm",
187 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
188 tm->tm_hour, tm->tm_min, tm->tm_sec);
190 if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN)
197 static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
199 struct sam9_rtc *rtc = dev_get_drvdata(dev);
200 struct rtc_time *tm = &alrm->time;
206 err = rtc_tm_to_time(tm, &secs);
210 offset = gpbr_readl(rtc);
212 /* time is not set */
215 mr = rtt_readl(rtc, MR);
216 rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
218 /* alarm in the past? finish and leave disabled */
219 if (secs <= offset) {
220 rtt_writel(rtc, AR, ALARM_DISABLED);
224 /* else set alarm and maybe enable it */
225 rtt_writel(rtc, AR, secs - offset);
227 rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
229 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "setalarm",
230 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour,
231 tm->tm_min, tm->tm_sec);
236 static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
238 struct sam9_rtc *rtc = dev_get_drvdata(dev);
239 u32 mr = rtt_readl(rtc, MR);
241 dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr);
243 rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
245 rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
250 * Provide additional RTC information in /proc/driver/rtc
252 static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
254 struct sam9_rtc *rtc = dev_get_drvdata(dev);
255 u32 mr = mr = rtt_readl(rtc, MR);
257 seq_printf(seq, "update_IRQ\t: %s\n",
258 (mr & AT91_RTT_RTTINCIEN) ? "yes" : "no");
263 * IRQ handler for the RTC
265 static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
267 struct sam9_rtc *rtc = _rtc;
269 unsigned long events = 0;
271 /* Shared interrupt may be for another device. Note: reading
272 * SR clears it, so we must only read it in this irq handler!
274 mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
275 sr = rtt_readl(rtc, SR) & (mr >> 16);
280 if (sr & AT91_RTT_ALMS)
281 events |= (RTC_AF | RTC_IRQF);
283 /* timer update/increment */
284 if (sr & AT91_RTT_RTTINC)
285 events |= (RTC_UF | RTC_IRQF);
287 rtc_update_irq(rtc->rtcdev, 1, events);
289 pr_debug("%s: num=%ld, events=0x%02lx\n", __func__,
290 events >> 8, events & 0x000000FF);
295 static const struct rtc_class_ops at91_rtc_ops = {
296 .read_time = at91_rtc_readtime,
297 .set_time = at91_rtc_settime,
298 .read_alarm = at91_rtc_readalarm,
299 .set_alarm = at91_rtc_setalarm,
300 .proc = at91_rtc_proc,
301 .alarm_irq_enable = at91_rtc_alarm_irq_enable,
305 * Initialize and install RTC driver
307 static int at91_rtc_probe(struct platform_device *pdev)
309 struct resource *r, *r_gpbr;
310 struct sam9_rtc *rtc;
314 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
315 r_gpbr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
317 dev_err(&pdev->dev, "need 2 ressources\n");
321 irq = platform_get_irq(pdev, 0);
323 dev_err(&pdev->dev, "failed to get interrupt resource\n");
327 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
333 /* platform setup code should have handled this; sigh */
334 if (!device_can_wakeup(&pdev->dev))
335 device_init_wakeup(&pdev->dev, 1);
337 platform_set_drvdata(pdev, rtc);
338 rtc->rtt = devm_ioremap(&pdev->dev, r->start, resource_size(r));
340 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
344 rtc->gpbr = devm_ioremap(&pdev->dev, r_gpbr->start,
345 resource_size(r_gpbr));
347 dev_err(&pdev->dev, "failed to map gpbr registers, aborting.\n");
351 mr = rtt_readl(rtc, MR);
353 /* unless RTT is counting at 1 Hz, re-initialize it */
354 if ((mr & AT91_RTT_RTPRES) != AT91_SLOW_CLOCK) {
355 mr = AT91_RTT_RTTRST | (AT91_SLOW_CLOCK & AT91_RTT_RTPRES);
359 /* disable all interrupts (same as on shutdown path) */
360 mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
361 rtt_writel(rtc, MR, mr);
363 rtc->rtcdev = devm_rtc_device_register(&pdev->dev, pdev->name,
364 &at91_rtc_ops, THIS_MODULE);
365 if (IS_ERR(rtc->rtcdev))
366 return PTR_ERR(rtc->rtcdev);
368 /* register irq handler after we know what name we'll use */
369 ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt,
370 IRQF_SHARED, dev_name(&rtc->rtcdev->dev), rtc);
372 dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq);
376 /* NOTE: sam9260 rev A silicon has a ROM bug which resets the
377 * RTT on at least some reboots. If you have that chip, you must
378 * initialize the time from some external source like a GPS, wall
379 * clock, discrete RTC, etc
382 if (gpbr_readl(rtc) == 0)
383 dev_warn(&pdev->dev, "%s: SET TIME!\n",
384 dev_name(&rtc->rtcdev->dev));
390 * Disable and remove the RTC driver
392 static int at91_rtc_remove(struct platform_device *pdev)
394 struct sam9_rtc *rtc = platform_get_drvdata(pdev);
395 u32 mr = rtt_readl(rtc, MR);
397 /* disable all interrupts */
398 rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
403 static void at91_rtc_shutdown(struct platform_device *pdev)
405 struct sam9_rtc *rtc = platform_get_drvdata(pdev);
406 u32 mr = rtt_readl(rtc, MR);
408 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
409 rtt_writel(rtc, MR, mr & ~rtc->imr);
412 #ifdef CONFIG_PM_SLEEP
414 /* AT91SAM9 RTC Power management control */
416 static int at91_rtc_suspend(struct device *dev)
418 struct sam9_rtc *rtc = dev_get_drvdata(dev);
419 u32 mr = rtt_readl(rtc, MR);
422 * This IRQ is shared with DBGU and other hardware which isn't
423 * necessarily a wakeup event source.
425 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
427 if (device_may_wakeup(dev) && (mr & AT91_RTT_ALMIEN)) {
428 enable_irq_wake(rtc->irq);
429 /* don't let RTTINC cause wakeups */
430 if (mr & AT91_RTT_RTTINCIEN)
431 rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
433 rtt_writel(rtc, MR, mr & ~rtc->imr);
439 static int at91_rtc_resume(struct device *dev)
441 struct sam9_rtc *rtc = dev_get_drvdata(dev);
445 if (device_may_wakeup(dev))
446 disable_irq_wake(rtc->irq);
447 mr = rtt_readl(rtc, MR);
448 rtt_writel(rtc, MR, mr | rtc->imr);
455 static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
457 static struct platform_driver at91_rtc_driver = {
458 .probe = at91_rtc_probe,
459 .remove = at91_rtc_remove,
460 .shutdown = at91_rtc_shutdown,
462 .name = "rtc-at91sam9",
463 .owner = THIS_MODULE,
464 .pm = &at91_rtc_pm_ops,
468 module_platform_driver(at91_rtc_driver);
470 MODULE_AUTHOR("Michel Benoit");
471 MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x");
472 MODULE_LICENSE("GPL");