drivers/rtc/rtc-pm8xxx.c

   1 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12 #include <linux/of.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/rtc.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/pm.h>
  18 #include <linux/regmap.h>
  19 #include <linux/slab.h>
  20 #include <linux/spinlock.h>
  21
  22 /* RTC Register offsets from RTC CTRL REG */
  23 #define PM8XXX_ALARM_CTRL_OFFSET        0x01
  24 #define PM8XXX_RTC_WRITE_OFFSET         0x02
  25 #define PM8XXX_RTC_READ_OFFSET          0x06
  26 #define PM8XXX_ALARM_RW_OFFSET          0x0A
  27
  28 /* RTC_CTRL register bit fields */
  29 #define PM8xxx_RTC_ENABLE               BIT(7)
  30 #define PM8xxx_RTC_ALARM_CLEAR          BIT(0)
  31
  32 #define NUM_8_BIT_RTC_REGS              0x4
  33
  34 /**
  35  * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
  36  * @ctrl: base address of control register
  37  * @write: base address of write register
  38  * @read: base address of read register
  39  * @alarm_ctrl: base address of alarm control register
  40  * @alarm_ctrl2: base address of alarm control2 register
  41  * @alarm_rw: base address of alarm read-write register
  42  * @alarm_en: alarm enable mask
  43  */
  44 struct pm8xxx_rtc_regs {
  45         unsigned int ctrl;
  46         unsigned int write;
  47         unsigned int read;
  48         unsigned int alarm_ctrl;
  49         unsigned int alarm_ctrl2;
  50         unsigned int alarm_rw;
  51         unsigned int alarm_en;
  52 };
  53
  54 /**
  55  * struct pm8xxx_rtc -  rtc driver internal structure
  56  * @rtc:                rtc device for this driver.
  57  * @regmap:             regmap used to access RTC registers
  58  * @allow_set_time:     indicates whether writing to the RTC is allowed
  59  * @rtc_alarm_irq:      rtc alarm irq number.
  60  * @ctrl_reg:           rtc control register.
  61  * @rtc_dev:            device structure.
  62  * @ctrl_reg_lock:      spinlock protecting access to ctrl_reg.
  63  */
  64 struct pm8xxx_rtc {
  65         struct rtc_device *rtc;
  66         struct regmap *regmap;
  67         bool allow_set_time;
  68         int rtc_alarm_irq;
  69         const struct pm8xxx_rtc_regs *regs;
  70         struct device *rtc_dev;
  71         spinlock_t ctrl_reg_lock;
  72 };
  73
  74 /*
  75  * Steps to write the RTC registers.
  76  * 1. Disable alarm if enabled.
  77  * 2. Write 0x00 to LSB.
  78  * 3. Write Byte[1], Byte[2], Byte[3] then Byte[0].
  79  * 4. Enable alarm if disabled in step 1.
  80  */
  81 static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
  82 {
  83         int rc, i;
  84         unsigned long secs, irq_flags;
  85         u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0;
  86         unsigned int ctrl_reg;
  87         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  88         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
  89
  90         if (!rtc_dd->allow_set_time)
  91                 return -EACCES;
  92
  93         rtc_tm_to_time(tm, &secs);
  94
  95         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
  96                 value[i] = secs & 0xFF;
  97                 secs >>= 8;
  98         }
  99
 100         dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
 101
 102         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 103
 104         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
 105         if (rc)
 106                 goto rtc_rw_fail;
 107
 108         if (ctrl_reg & regs->alarm_en) {
 109                 alarm_enabled = 1;
 110                 ctrl_reg &= ~regs->alarm_en;
 111                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 112                 if (rc) {
 113                         dev_err(dev, "Write to RTC control register failed\n");
 114                         goto rtc_rw_fail;
 115                 }
 116         }
 117
 118         /* Write 0 to Byte[0] */
 119         rc = regmap_write(rtc_dd->regmap, regs->write, 0);
 120         if (rc) {
 121                 dev_err(dev, "Write to RTC write data register failed\n");
 122                 goto rtc_rw_fail;
 123         }
 124
 125         /* Write Byte[1], Byte[2], Byte[3] */
 126         rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
 127                                &value[1], sizeof(value) - 1);
 128         if (rc) {
 129                 dev_err(dev, "Write to RTC write data register failed\n");
 130                 goto rtc_rw_fail;
 131         }
 132
 133         /* Write Byte[0] */
 134         rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
 135         if (rc) {
 136                 dev_err(dev, "Write to RTC write data register failed\n");
 137                 goto rtc_rw_fail;
 138         }
 139
 140         if (alarm_enabled) {
 141                 ctrl_reg |= regs->alarm_en;
 142                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 143                 if (rc) {
 144                         dev_err(dev, "Write to RTC control register failed\n");
 145                         goto rtc_rw_fail;
 146                 }
 147         }
 148
 149 rtc_rw_fail:
 150         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 151
 152         return rc;
 153 }
 154
 155 static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
 156 {
 157         int rc;
 158         u8 value[NUM_8_BIT_RTC_REGS];
 159         unsigned long secs;
 160         unsigned int reg;
 161         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 162         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 163
 164         rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
 165         if (rc) {
 166                 dev_err(dev, "RTC read data register failed\n");
 167                 return rc;
 168         }
 169
 170         /*
 171          * Read the LSB again and check if there has been a carry over.
 172          * If there is, redo the read operation.
 173          */
 174         rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
 175         if (rc < 0) {
 176                 dev_err(dev, "RTC read data register failed\n");
 177                 return rc;
 178         }
 179
 180         if (unlikely(reg < value[0])) {
 181                 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
 182                                       value, sizeof(value));
 183                 if (rc) {
 184                         dev_err(dev, "RTC read data register failed\n");
 185                         return rc;
 186                 }
 187         }
 188
 189         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 190                ((unsigned long)value[3] << 24);
 191
 192         rtc_time_to_tm(secs, tm);
 193
 194         rc = rtc_valid_tm(tm);
 195         if (rc < 0) {
 196                 dev_err(dev, "Invalid time read from RTC\n");
 197                 return rc;
 198         }
 199
 200         dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
 201                 secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
 202                 tm->tm_mday, tm->tm_mon, tm->tm_year);
 203
 204         return 0;
 205 }
 206
 207 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 208 {
 209         int rc, i;
 210         u8 value[NUM_8_BIT_RTC_REGS];
 211         unsigned int ctrl_reg;
 212         unsigned long secs, irq_flags;
 213         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 214         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 215
 216         rtc_tm_to_time(&alarm->time, &secs);
 217
 218         for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
 219                 value[i] = secs & 0xFF;
 220                 secs >>= 8;
 221         }
 222
 223         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 224
 225         rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
 226                                sizeof(value));
 227         if (rc) {
 228                 dev_err(dev, "Write to RTC ALARM register failed\n");
 229                 goto rtc_rw_fail;
 230         }
 231
 232         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 233         if (rc)
 234                 goto rtc_rw_fail;
 235
 236         if (alarm->enabled)
 237                 ctrl_reg |= regs->alarm_en;
 238         else
 239                 ctrl_reg &= ~regs->alarm_en;
 240
 241         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 242         if (rc) {
 243                 dev_err(dev, "Write to RTC alarm control register failed\n");
 244                 goto rtc_rw_fail;
 245         }
 246
 247         dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
 248                 alarm->time.tm_hour, alarm->time.tm_min,
 249                 alarm->time.tm_sec, alarm->time.tm_mday,
 250                 alarm->time.tm_mon, alarm->time.tm_year);
 251 rtc_rw_fail:
 252         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 253         return rc;
 254 }
 255
 256 static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
 257 {
 258         int rc;
 259         u8 value[NUM_8_BIT_RTC_REGS];
 260         unsigned long secs;
 261         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 262         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 263
 264         rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
 265                               sizeof(value));
 266         if (rc) {
 267                 dev_err(dev, "RTC alarm time read failed\n");
 268                 return rc;
 269         }
 270
 271         secs = value[0] | (value[1] << 8) | (value[2] << 16) |
 272                ((unsigned long)value[3] << 24);
 273
 274         rtc_time_to_tm(secs, &alarm->time);
 275
 276         rc = rtc_valid_tm(&alarm->time);
 277         if (rc < 0) {
 278                 dev_err(dev, "Invalid alarm time read from RTC\n");
 279                 return rc;
 280         }
 281
 282         dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
 283                 alarm->time.tm_hour, alarm->time.tm_min,
 284                 alarm->time.tm_sec, alarm->time.tm_mday,
 285                 alarm->time.tm_mon, alarm->time.tm_year);
 286
 287         return 0;
 288 }
 289
 290 static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
 291 {
 292         int rc;
 293         unsigned long irq_flags;
 294         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 295         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 296         unsigned int ctrl_reg;
 297
 298         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 299
 300         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 301         if (rc)
 302                 goto rtc_rw_fail;
 303
 304         if (enable)
 305                 ctrl_reg |= regs->alarm_en;
 306         else
 307                 ctrl_reg &= ~regs->alarm_en;
 308
 309         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 310         if (rc) {
 311                 dev_err(dev, "Write to RTC control register failed\n");
 312                 goto rtc_rw_fail;
 313         }
 314
 315 rtc_rw_fail:
 316         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 317         return rc;
 318 }
 319
 320 static const struct rtc_class_ops pm8xxx_rtc_ops = {
 321         .read_time      = pm8xxx_rtc_read_time,
 322         .set_time       = pm8xxx_rtc_set_time,
 323         .set_alarm      = pm8xxx_rtc_set_alarm,
 324         .read_alarm     = pm8xxx_rtc_read_alarm,
 325         .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
 326 };
 327
 328 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
 329 {
 330         struct pm8xxx_rtc *rtc_dd = dev_id;
 331         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 332         unsigned int ctrl_reg;
 333         int rc;
 334         unsigned long irq_flags;
 335
 336         rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
 337
 338         spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
 339
 340         /* Clear the alarm enable bit */
 341         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
 342         if (rc) {
 343                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 344                 goto rtc_alarm_handled;
 345         }
 346
 347         ctrl_reg &= ~regs->alarm_en;
 348
 349         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
 350         if (rc) {
 351                 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 352                 dev_err(rtc_dd->rtc_dev,
 353                         "Write to alarm control register failed\n");
 354                 goto rtc_alarm_handled;
 355         }
 356
 357         spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
 358
 359         /* Clear RTC alarm register */
 360         rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
 361         if (rc) {
 362                 dev_err(rtc_dd->rtc_dev,
 363                         "RTC Alarm control2 register read failed\n");
 364                 goto rtc_alarm_handled;
 365         }
 366
 367         ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
 368         rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
 369         if (rc)
 370                 dev_err(rtc_dd->rtc_dev,
 371                         "Write to RTC Alarm control2 register failed\n");
 372
 373 rtc_alarm_handled:
 374         return IRQ_HANDLED;
 375 }
 376
 377 static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
 378 {
 379         const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
 380         unsigned int ctrl_reg;
 381         int rc;
 382
 383         /* Check if the RTC is on, else turn it on */
 384         rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
 385         if (rc)
 386                 return rc;
 387
 388         if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
 389                 ctrl_reg |= PM8xxx_RTC_ENABLE;
 390                 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
 391                 if (rc)
 392                         return rc;
 393         }
 394
 395         return 0;
 396 }
 397
 398 static const struct pm8xxx_rtc_regs pm8921_regs = {
 399         .ctrl           = 0x11d,
 400         .write          = 0x11f,
 401         .read           = 0x123,
 402         .alarm_rw       = 0x127,
 403         .alarm_ctrl     = 0x11d,
 404         .alarm_ctrl2    = 0x11e,
 405         .alarm_en       = BIT(1),
 406 };
 407
 408 static const struct pm8xxx_rtc_regs pm8058_regs = {
 409         .ctrl           = 0x1e8,
 410         .write          = 0x1ea,
 411         .read           = 0x1ee,
 412         .alarm_rw       = 0x1f2,
 413         .alarm_ctrl     = 0x1e8,
 414         .alarm_ctrl2    = 0x1e9,
 415         .alarm_en       = BIT(1),
 416 };
 417
 418 static const struct pm8xxx_rtc_regs pm8941_regs = {
 419         .ctrl           = 0x6046,
 420         .write          = 0x6040,
 421         .read           = 0x6048,
 422         .alarm_rw       = 0x6140,
 423         .alarm_ctrl     = 0x6146,
 424         .alarm_ctrl2    = 0x6148,
 425         .alarm_en       = BIT(7),
 426 };
 427
 428 /*
 429  * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
 430  */
 431 static const struct of_device_id pm8xxx_id_table[] = {
 432         { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
 433         { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
 434         { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
 435         { },
 436 };
 437 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
 438
 439 static int pm8xxx_rtc_probe(struct platform_device *pdev)
 440 {
 441         int rc;
 442         struct pm8xxx_rtc *rtc_dd;
 443         const struct of_device_id *match;
 444
 445         match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
 446         if (!match)
 447                 return -ENXIO;
 448
 449         rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
 450         if (rtc_dd == NULL)
 451                 return -ENOMEM;
 452
 453         /* Initialise spinlock to protect RTC control register */
 454         spin_lock_init(&rtc_dd->ctrl_reg_lock);
 455
 456         rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 457         if (!rtc_dd->regmap) {
 458                 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
 459                 return -ENXIO;
 460         }
 461
 462         rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
 463         if (rtc_dd->rtc_alarm_irq < 0) {
 464                 dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
 465                 return -ENXIO;
 466         }
 467
 468         rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
 469                                                       "allow-set-time");
 470
 471         rtc_dd->regs = match->data;
 472         rtc_dd->rtc_dev = &pdev->dev;
 473
 474         rc = pm8xxx_rtc_enable(rtc_dd);
 475         if (rc)
 476                 return rc;
 477
 478         platform_set_drvdata(pdev, rtc_dd);
 479
 480         device_init_wakeup(&pdev->dev, 1);
 481
 482         /* Register the RTC device */
 483         rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
 484                                                &pm8xxx_rtc_ops, THIS_MODULE);
 485         if (IS_ERR(rtc_dd->rtc)) {
 486                 dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
 487                         __func__, PTR_ERR(rtc_dd->rtc));
 488                 return PTR_ERR(rtc_dd->rtc);
 489         }
 490
 491         /* Request the alarm IRQ */
 492         rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
 493                                           pm8xxx_alarm_trigger,
 494                                           IRQF_TRIGGER_RISING,
 495                                           "pm8xxx_rtc_alarm", rtc_dd);
 496         if (rc < 0) {
 497                 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
 498                 return rc;
 499         }
 500
 501         dev_dbg(&pdev->dev, "Probe success !!\n");
 502
 503         return 0;
 504 }
 505
 506 #ifdef CONFIG_PM_SLEEP
 507 static int pm8xxx_rtc_resume(struct device *dev)
 508 {
 509         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 510
 511         if (device_may_wakeup(dev))
 512                 disable_irq_wake(rtc_dd->rtc_alarm_irq);
 513
 514         return 0;
 515 }
 516
 517 static int pm8xxx_rtc_suspend(struct device *dev)
 518 {
 519         struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
 520
 521         if (device_may_wakeup(dev))
 522                 enable_irq_wake(rtc_dd->rtc_alarm_irq);
 523
 524         return 0;
 525 }
 526 #endif
 527
 528 static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
 529                          pm8xxx_rtc_suspend,
 530                          pm8xxx_rtc_resume);
 531
 532 static struct platform_driver pm8xxx_rtc_driver = {
 533         .probe          = pm8xxx_rtc_probe,
 534         .driver = {
 535                 .name           = "rtc-pm8xxx",
 536                 .pm             = &pm8xxx_rtc_pm_ops,
 537                 .of_match_table = pm8xxx_id_table,
 538         },
 539 };
 540
 541 module_platform_driver(pm8xxx_rtc_driver);
 542
 543 MODULE_ALIAS("platform:rtc-pm8xxx");
 544 MODULE_DESCRIPTION("PMIC8xxx RTC driver");
 545 MODULE_LICENSE("GPL v2");
 546 MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");