drivers/scsi/arcmsr/arcmsr_hba.c

   1 /*
   2 *******************************************************************************
   3 **        O.S   : Linux
   4 **   FILE NAME  : arcmsr_hba.c
   5 **        BY    : Nick Cheng, C.L. Huang
   6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
   7 *******************************************************************************
   8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
   9 **
  10 **     Web site: www.areca.com.tw
  11 **       E-mail: support@areca.com.tw
  12 **
  13 ** This program is free software; you can redistribute it and/or modify
  14 ** it under the terms of the GNU General Public License version 2 as
  15 ** published by the Free Software Foundation.
  16 ** This program is distributed in the hope that it will be useful,
  17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 ** GNU General Public License for more details.
  20 *******************************************************************************
  21 ** Redistribution and use in source and binary forms, with or without
  22 ** modification, are permitted provided that the following conditions
  23 ** are met:
  24 ** 1. Redistributions of source code must retain the above copyright
  25 **    notice, this list of conditions and the following disclaimer.
  26 ** 2. Redistributions in binary form must reproduce the above copyright
  27 **    notice, this list of conditions and the following disclaimer in the
  28 **    documentation and/or other materials provided with the distribution.
  29 ** 3. The name of the author may not be used to endorse or promote products
  30 **    derived from this software without specific prior written permission.
  31 **
  32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 *******************************************************************************
  43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
  45 *******************************************************************************
  46 */
  47 #include <linux/module.h>
  48 #include <linux/reboot.h>
  49 #include <linux/spinlock.h>
  50 #include <linux/pci_ids.h>
  51 #include <linux/interrupt.h>
  52 #include <linux/moduleparam.h>
  53 #include <linux/errno.h>
  54 #include <linux/types.h>
  55 #include <linux/delay.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/timer.h>
  58 #include <linux/slab.h>
  59 #include <linux/pci.h>
  60 #include <linux/aer.h>
  61 #include <linux/circ_buf.h>
  62 #include <asm/dma.h>
  63 #include <asm/io.h>
  64 #include <linux/uaccess.h>
  65 #include <scsi/scsi_host.h>
  66 #include <scsi/scsi.h>
  67 #include <scsi/scsi_cmnd.h>
  68 #include <scsi/scsi_tcq.h>
  69 #include <scsi/scsi_device.h>
  70 #include <scsi/scsi_transport.h>
  71 #include <scsi/scsicam.h>
  72 #include "arcmsr.h"
  73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
  74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
  75 MODULE_LICENSE("Dual BSD/GPL");
  76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  77
  78 static int msix_enable = 1;
  79 module_param(msix_enable, int, S_IRUGO);
  80 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
  81
  82 static int msi_enable = 1;
  83 module_param(msi_enable, int, S_IRUGO);
  84 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
  85
  86 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
  87 module_param(host_can_queue, int, S_IRUGO);
  88 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
  89
  90 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
  91 module_param(cmd_per_lun, int, S_IRUGO);
  92 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
  93
  94 static int set_date_time = 0;
  95 module_param(set_date_time, int, S_IRUGO);
  96 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
  97
  98 #define ARCMSR_SLEEPTIME        10
  99 #define ARCMSR_RETRYCOUNT       12
 100
 101 static wait_queue_head_t wait_q;
 102 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 103                                         struct scsi_cmnd *cmd);
 104 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 105 static int arcmsr_abort(struct scsi_cmnd *);
 106 static int arcmsr_bus_reset(struct scsi_cmnd *);
 107 static int arcmsr_bios_param(struct scsi_device *sdev,
 108                 struct block_device *bdev, sector_t capacity, int *info);
 109 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 110 static int arcmsr_probe(struct pci_dev *pdev,
 111                                 const struct pci_device_id *id);
 112 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
 113 static int arcmsr_resume(struct pci_dev *pdev);
 114 static void arcmsr_remove(struct pci_dev *pdev);
 115 static void arcmsr_shutdown(struct pci_dev *pdev);
 116 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 117 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 118 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 119 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
 120         u32 intmask_org);
 121 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
 122 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
 123 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
 124 static void arcmsr_request_device_map(struct timer_list *t);
 125 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
 126 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
 127 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
 128 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
 129 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
 130 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
 131 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
 132 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
 133 static const char *arcmsr_info(struct Scsi_Host *);
 134 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
 135 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
 136 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
 137 static void arcmsr_set_iop_datetime(struct timer_list *);
 138 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
 139 {
 140         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
 141                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
 142         return scsi_change_queue_depth(sdev, queue_depth);
 143 }
 144
 145 static struct scsi_host_template arcmsr_scsi_host_template = {
 146         .module                 = THIS_MODULE,
 147         .name                   = "Areca SAS/SATA RAID driver",
 148         .info                   = arcmsr_info,
 149         .queuecommand           = arcmsr_queue_command,
 150         .eh_abort_handler       = arcmsr_abort,
 151         .eh_bus_reset_handler   = arcmsr_bus_reset,
 152         .bios_param             = arcmsr_bios_param,
 153         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
 154         .can_queue              = ARCMSR_DEFAULT_OUTSTANDING_CMD,
 155         .this_id                = ARCMSR_SCSI_INITIATOR_ID,
 156         .sg_tablesize           = ARCMSR_DEFAULT_SG_ENTRIES,
 157         .max_sectors            = ARCMSR_MAX_XFER_SECTORS_C,
 158         .cmd_per_lun            = ARCMSR_DEFAULT_CMD_PERLUN,
 159         .shost_attrs            = arcmsr_host_attrs,
 160         .no_write_same          = 1,
 161 };
 162
 163 static struct pci_device_id arcmsr_device_id_table[] = {
 164         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
 165                 .driver_data = ACB_ADAPTER_TYPE_A},
 166         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
 167                 .driver_data = ACB_ADAPTER_TYPE_A},
 168         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
 169                 .driver_data = ACB_ADAPTER_TYPE_A},
 170         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
 171                 .driver_data = ACB_ADAPTER_TYPE_A},
 172         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
 173                 .driver_data = ACB_ADAPTER_TYPE_A},
 174         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
 175                 .driver_data = ACB_ADAPTER_TYPE_B},
 176         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
 177                 .driver_data = ACB_ADAPTER_TYPE_B},
 178         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
 179                 .driver_data = ACB_ADAPTER_TYPE_B},
 180         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
 181                 .driver_data = ACB_ADAPTER_TYPE_B},
 182         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
 183                 .driver_data = ACB_ADAPTER_TYPE_A},
 184         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
 185                 .driver_data = ACB_ADAPTER_TYPE_D},
 186         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
 187                 .driver_data = ACB_ADAPTER_TYPE_A},
 188         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
 189                 .driver_data = ACB_ADAPTER_TYPE_A},
 190         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
 191                 .driver_data = ACB_ADAPTER_TYPE_A},
 192         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
 193                 .driver_data = ACB_ADAPTER_TYPE_A},
 194         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
 195                 .driver_data = ACB_ADAPTER_TYPE_A},
 196         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
 197                 .driver_data = ACB_ADAPTER_TYPE_A},
 198         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
 199                 .driver_data = ACB_ADAPTER_TYPE_A},
 200         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
 201                 .driver_data = ACB_ADAPTER_TYPE_A},
 202         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
 203                 .driver_data = ACB_ADAPTER_TYPE_A},
 204         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
 205                 .driver_data = ACB_ADAPTER_TYPE_C},
 206         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
 207                 .driver_data = ACB_ADAPTER_TYPE_E},
 208         {0, 0}, /* Terminating entry */
 209 };
 210 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
 211
 212 static struct pci_driver arcmsr_pci_driver = {
 213         .name                   = "arcmsr",
 214         .id_table               = arcmsr_device_id_table,
 215         .probe                  = arcmsr_probe,
 216         .remove                 = arcmsr_remove,
 217         .suspend                = arcmsr_suspend,
 218         .resume                 = arcmsr_resume,
 219         .shutdown               = arcmsr_shutdown,
 220 };
 221 /*
 222 ****************************************************************************
 223 ****************************************************************************
 224 */
 225
 226 static void arcmsr_free_mu(struct AdapterControlBlock *acb)
 227 {
 228         switch (acb->adapter_type) {
 229         case ACB_ADAPTER_TYPE_B:
 230         case ACB_ADAPTER_TYPE_D:
 231         case ACB_ADAPTER_TYPE_E: {
 232                 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize,
 233                         acb->dma_coherent2, acb->dma_coherent_handle2);
 234                 break;
 235         }
 236         }
 237 }
 238
 239 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
 240 {
 241         struct pci_dev *pdev = acb->pdev;
 242         switch (acb->adapter_type){
 243         case ACB_ADAPTER_TYPE_A:{
 244                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
 245                 if (!acb->pmuA) {
 246                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 247                         return false;
 248                 }
 249                 break;
 250         }
 251         case ACB_ADAPTER_TYPE_B:{
 252                 void __iomem *mem_base0, *mem_base1;
 253                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 254                 if (!mem_base0) {
 255                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 256                         return false;
 257                 }
 258                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
 259                 if (!mem_base1) {
 260                         iounmap(mem_base0);
 261                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 262                         return false;
 263                 }
 264                 acb->mem_base0 = mem_base0;
 265                 acb->mem_base1 = mem_base1;
 266                 break;
 267         }
 268         case ACB_ADAPTER_TYPE_C:{
 269                 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
 270                 if (!acb->pmuC) {
 271                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 272                         return false;
 273                 }
 274                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 275                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
 276                         return true;
 277                 }
 278                 break;
 279         }
 280         case ACB_ADAPTER_TYPE_D: {
 281                 void __iomem *mem_base0;
 282                 unsigned long addr, range, flags;
 283
 284                 addr = (unsigned long)pci_resource_start(pdev, 0);
 285                 range = pci_resource_len(pdev, 0);
 286                 flags = pci_resource_flags(pdev, 0);
 287                 mem_base0 = ioremap(addr, range);
 288                 if (!mem_base0) {
 289                         pr_notice("arcmsr%d: memory mapping region fail\n",
 290                                 acb->host->host_no);
 291                         return false;
 292                 }
 293                 acb->mem_base0 = mem_base0;
 294                 break;
 295                 }
 296         case ACB_ADAPTER_TYPE_E: {
 297                 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
 298                         pci_resource_len(pdev, 1));
 299                 if (!acb->pmuE) {
 300                         pr_notice("arcmsr%d: memory mapping region fail \n",
 301                                 acb->host->host_no);
 302                         return false;
 303                 }
 304                 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
 305                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);       /* synchronize doorbell to 0 */
 306                 acb->in_doorbell = 0;
 307                 acb->out_doorbell = 0;
 308                 break;
 309                 }
 310         }
 311         return true;
 312 }
 313
 314 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
 315 {
 316         switch (acb->adapter_type) {
 317         case ACB_ADAPTER_TYPE_A:{
 318                 iounmap(acb->pmuA);
 319         }
 320         break;
 321         case ACB_ADAPTER_TYPE_B:{
 322                 iounmap(acb->mem_base0);
 323                 iounmap(acb->mem_base1);
 324         }
 325
 326         break;
 327         case ACB_ADAPTER_TYPE_C:{
 328                 iounmap(acb->pmuC);
 329         }
 330         break;
 331         case ACB_ADAPTER_TYPE_D:
 332                 iounmap(acb->mem_base0);
 333                 break;
 334         case ACB_ADAPTER_TYPE_E:
 335                 iounmap(acb->pmuE);
 336                 break;
 337         }
 338 }
 339
 340 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
 341 {
 342         irqreturn_t handle_state;
 343         struct AdapterControlBlock *acb = dev_id;
 344
 345         handle_state = arcmsr_interrupt(acb);
 346         return handle_state;
 347 }
 348
 349 static int arcmsr_bios_param(struct scsi_device *sdev,
 350                 struct block_device *bdev, sector_t capacity, int *geom)
 351 {
 352         int ret, heads, sectors, cylinders, total_capacity;
 353         unsigned char *buffer;/* return copy of block device's partition table */
 354
 355         buffer = scsi_bios_ptable(bdev);
 356         if (buffer) {
 357                 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
 358                 kfree(buffer);
 359                 if (ret != -1)
 360                         return ret;
 361         }
 362         total_capacity = capacity;
 363         heads = 64;
 364         sectors = 32;
 365         cylinders = total_capacity / (heads * sectors);
 366         if (cylinders > 1024) {
 367                 heads = 255;
 368                 sectors = 63;
 369                 cylinders = total_capacity / (heads * sectors);
 370         }
 371         geom[0] = heads;
 372         geom[1] = sectors;
 373         geom[2] = cylinders;
 374         return 0;
 375 }
 376
 377 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
 378 {
 379         struct MessageUnit_A __iomem *reg = acb->pmuA;
 380         int i;
 381
 382         for (i = 0; i < 2000; i++) {
 383                 if (readl(&reg->outbound_intstatus) &
 384                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
 385                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
 386                                 &reg->outbound_intstatus);
 387                         return true;
 388                 }
 389                 msleep(10);
 390         } /* max 20 seconds */
 391
 392         return false;
 393 }
 394
 395 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
 396 {
 397         struct MessageUnit_B *reg = acb->pmuB;
 398         int i;
 399
 400         for (i = 0; i < 2000; i++) {
 401                 if (readl(reg->iop2drv_doorbell)
 402                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
 403                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
 404                                         reg->iop2drv_doorbell);
 405                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
 406                                         reg->drv2iop_doorbell);
 407                         return true;
 408                 }
 409                 msleep(10);
 410         } /* max 20 seconds */
 411
 412         return false;
 413 }
 414
 415 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
 416 {
 417         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
 418         int i;
 419
 420         for (i = 0; i < 2000; i++) {
 421                 if (readl(&phbcmu->outbound_doorbell)
 422                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 423                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
 424                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
 425                         return true;
 426                 }
 427                 msleep(10);
 428         } /* max 20 seconds */
 429
 430         return false;
 431 }
 432
 433 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
 434 {
 435         struct MessageUnit_D *reg = pACB->pmuD;
 436         int i;
 437
 438         for (i = 0; i < 2000; i++) {
 439                 if (readl(reg->outbound_doorbell)
 440                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
 441                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
 442                                 reg->outbound_doorbell);
 443                         return true;
 444                 }
 445                 msleep(10);
 446         } /* max 20 seconds */
 447         return false;
 448 }
 449
 450 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
 451 {
 452         int i;
 453         uint32_t read_doorbell;
 454         struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
 455
 456         for (i = 0; i < 2000; i++) {
 457                 read_doorbell = readl(&phbcmu->iobound_doorbell);
 458                 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
 459                         writel(0, &phbcmu->host_int_status); /*clear interrupt*/
 460                         pACB->in_doorbell = read_doorbell;
 461                         return true;
 462                 }
 463                 msleep(10);
 464         } /* max 20 seconds */
 465         return false;
 466 }
 467
 468 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
 469 {
 470         struct MessageUnit_A __iomem *reg = acb->pmuA;
 471         int retry_count = 30;
 472         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 473         do {
 474                 if (arcmsr_hbaA_wait_msgint_ready(acb))
 475                         break;
 476                 else {
 477                         retry_count--;
 478                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 479                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
 480                 }
 481         } while (retry_count != 0);
 482 }
 483
 484 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
 485 {
 486         struct MessageUnit_B *reg = acb->pmuB;
 487         int retry_count = 30;
 488         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
 489         do {
 490                 if (arcmsr_hbaB_wait_msgint_ready(acb))
 491                         break;
 492                 else {
 493                         retry_count--;
 494                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 495                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
 496                 }
 497         } while (retry_count != 0);
 498 }
 499
 500 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
 501 {
 502         struct MessageUnit_C __iomem *reg = pACB->pmuC;
 503         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
 504         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 505         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
 506         do {
 507                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
 508                         break;
 509                 } else {
 510                         retry_count--;
 511                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 512                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
 513                 }
 514         } while (retry_count != 0);
 515         return;
 516 }
 517
 518 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
 519 {
 520         int retry_count = 15;
 521         struct MessageUnit_D *reg = pACB->pmuD;
 522
 523         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
 524         do {
 525                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
 526                         break;
 527
 528                 retry_count--;
 529                 pr_notice("arcmsr%d: wait 'flush adapter "
 530                         "cache' timeout, retry count down = %d\n",
 531                         pACB->host->host_no, retry_count);
 532         } while (retry_count != 0);
 533 }
 534
 535 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
 536 {
 537         int retry_count = 30;
 538         struct MessageUnit_E __iomem *reg = pACB->pmuE;
 539
 540         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 541         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
 542         writel(pACB->out_doorbell, &reg->iobound_doorbell);
 543         do {
 544                 if (arcmsr_hbaE_wait_msgint_ready(pACB))
 545                         break;
 546                 retry_count--;
 547                 pr_notice("arcmsr%d: wait 'flush adapter "
 548                         "cache' timeout, retry count down = %d\n",
 549                         pACB->host->host_no, retry_count);
 550         } while (retry_count != 0);
 551 }
 552
 553 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
 554 {
 555         switch (acb->adapter_type) {
 556
 557         case ACB_ADAPTER_TYPE_A: {
 558                 arcmsr_hbaA_flush_cache(acb);
 559                 }
 560                 break;
 561
 562         case ACB_ADAPTER_TYPE_B: {
 563                 arcmsr_hbaB_flush_cache(acb);
 564                 }
 565                 break;
 566         case ACB_ADAPTER_TYPE_C: {
 567                 arcmsr_hbaC_flush_cache(acb);
 568                 }
 569                 break;
 570         case ACB_ADAPTER_TYPE_D:
 571                 arcmsr_hbaD_flush_cache(acb);
 572                 break;
 573         case ACB_ADAPTER_TYPE_E:
 574                 arcmsr_hbaE_flush_cache(acb);
 575                 break;
 576         }
 577 }
 578
 579 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
 580 {
 581         bool rtn = true;
 582         void *dma_coherent;
 583         dma_addr_t dma_coherent_handle;
 584         struct pci_dev *pdev = acb->pdev;
 585
 586         switch (acb->adapter_type) {
 587         case ACB_ADAPTER_TYPE_B: {
 588                 struct MessageUnit_B *reg;
 589                 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32);
 590                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 591                         &dma_coherent_handle, GFP_KERNEL);
 592                 if (!dma_coherent) {
 593                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 594                         return false;
 595                 }
 596                 acb->dma_coherent_handle2 = dma_coherent_handle;
 597                 acb->dma_coherent2 = dma_coherent;
 598                 reg = (struct MessageUnit_B *)dma_coherent;
 599                 acb->pmuB = reg;
 600                 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
 601                         reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
 602                         reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
 603                         reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
 604                         reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
 605                 } else {
 606                         reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
 607                         reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
 608                         reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
 609                         reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
 610                 }
 611                 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
 612                 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
 613                 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
 614                 }
 615                 break;
 616         case ACB_ADAPTER_TYPE_D: {
 617                 struct MessageUnit_D *reg;
 618
 619                 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32);
 620                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 621                         &dma_coherent_handle, GFP_KERNEL);
 622                 if (!dma_coherent) {
 623                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 624                         return false;
 625                 }
 626                 acb->dma_coherent_handle2 = dma_coherent_handle;
 627                 acb->dma_coherent2 = dma_coherent;
 628                 reg = (struct MessageUnit_D *)dma_coherent;
 629                 acb->pmuD = reg;
 630                 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
 631                 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
 632                 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
 633                 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
 634                 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
 635                 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
 636                 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
 637                 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
 638                 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
 639                 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
 640                 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
 641                 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
 642                 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
 643                 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
 644                 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
 645                 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
 646                 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
 647                 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
 648                 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
 649                 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
 650                 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
 651                 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
 652                 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
 653                 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
 654                 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
 655                 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
 656                 }
 657                 break;
 658         case ACB_ADAPTER_TYPE_E: {
 659                 uint32_t completeQ_size;
 660                 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
 661                 acb->roundup_ccbsize = roundup(completeQ_size, 32);
 662                 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize,
 663                         &dma_coherent_handle, GFP_KERNEL);
 664                 if (!dma_coherent){
 665                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 666                         return false;
 667                 }
 668                 acb->dma_coherent_handle2 = dma_coherent_handle;
 669                 acb->dma_coherent2 = dma_coherent;
 670                 acb->pCompletionQ = dma_coherent;
 671                 acb->completionQ_entry = acb->roundup_ccbsize / sizeof(struct deliver_completeQ);
 672                 acb->doneq_index = 0;
 673                 }
 674                 break;
 675         default:
 676                 break;
 677         }
 678         return rtn;
 679 }
 680
 681 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
 682 {
 683         struct pci_dev *pdev = acb->pdev;
 684         void *dma_coherent;
 685         dma_addr_t dma_coherent_handle;
 686         struct CommandControlBlock *ccb_tmp;
 687         int i = 0, j = 0;
 688         dma_addr_t cdb_phyaddr;
 689         unsigned long roundup_ccbsize;
 690         unsigned long max_xfer_len;
 691         unsigned long max_sg_entrys;
 692         uint32_t  firm_config_version;
 693
 694         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
 695                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
 696                         acb->devstate[i][j] = ARECA_RAID_GONE;
 697
 698         max_xfer_len = ARCMSR_MAX_XFER_LEN;
 699         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
 700         firm_config_version = acb->firm_cfg_version;
 701         if((firm_config_version & 0xFF) >= 3){
 702                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
 703                 max_sg_entrys = (max_xfer_len/4096);
 704         }
 705         acb->host->max_sectors = max_xfer_len/512;
 706         acb->host->sg_tablesize = max_sg_entrys;
 707         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
 708         acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
 709         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
 710         if(!dma_coherent){
 711                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
 712                 return -ENOMEM;
 713         }
 714         acb->dma_coherent = dma_coherent;
 715         acb->dma_coherent_handle = dma_coherent_handle;
 716         memset(dma_coherent, 0, acb->uncache_size);
 717         acb->ccbsize = roundup_ccbsize;
 718         ccb_tmp = dma_coherent;
 719         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
 720         for(i = 0; i < acb->maxFreeCCB; i++){
 721                 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
 722                 switch (acb->adapter_type) {
 723                 case ACB_ADAPTER_TYPE_A:
 724                 case ACB_ADAPTER_TYPE_B:
 725                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
 726                         break;
 727                 case ACB_ADAPTER_TYPE_C:
 728                 case ACB_ADAPTER_TYPE_D:
 729                 case ACB_ADAPTER_TYPE_E:
 730                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
 731                         break;
 732                 }
 733                 acb->pccb_pool[i] = ccb_tmp;
 734                 ccb_tmp->acb = acb;
 735                 ccb_tmp->smid = (u32)i << 16;
 736                 INIT_LIST_HEAD(&ccb_tmp->list);
 737                 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
 738                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
 739                 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
 740         }
 741         return 0;
 742 }
 743
 744 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
 745 {
 746         struct AdapterControlBlock *acb = container_of(work,
 747                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
 748         char *acb_dev_map = (char *)acb->device_map;
 749         uint32_t __iomem *signature = NULL;
 750         char __iomem *devicemap = NULL;
 751         int target, lun;
 752         struct scsi_device *psdev;
 753         char diff, temp;
 754
 755         acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
 756         switch (acb->adapter_type) {
 757         case ACB_ADAPTER_TYPE_A: {
 758                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
 759
 760                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 761                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 762                 break;
 763         }
 764         case ACB_ADAPTER_TYPE_B: {
 765                 struct MessageUnit_B *reg  = acb->pmuB;
 766
 767                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 768                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 769                 break;
 770         }
 771         case ACB_ADAPTER_TYPE_C: {
 772                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
 773
 774                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 775                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 776                 break;
 777         }
 778         case ACB_ADAPTER_TYPE_D: {
 779                 struct MessageUnit_D *reg  = acb->pmuD;
 780
 781                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 782                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 783                 break;
 784         }
 785         case ACB_ADAPTER_TYPE_E: {
 786                 struct MessageUnit_E __iomem *reg  = acb->pmuE;
 787
 788                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 789                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 790                 break;
 791                 }
 792         }
 793         atomic_inc(&acb->rq_map_token);
 794         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
 795                 return;
 796         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
 797                 target++) {
 798                 temp = readb(devicemap);
 799                 diff = (*acb_dev_map) ^ temp;
 800                 if (diff != 0) {
 801                         *acb_dev_map = temp;
 802                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
 803                                 lun++) {
 804                                 if ((diff & 0x01) == 1 &&
 805                                         (temp & 0x01) == 1) {
 806                                         scsi_add_device(acb->host,
 807                                                 0, target, lun);
 808                                 } else if ((diff & 0x01) == 1
 809                                         && (temp & 0x01) == 0) {
 810                                         psdev = scsi_device_lookup(acb->host,
 811                                                 0, target, lun);
 812                                         if (psdev != NULL) {
 813                                                 scsi_remove_device(psdev);
 814                                                 scsi_device_put(psdev);
 815                                         }
 816                                 }
 817                                 temp >>= 1;
 818                                 diff >>= 1;
 819                         }
 820                 }
 821                 devicemap++;
 822                 acb_dev_map++;
 823         }
 824 }
 825
 826 static int
 827 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
 828 {
 829         unsigned long flags;
 830         int nvec, i;
 831
 832         if (msix_enable == 0)
 833                 goto msi_int0;
 834         nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
 835                         PCI_IRQ_MSIX);
 836         if (nvec > 0) {
 837                 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
 838                 flags = 0;
 839         } else {
 840 msi_int0:
 841                 if (msi_enable == 1) {
 842                         nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
 843                         if (nvec == 1) {
 844                                 dev_info(&pdev->dev, "msi enabled\n");
 845                                 goto msi_int1;
 846                         }
 847                 }
 848                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
 849                 if (nvec < 1)
 850                         return FAILED;
 851 msi_int1:
 852                 flags = IRQF_SHARED;
 853         }
 854
 855         acb->vector_count = nvec;
 856         for (i = 0; i < nvec; i++) {
 857                 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
 858                                 flags, "arcmsr", acb)) {
 859                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
 860                                 acb->host->host_no, pci_irq_vector(pdev, i));
 861                         goto out_free_irq;
 862                 }
 863         }
 864
 865         return SUCCESS;
 866 out_free_irq:
 867         while (--i >= 0)
 868                 free_irq(pci_irq_vector(pdev, i), acb);
 869         pci_free_irq_vectors(pdev);
 870         return FAILED;
 871 }
 872
 873 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
 874 {
 875         INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
 876         atomic_set(&pacb->rq_map_token, 16);
 877         atomic_set(&pacb->ante_token_value, 16);
 878         pacb->fw_flag = FW_NORMAL;
 879         timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
 880         pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
 881         add_timer(&pacb->eternal_timer);
 882 }
 883
 884 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
 885 {
 886         timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
 887         pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
 888         add_timer(&pacb->refresh_timer);
 889 }
 890
 891 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 892 {
 893         struct Scsi_Host *host;
 894         struct AdapterControlBlock *acb;
 895         uint8_t bus,dev_fun;
 896         int error;
 897         error = pci_enable_device(pdev);
 898         if(error){
 899                 return -ENODEV;
 900         }
 901         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
 902         if(!host){
 903                 goto pci_disable_dev;
 904         }
 905         error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
 906         if(error){
 907                 error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
 908                 if(error){
 909                         printk(KERN_WARNING
 910                                "scsi%d: No suitable DMA mask available\n",
 911                                host->host_no);
 912                         goto scsi_host_release;
 913                 }
 914         }
 915         init_waitqueue_head(&wait_q);
 916         bus = pdev->bus->number;
 917         dev_fun = pdev->devfn;
 918         acb = (struct AdapterControlBlock *) host->hostdata;
 919         memset(acb,0,sizeof(struct AdapterControlBlock));
 920         acb->pdev = pdev;
 921         acb->host = host;
 922         host->max_lun = ARCMSR_MAX_TARGETLUN;
 923         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
 924         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
 925         if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
 926                 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
 927         host->can_queue = host_can_queue;       /* max simultaneous cmds */
 928         if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
 929                 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
 930         host->cmd_per_lun = cmd_per_lun;
 931         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
 932         host->unique_id = (bus << 8) | dev_fun;
 933         pci_set_drvdata(pdev, host);
 934         pci_set_master(pdev);
 935         error = pci_request_regions(pdev, "arcmsr");
 936         if(error){
 937                 goto scsi_host_release;
 938         }
 939         spin_lock_init(&acb->eh_lock);
 940         spin_lock_init(&acb->ccblist_lock);
 941         spin_lock_init(&acb->postq_lock);
 942         spin_lock_init(&acb->doneq_lock);
 943         spin_lock_init(&acb->rqbuffer_lock);
 944         spin_lock_init(&acb->wqbuffer_lock);
 945         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
 946                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
 947                         ACB_F_MESSAGE_WQBUFFER_READED);
 948         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
 949         INIT_LIST_HEAD(&acb->ccb_free_list);
 950         acb->adapter_type = id->driver_data;
 951         error = arcmsr_remap_pciregion(acb);
 952         if(!error){
 953                 goto pci_release_regs;
 954         }
 955         error = arcmsr_alloc_io_queue(acb);
 956         if (!error)
 957                 goto unmap_pci_region;
 958         error = arcmsr_get_firmware_spec(acb);
 959         if(!error){
 960                 goto free_hbb_mu;
 961         }
 962         error = arcmsr_alloc_ccb_pool(acb);
 963         if(error){
 964                 goto free_hbb_mu;
 965         }
 966         error = scsi_add_host(host, &pdev->dev);
 967         if(error){
 968                 goto free_ccb_pool;
 969         }
 970         if (arcmsr_request_irq(pdev, acb) == FAILED)
 971                 goto scsi_host_remove;
 972         arcmsr_iop_init(acb);
 973         arcmsr_init_get_devmap_timer(acb);
 974         if (set_date_time)
 975                 arcmsr_init_set_datetime_timer(acb);
 976         if(arcmsr_alloc_sysfs_attr(acb))
 977                 goto out_free_sysfs;
 978         scsi_scan_host(host);
 979         return 0;
 980 out_free_sysfs:
 981         if (set_date_time)
 982                 del_timer_sync(&acb->refresh_timer);
 983         del_timer_sync(&acb->eternal_timer);
 984         flush_work(&acb->arcmsr_do_message_isr_bh);
 985         arcmsr_stop_adapter_bgrb(acb);
 986         arcmsr_flush_adapter_cache(acb);
 987         arcmsr_free_irq(pdev, acb);
 988 scsi_host_remove:
 989         scsi_remove_host(host);
 990 free_ccb_pool:
 991         arcmsr_free_ccb_pool(acb);
 992 free_hbb_mu:
 993         arcmsr_free_mu(acb);
 994 unmap_pci_region:
 995         arcmsr_unmap_pciregion(acb);
 996 pci_release_regs:
 997         pci_release_regions(pdev);
 998 scsi_host_release:
 999         scsi_host_put(host);
1000 pci_disable_dev:
1001         pci_disable_device(pdev);
1002         return -ENODEV;
1003 }
1004
1005 static void arcmsr_free_irq(struct pci_dev *pdev,
1006                 struct AdapterControlBlock *acb)
1007 {
1008         int i;
1009
1010         for (i = 0; i < acb->vector_count; i++)
1011                 free_irq(pci_irq_vector(pdev, i), acb);
1012         pci_free_irq_vectors(pdev);
1013 }
1014
1015 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
1016 {
1017         uint32_t intmask_org;
1018         struct Scsi_Host *host = pci_get_drvdata(pdev);
1019         struct AdapterControlBlock *acb =
1020                 (struct AdapterControlBlock *)host->hostdata;
1021
1022         intmask_org = arcmsr_disable_outbound_ints(acb);
1023         arcmsr_free_irq(pdev, acb);
1024         del_timer_sync(&acb->eternal_timer);
1025         if (set_date_time)
1026                 del_timer_sync(&acb->refresh_timer);
1027         flush_work(&acb->arcmsr_do_message_isr_bh);
1028         arcmsr_stop_adapter_bgrb(acb);
1029         arcmsr_flush_adapter_cache(acb);
1030         pci_set_drvdata(pdev, host);
1031         pci_save_state(pdev);
1032         pci_disable_device(pdev);
1033         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1034         return 0;
1035 }
1036
1037 static int arcmsr_resume(struct pci_dev *pdev)
1038 {
1039         int error;
1040         struct Scsi_Host *host = pci_get_drvdata(pdev);
1041         struct AdapterControlBlock *acb =
1042                 (struct AdapterControlBlock *)host->hostdata;
1043
1044         pci_set_power_state(pdev, PCI_D0);
1045         pci_enable_wake(pdev, PCI_D0, 0);
1046         pci_restore_state(pdev);
1047         if (pci_enable_device(pdev)) {
1048                 pr_warn("%s: pci_enable_device error\n", __func__);
1049                 return -ENODEV;
1050         }
1051         error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
1052         if (error) {
1053                 error = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1054                 if (error) {
1055                         pr_warn("scsi%d: No suitable DMA mask available\n",
1056                                host->host_no);
1057                         goto controller_unregister;
1058                 }
1059         }
1060         pci_set_master(pdev);
1061         if (arcmsr_request_irq(pdev, acb) == FAILED)
1062                 goto controller_stop;
1063         if (acb->adapter_type == ACB_ADAPTER_TYPE_E) {
1064                 writel(0, &acb->pmuE->host_int_status);
1065                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1066                 acb->in_doorbell = 0;
1067                 acb->out_doorbell = 0;
1068                 acb->doneq_index = 0;
1069         }
1070         arcmsr_iop_init(acb);
1071         arcmsr_init_get_devmap_timer(acb);
1072         if (set_date_time)
1073                 arcmsr_init_set_datetime_timer(acb);
1074         return 0;
1075 controller_stop:
1076         arcmsr_stop_adapter_bgrb(acb);
1077         arcmsr_flush_adapter_cache(acb);
1078 controller_unregister:
1079         scsi_remove_host(host);
1080         arcmsr_free_ccb_pool(acb);
1081         arcmsr_unmap_pciregion(acb);
1082         pci_release_regions(pdev);
1083         scsi_host_put(host);
1084         pci_disable_device(pdev);
1085         return -ENODEV;
1086 }
1087
1088 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1089 {
1090         struct MessageUnit_A __iomem *reg = acb->pmuA;
1091         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1092         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1093                 printk(KERN_NOTICE
1094                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1095                         , acb->host->host_no);
1096                 return false;
1097         }
1098         return true;
1099 }
1100
1101 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1102 {
1103         struct MessageUnit_B *reg = acb->pmuB;
1104
1105         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1106         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1107                 printk(KERN_NOTICE
1108                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1109                         , acb->host->host_no);
1110                 return false;
1111         }
1112         return true;
1113 }
1114 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1115 {
1116         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1117         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1118         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1119         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1120                 printk(KERN_NOTICE
1121                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1122                         , pACB->host->host_no);
1123                 return false;
1124         }
1125         return true;
1126 }
1127
1128 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1129 {
1130         struct MessageUnit_D *reg = pACB->pmuD;
1131
1132         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1133         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1134                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1135                         "command' timeout\n", pACB->host->host_no);
1136                 return false;
1137         }
1138         return true;
1139 }
1140
1141 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1142 {
1143         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1144
1145         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1146         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1147         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1148         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1149                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1150                         "command' timeout\n", pACB->host->host_no);
1151                 return false;
1152         }
1153         return true;
1154 }
1155
1156 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1157 {
1158         uint8_t rtnval = 0;
1159         switch (acb->adapter_type) {
1160         case ACB_ADAPTER_TYPE_A: {
1161                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1162                 }
1163                 break;
1164
1165         case ACB_ADAPTER_TYPE_B: {
1166                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1167                 }
1168                 break;
1169
1170         case ACB_ADAPTER_TYPE_C: {
1171                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1172                 }
1173                 break;
1174
1175         case ACB_ADAPTER_TYPE_D:
1176                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1177                 break;
1178         case ACB_ADAPTER_TYPE_E:
1179                 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1180                 break;
1181         }
1182         return rtnval;
1183 }
1184
1185 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
1186 {
1187         struct scsi_cmnd *pcmd = ccb->pcmd;
1188
1189         scsi_dma_unmap(pcmd);
1190 }
1191
1192 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1193 {
1194         struct AdapterControlBlock *acb = ccb->acb;
1195         struct scsi_cmnd *pcmd = ccb->pcmd;
1196         unsigned long flags;
1197         atomic_dec(&acb->ccboutstandingcount);
1198         arcmsr_pci_unmap_dma(ccb);
1199         ccb->startdone = ARCMSR_CCB_DONE;
1200         spin_lock_irqsave(&acb->ccblist_lock, flags);
1201         list_add_tail(&ccb->list, &acb->ccb_free_list);
1202         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1203         pcmd->scsi_done(pcmd);
1204 }
1205
1206 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1207 {
1208
1209         struct scsi_cmnd *pcmd = ccb->pcmd;
1210         struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1211         pcmd->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
1212         if (sensebuffer) {
1213                 int sense_data_length =
1214                         sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
1215                         ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
1216                 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
1217                 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
1218                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1219                 sensebuffer->Valid = 1;
1220                 pcmd->result |= (DRIVER_SENSE << 24);
1221         }
1222 }
1223
1224 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1225 {
1226         u32 orig_mask = 0;
1227         switch (acb->adapter_type) {
1228         case ACB_ADAPTER_TYPE_A : {
1229                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1230                 orig_mask = readl(&reg->outbound_intmask);
1231                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1232                                                 &reg->outbound_intmask);
1233                 }
1234                 break;
1235         case ACB_ADAPTER_TYPE_B : {
1236                 struct MessageUnit_B *reg = acb->pmuB;
1237                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1238                 writel(0, reg->iop2drv_doorbell_mask);
1239                 }
1240                 break;
1241         case ACB_ADAPTER_TYPE_C:{
1242                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1243                 /* disable all outbound interrupt */
1244                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1245                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1246                 }
1247                 break;
1248         case ACB_ADAPTER_TYPE_D: {
1249                 struct MessageUnit_D *reg = acb->pmuD;
1250                 /* disable all outbound interrupt */
1251                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1252                 }
1253                 break;
1254         case ACB_ADAPTER_TYPE_E: {
1255                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1256                 orig_mask = readl(&reg->host_int_mask);
1257                 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
1258                 readl(&reg->host_int_mask); /* Dummy readl to force pci flush */
1259                 }
1260                 break;
1261         }
1262         return orig_mask;
1263 }
1264
1265 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1266                         struct CommandControlBlock *ccb, bool error)
1267 {
1268         uint8_t id, lun;
1269         id = ccb->pcmd->device->id;
1270         lun = ccb->pcmd->device->lun;
1271         if (!error) {
1272                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1273                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1274                 ccb->pcmd->result = DID_OK << 16;
1275                 arcmsr_ccb_complete(ccb);
1276         }else{
1277                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1278                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1279                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1280                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1281                         arcmsr_ccb_complete(ccb);
1282                         }
1283                         break;
1284
1285                 case ARCMSR_DEV_ABORTED:
1286
1287                 case ARCMSR_DEV_INIT_FAIL: {
1288                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1289                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1290                         arcmsr_ccb_complete(ccb);
1291                         }
1292                         break;
1293
1294                 case ARCMSR_DEV_CHECK_CONDITION: {
1295                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1296                         arcmsr_report_sense_info(ccb);
1297                         arcmsr_ccb_complete(ccb);
1298                         }
1299                         break;
1300
1301                 default:
1302                         printk(KERN_NOTICE
1303                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1304                                 but got unknown DeviceStatus = 0x%x \n"
1305                                 , acb->host->host_no
1306                                 , id
1307                                 , lun
1308                                 , ccb->arcmsr_cdb.DeviceStatus);
1309                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1310                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1311                                 arcmsr_ccb_complete(ccb);
1312                         break;
1313                 }
1314         }
1315 }
1316
1317 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1318 {
1319         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1320                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1321                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1322                         if (abortcmd) {
1323                                 abortcmd->result |= DID_ABORT << 16;
1324                                 arcmsr_ccb_complete(pCCB);
1325                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1326                                 acb->host->host_no, pCCB);
1327                         }
1328                         return;
1329                 }
1330                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1331                                 done acb = '0x%p'"
1332                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1333                                 " ccboutstandingcount = %d \n"
1334                                 , acb->host->host_no
1335                                 , acb
1336                                 , pCCB
1337                                 , pCCB->acb
1338                                 , pCCB->startdone
1339                                 , atomic_read(&acb->ccboutstandingcount));
1340                   return;
1341         }
1342         arcmsr_report_ccb_state(acb, pCCB, error);
1343 }
1344
1345 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1346 {
1347         int i = 0;
1348         uint32_t flag_ccb, ccb_cdb_phy;
1349         struct ARCMSR_CDB *pARCMSR_CDB;
1350         bool error;
1351         struct CommandControlBlock *pCCB;
1352         switch (acb->adapter_type) {
1353
1354         case ACB_ADAPTER_TYPE_A: {
1355                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1356                 uint32_t outbound_intstatus;
1357                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1358                                         acb->outbound_int_enable;
1359                 /*clear and abort all outbound posted Q*/
1360                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1361                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1362                                 && (i++ < acb->maxOutstanding)) {
1363                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1364                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1365                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1366                         arcmsr_drain_donequeue(acb, pCCB, error);
1367                 }
1368                 }
1369                 break;
1370
1371         case ACB_ADAPTER_TYPE_B: {
1372                 struct MessageUnit_B *reg = acb->pmuB;
1373                 /*clear all outbound posted Q*/
1374                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1375                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1376                         flag_ccb = reg->done_qbuffer[i];
1377                         if (flag_ccb != 0) {
1378                                 reg->done_qbuffer[i] = 0;
1379                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1380                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1381                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1382                                 arcmsr_drain_donequeue(acb, pCCB, error);
1383                         }
1384                         reg->post_qbuffer[i] = 0;
1385                 }
1386                 reg->doneq_index = 0;
1387                 reg->postq_index = 0;
1388                 }
1389                 break;
1390         case ACB_ADAPTER_TYPE_C: {
1391                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1392                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1393                         /*need to do*/
1394                         flag_ccb = readl(&reg->outbound_queueport_low);
1395                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1396                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1397                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1398                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1399                         arcmsr_drain_donequeue(acb, pCCB, error);
1400                 }
1401                 }
1402                 break;
1403         case ACB_ADAPTER_TYPE_D: {
1404                 struct MessageUnit_D  *pmu = acb->pmuD;
1405                 uint32_t outbound_write_pointer;
1406                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1407                 unsigned long flags;
1408
1409                 residual = atomic_read(&acb->ccboutstandingcount);
1410                 for (i = 0; i < residual; i++) {
1411                         spin_lock_irqsave(&acb->doneq_lock, flags);
1412                         outbound_write_pointer =
1413                                 pmu->done_qbuffer[0].addressLow + 1;
1414                         doneq_index = pmu->doneq_index;
1415                         if ((doneq_index & 0xFFF) !=
1416                                 (outbound_write_pointer & 0xFFF)) {
1417                                 toggle = doneq_index & 0x4000;
1418                                 index_stripped = (doneq_index & 0xFFF) + 1;
1419                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1420                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1421                                         ((toggle ^ 0x4000) + 1);
1422                                 doneq_index = pmu->doneq_index;
1423                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1424                                 addressLow = pmu->done_qbuffer[doneq_index &
1425                                         0xFFF].addressLow;
1426                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1427                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1428                                         (acb->vir2phy_offset + ccb_cdb_phy);
1429                                 pCCB = container_of(pARCMSR_CDB,
1430                                         struct CommandControlBlock, arcmsr_cdb);
1431                                 error = (addressLow &
1432                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1433                                         true : false;
1434                                 arcmsr_drain_donequeue(acb, pCCB, error);
1435                                 writel(doneq_index,
1436                                         pmu->outboundlist_read_pointer);
1437                         } else {
1438                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1439                                 mdelay(10);
1440                         }
1441                 }
1442                 pmu->postq_index = 0;
1443                 pmu->doneq_index = 0x40FF;
1444                 }
1445                 break;
1446         case ACB_ADAPTER_TYPE_E:
1447                 arcmsr_hbaE_postqueue_isr(acb);
1448                 break;
1449         }
1450 }
1451
1452 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1453 {
1454         char *acb_dev_map = (char *)acb->device_map;
1455         int target, lun, i;
1456         struct scsi_device *psdev;
1457         struct CommandControlBlock *ccb;
1458         char temp;
1459
1460         for (i = 0; i < acb->maxFreeCCB; i++) {
1461                 ccb = acb->pccb_pool[i];
1462                 if (ccb->startdone == ARCMSR_CCB_START) {
1463                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1464                         arcmsr_pci_unmap_dma(ccb);
1465                         ccb->pcmd->scsi_done(ccb->pcmd);
1466                 }
1467         }
1468         for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1469                 temp = *acb_dev_map;
1470                 if (temp) {
1471                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1472                                 if (temp & 1) {
1473                                         psdev = scsi_device_lookup(acb->host,
1474                                                 0, target, lun);
1475                                         if (psdev != NULL) {
1476                                                 scsi_remove_device(psdev);
1477                                                 scsi_device_put(psdev);
1478                                         }
1479                                 }
1480                                 temp >>= 1;
1481                         }
1482                         *acb_dev_map = 0;
1483                 }
1484                 acb_dev_map++;
1485         }
1486 }
1487
1488 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1489 {
1490         struct pci_dev *pdev;
1491         struct Scsi_Host *host;
1492
1493         host = acb->host;
1494         arcmsr_free_sysfs_attr(acb);
1495         scsi_remove_host(host);
1496         flush_work(&acb->arcmsr_do_message_isr_bh);
1497         del_timer_sync(&acb->eternal_timer);
1498         if (set_date_time)
1499                 del_timer_sync(&acb->refresh_timer);
1500         pdev = acb->pdev;
1501         arcmsr_free_irq(pdev, acb);
1502         arcmsr_free_ccb_pool(acb);
1503         arcmsr_free_mu(acb);
1504         arcmsr_unmap_pciregion(acb);
1505         pci_release_regions(pdev);
1506         scsi_host_put(host);
1507         pci_disable_device(pdev);
1508 }
1509
1510 static void arcmsr_remove(struct pci_dev *pdev)
1511 {
1512         struct Scsi_Host *host = pci_get_drvdata(pdev);
1513         struct AdapterControlBlock *acb =
1514                 (struct AdapterControlBlock *) host->hostdata;
1515         int poll_count = 0;
1516         uint16_t dev_id;
1517
1518         pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1519         if (dev_id == 0xffff) {
1520                 acb->acb_flags &= ~ACB_F_IOP_INITED;
1521                 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1522                 arcmsr_remove_scsi_devices(acb);
1523                 arcmsr_free_pcidev(acb);
1524                 return;
1525         }
1526         arcmsr_free_sysfs_attr(acb);
1527         scsi_remove_host(host);
1528         flush_work(&acb->arcmsr_do_message_isr_bh);
1529         del_timer_sync(&acb->eternal_timer);
1530         if (set_date_time)
1531                 del_timer_sync(&acb->refresh_timer);
1532         arcmsr_disable_outbound_ints(acb);
1533         arcmsr_stop_adapter_bgrb(acb);
1534         arcmsr_flush_adapter_cache(acb);
1535         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1536         acb->acb_flags &= ~ACB_F_IOP_INITED;
1537
1538         for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1539                 if (!atomic_read(&acb->ccboutstandingcount))
1540                         break;
1541                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1542                 msleep(25);
1543         }
1544
1545         if (atomic_read(&acb->ccboutstandingcount)) {
1546                 int i;
1547
1548                 arcmsr_abort_allcmd(acb);
1549                 arcmsr_done4abort_postqueue(acb);
1550                 for (i = 0; i < acb->maxFreeCCB; i++) {
1551                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1552                         if (ccb->startdone == ARCMSR_CCB_START) {
1553                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1554                                 ccb->pcmd->result = DID_ABORT << 16;
1555                                 arcmsr_ccb_complete(ccb);
1556                         }
1557                 }
1558         }
1559         arcmsr_free_irq(pdev, acb);
1560         arcmsr_free_ccb_pool(acb);
1561         arcmsr_free_mu(acb);
1562         arcmsr_unmap_pciregion(acb);
1563         pci_release_regions(pdev);
1564         scsi_host_put(host);
1565         pci_disable_device(pdev);
1566 }
1567
1568 static void arcmsr_shutdown(struct pci_dev *pdev)
1569 {
1570         struct Scsi_Host *host = pci_get_drvdata(pdev);
1571         struct AdapterControlBlock *acb =
1572                 (struct AdapterControlBlock *)host->hostdata;
1573         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1574                 return;
1575         del_timer_sync(&acb->eternal_timer);
1576         if (set_date_time)
1577                 del_timer_sync(&acb->refresh_timer);
1578         arcmsr_disable_outbound_ints(acb);
1579         arcmsr_free_irq(pdev, acb);
1580         flush_work(&acb->arcmsr_do_message_isr_bh);
1581         arcmsr_stop_adapter_bgrb(acb);
1582         arcmsr_flush_adapter_cache(acb);
1583 }
1584
1585 static int arcmsr_module_init(void)
1586 {
1587         int error = 0;
1588         error = pci_register_driver(&arcmsr_pci_driver);
1589         return error;
1590 }
1591
1592 static void arcmsr_module_exit(void)
1593 {
1594         pci_unregister_driver(&arcmsr_pci_driver);
1595 }
1596 module_init(arcmsr_module_init);
1597 module_exit(arcmsr_module_exit);
1598
1599 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1600                                                 u32 intmask_org)
1601 {
1602         u32 mask;
1603         switch (acb->adapter_type) {
1604
1605         case ACB_ADAPTER_TYPE_A: {
1606                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1607                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1608                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1609                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1610                 writel(mask, &reg->outbound_intmask);
1611                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1612                 }
1613                 break;
1614
1615         case ACB_ADAPTER_TYPE_B: {
1616                 struct MessageUnit_B *reg = acb->pmuB;
1617                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1618                         ARCMSR_IOP2DRV_DATA_READ_OK |
1619                         ARCMSR_IOP2DRV_CDB_DONE |
1620                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1621                 writel(mask, reg->iop2drv_doorbell_mask);
1622                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1623                 }
1624                 break;
1625         case ACB_ADAPTER_TYPE_C: {
1626                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1627                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1628                 writel(intmask_org & mask, &reg->host_int_mask);
1629                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1630                 }
1631                 break;
1632         case ACB_ADAPTER_TYPE_D: {
1633                 struct MessageUnit_D *reg = acb->pmuD;
1634
1635                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1636                 writel(intmask_org | mask, reg->pcief0_int_enable);
1637                 break;
1638                 }
1639         case ACB_ADAPTER_TYPE_E: {
1640                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1641
1642                 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1643                 writel(intmask_org & mask, &reg->host_int_mask);
1644                 break;
1645                 }
1646         }
1647 }
1648
1649 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1650         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1651 {
1652         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1653         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1654         __le32 address_lo, address_hi;
1655         int arccdbsize = 0x30;
1656         __le32 length = 0;
1657         int i;
1658         struct scatterlist *sg;
1659         int nseg;
1660         ccb->pcmd = pcmd;
1661         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1662         arcmsr_cdb->TargetID = pcmd->device->id;
1663         arcmsr_cdb->LUN = pcmd->device->lun;
1664         arcmsr_cdb->Function = 1;
1665         arcmsr_cdb->msgContext = 0;
1666         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1667
1668         nseg = scsi_dma_map(pcmd);
1669         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1670                 return FAILED;
1671         scsi_for_each_sg(pcmd, sg, nseg, i) {
1672                 /* Get the physical address of the current data pointer */
1673                 length = cpu_to_le32(sg_dma_len(sg));
1674                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1675                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1676                 if (address_hi == 0) {
1677                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1678
1679                         pdma_sg->address = address_lo;
1680                         pdma_sg->length = length;
1681                         psge += sizeof (struct SG32ENTRY);
1682                         arccdbsize += sizeof (struct SG32ENTRY);
1683                 } else {
1684                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1685
1686                         pdma_sg->addresshigh = address_hi;
1687                         pdma_sg->address = address_lo;
1688                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1689                         psge += sizeof (struct SG64ENTRY);
1690                         arccdbsize += sizeof (struct SG64ENTRY);
1691                 }
1692         }
1693         arcmsr_cdb->sgcount = (uint8_t)nseg;
1694         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1695         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1696         if ( arccdbsize > 256)
1697                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1698         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1699                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1700         ccb->arc_cdb_size = arccdbsize;
1701         return SUCCESS;
1702 }
1703
1704 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1705 {
1706         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1707         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1708         atomic_inc(&acb->ccboutstandingcount);
1709         ccb->startdone = ARCMSR_CCB_START;
1710         switch (acb->adapter_type) {
1711         case ACB_ADAPTER_TYPE_A: {
1712                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1713
1714                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1715                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1716                         &reg->inbound_queueport);
1717                 else
1718                         writel(cdb_phyaddr, &reg->inbound_queueport);
1719                 break;
1720         }
1721
1722         case ACB_ADAPTER_TYPE_B: {
1723                 struct MessageUnit_B *reg = acb->pmuB;
1724                 uint32_t ending_index, index = reg->postq_index;
1725
1726                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1727                 reg->post_qbuffer[ending_index] = 0;
1728                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1729                         reg->post_qbuffer[index] =
1730                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1731                 } else {
1732                         reg->post_qbuffer[index] = cdb_phyaddr;
1733                 }
1734                 index++;
1735                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1736                 reg->postq_index = index;
1737                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1738                 }
1739                 break;
1740         case ACB_ADAPTER_TYPE_C: {
1741                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1742                 uint32_t ccb_post_stamp, arc_cdb_size;
1743
1744                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1745                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1746                 if (acb->cdb_phyaddr_hi32) {
1747                         writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1748                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1749                 } else {
1750                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1751                 }
1752                 }
1753                 break;
1754         case ACB_ADAPTER_TYPE_D: {
1755                 struct MessageUnit_D  *pmu = acb->pmuD;
1756                 u16 index_stripped;
1757                 u16 postq_index, toggle;
1758                 unsigned long flags;
1759                 struct InBound_SRB *pinbound_srb;
1760
1761                 spin_lock_irqsave(&acb->postq_lock, flags);
1762                 postq_index = pmu->postq_index;
1763                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1764                 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr);
1765                 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr);
1766                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1767                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1768                 toggle = postq_index & 0x4000;
1769                 index_stripped = postq_index + 1;
1770                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1771                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1772                         (toggle ^ 0x4000);
1773                 writel(postq_index, pmu->inboundlist_write_pointer);
1774                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1775                 break;
1776                 }
1777         case ACB_ADAPTER_TYPE_E: {
1778                 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1779                 u32 ccb_post_stamp, arc_cdb_size;
1780
1781                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1782                 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1783                 writel(0, &pmu->inbound_queueport_high);
1784                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1785                 break;
1786                 }
1787         }
1788 }
1789
1790 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1791 {
1792         struct MessageUnit_A __iomem *reg = acb->pmuA;
1793         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1794         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1795         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1796                 printk(KERN_NOTICE
1797                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1798                         , acb->host->host_no);
1799         }
1800 }
1801
1802 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1803 {
1804         struct MessageUnit_B *reg = acb->pmuB;
1805         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1806         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1807
1808         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1809                 printk(KERN_NOTICE
1810                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1811                         , acb->host->host_no);
1812         }
1813 }
1814
1815 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1816 {
1817         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1818         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1819         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1820         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1821         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1822                 printk(KERN_NOTICE
1823                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
1824                         , pACB->host->host_no);
1825         }
1826         return;
1827 }
1828
1829 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1830 {
1831         struct MessageUnit_D *reg = pACB->pmuD;
1832
1833         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1834         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1835         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1836                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1837                         "timeout\n", pACB->host->host_no);
1838 }
1839
1840 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
1841 {
1842         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1843
1844         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1845         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1846         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1847         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1848         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1849                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
1850                         "timeout\n", pACB->host->host_no);
1851         }
1852 }
1853
1854 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1855 {
1856         switch (acb->adapter_type) {
1857         case ACB_ADAPTER_TYPE_A: {
1858                 arcmsr_hbaA_stop_bgrb(acb);
1859                 }
1860                 break;
1861
1862         case ACB_ADAPTER_TYPE_B: {
1863                 arcmsr_hbaB_stop_bgrb(acb);
1864                 }
1865                 break;
1866         case ACB_ADAPTER_TYPE_C: {
1867                 arcmsr_hbaC_stop_bgrb(acb);
1868                 }
1869                 break;
1870         case ACB_ADAPTER_TYPE_D:
1871                 arcmsr_hbaD_stop_bgrb(acb);
1872                 break;
1873         case ACB_ADAPTER_TYPE_E:
1874                 arcmsr_hbaE_stop_bgrb(acb);
1875                 break;
1876         }
1877 }
1878
1879 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1880 {
1881         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1882 }
1883
1884 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1885 {
1886         switch (acb->adapter_type) {
1887         case ACB_ADAPTER_TYPE_A: {
1888                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1889                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1890                 }
1891                 break;
1892
1893         case ACB_ADAPTER_TYPE_B: {
1894                 struct MessageUnit_B *reg = acb->pmuB;
1895                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
1896                 }
1897                 break;
1898         case ACB_ADAPTER_TYPE_C: {
1899                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1900
1901                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1902                 }
1903                 break;
1904         case ACB_ADAPTER_TYPE_D: {
1905                 struct MessageUnit_D *reg = acb->pmuD;
1906                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
1907                         reg->inbound_doorbell);
1908                 }
1909                 break;
1910         case ACB_ADAPTER_TYPE_E: {
1911                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1912                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
1913                 writel(acb->out_doorbell, &reg->iobound_doorbell);
1914                 }
1915                 break;
1916         }
1917 }
1918
1919 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1920 {
1921         switch (acb->adapter_type) {
1922         case ACB_ADAPTER_TYPE_A: {
1923                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1924                 /*
1925                 ** push inbound doorbell tell iop, driver data write ok
1926                 ** and wait reply on next hwinterrupt for next Qbuffer post
1927                 */
1928                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1929                 }
1930                 break;
1931
1932         case ACB_ADAPTER_TYPE_B: {
1933                 struct MessageUnit_B *reg = acb->pmuB;
1934                 /*
1935                 ** push inbound doorbell tell iop, driver data write ok
1936                 ** and wait reply on next hwinterrupt for next Qbuffer post
1937                 */
1938                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
1939                 }
1940                 break;
1941         case ACB_ADAPTER_TYPE_C: {
1942                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1943                 /*
1944                 ** push inbound doorbell tell iop, driver data write ok
1945                 ** and wait reply on next hwinterrupt for next Qbuffer post
1946                 */
1947                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1948                 }
1949                 break;
1950         case ACB_ADAPTER_TYPE_D: {
1951                 struct MessageUnit_D *reg = acb->pmuD;
1952                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
1953                         reg->inbound_doorbell);
1954                 }
1955                 break;
1956         case ACB_ADAPTER_TYPE_E: {
1957                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1958                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
1959                 writel(acb->out_doorbell, &reg->iobound_doorbell);
1960                 }
1961                 break;
1962         }
1963 }
1964
1965 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1966 {
1967         struct QBUFFER __iomem *qbuffer = NULL;
1968         switch (acb->adapter_type) {
1969
1970         case ACB_ADAPTER_TYPE_A: {
1971                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1972                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1973                 }
1974                 break;
1975
1976         case ACB_ADAPTER_TYPE_B: {
1977                 struct MessageUnit_B *reg = acb->pmuB;
1978                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1979                 }
1980                 break;
1981         case ACB_ADAPTER_TYPE_C: {
1982                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1983                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1984                 }
1985                 break;
1986         case ACB_ADAPTER_TYPE_D: {
1987                 struct MessageUnit_D *reg = acb->pmuD;
1988                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1989                 }
1990                 break;
1991         case ACB_ADAPTER_TYPE_E: {
1992                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1993                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1994                 }
1995                 break;
1996         }
1997         return qbuffer;
1998 }
1999
2000 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2001 {
2002         struct QBUFFER __iomem *pqbuffer = NULL;
2003         switch (acb->adapter_type) {
2004
2005         case ACB_ADAPTER_TYPE_A: {
2006                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2007                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2008                 }
2009                 break;
2010
2011         case ACB_ADAPTER_TYPE_B: {
2012                 struct MessageUnit_B  *reg = acb->pmuB;
2013                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2014                 }
2015                 break;
2016         case ACB_ADAPTER_TYPE_C: {
2017                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2018                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2019                 }
2020                 break;
2021         case ACB_ADAPTER_TYPE_D: {
2022                 struct MessageUnit_D *reg = acb->pmuD;
2023                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2024                 }
2025                 break;
2026         case ACB_ADAPTER_TYPE_E: {
2027                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2028                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2029                 }
2030                 break;
2031         }
2032         return pqbuffer;
2033 }
2034
2035 static uint32_t
2036 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2037                 struct QBUFFER __iomem *prbuffer)
2038 {
2039         uint8_t *pQbuffer;
2040         uint8_t *buf1 = NULL;
2041         uint32_t __iomem *iop_data;
2042         uint32_t iop_len, data_len, *buf2 = NULL;
2043
2044         iop_data = (uint32_t __iomem *)prbuffer->data;
2045         iop_len = readl(&prbuffer->data_len);
2046         if (iop_len > 0) {
2047                 buf1 = kmalloc(128, GFP_ATOMIC);
2048                 buf2 = (uint32_t *)buf1;
2049                 if (buf1 == NULL)
2050                         return 0;
2051                 data_len = iop_len;
2052                 while (data_len >= 4) {
2053                         *buf2++ = readl(iop_data);
2054                         iop_data++;
2055                         data_len -= 4;
2056                 }
2057                 if (data_len)
2058                         *buf2 = readl(iop_data);
2059                 buf2 = (uint32_t *)buf1;
2060         }
2061         while (iop_len > 0) {
2062                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2063                 *pQbuffer = *buf1;
2064                 acb->rqbuf_putIndex++;
2065                 /* if last, index number set it to 0 */
2066                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2067                 buf1++;
2068                 iop_len--;
2069         }
2070         kfree(buf2);
2071         /* let IOP know data has been read */
2072         arcmsr_iop_message_read(acb);
2073         return 1;
2074 }
2075
2076 uint32_t
2077 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2078         struct QBUFFER __iomem *prbuffer) {
2079
2080         uint8_t *pQbuffer;
2081         uint8_t __iomem *iop_data;
2082         uint32_t iop_len;
2083
2084         if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2085                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2086         iop_data = (uint8_t __iomem *)prbuffer->data;
2087         iop_len = readl(&prbuffer->data_len);
2088         while (iop_len > 0) {
2089                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2090                 *pQbuffer = readb(iop_data);
2091                 acb->rqbuf_putIndex++;
2092                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2093                 iop_data++;
2094                 iop_len--;
2095         }
2096         arcmsr_iop_message_read(acb);
2097         return 1;
2098 }
2099
2100 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2101 {
2102         unsigned long flags;
2103         struct QBUFFER __iomem  *prbuffer;
2104         int32_t buf_empty_len;
2105
2106         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2107         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2108         buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
2109                 (ARCMSR_MAX_QBUFFER - 1);
2110         if (buf_empty_len >= readl(&prbuffer->data_len)) {
2111                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2112                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2113         } else
2114                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2115         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2116 }
2117
2118 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2119 {
2120         uint8_t *pQbuffer;
2121         struct QBUFFER __iomem *pwbuffer;
2122         uint8_t *buf1 = NULL;
2123         uint32_t __iomem *iop_data;
2124         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2125
2126         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2127                 buf1 = kmalloc(128, GFP_ATOMIC);
2128                 buf2 = (uint32_t *)buf1;
2129                 if (buf1 == NULL)
2130                         return;
2131
2132                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2133                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2134                 iop_data = (uint32_t __iomem *)pwbuffer->data;
2135                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2136                         && (allxfer_len < 124)) {
2137                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2138                         *buf1 = *pQbuffer;
2139                         acb->wqbuf_getIndex++;
2140                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2141                         buf1++;
2142                         allxfer_len++;
2143                 }
2144                 data_len = allxfer_len;
2145                 buf1 = (uint8_t *)buf2;
2146                 while (data_len >= 4) {
2147                         data = *buf2++;
2148                         writel(data, iop_data);
2149                         iop_data++;
2150                         data_len -= 4;
2151                 }
2152                 if (data_len) {
2153                         data = *buf2;
2154                         writel(data, iop_data);
2155                 }
2156                 writel(allxfer_len, &pwbuffer->data_len);
2157                 kfree(buf1);
2158                 arcmsr_iop_message_wrote(acb);
2159         }
2160 }
2161
2162 void
2163 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2164 {
2165         uint8_t *pQbuffer;
2166         struct QBUFFER __iomem *pwbuffer;
2167         uint8_t __iomem *iop_data;
2168         int32_t allxfer_len = 0;
2169
2170         if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2171                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2172                 return;
2173         }
2174         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2175                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2176                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2177                 iop_data = (uint8_t __iomem *)pwbuffer->data;
2178                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2179                         && (allxfer_len < 124)) {
2180                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2181                         writeb(*pQbuffer, iop_data);
2182                         acb->wqbuf_getIndex++;
2183                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2184                         iop_data++;
2185                         allxfer_len++;
2186                 }
2187                 writel(allxfer_len, &pwbuffer->data_len);
2188                 arcmsr_iop_message_wrote(acb);
2189         }
2190 }
2191
2192 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2193 {
2194         unsigned long flags;
2195
2196         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2197         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2198         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2199                 arcmsr_write_ioctldata2iop(acb);
2200         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2201                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2202         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2203 }
2204
2205 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2206 {
2207         uint32_t outbound_doorbell;
2208         struct MessageUnit_A __iomem *reg = acb->pmuA;
2209         outbound_doorbell = readl(&reg->outbound_doorbell);
2210         do {
2211                 writel(outbound_doorbell, &reg->outbound_doorbell);
2212                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2213                         arcmsr_iop2drv_data_wrote_handle(acb);
2214                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2215                         arcmsr_iop2drv_data_read_handle(acb);
2216                 outbound_doorbell = readl(&reg->outbound_doorbell);
2217         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2218                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2219 }
2220 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2221 {
2222         uint32_t outbound_doorbell;
2223         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2224         /*
2225         *******************************************************************
2226         **  Maybe here we need to check wrqbuffer_lock is lock or not
2227         **  DOORBELL: din! don!
2228         **  check if there are any mail need to pack from firmware
2229         *******************************************************************
2230         */
2231         outbound_doorbell = readl(&reg->outbound_doorbell);
2232         do {
2233                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2234                 readl(&reg->outbound_doorbell_clear);
2235                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2236                         arcmsr_iop2drv_data_wrote_handle(pACB);
2237                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2238                         arcmsr_iop2drv_data_read_handle(pACB);
2239                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2240                         arcmsr_hbaC_message_isr(pACB);
2241                 outbound_doorbell = readl(&reg->outbound_doorbell);
2242         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2243                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2244                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2245 }
2246
2247 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2248 {
2249         uint32_t outbound_doorbell;
2250         struct MessageUnit_D  *pmu = pACB->pmuD;
2251
2252         outbound_doorbell = readl(pmu->outbound_doorbell);
2253         do {
2254                 writel(outbound_doorbell, pmu->outbound_doorbell);
2255                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2256                         arcmsr_hbaD_message_isr(pACB);
2257                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2258                         arcmsr_iop2drv_data_wrote_handle(pACB);
2259                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2260                         arcmsr_iop2drv_data_read_handle(pACB);
2261                 outbound_doorbell = readl(pmu->outbound_doorbell);
2262         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2263                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2264                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2265 }
2266
2267 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2268 {
2269         uint32_t outbound_doorbell, in_doorbell, tmp;
2270         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2271
2272         in_doorbell = readl(&reg->iobound_doorbell);
2273         outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2274         do {
2275                 writel(0, &reg->host_int_status); /* clear interrupt */
2276                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2277                         arcmsr_iop2drv_data_wrote_handle(pACB);
2278                 }
2279                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2280                         arcmsr_iop2drv_data_read_handle(pACB);
2281                 }
2282                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2283                         arcmsr_hbaE_message_isr(pACB);
2284                 }
2285                 tmp = in_doorbell;
2286                 in_doorbell = readl(&reg->iobound_doorbell);
2287                 outbound_doorbell = tmp ^ in_doorbell;
2288         } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2289                 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2290                 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2291         pACB->in_doorbell = in_doorbell;
2292 }
2293
2294 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2295 {
2296         uint32_t flag_ccb;
2297         struct MessageUnit_A __iomem *reg = acb->pmuA;
2298         struct ARCMSR_CDB *pARCMSR_CDB;
2299         struct CommandControlBlock *pCCB;
2300         bool error;
2301         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
2302                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
2303                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2304                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2305                 arcmsr_drain_donequeue(acb, pCCB, error);
2306         }
2307 }
2308 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2309 {
2310         uint32_t index;
2311         uint32_t flag_ccb;
2312         struct MessageUnit_B *reg = acb->pmuB;
2313         struct ARCMSR_CDB *pARCMSR_CDB;
2314         struct CommandControlBlock *pCCB;
2315         bool error;
2316         index = reg->doneq_index;
2317         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2318                 reg->done_qbuffer[index] = 0;
2319                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
2320                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2321                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2322                 arcmsr_drain_donequeue(acb, pCCB, error);
2323                 index++;
2324                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2325                 reg->doneq_index = index;
2326         }
2327 }
2328
2329 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2330 {
2331         struct MessageUnit_C __iomem *phbcmu;
2332         struct ARCMSR_CDB *arcmsr_cdb;
2333         struct CommandControlBlock *ccb;
2334         uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
2335         int error;
2336
2337         phbcmu = acb->pmuC;
2338         /* areca cdb command done */
2339         /* Use correct offset and size for syncing */
2340
2341         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2342                         0xFFFFFFFF) {
2343                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2344                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2345                         + ccb_cdb_phy);
2346                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2347                         arcmsr_cdb);
2348                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2349                         ? true : false;
2350                 /* check if command done with no error */
2351                 arcmsr_drain_donequeue(acb, ccb, error);
2352                 throttling++;
2353                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2354                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2355                                 &phbcmu->inbound_doorbell);
2356                         throttling = 0;
2357                 }
2358         }
2359 }
2360
2361 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2362 {
2363         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2364         uint32_t addressLow, ccb_cdb_phy;
2365         int error;
2366         struct MessageUnit_D  *pmu;
2367         struct ARCMSR_CDB *arcmsr_cdb;
2368         struct CommandControlBlock *ccb;
2369         unsigned long flags;
2370
2371         spin_lock_irqsave(&acb->doneq_lock, flags);
2372         pmu = acb->pmuD;
2373         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2374         doneq_index = pmu->doneq_index;
2375         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2376                 do {
2377                         toggle = doneq_index & 0x4000;
2378                         index_stripped = (doneq_index & 0xFFF) + 1;
2379                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2380                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2381                                 ((toggle ^ 0x4000) + 1);
2382                         doneq_index = pmu->doneq_index;
2383                         addressLow = pmu->done_qbuffer[doneq_index &
2384                                 0xFFF].addressLow;
2385                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2386                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2387                                 + ccb_cdb_phy);
2388                         ccb = container_of(arcmsr_cdb,
2389                                 struct CommandControlBlock, arcmsr_cdb);
2390                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2391                                 ? true : false;
2392                         arcmsr_drain_donequeue(acb, ccb, error);
2393                         writel(doneq_index, pmu->outboundlist_read_pointer);
2394                 } while ((doneq_index & 0xFFF) !=
2395                         (outbound_write_pointer & 0xFFF));
2396         }
2397         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2398                 pmu->outboundlist_interrupt_cause);
2399         readl(pmu->outboundlist_interrupt_cause);
2400         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2401 }
2402
2403 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2404 {
2405         uint32_t doneq_index;
2406         uint16_t cmdSMID;
2407         int error;
2408         struct MessageUnit_E __iomem *pmu;
2409         struct CommandControlBlock *ccb;
2410         unsigned long flags;
2411
2412         spin_lock_irqsave(&acb->doneq_lock, flags);
2413         doneq_index = acb->doneq_index;
2414         pmu = acb->pmuE;
2415         while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2416                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2417                 ccb = acb->pccb_pool[cmdSMID];
2418                 error = (acb->pCompletionQ[doneq_index].cmdFlag
2419                         & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2420                 arcmsr_drain_donequeue(acb, ccb, error);
2421                 doneq_index++;
2422                 if (doneq_index >= acb->completionQ_entry)
2423                         doneq_index = 0;
2424         }
2425         acb->doneq_index = doneq_index;
2426         writel(doneq_index, &pmu->reply_post_consumer_index);
2427         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2428 }
2429
2430 /*
2431 **********************************************************************************
2432 ** Handle a message interrupt
2433 **
2434 ** The only message interrupt we expect is in response to a query for the current adapter config.
2435 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2436 **********************************************************************************
2437 */
2438 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2439 {
2440         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2441         /*clear interrupt and message state*/
2442         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2443         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2444                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2445 }
2446 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2447 {
2448         struct MessageUnit_B *reg  = acb->pmuB;
2449
2450         /*clear interrupt and message state*/
2451         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2452         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2453                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2454 }
2455 /*
2456 **********************************************************************************
2457 ** Handle a message interrupt
2458 **
2459 ** The only message interrupt we expect is in response to a query for the
2460 ** current adapter config.
2461 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2462 **********************************************************************************
2463 */
2464 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2465 {
2466         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2467         /*clear interrupt and message state*/
2468         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2469         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2470                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2471 }
2472
2473 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2474 {
2475         struct MessageUnit_D *reg  = acb->pmuD;
2476
2477         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2478         readl(reg->outbound_doorbell);
2479         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2480                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2481 }
2482
2483 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2484 {
2485         struct MessageUnit_E __iomem *reg  = acb->pmuE;
2486
2487         writel(0, &reg->host_int_status);
2488         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2489                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2490 }
2491
2492 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2493 {
2494         uint32_t outbound_intstatus;
2495         struct MessageUnit_A __iomem *reg = acb->pmuA;
2496         outbound_intstatus = readl(&reg->outbound_intstatus) &
2497                 acb->outbound_int_enable;
2498         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2499                 return IRQ_NONE;
2500         do {
2501                 writel(outbound_intstatus, &reg->outbound_intstatus);
2502                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2503                         arcmsr_hbaA_doorbell_isr(acb);
2504                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2505                         arcmsr_hbaA_postqueue_isr(acb);
2506                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2507                         arcmsr_hbaA_message_isr(acb);
2508                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2509                         acb->outbound_int_enable;
2510         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2511                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2512                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2513         return IRQ_HANDLED;
2514 }
2515
2516 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2517 {
2518         uint32_t outbound_doorbell;
2519         struct MessageUnit_B *reg = acb->pmuB;
2520         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2521                                 acb->outbound_int_enable;
2522         if (!outbound_doorbell)
2523                 return IRQ_NONE;
2524         do {
2525                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2526                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2527                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2528                         arcmsr_iop2drv_data_wrote_handle(acb);
2529                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2530                         arcmsr_iop2drv_data_read_handle(acb);
2531                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2532                         arcmsr_hbaB_postqueue_isr(acb);
2533                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2534                         arcmsr_hbaB_message_isr(acb);
2535                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2536                         acb->outbound_int_enable;
2537         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2538                 | ARCMSR_IOP2DRV_DATA_READ_OK
2539                 | ARCMSR_IOP2DRV_CDB_DONE
2540                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2541         return IRQ_HANDLED;
2542 }
2543
2544 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2545 {
2546         uint32_t host_interrupt_status;
2547         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2548         /*
2549         *********************************************
2550         **   check outbound intstatus
2551         *********************************************
2552         */
2553         host_interrupt_status = readl(&phbcmu->host_int_status) &
2554                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2555                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2556         if (!host_interrupt_status)
2557                 return IRQ_NONE;
2558         do {
2559                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2560                         arcmsr_hbaC_doorbell_isr(pACB);
2561                 /* MU post queue interrupts*/
2562                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2563                         arcmsr_hbaC_postqueue_isr(pACB);
2564                 host_interrupt_status = readl(&phbcmu->host_int_status);
2565         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2566                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2567         return IRQ_HANDLED;
2568 }
2569
2570 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2571 {
2572         u32 host_interrupt_status;
2573         struct MessageUnit_D  *pmu = pACB->pmuD;
2574
2575         host_interrupt_status = readl(pmu->host_int_status) &
2576                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2577                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2578         if (!host_interrupt_status)
2579                 return IRQ_NONE;
2580         do {
2581                 /* MU post queue interrupts*/
2582                 if (host_interrupt_status &
2583                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2584                         arcmsr_hbaD_postqueue_isr(pACB);
2585                 if (host_interrupt_status &
2586                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2587                         arcmsr_hbaD_doorbell_isr(pACB);
2588                 host_interrupt_status = readl(pmu->host_int_status);
2589         } while (host_interrupt_status &
2590                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2591                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2592         return IRQ_HANDLED;
2593 }
2594
2595 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2596 {
2597         uint32_t host_interrupt_status;
2598         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2599
2600         host_interrupt_status = readl(&pmu->host_int_status) &
2601                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2602                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2603         if (!host_interrupt_status)
2604                 return IRQ_NONE;
2605         do {
2606                 /* MU ioctl transfer doorbell interrupts*/
2607                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2608                         arcmsr_hbaE_doorbell_isr(pACB);
2609                 }
2610                 /* MU post queue interrupts*/
2611                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2612                         arcmsr_hbaE_postqueue_isr(pACB);
2613                 }
2614                 host_interrupt_status = readl(&pmu->host_int_status);
2615         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2616                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2617         return IRQ_HANDLED;
2618 }
2619
2620 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2621 {
2622         switch (acb->adapter_type) {
2623         case ACB_ADAPTER_TYPE_A:
2624                 return arcmsr_hbaA_handle_isr(acb);
2625                 break;
2626         case ACB_ADAPTER_TYPE_B:
2627                 return arcmsr_hbaB_handle_isr(acb);
2628                 break;
2629         case ACB_ADAPTER_TYPE_C:
2630                 return arcmsr_hbaC_handle_isr(acb);
2631         case ACB_ADAPTER_TYPE_D:
2632                 return arcmsr_hbaD_handle_isr(acb);
2633         case ACB_ADAPTER_TYPE_E:
2634                 return arcmsr_hbaE_handle_isr(acb);
2635         default:
2636                 return IRQ_NONE;
2637         }
2638 }
2639
2640 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2641 {
2642         if (acb) {
2643                 /* stop adapter background rebuild */
2644                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2645                         uint32_t intmask_org;
2646                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2647                         intmask_org = arcmsr_disable_outbound_ints(acb);
2648                         arcmsr_stop_adapter_bgrb(acb);
2649                         arcmsr_flush_adapter_cache(acb);
2650                         arcmsr_enable_outbound_ints(acb, intmask_org);
2651                 }
2652         }
2653 }
2654
2655
2656 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2657 {
2658         uint32_t        i;
2659
2660         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2661                 for (i = 0; i < 15; i++) {
2662                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2663                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2664                                 acb->rqbuf_getIndex = 0;
2665                                 acb->rqbuf_putIndex = 0;
2666                                 arcmsr_iop_message_read(acb);
2667                                 mdelay(30);
2668                         } else if (acb->rqbuf_getIndex !=
2669                                    acb->rqbuf_putIndex) {
2670                                 acb->rqbuf_getIndex = 0;
2671                                 acb->rqbuf_putIndex = 0;
2672                                 mdelay(30);
2673                         } else
2674                                 break;
2675                 }
2676         }
2677 }
2678
2679 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2680                 struct scsi_cmnd *cmd)
2681 {
2682         char *buffer;
2683         unsigned short use_sg;
2684         int retvalue = 0, transfer_len = 0;
2685         unsigned long flags;
2686         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2687         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2688                 (uint32_t)cmd->cmnd[6] << 16 |
2689                 (uint32_t)cmd->cmnd[7] << 8 |
2690                 (uint32_t)cmd->cmnd[8];
2691         struct scatterlist *sg;
2692
2693         use_sg = scsi_sg_count(cmd);
2694         sg = scsi_sglist(cmd);
2695         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2696         if (use_sg > 1) {
2697                 retvalue = ARCMSR_MESSAGE_FAIL;
2698                 goto message_out;
2699         }
2700         transfer_len += sg->length;
2701         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2702                 retvalue = ARCMSR_MESSAGE_FAIL;
2703                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2704                 goto message_out;
2705         }
2706         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2707         switch (controlcode) {
2708         case ARCMSR_MESSAGE_READ_RQBUFFER: {
2709                 unsigned char *ver_addr;
2710                 uint8_t *ptmpQbuffer;
2711                 uint32_t allxfer_len = 0;
2712                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2713                 if (!ver_addr) {
2714                         retvalue = ARCMSR_MESSAGE_FAIL;
2715                         pr_info("%s: memory not enough!\n", __func__);
2716                         goto message_out;
2717                 }
2718                 ptmpQbuffer = ver_addr;
2719                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2720                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2721                         unsigned int tail = acb->rqbuf_getIndex;
2722                         unsigned int head = acb->rqbuf_putIndex;
2723                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2724
2725                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2726                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2727                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2728
2729                         if (allxfer_len <= cnt_to_end)
2730                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2731                         else {
2732                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2733                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2734                         }
2735                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2736                 }
2737                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2738                         allxfer_len);
2739                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2740                         struct QBUFFER __iomem *prbuffer;
2741                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2742                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2743                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2744                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2745                 }
2746                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2747                 kfree(ver_addr);
2748                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2749                 if (acb->fw_flag == FW_DEADLOCK)
2750                         pcmdmessagefld->cmdmessage.ReturnCode =
2751                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2752                 else
2753                         pcmdmessagefld->cmdmessage.ReturnCode =
2754                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2755                 break;
2756         }
2757         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2758                 unsigned char *ver_addr;
2759                 uint32_t user_len;
2760                 int32_t cnt2end;
2761                 uint8_t *pQbuffer, *ptmpuserbuffer;
2762
2763                 user_len = pcmdmessagefld->cmdmessage.Length;
2764                 if (user_len > ARCMSR_API_DATA_BUFLEN) {
2765                         retvalue = ARCMSR_MESSAGE_FAIL;
2766                         goto message_out;
2767                 }
2768
2769                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2770                 if (!ver_addr) {
2771                         retvalue = ARCMSR_MESSAGE_FAIL;
2772                         goto message_out;
2773                 }
2774                 ptmpuserbuffer = ver_addr;
2775
2776                 memcpy(ptmpuserbuffer,
2777                         pcmdmessagefld->messagedatabuffer, user_len);
2778                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2779                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
2780                         struct SENSE_DATA *sensebuffer =
2781                                 (struct SENSE_DATA *)cmd->sense_buffer;
2782                         arcmsr_write_ioctldata2iop(acb);
2783                         /* has error report sensedata */
2784                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
2785                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
2786                         sensebuffer->AdditionalSenseLength = 0x0A;
2787                         sensebuffer->AdditionalSenseCode = 0x20;
2788                         sensebuffer->Valid = 1;
2789                         retvalue = ARCMSR_MESSAGE_FAIL;
2790                 } else {
2791                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
2792                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
2793                         if (user_len > cnt2end) {
2794                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
2795                                 ptmpuserbuffer += cnt2end;
2796                                 user_len -= cnt2end;
2797                                 acb->wqbuf_putIndex = 0;
2798                                 pQbuffer = acb->wqbuffer;
2799                         }
2800                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
2801                         acb->wqbuf_putIndex += user_len;
2802                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2803                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2804                                 acb->acb_flags &=
2805                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2806                                 arcmsr_write_ioctldata2iop(acb);
2807                         }
2808                 }
2809                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2810                 kfree(ver_addr);
2811                 if (acb->fw_flag == FW_DEADLOCK)
2812                         pcmdmessagefld->cmdmessage.ReturnCode =
2813                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2814                 else
2815                         pcmdmessagefld->cmdmessage.ReturnCode =
2816                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2817                 break;
2818         }
2819         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
2820                 uint8_t *pQbuffer = acb->rqbuffer;
2821
2822                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2823                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2824                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2825                 acb->rqbuf_getIndex = 0;
2826                 acb->rqbuf_putIndex = 0;
2827                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2828                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2829                 if (acb->fw_flag == FW_DEADLOCK)
2830                         pcmdmessagefld->cmdmessage.ReturnCode =
2831                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2832                 else
2833                         pcmdmessagefld->cmdmessage.ReturnCode =
2834                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2835                 break;
2836         }
2837         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
2838                 uint8_t *pQbuffer = acb->wqbuffer;
2839                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2840                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2841                         ACB_F_MESSAGE_WQBUFFER_READED);
2842                 acb->wqbuf_getIndex = 0;
2843                 acb->wqbuf_putIndex = 0;
2844                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2845                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2846                 if (acb->fw_flag == FW_DEADLOCK)
2847                         pcmdmessagefld->cmdmessage.ReturnCode =
2848                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2849                 else
2850                         pcmdmessagefld->cmdmessage.ReturnCode =
2851                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2852                 break;
2853         }
2854         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
2855                 uint8_t *pQbuffer;
2856                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2857                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2858                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2859                 acb->rqbuf_getIndex = 0;
2860                 acb->rqbuf_putIndex = 0;
2861                 pQbuffer = acb->rqbuffer;
2862                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2863                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2864                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2865                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2866                         ACB_F_MESSAGE_WQBUFFER_READED);
2867                 acb->wqbuf_getIndex = 0;
2868                 acb->wqbuf_putIndex = 0;
2869                 pQbuffer = acb->wqbuffer;
2870                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2871                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2872                 if (acb->fw_flag == FW_DEADLOCK)
2873                         pcmdmessagefld->cmdmessage.ReturnCode =
2874                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2875                 else
2876                         pcmdmessagefld->cmdmessage.ReturnCode =
2877                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2878                 break;
2879         }
2880         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
2881                 if (acb->fw_flag == FW_DEADLOCK)
2882                         pcmdmessagefld->cmdmessage.ReturnCode =
2883                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2884                 else
2885                         pcmdmessagefld->cmdmessage.ReturnCode =
2886                                 ARCMSR_MESSAGE_RETURNCODE_3F;
2887                 break;
2888         }
2889         case ARCMSR_MESSAGE_SAY_HELLO: {
2890                 int8_t *hello_string = "Hello! I am ARCMSR";
2891                 if (acb->fw_flag == FW_DEADLOCK)
2892                         pcmdmessagefld->cmdmessage.ReturnCode =
2893                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2894                 else
2895                         pcmdmessagefld->cmdmessage.ReturnCode =
2896                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2897                 memcpy(pcmdmessagefld->messagedatabuffer,
2898                         hello_string, (int16_t)strlen(hello_string));
2899                 break;
2900         }
2901         case ARCMSR_MESSAGE_SAY_GOODBYE: {
2902                 if (acb->fw_flag == FW_DEADLOCK)
2903                         pcmdmessagefld->cmdmessage.ReturnCode =
2904                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2905                 else
2906                         pcmdmessagefld->cmdmessage.ReturnCode =
2907                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2908                 arcmsr_iop_parking(acb);
2909                 break;
2910         }
2911         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2912                 if (acb->fw_flag == FW_DEADLOCK)
2913                         pcmdmessagefld->cmdmessage.ReturnCode =
2914                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2915                 else
2916                         pcmdmessagefld->cmdmessage.ReturnCode =
2917                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2918                 arcmsr_flush_adapter_cache(acb);
2919                 break;
2920         }
2921         default:
2922                 retvalue = ARCMSR_MESSAGE_FAIL;
2923                 pr_info("%s: unknown controlcode!\n", __func__);
2924         }
2925 message_out:
2926         if (use_sg) {
2927                 struct scatterlist *sg = scsi_sglist(cmd);
2928                 kunmap_atomic(buffer - sg->offset);
2929         }
2930         return retvalue;
2931 }
2932
2933 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2934 {
2935         struct list_head *head = &acb->ccb_free_list;
2936         struct CommandControlBlock *ccb = NULL;
2937         unsigned long flags;
2938         spin_lock_irqsave(&acb->ccblist_lock, flags);
2939         if (!list_empty(head)) {
2940                 ccb = list_entry(head->next, struct CommandControlBlock, list);
2941                 list_del_init(&ccb->list);
2942         }else{
2943                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2944                 return NULL;
2945         }
2946         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2947         return ccb;
2948 }
2949
2950 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2951                 struct scsi_cmnd *cmd)
2952 {
2953         switch (cmd->cmnd[0]) {
2954         case INQUIRY: {
2955                 unsigned char inqdata[36];
2956                 char *buffer;
2957                 struct scatterlist *sg;
2958
2959                 if (cmd->device->lun) {
2960                         cmd->result = (DID_TIME_OUT << 16);
2961                         cmd->scsi_done(cmd);
2962                         return;
2963                 }
2964                 inqdata[0] = TYPE_PROCESSOR;
2965                 /* Periph Qualifier & Periph Dev Type */
2966                 inqdata[1] = 0;
2967                 /* rem media bit & Dev Type Modifier */
2968                 inqdata[2] = 0;
2969                 /* ISO, ECMA, & ANSI versions */
2970                 inqdata[4] = 31;
2971                 /* length of additional data */
2972                 strncpy(&inqdata[8], "Areca   ", 8);
2973                 /* Vendor Identification */
2974                 strncpy(&inqdata[16], "RAID controller ", 16);
2975                 /* Product Identification */
2976                 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
2977
2978                 sg = scsi_sglist(cmd);
2979                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2980
2981                 memcpy(buffer, inqdata, sizeof(inqdata));
2982                 sg = scsi_sglist(cmd);
2983                 kunmap_atomic(buffer - sg->offset);
2984
2985                 cmd->scsi_done(cmd);
2986         }
2987         break;
2988         case WRITE_BUFFER:
2989         case READ_BUFFER: {
2990                 if (arcmsr_iop_message_xfer(acb, cmd))
2991                         cmd->result = (DID_ERROR << 16);
2992                 cmd->scsi_done(cmd);
2993         }
2994         break;
2995         default:
2996                 cmd->scsi_done(cmd);
2997         }
2998 }
2999
3000 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
3001         void (* done)(struct scsi_cmnd *))
3002 {
3003         struct Scsi_Host *host = cmd->device->host;
3004         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3005         struct CommandControlBlock *ccb;
3006         int target = cmd->device->id;
3007
3008         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3009                 cmd->result = (DID_NO_CONNECT << 16);
3010                 cmd->scsi_done(cmd);
3011                 return 0;
3012         }
3013         cmd->scsi_done = done;
3014         cmd->host_scribble = NULL;
3015         cmd->result = 0;
3016         if (target == 16) {
3017                 /* virtual device for iop message transfer */
3018                 arcmsr_handle_virtual_command(acb, cmd);
3019                 return 0;
3020         }
3021         ccb = arcmsr_get_freeccb(acb);
3022         if (!ccb)
3023                 return SCSI_MLQUEUE_HOST_BUSY;
3024         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3025                 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
3026                 cmd->scsi_done(cmd);
3027                 return 0;
3028         }
3029         arcmsr_post_ccb(acb, ccb);
3030         return 0;
3031 }
3032
3033 static DEF_SCSI_QCMD(arcmsr_queue_command)
3034
3035 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3036 {
3037         int count;
3038         uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3039         uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3040         uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3041         uint32_t *firm_model = &rwbuffer[15];
3042         uint32_t *firm_version = &rwbuffer[17];
3043         uint32_t *device_map = &rwbuffer[21];
3044
3045         count = 2;
3046         while (count) {
3047                 *acb_firm_model = readl(firm_model);
3048                 acb_firm_model++;
3049                 firm_model++;
3050                 count--;
3051         }
3052         count = 4;
3053         while (count) {
3054                 *acb_firm_version = readl(firm_version);
3055                 acb_firm_version++;
3056                 firm_version++;
3057                 count--;
3058         }
3059         count = 4;
3060         while (count) {
3061                 *acb_device_map = readl(device_map);
3062                 acb_device_map++;
3063                 device_map++;
3064                 count--;
3065         }
3066         pACB->signature = readl(&rwbuffer[0]);
3067         pACB->firm_request_len = readl(&rwbuffer[1]);
3068         pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3069         pACB->firm_sdram_size = readl(&rwbuffer[3]);
3070         pACB->firm_hd_channels = readl(&rwbuffer[4]);
3071         pACB->firm_cfg_version = readl(&rwbuffer[25]);
3072         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3073                 pACB->host->host_no,
3074                 pACB->firm_model,
3075                 pACB->firm_version);
3076 }
3077
3078 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3079 {
3080         struct MessageUnit_A __iomem *reg = acb->pmuA;
3081
3082         arcmsr_wait_firmware_ready(acb);
3083         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3084         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3085                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3086                         miscellaneous data' timeout \n", acb->host->host_no);
3087                 return false;
3088         }
3089         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3090         return true;
3091 }
3092 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3093 {
3094         struct MessageUnit_B *reg = acb->pmuB;
3095
3096         arcmsr_wait_firmware_ready(acb);
3097         writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3098         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3099                 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3100                 return false;
3101         }
3102         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3103         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3104                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3105                         miscellaneous data' timeout \n", acb->host->host_no);
3106                 return false;
3107         }
3108         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3109         return true;
3110 }
3111
3112 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3113 {
3114         uint32_t intmask_org;
3115         struct MessageUnit_C __iomem *reg = pACB->pmuC;
3116
3117         /* disable all outbound interrupt */
3118         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3119         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3120         /* wait firmware ready */
3121         arcmsr_wait_firmware_ready(pACB);
3122         /* post "get config" instruction */
3123         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3124         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3125         /* wait message ready */
3126         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3127                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3128                         miscellaneous data' timeout \n", pACB->host->host_no);
3129                 return false;
3130         }
3131         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3132         return true;
3133 }
3134
3135 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3136 {
3137         struct MessageUnit_D *reg = acb->pmuD;
3138
3139         if (readl(acb->pmuD->outbound_doorbell) &
3140                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3141                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3142                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
3143         }
3144         arcmsr_wait_firmware_ready(acb);
3145         /* post "get config" instruction */
3146         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3147         /* wait message ready */
3148         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3149                 pr_notice("arcmsr%d: wait get adapter firmware "
3150                         "miscellaneous data timeout\n", acb->host->host_no);
3151                 return false;
3152         }
3153         arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3154         return true;
3155 }
3156
3157 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3158 {
3159         struct MessageUnit_E __iomem *reg = pACB->pmuE;
3160         uint32_t intmask_org;
3161
3162         /* disable all outbound interrupt */
3163         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3164         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3165         /* wait firmware ready */
3166         arcmsr_wait_firmware_ready(pACB);
3167         mdelay(20);
3168         /* post "get config" instruction */
3169         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3170
3171         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3172         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3173         /* wait message ready */
3174         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3175                 pr_notice("arcmsr%d: wait get adapter firmware "
3176                         "miscellaneous data timeout\n", pACB->host->host_no);
3177                 return false;
3178         }
3179         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3180         return true;
3181 }
3182
3183 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3184 {
3185         bool rtn = false;
3186
3187         switch (acb->adapter_type) {
3188         case ACB_ADAPTER_TYPE_A:
3189                 rtn = arcmsr_hbaA_get_config(acb);
3190                 break;
3191         case ACB_ADAPTER_TYPE_B:
3192                 rtn = arcmsr_hbaB_get_config(acb);
3193                 break;
3194         case ACB_ADAPTER_TYPE_C:
3195                 rtn = arcmsr_hbaC_get_config(acb);
3196                 break;
3197         case ACB_ADAPTER_TYPE_D:
3198                 rtn = arcmsr_hbaD_get_config(acb);
3199                 break;
3200         case ACB_ADAPTER_TYPE_E:
3201                 rtn = arcmsr_hbaE_get_config(acb);
3202                 break;
3203         default:
3204                 break;
3205         }
3206         acb->maxOutstanding = acb->firm_numbers_queue - 1;
3207         if (acb->host->can_queue >= acb->firm_numbers_queue)
3208                 acb->host->can_queue = acb->maxOutstanding;
3209         else
3210                 acb->maxOutstanding = acb->host->can_queue;
3211         acb->maxFreeCCB = acb->host->can_queue;
3212         if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3213                 acb->maxFreeCCB += 64;
3214         return rtn;
3215 }
3216
3217 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3218         struct CommandControlBlock *poll_ccb)
3219 {
3220         struct MessageUnit_A __iomem *reg = acb->pmuA;
3221         struct CommandControlBlock *ccb;
3222         struct ARCMSR_CDB *arcmsr_cdb;
3223         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3224         int rtn;
3225         bool error;
3226         polling_hba_ccb_retry:
3227         poll_count++;
3228         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
3229         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
3230         while (1) {
3231                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
3232                         if (poll_ccb_done){
3233                                 rtn = SUCCESS;
3234                                 break;
3235                         }else {
3236                                 msleep(25);
3237                                 if (poll_count > 100){
3238                                         rtn = FAILED;
3239                                         break;
3240                                 }
3241                                 goto polling_hba_ccb_retry;
3242                         }
3243                 }
3244                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3245                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3246                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3247                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3248                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3249                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3250                                         " poll command abort successfully \n"
3251                                         , acb->host->host_no
3252                                         , ccb->pcmd->device->id
3253                                         , (u32)ccb->pcmd->device->lun
3254                                         , ccb);
3255                                 ccb->pcmd->result = DID_ABORT << 16;
3256                                 arcmsr_ccb_complete(ccb);
3257                                 continue;
3258                         }
3259                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3260                                 " command done ccb = '0x%p'"
3261                                 "ccboutstandingcount = %d \n"
3262                                 , acb->host->host_no
3263                                 , ccb
3264                                 , atomic_read(&acb->ccboutstandingcount));
3265                         continue;
3266                 }
3267                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3268                 arcmsr_report_ccb_state(acb, ccb, error);
3269         }
3270         return rtn;
3271 }
3272
3273 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3274                                         struct CommandControlBlock *poll_ccb)
3275 {
3276         struct MessageUnit_B *reg = acb->pmuB;
3277         struct ARCMSR_CDB *arcmsr_cdb;
3278         struct CommandControlBlock *ccb;
3279         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3280         int index, rtn;
3281         bool error;
3282         polling_hbb_ccb_retry:
3283
3284         poll_count++;
3285         /* clear doorbell interrupt */
3286         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3287         while(1){
3288                 index = reg->doneq_index;
3289                 flag_ccb = reg->done_qbuffer[index];
3290                 if (flag_ccb == 0) {
3291                         if (poll_ccb_done){
3292                                 rtn = SUCCESS;
3293                                 break;
3294                         }else {
3295                                 msleep(25);
3296                                 if (poll_count > 100){
3297                                         rtn = FAILED;
3298                                         break;
3299                                 }
3300                                 goto polling_hbb_ccb_retry;
3301                         }
3302                 }
3303                 reg->done_qbuffer[index] = 0;
3304                 index++;
3305                 /*if last index number set it to 0 */
3306                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3307                 reg->doneq_index = index;
3308                 /* check if command done with no error*/
3309                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3310                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3311                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3312                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3313                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3314                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3315                                         " poll command abort successfully \n"
3316                                         ,acb->host->host_no
3317                                         ,ccb->pcmd->device->id
3318                                         ,(u32)ccb->pcmd->device->lun
3319                                         ,ccb);
3320                                 ccb->pcmd->result = DID_ABORT << 16;
3321                                 arcmsr_ccb_complete(ccb);
3322                                 continue;
3323                         }
3324                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3325                                 " command done ccb = '0x%p'"
3326                                 "ccboutstandingcount = %d \n"
3327                                 , acb->host->host_no
3328                                 , ccb
3329                                 , atomic_read(&acb->ccboutstandingcount));
3330                         continue;
3331                 }
3332                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3333                 arcmsr_report_ccb_state(acb, ccb, error);
3334         }
3335         return rtn;
3336 }
3337
3338 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3339                 struct CommandControlBlock *poll_ccb)
3340 {
3341         struct MessageUnit_C __iomem *reg = acb->pmuC;
3342         uint32_t flag_ccb, ccb_cdb_phy;
3343         struct ARCMSR_CDB *arcmsr_cdb;
3344         bool error;
3345         struct CommandControlBlock *pCCB;
3346         uint32_t poll_ccb_done = 0, poll_count = 0;
3347         int rtn;
3348 polling_hbc_ccb_retry:
3349         poll_count++;
3350         while (1) {
3351                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3352                         if (poll_ccb_done) {
3353                                 rtn = SUCCESS;
3354                                 break;
3355                         } else {
3356                                 msleep(25);
3357                                 if (poll_count > 100) {
3358                                         rtn = FAILED;
3359                                         break;
3360                                 }
3361                                 goto polling_hbc_ccb_retry;
3362                         }
3363                 }
3364                 flag_ccb = readl(&reg->outbound_queueport_low);
3365                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3366                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
3367                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3368                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3369                 /* check ifcommand done with no error*/
3370                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3371                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3372                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3373                                         " poll command abort successfully \n"
3374                                         , acb->host->host_no
3375                                         , pCCB->pcmd->device->id
3376                                         , (u32)pCCB->pcmd->device->lun
3377                                         , pCCB);
3378                                         pCCB->pcmd->result = DID_ABORT << 16;
3379                                         arcmsr_ccb_complete(pCCB);
3380                                 continue;
3381                         }
3382                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3383                                 " command done ccb = '0x%p'"
3384                                 "ccboutstandingcount = %d \n"
3385                                 , acb->host->host_no
3386                                 , pCCB
3387                                 , atomic_read(&acb->ccboutstandingcount));
3388                         continue;
3389                 }
3390                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3391                 arcmsr_report_ccb_state(acb, pCCB, error);
3392         }
3393         return rtn;
3394 }
3395
3396 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3397                                 struct CommandControlBlock *poll_ccb)
3398 {
3399         bool error;
3400         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy;
3401         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3402         unsigned long flags;
3403         struct ARCMSR_CDB *arcmsr_cdb;
3404         struct CommandControlBlock *pCCB;
3405         struct MessageUnit_D *pmu = acb->pmuD;
3406
3407 polling_hbaD_ccb_retry:
3408         poll_count++;
3409         while (1) {
3410                 spin_lock_irqsave(&acb->doneq_lock, flags);
3411                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3412                 doneq_index = pmu->doneq_index;
3413                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3414                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3415                         if (poll_ccb_done) {
3416                                 rtn = SUCCESS;
3417                                 break;
3418                         } else {
3419                                 msleep(25);
3420                                 if (poll_count > 40) {
3421                                         rtn = FAILED;
3422                                         break;
3423                                 }
3424                                 goto polling_hbaD_ccb_retry;
3425                         }
3426                 }
3427                 toggle = doneq_index & 0x4000;
3428                 index_stripped = (doneq_index & 0xFFF) + 1;
3429                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3430                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3431                                 ((toggle ^ 0x4000) + 1);
3432                 doneq_index = pmu->doneq_index;
3433                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3434                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3435                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3436                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3437                         ccb_cdb_phy);
3438                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3439                         arcmsr_cdb);
3440                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3441                 if ((pCCB->acb != acb) ||
3442                         (pCCB->startdone != ARCMSR_CCB_START)) {
3443                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3444                                 pr_notice("arcmsr%d: scsi id = %d "
3445                                         "lun = %d ccb = '0x%p' poll command "
3446                                         "abort successfully\n"
3447                                         , acb->host->host_no
3448                                         , pCCB->pcmd->device->id
3449                                         , (u32)pCCB->pcmd->device->lun
3450                                         , pCCB);
3451                                 pCCB->pcmd->result = DID_ABORT << 16;
3452                                 arcmsr_ccb_complete(pCCB);
3453                                 continue;
3454                         }
3455                         pr_notice("arcmsr%d: polling an illegal "
3456                                 "ccb command done ccb = '0x%p' "
3457                                 "ccboutstandingcount = %d\n"
3458                                 , acb->host->host_no
3459                                 , pCCB
3460                                 , atomic_read(&acb->ccboutstandingcount));
3461                         continue;
3462                 }
3463                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3464                         ? true : false;
3465                 arcmsr_report_ccb_state(acb, pCCB, error);
3466         }
3467         return rtn;
3468 }
3469
3470 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3471                                 struct CommandControlBlock *poll_ccb)
3472 {
3473         bool error;
3474         uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3475         uint16_t cmdSMID;
3476         unsigned long flags;
3477         int rtn;
3478         struct CommandControlBlock *pCCB;
3479         struct MessageUnit_E __iomem *reg = acb->pmuE;
3480
3481         polling_hbaC_ccb_retry:
3482         poll_count++;
3483         while (1) {
3484                 spin_lock_irqsave(&acb->doneq_lock, flags);
3485                 doneq_index = acb->doneq_index;
3486                 if ((readl(&reg->reply_post_producer_index) & 0xFFFF) ==
3487                                 doneq_index) {
3488                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3489                         if (poll_ccb_done) {
3490                                 rtn = SUCCESS;
3491                                 break;
3492                         } else {
3493                                 msleep(25);
3494                                 if (poll_count > 40) {
3495                                         rtn = FAILED;
3496                                         break;
3497                                 }
3498                                 goto polling_hbaC_ccb_retry;
3499                         }
3500                 }
3501                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3502                 doneq_index++;
3503                 if (doneq_index >= acb->completionQ_entry)
3504                         doneq_index = 0;
3505                 acb->doneq_index = doneq_index;
3506                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3507                 pCCB = acb->pccb_pool[cmdSMID];
3508                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3509                 /* check if command done with no error*/
3510                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3511                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3512                                 pr_notice("arcmsr%d: scsi id = %d "
3513                                         "lun = %d ccb = '0x%p' poll command "
3514                                         "abort successfully\n"
3515                                         , acb->host->host_no
3516                                         , pCCB->pcmd->device->id
3517                                         , (u32)pCCB->pcmd->device->lun
3518                                         , pCCB);
3519                                 pCCB->pcmd->result = DID_ABORT << 16;
3520                                 arcmsr_ccb_complete(pCCB);
3521                                 continue;
3522                         }
3523                         pr_notice("arcmsr%d: polling an illegal "
3524                                 "ccb command done ccb = '0x%p' "
3525                                 "ccboutstandingcount = %d\n"
3526                                 , acb->host->host_no
3527                                 , pCCB
3528                                 , atomic_read(&acb->ccboutstandingcount));
3529                         continue;
3530                 }
3531                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3532                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3533                 arcmsr_report_ccb_state(acb, pCCB, error);
3534         }
3535         writel(doneq_index, &reg->reply_post_consumer_index);
3536         return rtn;
3537 }
3538
3539 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3540                                         struct CommandControlBlock *poll_ccb)
3541 {
3542         int rtn = 0;
3543         switch (acb->adapter_type) {
3544
3545         case ACB_ADAPTER_TYPE_A: {
3546                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3547                 }
3548                 break;
3549
3550         case ACB_ADAPTER_TYPE_B: {
3551                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3552                 }
3553                 break;
3554         case ACB_ADAPTER_TYPE_C: {
3555                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3556                 }
3557                 break;
3558         case ACB_ADAPTER_TYPE_D:
3559                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3560                 break;
3561         case ACB_ADAPTER_TYPE_E:
3562                 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3563                 break;
3564         }
3565         return rtn;
3566 }
3567
3568 static void arcmsr_set_iop_datetime(struct timer_list *t)
3569 {
3570         struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3571         unsigned int next_time;
3572         struct tm tm;
3573
3574         union {
3575                 struct  {
3576                 uint16_t        signature;
3577                 uint8_t         year;
3578                 uint8_t         month;
3579                 uint8_t         date;
3580                 uint8_t         hour;
3581                 uint8_t         minute;
3582                 uint8_t         second;
3583                 } a;
3584                 struct  {
3585                 uint32_t        msg_time[2];
3586                 } b;
3587         } datetime;
3588
3589         time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3590
3591         datetime.a.signature = 0x55AA;
3592         datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3593         datetime.a.month = tm.tm_mon;
3594         datetime.a.date = tm.tm_mday;
3595         datetime.a.hour = tm.tm_hour;
3596         datetime.a.minute = tm.tm_min;
3597         datetime.a.second = tm.tm_sec;
3598
3599         switch (pacb->adapter_type) {
3600                 case ACB_ADAPTER_TYPE_A: {
3601                         struct MessageUnit_A __iomem *reg = pacb->pmuA;
3602                         writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
3603                         writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
3604                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3605                         break;
3606                 }
3607                 case ACB_ADAPTER_TYPE_B: {
3608                         uint32_t __iomem *rwbuffer;
3609                         struct MessageUnit_B *reg = pacb->pmuB;
3610                         rwbuffer = reg->message_rwbuffer;
3611                         writel(datetime.b.msg_time[0], rwbuffer++);
3612                         writel(datetime.b.msg_time[1], rwbuffer++);
3613                         writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3614                         break;
3615                 }
3616                 case ACB_ADAPTER_TYPE_C: {
3617                         struct MessageUnit_C __iomem *reg = pacb->pmuC;
3618                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3619                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3620                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3621                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3622                         break;
3623                 }
3624                 case ACB_ADAPTER_TYPE_D: {
3625                         uint32_t __iomem *rwbuffer;
3626                         struct MessageUnit_D *reg = pacb->pmuD;
3627                         rwbuffer = reg->msgcode_rwbuffer;
3628                         writel(datetime.b.msg_time[0], rwbuffer++);
3629                         writel(datetime.b.msg_time[1], rwbuffer++);
3630                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3631                         break;
3632                 }
3633                 case ACB_ADAPTER_TYPE_E: {
3634                         struct MessageUnit_E __iomem *reg = pacb->pmuE;
3635                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3636                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3637                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3638                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3639                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
3640                         break;
3641                 }
3642         }
3643         if (sys_tz.tz_minuteswest)
3644                 next_time = ARCMSR_HOURS;
3645         else
3646                 next_time = ARCMSR_MINUTES;
3647         mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
3648 }
3649
3650 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3651 {
3652         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3653         dma_addr_t dma_coherent_handle;
3654
3655         /*
3656         ********************************************************************
3657         ** here we need to tell iop 331 our freeccb.HighPart
3658         ** if freeccb.HighPart is not zero
3659         ********************************************************************
3660         */
3661         switch (acb->adapter_type) {
3662         case ACB_ADAPTER_TYPE_B:
3663         case ACB_ADAPTER_TYPE_D:
3664                 dma_coherent_handle = acb->dma_coherent_handle2;
3665                 break;
3666         case ACB_ADAPTER_TYPE_E:
3667                 dma_coherent_handle = acb->dma_coherent_handle +
3668                         offsetof(struct CommandControlBlock, arcmsr_cdb);
3669                 break;
3670         default:
3671                 dma_coherent_handle = acb->dma_coherent_handle;
3672                 break;
3673         }
3674         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3675         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3676         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3677         /*
3678         ***********************************************************************
3679         **    if adapter type B, set window of "post command Q"
3680         ***********************************************************************
3681         */
3682         switch (acb->adapter_type) {
3683
3684         case ACB_ADAPTER_TYPE_A: {
3685                 if (cdb_phyaddr_hi32 != 0) {
3686                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3687                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3688                                                 &reg->message_rwbuffer[0]);
3689                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
3690                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3691                                                         &reg->inbound_msgaddr0);
3692                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3693                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3694                                 part physical address timeout\n",
3695                                 acb->host->host_no);
3696                                 return 1;
3697                         }
3698                 }
3699                 }
3700                 break;
3701
3702         case ACB_ADAPTER_TYPE_B: {
3703                 uint32_t __iomem *rwbuffer;
3704
3705                 struct MessageUnit_B *reg = acb->pmuB;
3706                 reg->postq_index = 0;
3707                 reg->doneq_index = 0;
3708                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
3709                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3710                         printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
3711                                 acb->host->host_no);
3712                         return 1;
3713                 }
3714                 rwbuffer = reg->message_rwbuffer;
3715                 /* driver "set config" signature */
3716                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3717                 /* normal should be zero */
3718                 writel(cdb_phyaddr_hi32, rwbuffer++);
3719                 /* postQ size (256 + 8)*4        */
3720                 writel(cdb_phyaddr, rwbuffer++);
3721                 /* doneQ size (256 + 8)*4        */
3722                 writel(cdb_phyaddr + 1056, rwbuffer++);
3723                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
3724                 writel(1056, rwbuffer);
3725
3726                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
3727                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3728                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3729                         timeout \n",acb->host->host_no);
3730                         return 1;
3731                 }
3732                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3733                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3734                         pr_err("arcmsr%d: can't set driver mode.\n",
3735                                 acb->host->host_no);
3736                         return 1;
3737                 }
3738                 }
3739                 break;
3740         case ACB_ADAPTER_TYPE_C: {
3741                 if (cdb_phyaddr_hi32 != 0) {
3742                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3743
3744                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
3745                                         acb->adapter_index, cdb_phyaddr_hi32);
3746                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3747                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
3748                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3749                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3750                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
3751                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3752                                 timeout \n", acb->host->host_no);
3753                                 return 1;
3754                         }
3755                 }
3756                 }
3757                 break;
3758         case ACB_ADAPTER_TYPE_D: {
3759                 uint32_t __iomem *rwbuffer;
3760                 struct MessageUnit_D *reg = acb->pmuD;
3761                 reg->postq_index = 0;
3762                 reg->doneq_index = 0;
3763                 rwbuffer = reg->msgcode_rwbuffer;
3764                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3765                 writel(cdb_phyaddr_hi32, rwbuffer++);
3766                 writel(cdb_phyaddr, rwbuffer++);
3767                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
3768                         sizeof(struct InBound_SRB)), rwbuffer++);
3769                 writel(0x100, rwbuffer);
3770                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
3771                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3772                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
3773                                 acb->host->host_no);
3774                         return 1;
3775                 }
3776                 }
3777                 break;
3778         case ACB_ADAPTER_TYPE_E: {
3779                 struct MessageUnit_E __iomem *reg = acb->pmuE;
3780                 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3781                 writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
3782                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
3783                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
3784                 writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
3785                 dma_coherent_handle = acb->dma_coherent_handle2;
3786                 cdb_phyaddr = (uint32_t)(dma_coherent_handle & 0xffffffff);
3787                 cdb_phyaddr_hi32 = (uint32_t)((dma_coherent_handle >> 16) >> 16);
3788                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[5]);
3789                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[6]);
3790                 writel(acb->roundup_ccbsize, &reg->msgcode_rwbuffer[7]);
3791                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3792                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3793                 writel(acb->out_doorbell, &reg->iobound_doorbell);
3794                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
3795                         pr_notice("arcmsr%d: 'set command Q window' timeout \n",
3796                                 acb->host->host_no);
3797                         return 1;
3798                 }
3799                 }
3800                 break;
3801         }
3802         return 0;
3803 }
3804
3805 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
3806 {
3807         uint32_t firmware_state = 0;
3808         switch (acb->adapter_type) {
3809
3810         case ACB_ADAPTER_TYPE_A: {
3811                 struct MessageUnit_A __iomem *reg = acb->pmuA;
3812                 do {
3813                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3814                                 msleep(20);
3815                         firmware_state = readl(&reg->outbound_msgaddr1);
3816                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
3817                 }
3818                 break;
3819
3820         case ACB_ADAPTER_TYPE_B: {
3821                 struct MessageUnit_B *reg = acb->pmuB;
3822                 do {
3823                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3824                                 msleep(20);
3825                         firmware_state = readl(reg->iop2drv_doorbell);
3826                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
3827                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
3828                 }
3829                 break;
3830         case ACB_ADAPTER_TYPE_C: {
3831                 struct MessageUnit_C __iomem *reg = acb->pmuC;
3832                 do {
3833                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3834                                 msleep(20);
3835                         firmware_state = readl(&reg->outbound_msgaddr1);
3836                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
3837                 }
3838                 break;
3839         case ACB_ADAPTER_TYPE_D: {
3840                 struct MessageUnit_D *reg = acb->pmuD;
3841                 do {
3842                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3843                                 msleep(20);
3844                         firmware_state = readl(reg->outbound_msgaddr1);
3845                 } while ((firmware_state &
3846                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
3847                 }
3848                 break;
3849         case ACB_ADAPTER_TYPE_E: {
3850                 struct MessageUnit_E __iomem *reg = acb->pmuE;
3851                 do {
3852                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
3853                                 msleep(20);
3854                         firmware_state = readl(&reg->outbound_msgaddr1);
3855                 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
3856                 }
3857                 break;
3858         }
3859 }
3860
3861 static void arcmsr_request_device_map(struct timer_list *t)
3862 {
3863         struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
3864         if (unlikely(atomic_read(&acb->rq_map_token) == 0) ||
3865                 (acb->acb_flags & ACB_F_BUS_RESET) ||
3866                 (acb->acb_flags & ACB_F_ABORT)) {
3867                 mod_timer(&acb->eternal_timer,
3868                         jiffies + msecs_to_jiffies(6 * HZ));
3869         } else {
3870                 acb->fw_flag = FW_NORMAL;
3871                 if (atomic_read(&acb->ante_token_value) ==
3872                         atomic_read(&acb->rq_map_token)) {
3873                         atomic_set(&acb->rq_map_token, 16);
3874                 }
3875                 atomic_set(&acb->ante_token_value,
3876                         atomic_read(&acb->rq_map_token));
3877                 if (atomic_dec_and_test(&acb->rq_map_token)) {
3878                         mod_timer(&acb->eternal_timer, jiffies +
3879                                 msecs_to_jiffies(6 * HZ));
3880                         return;
3881                 }
3882                 switch (acb->adapter_type) {
3883                 case ACB_ADAPTER_TYPE_A: {
3884                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3885                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3886                         break;
3887                         }
3888                 case ACB_ADAPTER_TYPE_B: {
3889                         struct MessageUnit_B *reg = acb->pmuB;
3890                         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3891                         break;
3892                         }
3893                 case ACB_ADAPTER_TYPE_C: {
3894                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3895                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3896                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3897                         break;
3898                         }
3899                 case ACB_ADAPTER_TYPE_D: {
3900                         struct MessageUnit_D *reg = acb->pmuD;
3901                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3902                         break;
3903                         }
3904                 case ACB_ADAPTER_TYPE_E: {
3905                         struct MessageUnit_E __iomem *reg = acb->pmuE;
3906                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3907                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3908                         writel(acb->out_doorbell, &reg->iobound_doorbell);
3909                         break;
3910                         }
3911                 default:
3912                         return;
3913                 }
3914                 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
3915                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3916         }
3917 }
3918
3919 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
3920 {
3921         struct MessageUnit_A __iomem *reg = acb->pmuA;
3922         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3923         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
3924         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3925                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3926                                 rebuild' timeout \n", acb->host->host_no);
3927         }
3928 }
3929
3930 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
3931 {
3932         struct MessageUnit_B *reg = acb->pmuB;
3933         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3934         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
3935         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3936                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3937                                 rebuild' timeout \n",acb->host->host_no);
3938         }
3939 }
3940
3941 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
3942 {
3943         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
3944         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3945         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
3946         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
3947         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3948                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3949                                 rebuild' timeout \n", pACB->host->host_no);
3950         }
3951         return;
3952 }
3953
3954 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
3955 {
3956         struct MessageUnit_D *pmu = pACB->pmuD;
3957
3958         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3959         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
3960         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
3961                 pr_notice("arcmsr%d: wait 'start adapter "
3962                         "background rebuild' timeout\n", pACB->host->host_no);
3963         }
3964 }
3965
3966 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
3967 {
3968         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
3969
3970         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3971         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
3972         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3973         writel(pACB->out_doorbell, &pmu->iobound_doorbell);
3974         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3975                 pr_notice("arcmsr%d: wait 'start adapter "
3976                         "background rebuild' timeout \n", pACB->host->host_no);
3977         }
3978 }
3979
3980 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
3981 {
3982         switch (acb->adapter_type) {
3983         case ACB_ADAPTER_TYPE_A:
3984                 arcmsr_hbaA_start_bgrb(acb);
3985                 break;
3986         case ACB_ADAPTER_TYPE_B:
3987                 arcmsr_hbaB_start_bgrb(acb);
3988                 break;
3989         case ACB_ADAPTER_TYPE_C:
3990                 arcmsr_hbaC_start_bgrb(acb);
3991                 break;
3992         case ACB_ADAPTER_TYPE_D:
3993                 arcmsr_hbaD_start_bgrb(acb);
3994                 break;
3995         case ACB_ADAPTER_TYPE_E:
3996                 arcmsr_hbaE_start_bgrb(acb);
3997                 break;
3998         }
3999 }
4000
4001 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4002 {
4003         switch (acb->adapter_type) {
4004         case ACB_ADAPTER_TYPE_A: {
4005                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4006                 uint32_t outbound_doorbell;
4007                 /* empty doorbell Qbuffer if door bell ringed */
4008                 outbound_doorbell = readl(&reg->outbound_doorbell);
4009                 /*clear doorbell interrupt */
4010                 writel(outbound_doorbell, &reg->outbound_doorbell);
4011                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
4012                 }
4013                 break;
4014
4015         case ACB_ADAPTER_TYPE_B: {
4016                 struct MessageUnit_B *reg = acb->pmuB;
4017                 uint32_t outbound_doorbell, i;
4018                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4019                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4020                 /* let IOP know data has been read */
4021                 for(i=0; i < 200; i++) {
4022                         msleep(20);
4023                         outbound_doorbell = readl(reg->iop2drv_doorbell);
4024                         if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4025                                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4026                                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4027                         } else
4028                                 break;
4029                 }
4030                 }
4031                 break;
4032         case ACB_ADAPTER_TYPE_C: {
4033                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4034                 uint32_t outbound_doorbell, i;
4035                 /* empty doorbell Qbuffer if door bell ringed */
4036                 outbound_doorbell = readl(&reg->outbound_doorbell);
4037                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
4038                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
4039                 for (i = 0; i < 200; i++) {
4040                         msleep(20);
4041                         outbound_doorbell = readl(&reg->outbound_doorbell);
4042                         if (outbound_doorbell &
4043                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4044                                 writel(outbound_doorbell,
4045                                         &reg->outbound_doorbell_clear);
4046                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4047                                         &reg->inbound_doorbell);
4048                         } else
4049                                 break;
4050                 }
4051                 }
4052                 break;
4053         case ACB_ADAPTER_TYPE_D: {
4054                 struct MessageUnit_D *reg = acb->pmuD;
4055                 uint32_t outbound_doorbell, i;
4056                 /* empty doorbell Qbuffer if door bell ringed */
4057                 outbound_doorbell = readl(reg->outbound_doorbell);
4058                 writel(outbound_doorbell, reg->outbound_doorbell);
4059                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4060                         reg->inbound_doorbell);
4061                 for (i = 0; i < 200; i++) {
4062                         msleep(20);
4063                         outbound_doorbell = readl(reg->outbound_doorbell);
4064                         if (outbound_doorbell &
4065                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4066                                 writel(outbound_doorbell,
4067                                         reg->outbound_doorbell);
4068                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4069                                         reg->inbound_doorbell);
4070                         } else
4071                                 break;
4072                 }
4073                 }
4074                 break;
4075         case ACB_ADAPTER_TYPE_E: {
4076                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4077                 uint32_t i, tmp;
4078
4079                 acb->in_doorbell = readl(&reg->iobound_doorbell);
4080                 writel(0, &reg->host_int_status); /*clear interrupt*/
4081                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4082                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4083                 for(i=0; i < 200; i++) {
4084                         msleep(20);
4085                         tmp = acb->in_doorbell;
4086                         acb->in_doorbell = readl(&reg->iobound_doorbell);
4087                         if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4088                                 writel(0, &reg->host_int_status); /*clear interrupt*/
4089                                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4090                                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4091                         } else
4092                                 break;
4093                 }
4094                 }
4095                 break;
4096         }
4097 }
4098
4099 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4100 {
4101         switch (acb->adapter_type) {
4102         case ACB_ADAPTER_TYPE_A:
4103                 return;
4104         case ACB_ADAPTER_TYPE_B:
4105                 {
4106                         struct MessageUnit_B *reg = acb->pmuB;
4107                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4108                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4109                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4110                                 return;
4111                         }
4112                 }
4113                 break;
4114         case ACB_ADAPTER_TYPE_C:
4115                 return;
4116         }
4117         return;
4118 }
4119
4120 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4121 {
4122         uint8_t value[64];
4123         int i, count = 0;
4124         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4125         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4126         struct MessageUnit_D *pmuD = acb->pmuD;
4127
4128         /* backup pci config data */
4129         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4130         for (i = 0; i < 64; i++) {
4131                 pci_read_config_byte(acb->pdev, i, &value[i]);
4132         }
4133         /* hardware reset signal */
4134         if (acb->dev_id == 0x1680) {
4135                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4136         } else if (acb->dev_id == 0x1880) {
4137                 do {
4138                         count++;
4139                         writel(0xF, &pmuC->write_sequence);
4140                         writel(0x4, &pmuC->write_sequence);
4141                         writel(0xB, &pmuC->write_sequence);
4142                         writel(0x2, &pmuC->write_sequence);
4143                         writel(0x7, &pmuC->write_sequence);
4144                         writel(0xD, &pmuC->write_sequence);
4145                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4146                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4147         } else if (acb->dev_id == 0x1884) {
4148                 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4149                 do {
4150                         count++;
4151                         writel(0x4, &pmuE->write_sequence_3xxx);
4152                         writel(0xB, &pmuE->write_sequence_3xxx);
4153                         writel(0x2, &pmuE->write_sequence_3xxx);
4154                         writel(0x7, &pmuE->write_sequence_3xxx);
4155                         writel(0xD, &pmuE->write_sequence_3xxx);
4156                         mdelay(10);
4157                 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4158                         ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4159                 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4160         } else if (acb->dev_id == 0x1214) {
4161                 writel(0x20, pmuD->reset_request);
4162         } else {
4163                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4164         }
4165         msleep(2000);
4166         /* write back pci config data */
4167         for (i = 0; i < 64; i++) {
4168                 pci_write_config_byte(acb->pdev, i, value[i]);
4169         }
4170         msleep(1000);
4171         return;
4172 }
4173
4174 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4175 {
4176         bool rtn = true;
4177
4178         switch(acb->adapter_type) {
4179         case ACB_ADAPTER_TYPE_A:{
4180                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4181                 rtn = ((readl(&reg->outbound_msgaddr1) &
4182                         ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4183                 }
4184                 break;
4185         case ACB_ADAPTER_TYPE_B:{
4186                 struct MessageUnit_B *reg = acb->pmuB;
4187                 rtn = ((readl(reg->iop2drv_doorbell) &
4188                         ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4189                 }
4190                 break;
4191         case ACB_ADAPTER_TYPE_C:{
4192                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4193                 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
4194                 }
4195                 break;
4196         case ACB_ADAPTER_TYPE_D:{
4197                 struct MessageUnit_D *reg = acb->pmuD;
4198                 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4199                         true : false;
4200                 }
4201                 break;
4202         case ACB_ADAPTER_TYPE_E:{
4203                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4204                 rtn = (readl(&reg->host_diagnostic_3xxx) &
4205                         ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4206                 }
4207                 break;
4208         }
4209         return rtn;
4210 }
4211
4212 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4213 {
4214         uint32_t intmask_org;
4215         /* disable all outbound interrupt */
4216         intmask_org = arcmsr_disable_outbound_ints(acb);
4217         arcmsr_wait_firmware_ready(acb);
4218         arcmsr_iop_confirm(acb);
4219         /*start background rebuild*/
4220         arcmsr_start_adapter_bgrb(acb);
4221         /* empty doorbell Qbuffer if door bell ringed */
4222         arcmsr_clear_doorbell_queue_buffer(acb);
4223         arcmsr_enable_eoi_mode(acb);
4224         /* enable outbound Post Queue,outbound doorbell Interrupt */
4225         arcmsr_enable_outbound_ints(acb, intmask_org);
4226         acb->acb_flags |= ACB_F_IOP_INITED;
4227 }
4228
4229 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4230 {
4231         struct CommandControlBlock *ccb;
4232         uint32_t intmask_org;
4233         uint8_t rtnval = 0x00;
4234         int i = 0;
4235         unsigned long flags;
4236
4237         if (atomic_read(&acb->ccboutstandingcount) != 0) {
4238                 /* disable all outbound interrupt */
4239                 intmask_org = arcmsr_disable_outbound_ints(acb);
4240                 /* talk to iop 331 outstanding command aborted */
4241                 rtnval = arcmsr_abort_allcmd(acb);
4242                 /* clear all outbound posted Q */
4243                 arcmsr_done4abort_postqueue(acb);
4244                 for (i = 0; i < acb->maxFreeCCB; i++) {
4245                         ccb = acb->pccb_pool[i];
4246                         if (ccb->startdone == ARCMSR_CCB_START) {
4247                                 scsi_dma_unmap(ccb->pcmd);
4248                                 ccb->startdone = ARCMSR_CCB_DONE;
4249                                 ccb->ccb_flags = 0;
4250                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
4251                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
4252                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4253                         }
4254                 }
4255                 atomic_set(&acb->ccboutstandingcount, 0);
4256                 /* enable all outbound interrupt */
4257                 arcmsr_enable_outbound_ints(acb, intmask_org);
4258                 return rtnval;
4259         }
4260         return rtnval;
4261 }
4262
4263 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4264 {
4265         struct AdapterControlBlock *acb;
4266         int retry_count = 0;
4267         int rtn = FAILED;
4268         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4269         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4270                 return SUCCESS;
4271         pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4272                 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4273         acb->num_resets++;
4274
4275         if (acb->acb_flags & ACB_F_BUS_RESET) {
4276                 long timeout;
4277                 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4278                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4279                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
4280                 if (timeout)
4281                         return SUCCESS;
4282         }
4283         acb->acb_flags |= ACB_F_BUS_RESET;
4284         if (!arcmsr_iop_reset(acb)) {
4285                 arcmsr_hardware_reset(acb);
4286                 acb->acb_flags &= ~ACB_F_IOP_INITED;
4287 wait_reset_done:
4288                 ssleep(ARCMSR_SLEEPTIME);
4289                 if (arcmsr_reset_in_progress(acb)) {
4290                         if (retry_count > ARCMSR_RETRYCOUNT) {
4291                                 acb->fw_flag = FW_DEADLOCK;
4292                                 pr_notice("arcmsr%d: waiting for hw bus reset"
4293                                         " return, RETRY TERMINATED!!\n",
4294                                         acb->host->host_no);
4295                                 return FAILED;
4296                         }
4297                         retry_count++;
4298                         goto wait_reset_done;
4299                 }
4300                 arcmsr_iop_init(acb);
4301                 atomic_set(&acb->rq_map_token, 16);
4302                 atomic_set(&acb->ante_token_value, 16);
4303                 acb->fw_flag = FW_NORMAL;
4304                 mod_timer(&acb->eternal_timer, jiffies +
4305                         msecs_to_jiffies(6 * HZ));
4306                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4307                 rtn = SUCCESS;
4308                 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4309         } else {
4310                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4311                 atomic_set(&acb->rq_map_token, 16);
4312                 atomic_set(&acb->ante_token_value, 16);
4313                 acb->fw_flag = FW_NORMAL;
4314                 mod_timer(&acb->eternal_timer, jiffies +
4315                         msecs_to_jiffies(6 * HZ));
4316                 rtn = SUCCESS;
4317         }
4318         return rtn;
4319 }
4320
4321 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4322                 struct CommandControlBlock *ccb)
4323 {
4324         int rtn;
4325         rtn = arcmsr_polling_ccbdone(acb, ccb);
4326         return rtn;
4327 }
4328
4329 static int arcmsr_abort(struct scsi_cmnd *cmd)
4330 {
4331         struct AdapterControlBlock *acb =
4332                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4333         int i = 0;
4334         int rtn = FAILED;
4335         uint32_t intmask_org;
4336
4337         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4338                 return SUCCESS;
4339         printk(KERN_NOTICE
4340                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4341                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4342         acb->acb_flags |= ACB_F_ABORT;
4343         acb->num_aborts++;
4344         /*
4345         ************************************************
4346         ** the all interrupt service routine is locked
4347         ** we need to handle it as soon as possible and exit
4348         ************************************************
4349         */
4350         if (!atomic_read(&acb->ccboutstandingcount)) {
4351                 acb->acb_flags &= ~ACB_F_ABORT;
4352                 return rtn;
4353         }
4354
4355         intmask_org = arcmsr_disable_outbound_ints(acb);
4356         for (i = 0; i < acb->maxFreeCCB; i++) {
4357                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4358                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4359                         ccb->startdone = ARCMSR_CCB_ABORTED;
4360                         rtn = arcmsr_abort_one_cmd(acb, ccb);
4361                         break;
4362                 }
4363         }
4364         acb->acb_flags &= ~ACB_F_ABORT;
4365         arcmsr_enable_outbound_ints(acb, intmask_org);
4366         return rtn;
4367 }
4368
4369 static const char *arcmsr_info(struct Scsi_Host *host)
4370 {
4371         struct AdapterControlBlock *acb =
4372                 (struct AdapterControlBlock *) host->hostdata;
4373         static char buf[256];
4374         char *type;
4375         int raid6 = 1;
4376         switch (acb->pdev->device) {
4377         case PCI_DEVICE_ID_ARECA_1110:
4378         case PCI_DEVICE_ID_ARECA_1200:
4379         case PCI_DEVICE_ID_ARECA_1202:
4380         case PCI_DEVICE_ID_ARECA_1210:
4381                 raid6 = 0;
4382                 /*FALLTHRU*/
4383         case PCI_DEVICE_ID_ARECA_1120:
4384         case PCI_DEVICE_ID_ARECA_1130:
4385         case PCI_DEVICE_ID_ARECA_1160:
4386         case PCI_DEVICE_ID_ARECA_1170:
4387         case PCI_DEVICE_ID_ARECA_1201:
4388         case PCI_DEVICE_ID_ARECA_1203:
4389         case PCI_DEVICE_ID_ARECA_1220:
4390         case PCI_DEVICE_ID_ARECA_1230:
4391         case PCI_DEVICE_ID_ARECA_1260:
4392         case PCI_DEVICE_ID_ARECA_1270:
4393         case PCI_DEVICE_ID_ARECA_1280:
4394                 type = "SATA";
4395                 break;
4396         case PCI_DEVICE_ID_ARECA_1214:
4397         case PCI_DEVICE_ID_ARECA_1380:
4398         case PCI_DEVICE_ID_ARECA_1381:
4399         case PCI_DEVICE_ID_ARECA_1680:
4400         case PCI_DEVICE_ID_ARECA_1681:
4401         case PCI_DEVICE_ID_ARECA_1880:
4402         case PCI_DEVICE_ID_ARECA_1884:
4403                 type = "SAS/SATA";
4404                 break;
4405         default:
4406                 type = "unknown";
4407                 raid6 = 0;
4408                 break;
4409         }
4410         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4411                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4412         return buf;
4413 }