drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 int ql2xmaxqdepth = MAX_Q_DEPTH;
 114 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 115 MODULE_PARM_DESC(ql2xmaxqdepth,
 116                 "Maximum queue depth to set for each LUN. "
 117                 "Default is 32.");
 118
 119 int ql2xenabledif = 2;
 120 module_param(ql2xenabledif, int, S_IRUGO);
 121 MODULE_PARM_DESC(ql2xenabledif,
 122                 " Enable T10-CRC-DIF "
 123                 " Default is 0 - No DIF Support. 1 - Enable it"
 124                 ", 2 - Enable DIF for all types, except Type 0.");
 125
 126 int ql2xenablehba_err_chk = 2;
 127 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 128 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 129                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 130                 " Default is 1.\n"
 131                 "  0 -- Error isolation disabled\n"
 132                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 133                 "  2 -- Error isolation enabled for all Types\n");
 134
 135 int ql2xiidmaenable=1;
 136 module_param(ql2xiidmaenable, int, S_IRUGO);
 137 MODULE_PARM_DESC(ql2xiidmaenable,
 138                 "Enables iIDMA settings "
 139                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 140
 141 int ql2xmaxqueues = 1;
 142 module_param(ql2xmaxqueues, int, S_IRUGO);
 143 MODULE_PARM_DESC(ql2xmaxqueues,
 144                 "Enables MQ settings "
 145                 "Default is 1 for single queue. Set it to number "
 146                 "of queues in MQ mode.");
 147
 148 int ql2xmultique_tag;
 149 module_param(ql2xmultique_tag, int, S_IRUGO);
 150 MODULE_PARM_DESC(ql2xmultique_tag,
 151                 "Enables CPU affinity settings for the driver "
 152                 "Default is 0 for no affinity of request and response IO. "
 153                 "Set it to 1 to turn on the cpu affinity.");
 154
 155 int ql2xfwloadbin;
 156 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 157 MODULE_PARM_DESC(ql2xfwloadbin,
 158                 "Option to specify location from which to load ISP firmware:.\n"
 159                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 160                 "      interface.\n"
 161                 " 1 -- load firmware from flash.\n"
 162                 " 0 -- use default semantics.\n");
 163
 164 int ql2xetsenable;
 165 module_param(ql2xetsenable, int, S_IRUGO);
 166 MODULE_PARM_DESC(ql2xetsenable,
 167                 "Enables firmware ETS burst."
 168                 "Default is 0 - skip ETS enablement.");
 169
 170 int ql2xdbwr = 1;
 171 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 172 MODULE_PARM_DESC(ql2xdbwr,
 173                 "Option to specify scheme for request queue posting.\n"
 174                 " 0 -- Regular doorbell.\n"
 175                 " 1 -- CAMRAM doorbell (faster).\n");
 176
 177 int ql2xtargetreset = 1;
 178 module_param(ql2xtargetreset, int, S_IRUGO);
 179 MODULE_PARM_DESC(ql2xtargetreset,
 180                  "Enable target reset."
 181                  "Default is 1 - use hw defaults.");
 182
 183 int ql2xgffidenable;
 184 module_param(ql2xgffidenable, int, S_IRUGO);
 185 MODULE_PARM_DESC(ql2xgffidenable,
 186                 "Enables GFF_ID checks of port type. "
 187                 "Default is 0 - Do not use GFF_ID information.");
 188
 189 int ql2xasynctmfenable;
 190 module_param(ql2xasynctmfenable, int, S_IRUGO);
 191 MODULE_PARM_DESC(ql2xasynctmfenable,
 192                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 193                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 194
 195 int ql2xdontresethba;
 196 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 197 MODULE_PARM_DESC(ql2xdontresethba,
 198                 "Option to specify reset behaviour.\n"
 199                 " 0 (Default) -- Reset on failure.\n"
 200                 " 1 -- Do not reset on failure.\n");
 201
 202 uint ql2xmaxlun = MAX_LUNS;
 203 module_param(ql2xmaxlun, uint, S_IRUGO);
 204 MODULE_PARM_DESC(ql2xmaxlun,
 205                 "Defines the maximum LU number to register with the SCSI "
 206                 "midlayer. Default is 65535.");
 207
 208 int ql2xmdcapmask = 0x1F;
 209 module_param(ql2xmdcapmask, int, S_IRUGO);
 210 MODULE_PARM_DESC(ql2xmdcapmask,
 211                 "Set the Minidump driver capture mask level. "
 212                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 213
 214 int ql2xmdenable = 1;
 215 module_param(ql2xmdenable, int, S_IRUGO);
 216 MODULE_PARM_DESC(ql2xmdenable,
 217                 "Enable/disable MiniDump. "
 218                 "0 - MiniDump disabled. "
 219                 "1 (Default) - MiniDump enabled.");
 220
 221 /*
 222  * SCSI host template entry points
 223  */
 224 static int qla2xxx_slave_configure(struct scsi_device * device);
 225 static int qla2xxx_slave_alloc(struct scsi_device *);
 226 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 227 static void qla2xxx_scan_start(struct Scsi_Host *);
 228 static void qla2xxx_slave_destroy(struct scsi_device *);
 229 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 230 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 231 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 232 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 233 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 234 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 235
 236 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 237 static int qla2x00_change_queue_type(struct scsi_device *, int);
 238 static void qla2x00_free_device(scsi_qla_host_t *);
 239
 240 struct scsi_host_template qla2xxx_driver_template = {
 241         .module                 = THIS_MODULE,
 242         .name                   = QLA2XXX_DRIVER_NAME,
 243         .queuecommand           = qla2xxx_queuecommand,
 244
 245         .eh_abort_handler       = qla2xxx_eh_abort,
 246         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 247         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 248         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 249         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 250
 251         .slave_configure        = qla2xxx_slave_configure,
 252
 253         .slave_alloc            = qla2xxx_slave_alloc,
 254         .slave_destroy          = qla2xxx_slave_destroy,
 255         .scan_finished          = qla2xxx_scan_finished,
 256         .scan_start             = qla2xxx_scan_start,
 257         .change_queue_depth     = qla2x00_change_queue_depth,
 258         .change_queue_type      = qla2x00_change_queue_type,
 259         .this_id                = -1,
 260         .cmd_per_lun            = 3,
 261         .use_clustering         = ENABLE_CLUSTERING,
 262         .sg_tablesize           = SG_ALL,
 263
 264         .max_sectors            = 0xFFFF,
 265         .shost_attrs            = qla2x00_host_attrs,
 266
 267         .supported_mode         = MODE_INITIATOR,
 268 };
 269
 270 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 271 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 272
 273 /* TODO Convert to inlines
 274  *
 275  * Timer routines
 276  */
 277
 278 __inline__ void
 279 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 280 {
 281         init_timer(&vha->timer);
 282         vha->timer.expires = jiffies + interval * HZ;
 283         vha->timer.data = (unsigned long)vha;
 284         vha->timer.function = (void (*)(unsigned long))func;
 285         add_timer(&vha->timer);
 286         vha->timer_active = 1;
 287 }
 288
 289 static inline void
 290 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 291 {
 292         /* Currently used for 82XX only. */
 293         if (vha->device_flags & DFLG_DEV_FAILED) {
 294                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 295                     "Device in a failed state, returning.\n");
 296                 return;
 297         }
 298
 299         mod_timer(&vha->timer, jiffies + interval * HZ);
 300 }
 301
 302 static __inline__ void
 303 qla2x00_stop_timer(scsi_qla_host_t *vha)
 304 {
 305         del_timer_sync(&vha->timer);
 306         vha->timer_active = 0;
 307 }
 308
 309 static int qla2x00_do_dpc(void *data);
 310
 311 static void qla2x00_rst_aen(scsi_qla_host_t *);
 312
 313 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 314         struct req_que **, struct rsp_que **);
 315 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 316 static void qla2x00_mem_free(struct qla_hw_data *);
 317
 318 /* -------------------------------------------------------------------------- */
 319 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 320                                 struct rsp_que *rsp)
 321 {
 322         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 323         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 324                                 GFP_KERNEL);
 325         if (!ha->req_q_map) {
 326                 ql_log(ql_log_fatal, vha, 0x003b,
 327                     "Unable to allocate memory for request queue ptrs.\n");
 328                 goto fail_req_map;
 329         }
 330
 331         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 332                                 GFP_KERNEL);
 333         if (!ha->rsp_q_map) {
 334                 ql_log(ql_log_fatal, vha, 0x003c,
 335                     "Unable to allocate memory for response queue ptrs.\n");
 336                 goto fail_rsp_map;
 337         }
 338         /*
 339          * Make sure we record at least the request and response queue zero in
 340          * case we need to free them if part of the probe fails.
 341          */
 342         ha->rsp_q_map[0] = rsp;
 343         ha->req_q_map[0] = req;
 344         set_bit(0, ha->rsp_qid_map);
 345         set_bit(0, ha->req_qid_map);
 346         return 1;
 347
 348 fail_rsp_map:
 349         kfree(ha->req_q_map);
 350         ha->req_q_map = NULL;
 351 fail_req_map:
 352         return -ENOMEM;
 353 }
 354
 355 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 356 {
 357         if (IS_QLAFX00(ha)) {
 358                 if (req && req->ring_fx00)
 359                         dma_free_coherent(&ha->pdev->dev,
 360                             (req->length_fx00 + 1) * sizeof(request_t),
 361                             req->ring_fx00, req->dma_fx00);
 362         } else if (req && req->ring)
 363                 dma_free_coherent(&ha->pdev->dev,
 364                 (req->length + 1) * sizeof(request_t),
 365                 req->ring, req->dma);
 366
 367         if (req)
 368                 kfree(req->outstanding_cmds);
 369
 370         kfree(req);
 371         req = NULL;
 372 }
 373
 374 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 375 {
 376         if (IS_QLAFX00(ha)) {
 377                 if (rsp && rsp->ring)
 378                         dma_free_coherent(&ha->pdev->dev,
 379                             (rsp->length_fx00 + 1) * sizeof(request_t),
 380                             rsp->ring_fx00, rsp->dma_fx00);
 381         } else if (rsp && rsp->ring) {
 382                 dma_free_coherent(&ha->pdev->dev,
 383                 (rsp->length + 1) * sizeof(response_t),
 384                 rsp->ring, rsp->dma);
 385         }
 386         kfree(rsp);
 387         rsp = NULL;
 388 }
 389
 390 static void qla2x00_free_queues(struct qla_hw_data *ha)
 391 {
 392         struct req_que *req;
 393         struct rsp_que *rsp;
 394         int cnt;
 395
 396         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 397                 req = ha->req_q_map[cnt];
 398                 qla2x00_free_req_que(ha, req);
 399         }
 400         kfree(ha->req_q_map);
 401         ha->req_q_map = NULL;
 402
 403         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 404                 rsp = ha->rsp_q_map[cnt];
 405                 qla2x00_free_rsp_que(ha, rsp);
 406         }
 407         kfree(ha->rsp_q_map);
 408         ha->rsp_q_map = NULL;
 409 }
 410
 411 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 412 {
 413         uint16_t options = 0;
 414         int ques, req, ret;
 415         struct qla_hw_data *ha = vha->hw;
 416
 417         if (!(ha->fw_attributes & BIT_6)) {
 418                 ql_log(ql_log_warn, vha, 0x00d8,
 419                     "Firmware is not multi-queue capable.\n");
 420                 goto fail;
 421         }
 422         if (ql2xmultique_tag) {
 423                 /* create a request queue for IO */
 424                 options |= BIT_7;
 425                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 426                         QLA_DEFAULT_QUE_QOS);
 427                 if (!req) {
 428                         ql_log(ql_log_warn, vha, 0x00e0,
 429                             "Failed to create request queue.\n");
 430                         goto fail;
 431                 }
 432                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 433                 vha->req = ha->req_q_map[req];
 434                 options |= BIT_1;
 435                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 436                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 437                         if (!ret) {
 438                                 ql_log(ql_log_warn, vha, 0x00e8,
 439                                     "Failed to create response queue.\n");
 440                                 goto fail2;
 441                         }
 442                 }
 443                 ha->flags.cpu_affinity_enabled = 1;
 444                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 445                     "CPU affinity mode enalbed, "
 446                     "no. of response queues:%d no. of request queues:%d.\n",
 447                     ha->max_rsp_queues, ha->max_req_queues);
 448                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 449                     "CPU affinity mode enalbed, "
 450                     "no. of response queues:%d no. of request queues:%d.\n",
 451                     ha->max_rsp_queues, ha->max_req_queues);
 452         }
 453         return 0;
 454 fail2:
 455         qla25xx_delete_queues(vha);
 456         destroy_workqueue(ha->wq);
 457         ha->wq = NULL;
 458         vha->req = ha->req_q_map[0];
 459 fail:
 460         ha->mqenable = 0;
 461         kfree(ha->req_q_map);
 462         kfree(ha->rsp_q_map);
 463         ha->max_req_queues = ha->max_rsp_queues = 1;
 464         return 1;
 465 }
 466
 467 static char *
 468 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 469 {
 470         struct qla_hw_data *ha = vha->hw;
 471         static char *pci_bus_modes[] = {
 472                 "33", "66", "100", "133",
 473         };
 474         uint16_t pci_bus;
 475
 476         strcpy(str, "PCI");
 477         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 478         if (pci_bus) {
 479                 strcat(str, "-X (");
 480                 strcat(str, pci_bus_modes[pci_bus]);
 481         } else {
 482                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 483                 strcat(str, " (");
 484                 strcat(str, pci_bus_modes[pci_bus]);
 485         }
 486         strcat(str, " MHz)");
 487
 488         return (str);
 489 }
 490
 491 static char *
 492 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 493 {
 494         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 495         struct qla_hw_data *ha = vha->hw;
 496         uint32_t pci_bus;
 497         int pcie_reg;
 498
 499         pcie_reg = pci_pcie_cap(ha->pdev);
 500         if (pcie_reg) {
 501                 char lwstr[6];
 502                 uint16_t pcie_lstat, lspeed, lwidth;
 503
 504                 pcie_reg += PCI_EXP_LNKCAP;
 505                 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
 506                 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
 507                 lwidth = (pcie_lstat &
 508                     (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
 509
 510                 strcpy(str, "PCIe (");
 511                 switch (lspeed) {
 512                 case 1:
 513                         strcat(str, "2.5GT/s ");
 514                         break;
 515                 case 2:
 516                         strcat(str, "5.0GT/s ");
 517                         break;
 518                 case 3:
 519                         strcat(str, "8.0GT/s ");
 520                         break;
 521                 default:
 522                         strcat(str, "<unknown> ");
 523                         break;
 524                 }
 525                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 526                 strcat(str, lwstr);
 527
 528                 return str;
 529         }
 530
 531         strcpy(str, "PCI");
 532         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 533         if (pci_bus == 0 || pci_bus == 8) {
 534                 strcat(str, " (");
 535                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 536         } else {
 537                 strcat(str, "-X ");
 538                 if (pci_bus & BIT_2)
 539                         strcat(str, "Mode 2");
 540                 else
 541                         strcat(str, "Mode 1");
 542                 strcat(str, " (");
 543                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 544         }
 545         strcat(str, " MHz)");
 546
 547         return str;
 548 }
 549
 550 static char *
 551 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 552 {
 553         char un_str[10];
 554         struct qla_hw_data *ha = vha->hw;
 555
 556         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 557             ha->fw_minor_version,
 558             ha->fw_subminor_version);
 559
 560         if (ha->fw_attributes & BIT_9) {
 561                 strcat(str, "FLX");
 562                 return (str);
 563         }
 564
 565         switch (ha->fw_attributes & 0xFF) {
 566         case 0x7:
 567                 strcat(str, "EF");
 568                 break;
 569         case 0x17:
 570                 strcat(str, "TP");
 571                 break;
 572         case 0x37:
 573                 strcat(str, "IP");
 574                 break;
 575         case 0x77:
 576                 strcat(str, "VI");
 577                 break;
 578         default:
 579                 sprintf(un_str, "(%x)", ha->fw_attributes);
 580                 strcat(str, un_str);
 581                 break;
 582         }
 583         if (ha->fw_attributes & 0x100)
 584                 strcat(str, "X");
 585
 586         return (str);
 587 }
 588
 589 static char *
 590 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 591 {
 592         struct qla_hw_data *ha = vha->hw;
 593
 594         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 595             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 596         return str;
 597 }
 598
 599 void
 600 qla2x00_sp_free_dma(void *vha, void *ptr)
 601 {
 602         srb_t *sp = (srb_t *)ptr;
 603         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 604         struct qla_hw_data *ha = sp->fcport->vha->hw;
 605         void *ctx = GET_CMD_CTX_SP(sp);
 606
 607         if (sp->flags & SRB_DMA_VALID) {
 608                 scsi_dma_unmap(cmd);
 609                 sp->flags &= ~SRB_DMA_VALID;
 610         }
 611
 612         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 613                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 614                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 615                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 616         }
 617
 618         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 619                 /* List assured to be having elements */
 620                 qla2x00_clean_dsd_pool(ha, sp);
 621                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 622         }
 623
 624         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 625                 dma_pool_free(ha->dl_dma_pool, ctx,
 626                     ((struct crc_context *)ctx)->crc_ctx_dma);
 627                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 628         }
 629
 630         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 631                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 632
 633                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 634                         ctx1->fcp_cmnd_dma);
 635                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 636                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 637                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 638                 mempool_free(ctx1, ha->ctx_mempool);
 639                 ctx1 = NULL;
 640         }
 641
 642         CMD_SP(cmd) = NULL;
 643         qla2x00_rel_sp(sp->fcport->vha, sp);
 644 }
 645
 646 static void
 647 qla2x00_sp_compl(void *data, void *ptr, int res)
 648 {
 649         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 650         srb_t *sp = (srb_t *)ptr;
 651         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 652
 653         cmd->result = res;
 654
 655         if (atomic_read(&sp->ref_count) == 0) {
 656                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 657                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 658                     sp, GET_CMD_SP(sp));
 659                 if (ql2xextended_error_logging & ql_dbg_io)
 660                         BUG();
 661                 return;
 662         }
 663         if (!atomic_dec_and_test(&sp->ref_count))
 664                 return;
 665
 666         qla2x00_sp_free_dma(ha, sp);
 667         cmd->scsi_done(cmd);
 668 }
 669
 670 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 671  * does not have the changes necessary to avoid taking host->host_lock.
 672  */
 673 static int
 674 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 675 {
 676         scsi_qla_host_t *vha = shost_priv(host);
 677         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 678         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 679         struct qla_hw_data *ha = vha->hw;
 680         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 681         srb_t *sp;
 682         int rval;
 683
 684         if (ha->flags.eeh_busy) {
 685                 if (ha->flags.pci_channel_io_perm_failure) {
 686                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 687                             "PCI Channel IO permanent failure, exiting "
 688                             "cmd=%p.\n", cmd);
 689                         cmd->result = DID_NO_CONNECT << 16;
 690                 } else {
 691                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 692                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 693                         cmd->result = DID_REQUEUE << 16;
 694                 }
 695                 goto qc24_fail_command;
 696         }
 697
 698         rval = fc_remote_port_chkready(rport);
 699         if (rval) {
 700                 cmd->result = rval;
 701                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 702                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 703                     cmd, rval);
 704                 goto qc24_fail_command;
 705         }
 706
 707         if (!vha->flags.difdix_supported &&
 708                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 709                         ql_dbg(ql_dbg_io, vha, 0x3004,
 710                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 711                             cmd);
 712                         cmd->result = DID_NO_CONNECT << 16;
 713                         goto qc24_fail_command;
 714         }
 715
 716         if (!fcport) {
 717                 cmd->result = DID_NO_CONNECT << 16;
 718                 goto qc24_fail_command;
 719         }
 720
 721         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 722                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 723                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 724                         ql_dbg(ql_dbg_io, vha, 0x3005,
 725                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 726                             atomic_read(&fcport->state),
 727                             atomic_read(&base_vha->loop_state));
 728                         cmd->result = DID_NO_CONNECT << 16;
 729                         goto qc24_fail_command;
 730                 }
 731                 goto qc24_target_busy;
 732         }
 733
 734         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 735         if (!sp) {
 736                 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
 737                 goto qc24_host_busy;
 738         }
 739
 740         sp->u.scmd.cmd = cmd;
 741         sp->type = SRB_SCSI_CMD;
 742         atomic_set(&sp->ref_count, 1);
 743         CMD_SP(cmd) = (void *)sp;
 744         sp->free = qla2x00_sp_free_dma;
 745         sp->done = qla2x00_sp_compl;
 746
 747         rval = ha->isp_ops->start_scsi(sp);
 748         if (rval != QLA_SUCCESS) {
 749                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 750                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 751                 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
 752                 goto qc24_host_busy_free_sp;
 753         }
 754
 755         return 0;
 756
 757 qc24_host_busy_free_sp:
 758         qla2x00_sp_free_dma(ha, sp);
 759
 760 qc24_host_busy:
 761         return SCSI_MLQUEUE_HOST_BUSY;
 762
 763 qc24_target_busy:
 764         return SCSI_MLQUEUE_TARGET_BUSY;
 765
 766 qc24_fail_command:
 767         cmd->scsi_done(cmd);
 768
 769         return 0;
 770 }
 771
 772 /*
 773  * qla2x00_eh_wait_on_command
 774  *    Waits for the command to be returned by the Firmware for some
 775  *    max time.
 776  *
 777  * Input:
 778  *    cmd = Scsi Command to wait on.
 779  *
 780  * Return:
 781  *    Not Found : 0
 782  *    Found : 1
 783  */
 784 static int
 785 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 786 {
 787 #define ABORT_POLLING_PERIOD    1000
 788 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 789         unsigned long wait_iter = ABORT_WAIT_ITER;
 790         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 791         struct qla_hw_data *ha = vha->hw;
 792         int ret = QLA_SUCCESS;
 793
 794         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 795                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 796                     "Return:eh_wait.\n");
 797                 return ret;
 798         }
 799
 800         while (CMD_SP(cmd) && wait_iter--) {
 801                 msleep(ABORT_POLLING_PERIOD);
 802         }
 803         if (CMD_SP(cmd))
 804                 ret = QLA_FUNCTION_FAILED;
 805
 806         return ret;
 807 }
 808
 809 /*
 810  * qla2x00_wait_for_hba_online
 811  *    Wait till the HBA is online after going through
 812  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 813  *    finally HBA is disabled ie marked offline
 814  *
 815  * Input:
 816  *     ha - pointer to host adapter structure
 817  *
 818  * Note:
 819  *    Does context switching-Release SPIN_LOCK
 820  *    (if any) before calling this routine.
 821  *
 822  * Return:
 823  *    Success (Adapter is online) : 0
 824  *    Failed  (Adapter is offline/disabled) : 1
 825  */
 826 int
 827 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 828 {
 829         int             return_status;
 830         unsigned long   wait_online;
 831         struct qla_hw_data *ha = vha->hw;
 832         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 833
 834         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 835         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 836             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 837             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 838             ha->dpc_active) && time_before(jiffies, wait_online)) {
 839
 840                 msleep(1000);
 841         }
 842         if (base_vha->flags.online)
 843                 return_status = QLA_SUCCESS;
 844         else
 845                 return_status = QLA_FUNCTION_FAILED;
 846
 847         return (return_status);
 848 }
 849
 850 /*
 851  * qla2x00_wait_for_reset_ready
 852  *    Wait till the HBA is online after going through
 853  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 854  *    finally HBA is disabled ie marked offline or flash
 855  *    operations are in progress.
 856  *
 857  * Input:
 858  *     ha - pointer to host adapter structure
 859  *
 860  * Note:
 861  *    Does context switching-Release SPIN_LOCK
 862  *    (if any) before calling this routine.
 863  *
 864  * Return:
 865  *    Success (Adapter is online/no flash ops) : 0
 866  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 867  */
 868 static int
 869 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 870 {
 871         int             return_status;
 872         unsigned long   wait_online;
 873         struct qla_hw_data *ha = vha->hw;
 874         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 875
 876         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 877         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 878             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 879             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 880             ha->optrom_state != QLA_SWAITING ||
 881             ha->dpc_active) && time_before(jiffies, wait_online))
 882                 msleep(1000);
 883
 884         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 885                 return_status = QLA_SUCCESS;
 886         else
 887                 return_status = QLA_FUNCTION_FAILED;
 888
 889         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 890             "%s return status=%d.\n", __func__, return_status);
 891
 892         return return_status;
 893 }
 894
 895 int
 896 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 897 {
 898         int             return_status;
 899         unsigned long   wait_reset;
 900         struct qla_hw_data *ha = vha->hw;
 901         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 902
 903         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 904         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 905             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 906             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 907             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 908
 909                 msleep(1000);
 910
 911                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 912                     ha->flags.chip_reset_done)
 913                         break;
 914         }
 915         if (ha->flags.chip_reset_done)
 916                 return_status = QLA_SUCCESS;
 917         else
 918                 return_status = QLA_FUNCTION_FAILED;
 919
 920         return return_status;
 921 }
 922
 923 static void
 924 sp_get(struct srb *sp)
 925 {
 926         atomic_inc(&sp->ref_count);
 927 }
 928
 929 /**************************************************************************
 930 * qla2xxx_eh_abort
 931 *
 932 * Description:
 933 *    The abort function will abort the specified command.
 934 *
 935 * Input:
 936 *    cmd = Linux SCSI command packet to be aborted.
 937 *
 938 * Returns:
 939 *    Either SUCCESS or FAILED.
 940 *
 941 * Note:
 942 *    Only return FAILED if command not returned by firmware.
 943 **************************************************************************/
 944 static int
 945 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 946 {
 947         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 948         srb_t *sp;
 949         int ret;
 950         unsigned int id, lun;
 951         unsigned long flags;
 952         int wait = 0;
 953         struct qla_hw_data *ha = vha->hw;
 954
 955         if (!CMD_SP(cmd))
 956                 return SUCCESS;
 957
 958         ret = fc_block_scsi_eh(cmd);
 959         if (ret != 0)
 960                 return ret;
 961         ret = SUCCESS;
 962
 963         id = cmd->device->id;
 964         lun = cmd->device->lun;
 965
 966         spin_lock_irqsave(&ha->hardware_lock, flags);
 967         sp = (srb_t *) CMD_SP(cmd);
 968         if (!sp) {
 969                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 970                 return SUCCESS;
 971         }
 972
 973         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 974             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 975             vha->host_no, id, lun, sp, cmd);
 976
 977         /* Get a reference to the sp and drop the lock.*/
 978         sp_get(sp);
 979
 980         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 981         if (ha->isp_ops->abort_command(sp)) {
 982                 ret = FAILED;
 983                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 984                     "Abort command mbx failed cmd=%p.\n", cmd);
 985         } else {
 986                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 987                     "Abort command mbx success cmd=%p.\n", cmd);
 988                 wait = 1;
 989         }
 990
 991         spin_lock_irqsave(&ha->hardware_lock, flags);
 992         sp->done(ha, sp, 0);
 993         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 994
 995         /* Did the command return during mailbox execution? */
 996         if (ret == FAILED && !CMD_SP(cmd))
 997                 ret = SUCCESS;
 998
 999         /* Wait for the command to be returned. */
1000         if (wait) {
1001                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1002                         ql_log(ql_log_warn, vha, 0x8006,
1003                             "Abort handler timed out cmd=%p.\n", cmd);
1004                         ret = FAILED;
1005                 }
1006         }
1007
1008         ql_log(ql_log_info, vha, 0x801c,
1009             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
1010             vha->host_no, id, lun, wait, ret);
1011
1012         return ret;
1013 }
1014
1015 int
1016 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1017         unsigned int l, enum nexus_wait_type type)
1018 {
1019         int cnt, match, status;
1020         unsigned long flags;
1021         struct qla_hw_data *ha = vha->hw;
1022         struct req_que *req;
1023         srb_t *sp;
1024         struct scsi_cmnd *cmd;
1025
1026         status = QLA_SUCCESS;
1027
1028         spin_lock_irqsave(&ha->hardware_lock, flags);
1029         req = vha->req;
1030         for (cnt = 1; status == QLA_SUCCESS &&
1031                 cnt < req->num_outstanding_cmds; cnt++) {
1032                 sp = req->outstanding_cmds[cnt];
1033                 if (!sp)
1034                         continue;
1035                 if (sp->type != SRB_SCSI_CMD)
1036                         continue;
1037                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1038                         continue;
1039                 match = 0;
1040                 cmd = GET_CMD_SP(sp);
1041                 switch (type) {
1042                 case WAIT_HOST:
1043                         match = 1;
1044                         break;
1045                 case WAIT_TARGET:
1046                         match = cmd->device->id == t;
1047                         break;
1048                 case WAIT_LUN:
1049                         match = (cmd->device->id == t &&
1050                                 cmd->device->lun == l);
1051                         break;
1052                 }
1053                 if (!match)
1054                         continue;
1055
1056                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1057                 status = qla2x00_eh_wait_on_command(cmd);
1058                 spin_lock_irqsave(&ha->hardware_lock, flags);
1059         }
1060         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1061
1062         return status;
1063 }
1064
1065 static char *reset_errors[] = {
1066         "HBA not online",
1067         "HBA not ready",
1068         "Task management failed",
1069         "Waiting for command completions",
1070 };
1071
1072 static int
1073 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1074     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1075 {
1076         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1077         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1078         int err;
1079
1080         if (!fcport) {
1081                 return FAILED;
1082         }
1083
1084         err = fc_block_scsi_eh(cmd);
1085         if (err != 0)
1086                 return err;
1087
1088         ql_log(ql_log_info, vha, 0x8009,
1089             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1090             cmd->device->id, cmd->device->lun, cmd);
1091
1092         err = 0;
1093         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1094                 ql_log(ql_log_warn, vha, 0x800a,
1095                     "Wait for hba online failed for cmd=%p.\n", cmd);
1096                 goto eh_reset_failed;
1097         }
1098         err = 2;
1099         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1100                 != QLA_SUCCESS) {
1101                 ql_log(ql_log_warn, vha, 0x800c,
1102                     "do_reset failed for cmd=%p.\n", cmd);
1103                 goto eh_reset_failed;
1104         }
1105         err = 3;
1106         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1107             cmd->device->lun, type) != QLA_SUCCESS) {
1108                 ql_log(ql_log_warn, vha, 0x800d,
1109                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1110                 goto eh_reset_failed;
1111         }
1112
1113         ql_log(ql_log_info, vha, 0x800e,
1114             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1115             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1116
1117         return SUCCESS;
1118
1119 eh_reset_failed:
1120         ql_log(ql_log_info, vha, 0x800f,
1121             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1122             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1123             cmd);
1124         return FAILED;
1125 }
1126
1127 static int
1128 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1129 {
1130         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1131         struct qla_hw_data *ha = vha->hw;
1132
1133         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1134             ha->isp_ops->lun_reset);
1135 }
1136
1137 static int
1138 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1139 {
1140         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1141         struct qla_hw_data *ha = vha->hw;
1142
1143         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1144             ha->isp_ops->target_reset);
1145 }
1146
1147 /**************************************************************************
1148 * qla2xxx_eh_bus_reset
1149 *
1150 * Description:
1151 *    The bus reset function will reset the bus and abort any executing
1152 *    commands.
1153 *
1154 * Input:
1155 *    cmd = Linux SCSI command packet of the command that cause the
1156 *          bus reset.
1157 *
1158 * Returns:
1159 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1160 *
1161 **************************************************************************/
1162 static int
1163 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1164 {
1165         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1166         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1167         int ret = FAILED;
1168         unsigned int id, lun;
1169
1170         id = cmd->device->id;
1171         lun = cmd->device->lun;
1172
1173         if (!fcport) {
1174                 return ret;
1175         }
1176
1177         ret = fc_block_scsi_eh(cmd);
1178         if (ret != 0)
1179                 return ret;
1180         ret = FAILED;
1181
1182         ql_log(ql_log_info, vha, 0x8012,
1183             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1184
1185         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1186                 ql_log(ql_log_fatal, vha, 0x8013,
1187                     "Wait for hba online failed board disabled.\n");
1188                 goto eh_bus_reset_done;
1189         }
1190
1191         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1192                 ret = SUCCESS;
1193
1194         if (ret == FAILED)
1195                 goto eh_bus_reset_done;
1196
1197         /* Flush outstanding commands. */
1198         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1199             QLA_SUCCESS) {
1200                 ql_log(ql_log_warn, vha, 0x8014,
1201                     "Wait for pending commands failed.\n");
1202                 ret = FAILED;
1203         }
1204
1205 eh_bus_reset_done:
1206         ql_log(ql_log_warn, vha, 0x802b,
1207             "BUS RESET %s nexus=%ld:%d:%d.\n",
1208             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1209
1210         return ret;
1211 }
1212
1213 /**************************************************************************
1214 * qla2xxx_eh_host_reset
1215 *
1216 * Description:
1217 *    The reset function will reset the Adapter.
1218 *
1219 * Input:
1220 *      cmd = Linux SCSI command packet of the command that cause the
1221 *            adapter reset.
1222 *
1223 * Returns:
1224 *      Either SUCCESS or FAILED.
1225 *
1226 * Note:
1227 **************************************************************************/
1228 static int
1229 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1230 {
1231         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1232         struct qla_hw_data *ha = vha->hw;
1233         int ret = FAILED;
1234         unsigned int id, lun;
1235         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1236
1237         id = cmd->device->id;
1238         lun = cmd->device->lun;
1239
1240         ql_log(ql_log_info, vha, 0x8018,
1241             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1242
1243         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1244                 goto eh_host_reset_lock;
1245
1246         if (vha != base_vha) {
1247                 if (qla2x00_vp_abort_isp(vha))
1248                         goto eh_host_reset_lock;
1249         } else {
1250                 if (IS_QLA82XX(vha->hw)) {
1251                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1252                                 /* Ctx reset success */
1253                                 ret = SUCCESS;
1254                                 goto eh_host_reset_lock;
1255                         }
1256                         /* fall thru if ctx reset failed */
1257                 }
1258                 if (ha->wq)
1259                         flush_workqueue(ha->wq);
1260
1261                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1262                 if (ha->isp_ops->abort_isp(base_vha)) {
1263                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1264                         /* failed. schedule dpc to try */
1265                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1266
1267                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1268                                 ql_log(ql_log_warn, vha, 0x802a,
1269                                     "wait for hba online failed.\n");
1270                                 goto eh_host_reset_lock;
1271                         }
1272                 }
1273                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1274         }
1275
1276         /* Waiting for command to be returned to OS.*/
1277         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1278                 QLA_SUCCESS)
1279                 ret = SUCCESS;
1280
1281 eh_host_reset_lock:
1282         ql_log(ql_log_info, vha, 0x8017,
1283             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1284             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1285
1286         return ret;
1287 }
1288
1289 /*
1290 * qla2x00_loop_reset
1291 *      Issue loop reset.
1292 *
1293 * Input:
1294 *      ha = adapter block pointer.
1295 *
1296 * Returns:
1297 *      0 = success
1298 */
1299 int
1300 qla2x00_loop_reset(scsi_qla_host_t *vha)
1301 {
1302         int ret;
1303         struct fc_port *fcport;
1304         struct qla_hw_data *ha = vha->hw;
1305
1306         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1307                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1308                         if (fcport->port_type != FCT_TARGET)
1309                                 continue;
1310
1311                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1312                         if (ret != QLA_SUCCESS) {
1313                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1314                                     "Bus Reset failed: Target Reset=%d "
1315                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1316                         }
1317                 }
1318         }
1319
1320         if (IS_QLAFX00(ha))
1321                 return QLA_SUCCESS;
1322
1323         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1324                 atomic_set(&vha->loop_state, LOOP_DOWN);
1325                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1326                 qla2x00_mark_all_devices_lost(vha, 0);
1327                 ret = qla2x00_full_login_lip(vha);
1328                 if (ret != QLA_SUCCESS) {
1329                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1330                             "full_login_lip=%d.\n", ret);
1331                 }
1332         }
1333
1334         if (ha->flags.enable_lip_reset) {
1335                 ret = qla2x00_lip_reset(vha);
1336                 if (ret != QLA_SUCCESS)
1337                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1338                             "lip_reset failed (%d).\n", ret);
1339         }
1340
1341         /* Issue marker command only when we are going to start the I/O */
1342         vha->marker_needed = 1;
1343
1344         return QLA_SUCCESS;
1345 }
1346
1347 void
1348 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1349 {
1350         int que, cnt;
1351         unsigned long flags;
1352         srb_t *sp;
1353         struct qla_hw_data *ha = vha->hw;
1354         struct req_que *req;
1355
1356         spin_lock_irqsave(&ha->hardware_lock, flags);
1357         for (que = 0; que < ha->max_req_queues; que++) {
1358                 req = ha->req_q_map[que];
1359                 if (!req)
1360                         continue;
1361                 if (!req->outstanding_cmds)
1362                         continue;
1363                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1364                         sp = req->outstanding_cmds[cnt];
1365                         if (sp) {
1366                                 req->outstanding_cmds[cnt] = NULL;
1367                                 sp->done(vha, sp, res);
1368                         }
1369                 }
1370         }
1371         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1372 }
1373
1374 static int
1375 qla2xxx_slave_alloc(struct scsi_device *sdev)
1376 {
1377         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1378
1379         if (!rport || fc_remote_port_chkready(rport))
1380                 return -ENXIO;
1381
1382         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1383
1384         return 0;
1385 }
1386
1387 static int
1388 qla2xxx_slave_configure(struct scsi_device *sdev)
1389 {
1390         scsi_qla_host_t *vha = shost_priv(sdev->host);
1391         struct req_que *req = vha->req;
1392
1393         if (IS_T10_PI_CAPABLE(vha->hw))
1394                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1395
1396         if (sdev->tagged_supported)
1397                 scsi_activate_tcq(sdev, req->max_q_depth);
1398         else
1399                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1400         return 0;
1401 }
1402
1403 static void
1404 qla2xxx_slave_destroy(struct scsi_device *sdev)
1405 {
1406         sdev->hostdata = NULL;
1407 }
1408
1409 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1410 {
1411         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1412
1413         if (!scsi_track_queue_full(sdev, qdepth))
1414                 return;
1415
1416         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1417             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1418             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1419 }
1420
1421 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1422 {
1423         fc_port_t *fcport = sdev->hostdata;
1424         struct scsi_qla_host *vha = fcport->vha;
1425         struct req_que *req = NULL;
1426
1427         req = vha->req;
1428         if (!req)
1429                 return;
1430
1431         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1432                 return;
1433
1434         if (sdev->ordered_tags)
1435                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1436         else
1437                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1438
1439         ql_dbg(ql_dbg_io, vha, 0x302a,
1440             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1441             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1442 }
1443
1444 static int
1445 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1446 {
1447         switch (reason) {
1448         case SCSI_QDEPTH_DEFAULT:
1449                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1450                 break;
1451         case SCSI_QDEPTH_QFULL:
1452                 qla2x00_handle_queue_full(sdev, qdepth);
1453                 break;
1454         case SCSI_QDEPTH_RAMP_UP:
1455                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1456                 break;
1457         default:
1458                 return -EOPNOTSUPP;
1459         }
1460
1461         return sdev->queue_depth;
1462 }
1463
1464 static int
1465 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1466 {
1467         if (sdev->tagged_supported) {
1468                 scsi_set_tag_type(sdev, tag_type);
1469                 if (tag_type)
1470                         scsi_activate_tcq(sdev, sdev->queue_depth);
1471                 else
1472                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1473         } else
1474                 tag_type = 0;
1475
1476         return tag_type;
1477 }
1478
1479 static void
1480 qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t *vha)
1481 {
1482         scsi_qla_host_t *vp;
1483         struct Scsi_Host *shost;
1484         struct scsi_device *sdev;
1485         struct qla_hw_data *ha = vha->hw;
1486         unsigned long flags;
1487
1488         ha->host_last_rampdown_time = jiffies;
1489
1490         if (ha->cfg_lun_q_depth <= vha->host->cmd_per_lun)
1491                 return;
1492
1493         if ((ha->cfg_lun_q_depth / 2) < vha->host->cmd_per_lun)
1494                 ha->cfg_lun_q_depth = vha->host->cmd_per_lun;
1495         else
1496                 ha->cfg_lun_q_depth = ha->cfg_lun_q_depth / 2;
1497
1498         /*
1499          * Geometrically ramp down the queue depth for all devices on this
1500          * adapter
1501          */
1502         spin_lock_irqsave(&ha->vport_slock, flags);
1503         list_for_each_entry(vp, &ha->vp_list, list) {
1504                 shost = vp->host;
1505                 shost_for_each_device(sdev, shost) {
1506                         if (sdev->queue_depth > shost->cmd_per_lun) {
1507                                 if (sdev->queue_depth < ha->cfg_lun_q_depth)
1508                                         continue;
1509                                 ql_log(ql_log_warn, vp, 0x3031,
1510                                     "%ld:%d:%d: Ramping down queue depth to %d",
1511                                     vp->host_no, sdev->id, sdev->lun,
1512                                     ha->cfg_lun_q_depth);
1513                                 qla2x00_change_queue_depth(sdev,
1514                                     ha->cfg_lun_q_depth, SCSI_QDEPTH_DEFAULT);
1515                         }
1516                 }
1517         }
1518         spin_unlock_irqrestore(&ha->vport_slock, flags);
1519
1520         return;
1521 }
1522
1523 static void
1524 qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t *vha)
1525 {
1526         scsi_qla_host_t *vp;
1527         struct Scsi_Host *shost;
1528         struct scsi_device *sdev;
1529         struct qla_hw_data *ha = vha->hw;
1530         unsigned long flags;
1531
1532         ha->host_last_rampup_time = jiffies;
1533         ha->cfg_lun_q_depth++;
1534
1535         /*
1536          * Linearly ramp up the queue depth for all devices on this
1537          * adapter
1538          */
1539         spin_lock_irqsave(&ha->vport_slock, flags);
1540         list_for_each_entry(vp, &ha->vp_list, list) {
1541                 shost = vp->host;
1542                 shost_for_each_device(sdev, shost) {
1543                         if (sdev->queue_depth > ha->cfg_lun_q_depth)
1544                                 continue;
1545                         qla2x00_change_queue_depth(sdev, ha->cfg_lun_q_depth,
1546                             SCSI_QDEPTH_RAMP_UP);
1547                 }
1548         }
1549         spin_unlock_irqrestore(&ha->vport_slock, flags);
1550
1551         return;
1552 }
1553
1554 /**
1555  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1556  * @ha: HA context
1557  *
1558  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1559  * supported addressing method.
1560  */
1561 static void
1562 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1563 {
1564         /* Assume a 32bit DMA mask. */
1565         ha->flags.enable_64bit_addressing = 0;
1566
1567         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1568                 /* Any upper-dword bits set? */
1569                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1570                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1571                         /* Ok, a 64bit DMA mask is applicable. */
1572                         ha->flags.enable_64bit_addressing = 1;
1573                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1574                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1575                         return;
1576                 }
1577         }
1578
1579         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1580         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1581 }
1582
1583 static void
1584 qla2x00_enable_intrs(struct qla_hw_data *ha)
1585 {
1586         unsigned long flags = 0;
1587         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1588
1589         spin_lock_irqsave(&ha->hardware_lock, flags);
1590         ha->interrupts_on = 1;
1591         /* enable risc and host interrupts */
1592         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1593         RD_REG_WORD(&reg->ictrl);
1594         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1595
1596 }
1597
1598 static void
1599 qla2x00_disable_intrs(struct qla_hw_data *ha)
1600 {
1601         unsigned long flags = 0;
1602         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1603
1604         spin_lock_irqsave(&ha->hardware_lock, flags);
1605         ha->interrupts_on = 0;
1606         /* disable risc and host interrupts */
1607         WRT_REG_WORD(&reg->ictrl, 0);
1608         RD_REG_WORD(&reg->ictrl);
1609         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1610 }
1611
1612 static void
1613 qla24xx_enable_intrs(struct qla_hw_data *ha)
1614 {
1615         unsigned long flags = 0;
1616         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1617
1618         spin_lock_irqsave(&ha->hardware_lock, flags);
1619         ha->interrupts_on = 1;
1620         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1621         RD_REG_DWORD(&reg->ictrl);
1622         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1623 }
1624
1625 static void
1626 qla24xx_disable_intrs(struct qla_hw_data *ha)
1627 {
1628         unsigned long flags = 0;
1629         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1630
1631         if (IS_NOPOLLING_TYPE(ha))
1632                 return;
1633         spin_lock_irqsave(&ha->hardware_lock, flags);
1634         ha->interrupts_on = 0;
1635         WRT_REG_DWORD(&reg->ictrl, 0);
1636         RD_REG_DWORD(&reg->ictrl);
1637         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1638 }
1639
1640 static int
1641 qla2x00_iospace_config(struct qla_hw_data *ha)
1642 {
1643         resource_size_t pio;
1644         uint16_t msix;
1645         int cpus;
1646
1647         if (pci_request_selected_regions(ha->pdev, ha->bars,
1648             QLA2XXX_DRIVER_NAME)) {
1649                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1650                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1651                     pci_name(ha->pdev));
1652                 goto iospace_error_exit;
1653         }
1654         if (!(ha->bars & 1))
1655                 goto skip_pio;
1656
1657         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1658         pio = pci_resource_start(ha->pdev, 0);
1659         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1660                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1661                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1662                             "Invalid pci I/O region size (%s).\n",
1663                             pci_name(ha->pdev));
1664                         pio = 0;
1665                 }
1666         } else {
1667                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1668                     "Region #0 no a PIO resource (%s).\n",
1669                     pci_name(ha->pdev));
1670                 pio = 0;
1671         }
1672         ha->pio_address = pio;
1673         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1674             "PIO address=%llu.\n",
1675             (unsigned long long)ha->pio_address);
1676
1677 skip_pio:
1678         /* Use MMIO operations for all accesses. */
1679         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1680                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1681                     "Region #1 not an MMIO resource (%s), aborting.\n",
1682                     pci_name(ha->pdev));
1683                 goto iospace_error_exit;
1684         }
1685         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1686                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1687                     "Invalid PCI mem region size (%s), aborting.\n",
1688                     pci_name(ha->pdev));
1689                 goto iospace_error_exit;
1690         }
1691
1692         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1693         if (!ha->iobase) {
1694                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1695                     "Cannot remap MMIO (%s), aborting.\n",
1696                     pci_name(ha->pdev));
1697                 goto iospace_error_exit;
1698         }
1699
1700         /* Determine queue resources */
1701         ha->max_req_queues = ha->max_rsp_queues = 1;
1702         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1703                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1704                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1705                 goto mqiobase_exit;
1706
1707         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1708                         pci_resource_len(ha->pdev, 3));
1709         if (ha->mqiobase) {
1710                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1711                     "MQIO Base=%p.\n", ha->mqiobase);
1712                 /* Read MSIX vector size of the board */
1713                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1714                 ha->msix_count = msix;
1715                 /* Max queues are bounded by available msix vectors */
1716                 /* queue 0 uses two msix vectors */
1717                 if (ql2xmultique_tag) {
1718                         cpus = num_online_cpus();
1719                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1720                                 (cpus + 1) : (ha->msix_count - 1);
1721                         ha->max_req_queues = 2;
1722                 } else if (ql2xmaxqueues > 1) {
1723                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1724                             QLA_MQ_SIZE : ql2xmaxqueues;
1725                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1726                             "QoS mode set, max no of request queues:%d.\n",
1727                             ha->max_req_queues);
1728                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1729                             "QoS mode set, max no of request queues:%d.\n",
1730                             ha->max_req_queues);
1731                 }
1732                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1733                     "MSI-X vector count: %d.\n", msix);
1734         } else
1735                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1736                     "BAR 3 not enabled.\n");
1737
1738 mqiobase_exit:
1739         ha->msix_count = ha->max_rsp_queues + 1;
1740         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1741             "MSIX Count:%d.\n", ha->msix_count);
1742         return (0);
1743
1744 iospace_error_exit:
1745         return (-ENOMEM);
1746 }
1747
1748
1749 static int
1750 qla83xx_iospace_config(struct qla_hw_data *ha)
1751 {
1752         uint16_t msix;
1753         int cpus;
1754
1755         if (pci_request_selected_regions(ha->pdev, ha->bars,
1756             QLA2XXX_DRIVER_NAME)) {
1757                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1758                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1759                     pci_name(ha->pdev));
1760
1761                 goto iospace_error_exit;
1762         }
1763
1764         /* Use MMIO operations for all accesses. */
1765         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1766                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1767                     "Invalid pci I/O region size (%s).\n",
1768                     pci_name(ha->pdev));
1769                 goto iospace_error_exit;
1770         }
1771         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1772                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1773                     "Invalid PCI mem region size (%s), aborting\n",
1774                         pci_name(ha->pdev));
1775                 goto iospace_error_exit;
1776         }
1777
1778         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1779         if (!ha->iobase) {
1780                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1781                     "Cannot remap MMIO (%s), aborting.\n",
1782                     pci_name(ha->pdev));
1783                 goto iospace_error_exit;
1784         }
1785
1786         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1787         /* 83XX 26XX always use MQ type access for queues
1788          * - mbar 2, a.k.a region 4 */
1789         ha->max_req_queues = ha->max_rsp_queues = 1;
1790         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1791                         pci_resource_len(ha->pdev, 4));
1792
1793         if (!ha->mqiobase) {
1794                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1795                     "BAR2/region4 not enabled\n");
1796                 goto mqiobase_exit;
1797         }
1798
1799         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1800                         pci_resource_len(ha->pdev, 2));
1801         if (ha->msixbase) {
1802                 /* Read MSIX vector size of the board */
1803                 pci_read_config_word(ha->pdev,
1804                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1805                 ha->msix_count = msix;
1806                 /* Max queues are bounded by available msix vectors */
1807                 /* queue 0 uses two msix vectors */
1808                 if (ql2xmultique_tag) {
1809                         cpus = num_online_cpus();
1810                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1811                                 (cpus + 1) : (ha->msix_count - 1);
1812                         ha->max_req_queues = 2;
1813                 } else if (ql2xmaxqueues > 1) {
1814                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1815                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1816                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1817                             "QoS mode set, max no of request queues:%d.\n",
1818                             ha->max_req_queues);
1819                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1820                             "QoS mode set, max no of request queues:%d.\n",
1821                             ha->max_req_queues);
1822                 }
1823                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1824                     "MSI-X vector count: %d.\n", msix);
1825         } else
1826                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1827                     "BAR 1 not enabled.\n");
1828
1829 mqiobase_exit:
1830         ha->msix_count = ha->max_rsp_queues + 1;
1831
1832         qlt_83xx_iospace_config(ha);
1833
1834         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1835             "MSIX Count:%d.\n", ha->msix_count);
1836         return 0;
1837
1838 iospace_error_exit:
1839         return -ENOMEM;
1840 }
1841
1842 static struct isp_operations qla2100_isp_ops = {
1843         .pci_config             = qla2100_pci_config,
1844         .reset_chip             = qla2x00_reset_chip,
1845         .chip_diag              = qla2x00_chip_diag,
1846         .config_rings           = qla2x00_config_rings,
1847         .reset_adapter          = qla2x00_reset_adapter,
1848         .nvram_config           = qla2x00_nvram_config,
1849         .update_fw_options      = qla2x00_update_fw_options,
1850         .load_risc              = qla2x00_load_risc,
1851         .pci_info_str           = qla2x00_pci_info_str,
1852         .fw_version_str         = qla2x00_fw_version_str,
1853         .intr_handler           = qla2100_intr_handler,
1854         .enable_intrs           = qla2x00_enable_intrs,
1855         .disable_intrs          = qla2x00_disable_intrs,
1856         .abort_command          = qla2x00_abort_command,
1857         .target_reset           = qla2x00_abort_target,
1858         .lun_reset              = qla2x00_lun_reset,
1859         .fabric_login           = qla2x00_login_fabric,
1860         .fabric_logout          = qla2x00_fabric_logout,
1861         .calc_req_entries       = qla2x00_calc_iocbs_32,
1862         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1863         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1864         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1865         .read_nvram             = qla2x00_read_nvram_data,
1866         .write_nvram            = qla2x00_write_nvram_data,
1867         .fw_dump                = qla2100_fw_dump,
1868         .beacon_on              = NULL,
1869         .beacon_off             = NULL,
1870         .beacon_blink           = NULL,
1871         .read_optrom            = qla2x00_read_optrom_data,
1872         .write_optrom           = qla2x00_write_optrom_data,
1873         .get_flash_version      = qla2x00_get_flash_version,
1874         .start_scsi             = qla2x00_start_scsi,
1875         .abort_isp              = qla2x00_abort_isp,
1876         .iospace_config         = qla2x00_iospace_config,
1877         .initialize_adapter     = qla2x00_initialize_adapter,
1878 };
1879
1880 static struct isp_operations qla2300_isp_ops = {
1881         .pci_config             = qla2300_pci_config,
1882         .reset_chip             = qla2x00_reset_chip,
1883         .chip_diag              = qla2x00_chip_diag,
1884         .config_rings           = qla2x00_config_rings,
1885         .reset_adapter          = qla2x00_reset_adapter,
1886         .nvram_config           = qla2x00_nvram_config,
1887         .update_fw_options      = qla2x00_update_fw_options,
1888         .load_risc              = qla2x00_load_risc,
1889         .pci_info_str           = qla2x00_pci_info_str,
1890         .fw_version_str         = qla2x00_fw_version_str,
1891         .intr_handler           = qla2300_intr_handler,
1892         .enable_intrs           = qla2x00_enable_intrs,
1893         .disable_intrs          = qla2x00_disable_intrs,
1894         .abort_command          = qla2x00_abort_command,
1895         .target_reset           = qla2x00_abort_target,
1896         .lun_reset              = qla2x00_lun_reset,
1897         .fabric_login           = qla2x00_login_fabric,
1898         .fabric_logout          = qla2x00_fabric_logout,
1899         .calc_req_entries       = qla2x00_calc_iocbs_32,
1900         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1901         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1902         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1903         .read_nvram             = qla2x00_read_nvram_data,
1904         .write_nvram            = qla2x00_write_nvram_data,
1905         .fw_dump                = qla2300_fw_dump,
1906         .beacon_on              = qla2x00_beacon_on,
1907         .beacon_off             = qla2x00_beacon_off,
1908         .beacon_blink           = qla2x00_beacon_blink,
1909         .read_optrom            = qla2x00_read_optrom_data,
1910         .write_optrom           = qla2x00_write_optrom_data,
1911         .get_flash_version      = qla2x00_get_flash_version,
1912         .start_scsi             = qla2x00_start_scsi,
1913         .abort_isp              = qla2x00_abort_isp,
1914         .iospace_config         = qla2x00_iospace_config,
1915         .initialize_adapter     = qla2x00_initialize_adapter,
1916 };
1917
1918 static struct isp_operations qla24xx_isp_ops = {
1919         .pci_config             = qla24xx_pci_config,
1920         .reset_chip             = qla24xx_reset_chip,
1921         .chip_diag              = qla24xx_chip_diag,
1922         .config_rings           = qla24xx_config_rings,
1923         .reset_adapter          = qla24xx_reset_adapter,
1924         .nvram_config           = qla24xx_nvram_config,
1925         .update_fw_options      = qla24xx_update_fw_options,
1926         .load_risc              = qla24xx_load_risc,
1927         .pci_info_str           = qla24xx_pci_info_str,
1928         .fw_version_str         = qla24xx_fw_version_str,
1929         .intr_handler           = qla24xx_intr_handler,
1930         .enable_intrs           = qla24xx_enable_intrs,
1931         .disable_intrs          = qla24xx_disable_intrs,
1932         .abort_command          = qla24xx_abort_command,
1933         .target_reset           = qla24xx_abort_target,
1934         .lun_reset              = qla24xx_lun_reset,
1935         .fabric_login           = qla24xx_login_fabric,
1936         .fabric_logout          = qla24xx_fabric_logout,
1937         .calc_req_entries       = NULL,
1938         .build_iocbs            = NULL,
1939         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1940         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1941         .read_nvram             = qla24xx_read_nvram_data,
1942         .write_nvram            = qla24xx_write_nvram_data,
1943         .fw_dump                = qla24xx_fw_dump,
1944         .beacon_on              = qla24xx_beacon_on,
1945         .beacon_off             = qla24xx_beacon_off,
1946         .beacon_blink           = qla24xx_beacon_blink,
1947         .read_optrom            = qla24xx_read_optrom_data,
1948         .write_optrom           = qla24xx_write_optrom_data,
1949         .get_flash_version      = qla24xx_get_flash_version,
1950         .start_scsi             = qla24xx_start_scsi,
1951         .abort_isp              = qla2x00_abort_isp,
1952         .iospace_config         = qla2x00_iospace_config,
1953         .initialize_adapter     = qla2x00_initialize_adapter,
1954 };
1955
1956 static struct isp_operations qla25xx_isp_ops = {
1957         .pci_config             = qla25xx_pci_config,
1958         .reset_chip             = qla24xx_reset_chip,
1959         .chip_diag              = qla24xx_chip_diag,
1960         .config_rings           = qla24xx_config_rings,
1961         .reset_adapter          = qla24xx_reset_adapter,
1962         .nvram_config           = qla24xx_nvram_config,
1963         .update_fw_options      = qla24xx_update_fw_options,
1964         .load_risc              = qla24xx_load_risc,
1965         .pci_info_str           = qla24xx_pci_info_str,
1966         .fw_version_str         = qla24xx_fw_version_str,
1967         .intr_handler           = qla24xx_intr_handler,
1968         .enable_intrs           = qla24xx_enable_intrs,
1969         .disable_intrs          = qla24xx_disable_intrs,
1970         .abort_command          = qla24xx_abort_command,
1971         .target_reset           = qla24xx_abort_target,
1972         .lun_reset              = qla24xx_lun_reset,
1973         .fabric_login           = qla24xx_login_fabric,
1974         .fabric_logout          = qla24xx_fabric_logout,
1975         .calc_req_entries       = NULL,
1976         .build_iocbs            = NULL,
1977         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1978         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1979         .read_nvram             = qla25xx_read_nvram_data,
1980         .write_nvram            = qla25xx_write_nvram_data,
1981         .fw_dump                = qla25xx_fw_dump,
1982         .beacon_on              = qla24xx_beacon_on,
1983         .beacon_off             = qla24xx_beacon_off,
1984         .beacon_blink           = qla24xx_beacon_blink,
1985         .read_optrom            = qla25xx_read_optrom_data,
1986         .write_optrom           = qla24xx_write_optrom_data,
1987         .get_flash_version      = qla24xx_get_flash_version,
1988         .start_scsi             = qla24xx_dif_start_scsi,
1989         .abort_isp              = qla2x00_abort_isp,
1990         .iospace_config         = qla2x00_iospace_config,
1991         .initialize_adapter     = qla2x00_initialize_adapter,
1992 };
1993
1994 static struct isp_operations qla81xx_isp_ops = {
1995         .pci_config             = qla25xx_pci_config,
1996         .reset_chip             = qla24xx_reset_chip,
1997         .chip_diag              = qla24xx_chip_diag,
1998         .config_rings           = qla24xx_config_rings,
1999         .reset_adapter          = qla24xx_reset_adapter,
2000         .nvram_config           = qla81xx_nvram_config,
2001         .update_fw_options      = qla81xx_update_fw_options,
2002         .load_risc              = qla81xx_load_risc,
2003         .pci_info_str           = qla24xx_pci_info_str,
2004         .fw_version_str         = qla24xx_fw_version_str,
2005         .intr_handler           = qla24xx_intr_handler,
2006         .enable_intrs           = qla24xx_enable_intrs,
2007         .disable_intrs          = qla24xx_disable_intrs,
2008         .abort_command          = qla24xx_abort_command,
2009         .target_reset           = qla24xx_abort_target,
2010         .lun_reset              = qla24xx_lun_reset,
2011         .fabric_login           = qla24xx_login_fabric,
2012         .fabric_logout          = qla24xx_fabric_logout,
2013         .calc_req_entries       = NULL,
2014         .build_iocbs            = NULL,
2015         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2016         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2017         .read_nvram             = NULL,
2018         .write_nvram            = NULL,
2019         .fw_dump                = qla81xx_fw_dump,
2020         .beacon_on              = qla24xx_beacon_on,
2021         .beacon_off             = qla24xx_beacon_off,
2022         .beacon_blink           = qla83xx_beacon_blink,
2023         .read_optrom            = qla25xx_read_optrom_data,
2024         .write_optrom           = qla24xx_write_optrom_data,
2025         .get_flash_version      = qla24xx_get_flash_version,
2026         .start_scsi             = qla24xx_dif_start_scsi,
2027         .abort_isp              = qla2x00_abort_isp,
2028         .iospace_config         = qla2x00_iospace_config,
2029         .initialize_adapter     = qla2x00_initialize_adapter,
2030 };
2031
2032 static struct isp_operations qla82xx_isp_ops = {
2033         .pci_config             = qla82xx_pci_config,
2034         .reset_chip             = qla82xx_reset_chip,
2035         .chip_diag              = qla24xx_chip_diag,
2036         .config_rings           = qla82xx_config_rings,
2037         .reset_adapter          = qla24xx_reset_adapter,
2038         .nvram_config           = qla81xx_nvram_config,
2039         .update_fw_options      = qla24xx_update_fw_options,
2040         .load_risc              = qla82xx_load_risc,
2041         .pci_info_str           = qla24xx_pci_info_str,
2042         .fw_version_str         = qla24xx_fw_version_str,
2043         .intr_handler           = qla82xx_intr_handler,
2044         .enable_intrs           = qla82xx_enable_intrs,
2045         .disable_intrs          = qla82xx_disable_intrs,
2046         .abort_command          = qla24xx_abort_command,
2047         .target_reset           = qla24xx_abort_target,
2048         .lun_reset              = qla24xx_lun_reset,
2049         .fabric_login           = qla24xx_login_fabric,
2050         .fabric_logout          = qla24xx_fabric_logout,
2051         .calc_req_entries       = NULL,
2052         .build_iocbs            = NULL,
2053         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2054         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2055         .read_nvram             = qla24xx_read_nvram_data,
2056         .write_nvram            = qla24xx_write_nvram_data,
2057         .fw_dump                = qla24xx_fw_dump,
2058         .beacon_on              = qla82xx_beacon_on,
2059         .beacon_off             = qla82xx_beacon_off,
2060         .beacon_blink           = NULL,
2061         .read_optrom            = qla82xx_read_optrom_data,
2062         .write_optrom           = qla82xx_write_optrom_data,
2063         .get_flash_version      = qla24xx_get_flash_version,
2064         .start_scsi             = qla82xx_start_scsi,
2065         .abort_isp              = qla82xx_abort_isp,
2066         .iospace_config         = qla82xx_iospace_config,
2067         .initialize_adapter     = qla2x00_initialize_adapter,
2068 };
2069
2070 static struct isp_operations qla83xx_isp_ops = {
2071         .pci_config             = qla25xx_pci_config,
2072         .reset_chip             = qla24xx_reset_chip,
2073         .chip_diag              = qla24xx_chip_diag,
2074         .config_rings           = qla24xx_config_rings,
2075         .reset_adapter          = qla24xx_reset_adapter,
2076         .nvram_config           = qla81xx_nvram_config,
2077         .update_fw_options      = qla81xx_update_fw_options,
2078         .load_risc              = qla81xx_load_risc,
2079         .pci_info_str           = qla24xx_pci_info_str,
2080         .fw_version_str         = qla24xx_fw_version_str,
2081         .intr_handler           = qla24xx_intr_handler,
2082         .enable_intrs           = qla24xx_enable_intrs,
2083         .disable_intrs          = qla24xx_disable_intrs,
2084         .abort_command          = qla24xx_abort_command,
2085         .target_reset           = qla24xx_abort_target,
2086         .lun_reset              = qla24xx_lun_reset,
2087         .fabric_login           = qla24xx_login_fabric,
2088         .fabric_logout          = qla24xx_fabric_logout,
2089         .calc_req_entries       = NULL,
2090         .build_iocbs            = NULL,
2091         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2092         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2093         .read_nvram             = NULL,
2094         .write_nvram            = NULL,
2095         .fw_dump                = qla83xx_fw_dump,
2096         .beacon_on              = qla24xx_beacon_on,
2097         .beacon_off             = qla24xx_beacon_off,
2098         .beacon_blink           = qla83xx_beacon_blink,
2099         .read_optrom            = qla25xx_read_optrom_data,
2100         .write_optrom           = qla24xx_write_optrom_data,
2101         .get_flash_version      = qla24xx_get_flash_version,
2102         .start_scsi             = qla24xx_dif_start_scsi,
2103         .abort_isp              = qla2x00_abort_isp,
2104         .iospace_config         = qla83xx_iospace_config,
2105         .initialize_adapter     = qla2x00_initialize_adapter,
2106 };
2107
2108 static struct isp_operations qlafx00_isp_ops = {
2109         .pci_config             = qlafx00_pci_config,
2110         .reset_chip             = qlafx00_soft_reset,
2111         .chip_diag              = qlafx00_chip_diag,
2112         .config_rings           = qlafx00_config_rings,
2113         .reset_adapter          = qlafx00_soft_reset,
2114         .nvram_config           = NULL,
2115         .update_fw_options      = NULL,
2116         .load_risc              = NULL,
2117         .pci_info_str           = qlafx00_pci_info_str,
2118         .fw_version_str         = qlafx00_fw_version_str,
2119         .intr_handler           = qlafx00_intr_handler,
2120         .enable_intrs           = qlafx00_enable_intrs,
2121         .disable_intrs          = qlafx00_disable_intrs,
2122         .abort_command          = qlafx00_abort_command,
2123         .target_reset           = qlafx00_abort_target,
2124         .lun_reset              = qlafx00_lun_reset,
2125         .fabric_login           = NULL,
2126         .fabric_logout          = NULL,
2127         .calc_req_entries       = NULL,
2128         .build_iocbs            = NULL,
2129         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2130         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2131         .read_nvram             = qla24xx_read_nvram_data,
2132         .write_nvram            = qla24xx_write_nvram_data,
2133         .fw_dump                = NULL,
2134         .beacon_on              = qla24xx_beacon_on,
2135         .beacon_off             = qla24xx_beacon_off,
2136         .beacon_blink           = NULL,
2137         .read_optrom            = qla24xx_read_optrom_data,
2138         .write_optrom           = qla24xx_write_optrom_data,
2139         .get_flash_version      = qla24xx_get_flash_version,
2140         .start_scsi             = qlafx00_start_scsi,
2141         .abort_isp              = qlafx00_abort_isp,
2142         .iospace_config         = qlafx00_iospace_config,
2143         .initialize_adapter     = qlafx00_initialize_adapter,
2144 };
2145
2146 static inline void
2147 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2148 {
2149         ha->device_type = DT_EXTENDED_IDS;
2150         switch (ha->pdev->device) {
2151         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2152                 ha->device_type |= DT_ISP2100;
2153                 ha->device_type &= ~DT_EXTENDED_IDS;
2154                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2155                 break;
2156         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2157                 ha->device_type |= DT_ISP2200;
2158                 ha->device_type &= ~DT_EXTENDED_IDS;
2159                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2160                 break;
2161         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2162                 ha->device_type |= DT_ISP2300;
2163                 ha->device_type |= DT_ZIO_SUPPORTED;
2164                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2165                 break;
2166         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2167                 ha->device_type |= DT_ISP2312;
2168                 ha->device_type |= DT_ZIO_SUPPORTED;
2169                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2170                 break;
2171         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2172                 ha->device_type |= DT_ISP2322;
2173                 ha->device_type |= DT_ZIO_SUPPORTED;
2174                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2175                     ha->pdev->subsystem_device == 0x0170)
2176                         ha->device_type |= DT_OEM_001;
2177                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2178                 break;
2179         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2180                 ha->device_type |= DT_ISP6312;
2181                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2182                 break;
2183         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2184                 ha->device_type |= DT_ISP6322;
2185                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2186                 break;
2187         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2188                 ha->device_type |= DT_ISP2422;
2189                 ha->device_type |= DT_ZIO_SUPPORTED;
2190                 ha->device_type |= DT_FWI2;
2191                 ha->device_type |= DT_IIDMA;
2192                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2193                 break;
2194         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2195                 ha->device_type |= DT_ISP2432;
2196                 ha->device_type |= DT_ZIO_SUPPORTED;
2197                 ha->device_type |= DT_FWI2;
2198                 ha->device_type |= DT_IIDMA;
2199                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2200                 break;
2201         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2202                 ha->device_type |= DT_ISP8432;
2203                 ha->device_type |= DT_ZIO_SUPPORTED;
2204                 ha->device_type |= DT_FWI2;
2205                 ha->device_type |= DT_IIDMA;
2206                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2207                 break;
2208         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2209                 ha->device_type |= DT_ISP5422;
2210                 ha->device_type |= DT_FWI2;
2211                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2212                 break;
2213         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2214                 ha->device_type |= DT_ISP5432;
2215                 ha->device_type |= DT_FWI2;
2216                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2217                 break;
2218         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2219                 ha->device_type |= DT_ISP2532;
2220                 ha->device_type |= DT_ZIO_SUPPORTED;
2221                 ha->device_type |= DT_FWI2;
2222                 ha->device_type |= DT_IIDMA;
2223                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2224                 break;
2225         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2226                 ha->device_type |= DT_ISP8001;
2227                 ha->device_type |= DT_ZIO_SUPPORTED;
2228                 ha->device_type |= DT_FWI2;
2229                 ha->device_type |= DT_IIDMA;
2230                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2231                 break;
2232         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2233                 ha->device_type |= DT_ISP8021;
2234                 ha->device_type |= DT_ZIO_SUPPORTED;
2235                 ha->device_type |= DT_FWI2;
2236                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2237                 /* Initialize 82XX ISP flags */
2238                 qla82xx_init_flags(ha);
2239                 break;
2240         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2241                 ha->device_type |= DT_ISP2031;
2242                 ha->device_type |= DT_ZIO_SUPPORTED;
2243                 ha->device_type |= DT_FWI2;
2244                 ha->device_type |= DT_IIDMA;
2245                 ha->device_type |= DT_T10_PI;
2246                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2247                 break;
2248         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2249                 ha->device_type |= DT_ISP8031;
2250                 ha->device_type |= DT_ZIO_SUPPORTED;
2251                 ha->device_type |= DT_FWI2;
2252                 ha->device_type |= DT_IIDMA;
2253                 ha->device_type |= DT_T10_PI;
2254                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2255                 break;
2256         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2257                 ha->device_type |= DT_ISPFX00;
2258                 break;
2259         }
2260
2261         if (IS_QLA82XX(ha))
2262                 ha->port_no = !(ha->portnum & 1);
2263         else
2264                 /* Get adapter physical port no from interrupt pin register. */
2265                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2266
2267         if (ha->port_no & 1)
2268                 ha->flags.port0 = 1;
2269         else
2270                 ha->flags.port0 = 0;
2271         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2272             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2273             ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2274 }
2275
2276 static void
2277 qla2xxx_scan_start(struct Scsi_Host *shost)
2278 {
2279         scsi_qla_host_t *vha = shost_priv(shost);
2280
2281         if (vha->hw->flags.running_gold_fw)
2282                 return;
2283
2284         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2285         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2286         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2287         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2288 }
2289
2290 static int
2291 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2292 {
2293         scsi_qla_host_t *vha = shost_priv(shost);
2294
2295         if (!vha->host)
2296                 return 1;
2297         if (time > vha->hw->loop_reset_delay * HZ)
2298                 return 1;
2299
2300         return atomic_read(&vha->loop_state) == LOOP_READY;
2301 }
2302
2303 /*
2304  * PCI driver interface
2305  */
2306 static int
2307 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2308 {
2309         int     ret = -ENODEV;
2310         struct Scsi_Host *host;
2311         scsi_qla_host_t *base_vha = NULL;
2312         struct qla_hw_data *ha;
2313         char pci_info[30];
2314         char fw_str[30], wq_name[30];
2315         struct scsi_host_template *sht;
2316         int bars, mem_only = 0;
2317         uint16_t req_length = 0, rsp_length = 0;
2318         struct req_que *req = NULL;
2319         struct rsp_que *rsp = NULL;
2320
2321         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2322         sht = &qla2xxx_driver_template;
2323         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2324             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2325             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2326             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2327             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2328             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2329             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2330             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2331             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2332             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2333             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001) {
2334                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2335                 mem_only = 1;
2336                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2337                     "Mem only adapter.\n");
2338         }
2339         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2340             "Bars=%d.\n", bars);
2341
2342         if (mem_only) {
2343                 if (pci_enable_device_mem(pdev))
2344                         goto probe_out;
2345         } else {
2346                 if (pci_enable_device(pdev))
2347                         goto probe_out;
2348         }
2349
2350         /* This may fail but that's ok */
2351         pci_enable_pcie_error_reporting(pdev);
2352
2353         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2354         if (!ha) {
2355                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2356                     "Unable to allocate memory for ha.\n");
2357                 goto probe_out;
2358         }
2359         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2360             "Memory allocated for ha=%p.\n", ha);
2361         ha->pdev = pdev;
2362         ha->tgt.enable_class_2 = ql2xenableclass2;
2363
2364         /* Clear our data area */
2365         ha->bars = bars;
2366         ha->mem_only = mem_only;
2367         spin_lock_init(&ha->hardware_lock);
2368         spin_lock_init(&ha->vport_slock);
2369         mutex_init(&ha->selflogin_lock);
2370
2371         /* Set ISP-type information. */
2372         qla2x00_set_isp_flags(ha);
2373
2374         /* Set EEH reset type to fundamental if required by hba */
2375         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2376             IS_QLA83XX(ha))
2377                 pdev->needs_freset = 1;
2378
2379         ha->prev_topology = 0;
2380         ha->init_cb_size = sizeof(init_cb_t);
2381         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2382         ha->optrom_size = OPTROM_SIZE_2300;
2383         ha->cfg_lun_q_depth = ql2xmaxqdepth;
2384
2385         /* Assign ISP specific operations. */
2386         if (IS_QLA2100(ha)) {
2387                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2388                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2389                 req_length = REQUEST_ENTRY_CNT_2100;
2390                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2391                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2392                 ha->gid_list_info_size = 4;
2393                 ha->flash_conf_off = ~0;
2394                 ha->flash_data_off = ~0;
2395                 ha->nvram_conf_off = ~0;
2396                 ha->nvram_data_off = ~0;
2397                 ha->isp_ops = &qla2100_isp_ops;
2398         } else if (IS_QLA2200(ha)) {
2399                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2400                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2401                 req_length = REQUEST_ENTRY_CNT_2200;
2402                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2403                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2404                 ha->gid_list_info_size = 4;
2405                 ha->flash_conf_off = ~0;
2406                 ha->flash_data_off = ~0;
2407                 ha->nvram_conf_off = ~0;
2408                 ha->nvram_data_off = ~0;
2409                 ha->isp_ops = &qla2100_isp_ops;
2410         } else if (IS_QLA23XX(ha)) {
2411                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2412                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2413                 req_length = REQUEST_ENTRY_CNT_2200;
2414                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2415                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2416                 ha->gid_list_info_size = 6;
2417                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2418                         ha->optrom_size = OPTROM_SIZE_2322;
2419                 ha->flash_conf_off = ~0;
2420                 ha->flash_data_off = ~0;
2421                 ha->nvram_conf_off = ~0;
2422                 ha->nvram_data_off = ~0;
2423                 ha->isp_ops = &qla2300_isp_ops;
2424         } else if (IS_QLA24XX_TYPE(ha)) {
2425                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2426                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2427                 req_length = REQUEST_ENTRY_CNT_24XX;
2428                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2429                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2430                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2431                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2432                 ha->gid_list_info_size = 8;
2433                 ha->optrom_size = OPTROM_SIZE_24XX;
2434                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2435                 ha->isp_ops = &qla24xx_isp_ops;
2436                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2437                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2438                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2439                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2440         } else if (IS_QLA25XX(ha)) {
2441                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2442                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2443                 req_length = REQUEST_ENTRY_CNT_24XX;
2444                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2445                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2446                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2447                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2448                 ha->gid_list_info_size = 8;
2449                 ha->optrom_size = OPTROM_SIZE_25XX;
2450                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2451                 ha->isp_ops = &qla25xx_isp_ops;
2452                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2453                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2454                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2455                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2456         } else if (IS_QLA81XX(ha)) {
2457                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2458                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2459                 req_length = REQUEST_ENTRY_CNT_24XX;
2460                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2461                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2462                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2463                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2464                 ha->gid_list_info_size = 8;
2465                 ha->optrom_size = OPTROM_SIZE_81XX;
2466                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2467                 ha->isp_ops = &qla81xx_isp_ops;
2468                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2469                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2470                 ha->nvram_conf_off = ~0;
2471                 ha->nvram_data_off = ~0;
2472         } else if (IS_QLA82XX(ha)) {
2473                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2474                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2475                 req_length = REQUEST_ENTRY_CNT_82XX;
2476                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2477                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2478                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2479                 ha->gid_list_info_size = 8;
2480                 ha->optrom_size = OPTROM_SIZE_82XX;
2481                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2482                 ha->isp_ops = &qla82xx_isp_ops;
2483                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2484                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2485                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2486                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2487         } else if (IS_QLA83XX(ha)) {
2488                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2489                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2490                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2491                 req_length = REQUEST_ENTRY_CNT_24XX;
2492                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2493                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2494                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2495                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2496                 ha->gid_list_info_size = 8;
2497                 ha->optrom_size = OPTROM_SIZE_83XX;
2498                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2499                 ha->isp_ops = &qla83xx_isp_ops;
2500                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2501                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2502                 ha->nvram_conf_off = ~0;
2503                 ha->nvram_data_off = ~0;
2504         }  else if (IS_QLAFX00(ha)) {
2505                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2506                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2507                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2508                 req_length = REQUEST_ENTRY_CNT_FX00;
2509                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2510                 ha->init_cb_size = sizeof(struct init_cb_fx);
2511                 ha->isp_ops = &qlafx00_isp_ops;
2512                 ha->port_down_retry_count = 30; /* default value */
2513                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2514                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2515                 ha->mr.fw_hbt_en = 1;
2516         }
2517
2518         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2519             "mbx_count=%d, req_length=%d, "
2520             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2521             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2522             "max_fibre_devices=%d.\n",
2523             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2524             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2525             ha->nvram_npiv_size, ha->max_fibre_devices);
2526         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2527             "isp_ops=%p, flash_conf_off=%d, "
2528             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2529             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2530             ha->nvram_conf_off, ha->nvram_data_off);
2531
2532         /* Configure PCI I/O space */
2533         ret = ha->isp_ops->iospace_config(ha);
2534         if (ret)
2535                 goto iospace_config_failed;
2536
2537         ql_log_pci(ql_log_info, pdev, 0x001d,
2538             "Found an ISP%04X irq %d iobase 0x%p.\n",
2539             pdev->device, pdev->irq, ha->iobase);
2540         mutex_init(&ha->vport_lock);
2541         init_completion(&ha->mbx_cmd_comp);
2542         complete(&ha->mbx_cmd_comp);
2543         init_completion(&ha->mbx_intr_comp);
2544         init_completion(&ha->dcbx_comp);
2545         init_completion(&ha->lb_portup_comp);
2546
2547         set_bit(0, (unsigned long *) ha->vp_idx_map);
2548
2549         qla2x00_config_dma_addressing(ha);
2550         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2551             "64 Bit addressing is %s.\n",
2552             ha->flags.enable_64bit_addressing ? "enable" :
2553             "disable");
2554         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2555         if (!ret) {
2556                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2557                     "Failed to allocate memory for adapter, aborting.\n");
2558
2559                 goto probe_hw_failed;
2560         }
2561
2562         req->max_q_depth = MAX_Q_DEPTH;
2563         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2564                 req->max_q_depth = ql2xmaxqdepth;
2565
2566
2567         base_vha = qla2x00_create_host(sht, ha);
2568         if (!base_vha) {
2569                 ret = -ENOMEM;
2570                 qla2x00_mem_free(ha);
2571                 qla2x00_free_req_que(ha, req);
2572                 qla2x00_free_rsp_que(ha, rsp);
2573                 goto probe_hw_failed;
2574         }
2575
2576         pci_set_drvdata(pdev, base_vha);
2577
2578         host = base_vha->host;
2579         base_vha->req = req;
2580         if (IS_QLAFX00(ha))
2581                 host->can_queue = 1024;
2582         else
2583                 host->can_queue = req->length + 128;
2584         if (IS_QLA2XXX_MIDTYPE(ha))
2585                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2586         else
2587                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2588                                                 base_vha->vp_idx;
2589
2590         /* Setup fcport template structure. */
2591         ha->mr.fcport.vha = base_vha;
2592         ha->mr.fcport.port_type = FCT_UNKNOWN;
2593         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2594         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2595         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2596         ha->mr.fcport.scan_state = 1;
2597
2598         /* Set the SG table size based on ISP type */
2599         if (!IS_FWI2_CAPABLE(ha)) {
2600                 if (IS_QLA2100(ha))
2601                         host->sg_tablesize = 32;
2602         } else {
2603                 if (!IS_QLA82XX(ha))
2604                         host->sg_tablesize = QLA_SG_ALL;
2605         }
2606         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2607             "can_queue=%d, req=%p, "
2608             "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2609             host->can_queue, base_vha->req,
2610             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2611         host->max_id = ha->max_fibre_devices;
2612         host->cmd_per_lun = 3;
2613         host->unique_id = host->host_no;
2614         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2615                 host->max_cmd_len = 32;
2616         else
2617                 host->max_cmd_len = MAX_CMDSZ;
2618         host->max_channel = MAX_BUSES - 1;
2619         host->max_lun = ql2xmaxlun;
2620         host->transportt = qla2xxx_transport_template;
2621         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2622
2623         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2624             "max_id=%d this_id=%d "
2625             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2626             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2627             host->this_id, host->cmd_per_lun, host->unique_id,
2628             host->max_cmd_len, host->max_channel, host->max_lun,
2629             host->transportt, sht->vendor_id);
2630
2631 que_init:
2632         /* Alloc arrays of request and response ring ptrs */
2633         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2634                 ql_log(ql_log_fatal, base_vha, 0x003d,
2635                     "Failed to allocate memory for queue pointers..."
2636                     "aborting.\n");
2637                 goto probe_init_failed;
2638         }
2639
2640         qlt_probe_one_stage1(base_vha, ha);
2641
2642         /* Set up the irqs */
2643         ret = qla2x00_request_irqs(ha, rsp);
2644         if (ret)
2645                 goto probe_init_failed;
2646
2647         pci_save_state(pdev);
2648
2649         /* Assign back pointers */
2650         rsp->req = req;
2651         req->rsp = rsp;
2652
2653         if (IS_QLAFX00(ha)) {
2654                 ha->rsp_q_map[0] = rsp;
2655                 ha->req_q_map[0] = req;
2656                 set_bit(0, ha->req_qid_map);
2657                 set_bit(0, ha->rsp_qid_map);
2658         }
2659
2660         /* FWI2-capable only. */
2661         req->req_q_in = &ha->iobase->isp24.req_q_in;
2662         req->req_q_out = &ha->iobase->isp24.req_q_out;
2663         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2664         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2665         if (ha->mqenable || IS_QLA83XX(ha)) {
2666                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2667                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2668                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2669                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2670         }
2671
2672         if (IS_QLAFX00(ha)) {
2673                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2674                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2675                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2676                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2677         }
2678
2679         if (IS_QLA82XX(ha)) {
2680                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2681                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2682                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2683         }
2684
2685         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2686             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2687             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2688         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2689             "req->req_q_in=%p req->req_q_out=%p "
2690             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2691             req->req_q_in, req->req_q_out,
2692             rsp->rsp_q_in, rsp->rsp_q_out);
2693         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2694             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2695             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2696         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2697             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2698             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2699
2700         if (ha->isp_ops->initialize_adapter(base_vha)) {
2701                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2702                     "Failed to initialize adapter - Adapter flags %x.\n",
2703                     base_vha->device_flags);
2704
2705                 if (IS_QLA82XX(ha)) {
2706                         qla82xx_idc_lock(ha);
2707                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2708                                 QLA8XXX_DEV_FAILED);
2709                         qla82xx_idc_unlock(ha);
2710                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2711                             "HW State: FAILED.\n");
2712                 }
2713
2714                 ret = -ENODEV;
2715                 goto probe_failed;
2716         }
2717
2718         if (ha->mqenable) {
2719                 if (qla25xx_setup_mode(base_vha)) {
2720                         ql_log(ql_log_warn, base_vha, 0x00ec,
2721                             "Failed to create queues, falling back to single queue mode.\n");
2722                         goto que_init;
2723                 }
2724         }
2725
2726         if (ha->flags.running_gold_fw)
2727                 goto skip_dpc;
2728
2729         /*
2730          * Startup the kernel thread for this host adapter
2731          */
2732         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2733             "%s_dpc", base_vha->host_str);
2734         if (IS_ERR(ha->dpc_thread)) {
2735                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2736                     "Failed to start DPC thread.\n");
2737                 ret = PTR_ERR(ha->dpc_thread);
2738                 goto probe_failed;
2739         }
2740         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2741             "DPC thread started successfully.\n");
2742
2743         /*
2744          * If we're not coming up in initiator mode, we might sit for
2745          * a while without waking up the dpc thread, which leads to a
2746          * stuck process warning.  So just kick the dpc once here and
2747          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2748          */
2749         qla2xxx_wake_dpc(base_vha);
2750
2751         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2752                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2753                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2754                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2755
2756                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2757                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2758                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2759                 INIT_WORK(&ha->idc_state_handler,
2760                     qla83xx_idc_state_handler_work);
2761                 INIT_WORK(&ha->nic_core_unrecoverable,
2762                     qla83xx_nic_core_unrecoverable_work);
2763         }
2764
2765 skip_dpc:
2766         list_add_tail(&base_vha->list, &ha->vp_list);
2767         base_vha->host->irq = ha->pdev->irq;
2768
2769         /* Initialized the timer */
2770         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2771         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2772             "Started qla2x00_timer with "
2773             "interval=%d.\n", WATCH_INTERVAL);
2774         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2775             "Detected hba at address=%p.\n",
2776             ha);
2777
2778         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2779                 if (ha->fw_attributes & BIT_4) {
2780                         int prot = 0, guard;
2781                         base_vha->flags.difdix_supported = 1;
2782                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2783                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2784                         if (ql2xenabledif == 1)
2785                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2786                         scsi_host_set_prot(host,
2787                             prot | SHOST_DIF_TYPE1_PROTECTION
2788                             | SHOST_DIF_TYPE2_PROTECTION
2789                             | SHOST_DIF_TYPE3_PROTECTION
2790                             | SHOST_DIX_TYPE1_PROTECTION
2791                             | SHOST_DIX_TYPE2_PROTECTION
2792                             | SHOST_DIX_TYPE3_PROTECTION);
2793
2794                         guard = SHOST_DIX_GUARD_CRC;
2795
2796                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2797                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2798                                 guard |= SHOST_DIX_GUARD_IP;
2799
2800                         scsi_host_set_guard(host, guard);
2801                 } else
2802                         base_vha->flags.difdix_supported = 0;
2803         }
2804
2805         ha->isp_ops->enable_intrs(ha);
2806
2807         ret = scsi_add_host(host, &pdev->dev);
2808         if (ret)
2809                 goto probe_failed;
2810
2811         base_vha->flags.init_done = 1;
2812         base_vha->flags.online = 1;
2813
2814         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2815             "Init done and hba is online.\n");
2816
2817         if (qla_ini_mode_enabled(base_vha))
2818                 scsi_scan_host(host);
2819         else
2820                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2821                         "skipping scsi_scan_host() for non-initiator port\n");
2822
2823         qla2x00_alloc_sysfs_attr(base_vha);
2824
2825         if (IS_QLAFX00(ha)) {
2826                 ret = qlafx00_fx_disc(base_vha,
2827                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2828
2829                 ret = qlafx00_fx_disc(base_vha,
2830                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2831
2832                 /* Register system information */
2833                 ret =  qlafx00_fx_disc(base_vha,
2834                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2835         }
2836
2837         qla2x00_init_host_attr(base_vha);
2838
2839         qla2x00_dfs_setup(base_vha);
2840
2841         ql_log(ql_log_info, base_vha, 0x00fb,
2842             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2843         ql_log(ql_log_info, base_vha, 0x00fc,
2844             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2845             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2846             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2847             base_vha->host_no,
2848             ha->isp_ops->fw_version_str(base_vha, fw_str));
2849
2850         qlt_add_target(ha, base_vha);
2851
2852         return 0;
2853
2854 probe_init_failed:
2855         qla2x00_free_req_que(ha, req);
2856         ha->req_q_map[0] = NULL;
2857         clear_bit(0, ha->req_qid_map);
2858         qla2x00_free_rsp_que(ha, rsp);
2859         ha->rsp_q_map[0] = NULL;
2860         clear_bit(0, ha->rsp_qid_map);
2861         ha->max_req_queues = ha->max_rsp_queues = 0;
2862
2863 probe_failed:
2864         if (base_vha->timer_active)
2865                 qla2x00_stop_timer(base_vha);
2866         base_vha->flags.online = 0;
2867         if (ha->dpc_thread) {
2868                 struct task_struct *t = ha->dpc_thread;
2869
2870                 ha->dpc_thread = NULL;
2871                 kthread_stop(t);
2872         }
2873
2874         qla2x00_free_device(base_vha);
2875
2876         scsi_host_put(base_vha->host);
2877
2878 probe_hw_failed:
2879         if (IS_QLA82XX(ha)) {
2880                 qla82xx_idc_lock(ha);
2881                 qla82xx_clear_drv_active(ha);
2882                 qla82xx_idc_unlock(ha);
2883         }
2884 iospace_config_failed:
2885         if (IS_QLA82XX(ha)) {
2886                 if (!ha->nx_pcibase)
2887                         iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2888                 if (!ql2xdbwr)
2889                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2890         } else {
2891                 if (ha->iobase)
2892                         iounmap(ha->iobase);
2893                 if (ha->cregbase)
2894                         iounmap(ha->cregbase);
2895         }
2896         pci_release_selected_regions(ha->pdev, ha->bars);
2897         kfree(ha);
2898         ha = NULL;
2899
2900 probe_out:
2901         pci_disable_device(pdev);
2902         return ret;
2903 }
2904
2905 static void
2906 qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
2907 {
2908         struct qla_hw_data *ha = vha->hw;
2909         struct task_struct *t = ha->dpc_thread;
2910
2911         if (ha->dpc_thread == NULL)
2912                 return;
2913         /*
2914          * qla2xxx_wake_dpc checks for ->dpc_thread
2915          * so we need to zero it out.
2916          */
2917         ha->dpc_thread = NULL;
2918         kthread_stop(t);
2919 }
2920
2921 static void
2922 qla2x00_shutdown(struct pci_dev *pdev)
2923 {
2924         scsi_qla_host_t *vha;
2925         struct qla_hw_data  *ha;
2926
2927         if (!atomic_read(&pdev->enable_cnt))
2928                 return;
2929
2930         vha = pci_get_drvdata(pdev);
2931         ha = vha->hw;
2932
2933         /* Turn-off FCE trace */
2934         if (ha->flags.fce_enabled) {
2935                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2936                 ha->flags.fce_enabled = 0;
2937         }
2938
2939         /* Turn-off EFT trace */
2940         if (ha->eft)
2941                 qla2x00_disable_eft_trace(vha);
2942
2943         /* Stop currently executing firmware. */
2944         qla2x00_try_to_stop_firmware(vha);
2945
2946         /* Turn adapter off line */
2947         vha->flags.online = 0;
2948
2949         /* turn-off interrupts on the card */
2950         if (ha->interrupts_on) {
2951                 vha->flags.init_done = 0;
2952                 ha->isp_ops->disable_intrs(ha);
2953         }
2954
2955         qla2x00_free_irqs(vha);
2956
2957         qla2x00_free_fw_dump(ha);
2958 }
2959
2960 static void
2961 qla2x00_remove_one(struct pci_dev *pdev)
2962 {
2963         scsi_qla_host_t *base_vha, *vha;
2964         struct qla_hw_data  *ha;
2965         unsigned long flags;
2966
2967         /*
2968          * If the PCI device is disabled that means that probe failed and any
2969          * resources should be have cleaned up on probe exit.
2970          */
2971         if (!atomic_read(&pdev->enable_cnt))
2972                 return;
2973
2974         base_vha = pci_get_drvdata(pdev);
2975         ha = base_vha->hw;
2976
2977         ha->flags.host_shutting_down = 1;
2978
2979         set_bit(UNLOADING, &base_vha->dpc_flags);
2980         mutex_lock(&ha->vport_lock);
2981         while (ha->cur_vport_count) {
2982                 struct Scsi_Host *scsi_host;
2983
2984                 spin_lock_irqsave(&ha->vport_slock, flags);
2985
2986                 BUG_ON(base_vha->list.next == &ha->vp_list);
2987                 /* This assumes first entry in ha->vp_list is always base vha */
2988                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2989                 scsi_host = scsi_host_get(vha->host);
2990
2991                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2992                 mutex_unlock(&ha->vport_lock);
2993
2994                 fc_vport_terminate(vha->fc_vport);
2995                 scsi_host_put(vha->host);
2996
2997                 mutex_lock(&ha->vport_lock);
2998         }
2999         mutex_unlock(&ha->vport_lock);
3000
3001         if (IS_QLA8031(ha)) {
3002                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3003                     "Clearing fcoe driver presence.\n");
3004                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3005                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3006                             "Error while clearing DRV-Presence.\n");
3007         }
3008
3009         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3010
3011         qla2x00_dfs_remove(base_vha);
3012
3013         qla84xx_put_chip(base_vha);
3014
3015         /* Disable timer */
3016         if (base_vha->timer_active)
3017                 qla2x00_stop_timer(base_vha);
3018
3019         base_vha->flags.online = 0;
3020
3021         /* Flush the work queue and remove it */
3022         if (ha->wq) {
3023                 flush_workqueue(ha->wq);
3024                 destroy_workqueue(ha->wq);
3025                 ha->wq = NULL;
3026         }
3027
3028         /* Cancel all work and destroy DPC workqueues */
3029         if (ha->dpc_lp_wq) {
3030                 cancel_work_sync(&ha->idc_aen);
3031                 destroy_workqueue(ha->dpc_lp_wq);
3032                 ha->dpc_lp_wq = NULL;
3033         }
3034
3035         if (ha->dpc_hp_wq) {
3036                 cancel_work_sync(&ha->nic_core_reset);
3037                 cancel_work_sync(&ha->idc_state_handler);
3038                 cancel_work_sync(&ha->nic_core_unrecoverable);
3039                 destroy_workqueue(ha->dpc_hp_wq);
3040                 ha->dpc_hp_wq = NULL;
3041         }
3042
3043         /* Kill the kernel thread for this host */
3044         if (ha->dpc_thread) {
3045                 struct task_struct *t = ha->dpc_thread;
3046
3047                 /*
3048                  * qla2xxx_wake_dpc checks for ->dpc_thread
3049                  * so we need to zero it out.
3050                  */
3051                 ha->dpc_thread = NULL;
3052                 kthread_stop(t);
3053         }
3054         qlt_remove_target(ha, base_vha);
3055
3056         qla2x00_free_sysfs_attr(base_vha);
3057
3058         fc_remove_host(base_vha->host);
3059
3060         scsi_remove_host(base_vha->host);
3061
3062         qla2x00_free_device(base_vha);
3063
3064         scsi_host_put(base_vha->host);
3065
3066         if (IS_QLA82XX(ha)) {
3067                 qla82xx_idc_lock(ha);
3068                 qla82xx_clear_drv_active(ha);
3069                 qla82xx_idc_unlock(ha);
3070
3071                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
3072                 if (!ql2xdbwr)
3073                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
3074         } else {
3075                 if (ha->iobase)
3076                         iounmap(ha->iobase);
3077
3078                 if (ha->cregbase)
3079                         iounmap(ha->cregbase);
3080
3081                 if (ha->mqiobase)
3082                         iounmap(ha->mqiobase);
3083
3084                 if (IS_QLA83XX(ha) && ha->msixbase)
3085                         iounmap(ha->msixbase);
3086         }
3087
3088         pci_release_selected_regions(ha->pdev, ha->bars);
3089         kfree(ha);
3090         ha = NULL;
3091
3092         pci_disable_pcie_error_reporting(pdev);
3093
3094         pci_disable_device(pdev);
3095         pci_set_drvdata(pdev, NULL);
3096 }
3097
3098 static void
3099 qla2x00_free_device(scsi_qla_host_t *vha)
3100 {
3101         struct qla_hw_data *ha = vha->hw;
3102
3103         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3104
3105         /* Disable timer */
3106         if (vha->timer_active)
3107                 qla2x00_stop_timer(vha);
3108
3109         qla2x00_stop_dpc_thread(vha);
3110
3111         qla25xx_delete_queues(vha);
3112         if (ha->flags.fce_enabled)
3113                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3114
3115         if (ha->eft)
3116                 qla2x00_disable_eft_trace(vha);
3117
3118         /* Stop currently executing firmware. */
3119         qla2x00_try_to_stop_firmware(vha);
3120
3121         vha->flags.online = 0;
3122
3123         /* turn-off interrupts on the card */
3124         if (ha->interrupts_on) {
3125                 vha->flags.init_done = 0;
3126                 ha->isp_ops->disable_intrs(ha);
3127         }
3128
3129         qla2x00_free_irqs(vha);
3130
3131         qla2x00_free_fcports(vha);
3132
3133         qla2x00_mem_free(ha);
3134
3135         qla82xx_md_free(vha);
3136
3137         qla2x00_free_queues(ha);
3138 }
3139
3140 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3141 {
3142         fc_port_t *fcport, *tfcport;
3143
3144         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3145                 list_del(&fcport->list);
3146                 qla2x00_clear_loop_id(fcport);
3147                 kfree(fcport);
3148                 fcport = NULL;
3149         }
3150 }
3151
3152 static inline void
3153 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3154     int defer)
3155 {
3156         struct fc_rport *rport;
3157         scsi_qla_host_t *base_vha;
3158         unsigned long flags;
3159
3160         if (!fcport->rport)
3161                 return;
3162
3163         rport = fcport->rport;
3164         if (defer) {
3165                 base_vha = pci_get_drvdata(vha->hw->pdev);
3166                 spin_lock_irqsave(vha->host->host_lock, flags);
3167                 fcport->drport = rport;
3168                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3169                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3170                 qla2xxx_wake_dpc(base_vha);
3171         } else {
3172                 fc_remote_port_delete(rport);
3173                 qlt_fc_port_deleted(vha, fcport);
3174         }
3175 }
3176
3177 /*
3178  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3179  *
3180  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3181  *
3182  * Return: None.
3183  *
3184  * Context:
3185  */
3186 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3187     int do_login, int defer)
3188 {
3189         if (IS_QLAFX00(vha->hw)) {
3190                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3191                 qla2x00_schedule_rport_del(vha, fcport, defer);
3192                 return;
3193         }
3194
3195         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3196             vha->vp_idx == fcport->vha->vp_idx) {
3197                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3198                 qla2x00_schedule_rport_del(vha, fcport, defer);
3199         }
3200         /*
3201          * We may need to retry the login, so don't change the state of the
3202          * port but do the retries.
3203          */
3204         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3205                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3206
3207         if (!do_login)
3208                 return;
3209
3210         if (fcport->login_retry == 0) {
3211                 fcport->login_retry = vha->hw->login_retry_count;
3212                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3213
3214                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3215                     "Port login retry "
3216                     "%02x%02x%02x%02x%02x%02x%02x%02x, "
3217                     "id = 0x%04x retry cnt=%d.\n",
3218                     fcport->port_name[0], fcport->port_name[1],
3219                     fcport->port_name[2], fcport->port_name[3],
3220                     fcport->port_name[4], fcport->port_name[5],
3221                     fcport->port_name[6], fcport->port_name[7],
3222                     fcport->loop_id, fcport->login_retry);
3223         }
3224 }
3225
3226 /*
3227  * qla2x00_mark_all_devices_lost
3228  *      Updates fcport state when device goes offline.
3229  *
3230  * Input:
3231  *      ha = adapter block pointer.
3232  *      fcport = port structure pointer.
3233  *
3234  * Return:
3235  *      None.
3236  *
3237  * Context:
3238  */
3239 void
3240 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3241 {
3242         fc_port_t *fcport;
3243
3244         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3245                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3246                         continue;
3247
3248                 /*
3249                  * No point in marking the device as lost, if the device is
3250                  * already DEAD.
3251                  */
3252                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3253                         continue;
3254                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3255                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3256                         if (defer)
3257                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3258                         else if (vha->vp_idx == fcport->vha->vp_idx)
3259                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3260                 }
3261         }
3262 }
3263
3264 /*
3265 * qla2x00_mem_alloc
3266 *      Allocates adapter memory.
3267 *
3268 * Returns:
3269 *      0  = success.
3270 *      !0  = failure.
3271 */
3272 static int
3273 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3274         struct req_que **req, struct rsp_que **rsp)
3275 {
3276         char    name[16];
3277
3278         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3279                 &ha->init_cb_dma, GFP_KERNEL);
3280         if (!ha->init_cb)
3281                 goto fail;
3282
3283         if (qlt_mem_alloc(ha) < 0)
3284                 goto fail_free_init_cb;
3285
3286         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3287                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3288         if (!ha->gid_list)
3289                 goto fail_free_tgt_mem;
3290
3291         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3292         if (!ha->srb_mempool)
3293                 goto fail_free_gid_list;
3294
3295         if (IS_QLA82XX(ha)) {
3296                 /* Allocate cache for CT6 Ctx. */
3297                 if (!ctx_cachep) {
3298                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3299                                 sizeof(struct ct6_dsd), 0,
3300                                 SLAB_HWCACHE_ALIGN, NULL);
3301                         if (!ctx_cachep)
3302                                 goto fail_free_gid_list;
3303                 }
3304                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3305                         ctx_cachep);
3306                 if (!ha->ctx_mempool)
3307                         goto fail_free_srb_mempool;
3308                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3309                     "ctx_cachep=%p ctx_mempool=%p.\n",
3310                     ctx_cachep, ha->ctx_mempool);
3311         }
3312
3313         /* Get memory for cached NVRAM */
3314         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3315         if (!ha->nvram)
3316                 goto fail_free_ctx_mempool;
3317
3318         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3319                 ha->pdev->device);
3320         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3321                 DMA_POOL_SIZE, 8, 0);
3322         if (!ha->s_dma_pool)
3323                 goto fail_free_nvram;
3324
3325         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3326             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3327             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3328
3329         if (IS_QLA82XX(ha) || ql2xenabledif) {
3330                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3331                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3332                 if (!ha->dl_dma_pool) {
3333                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3334                             "Failed to allocate memory for dl_dma_pool.\n");
3335                         goto fail_s_dma_pool;
3336                 }
3337
3338                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3339                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3340                 if (!ha->fcp_cmnd_dma_pool) {
3341                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3342                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3343                         goto fail_dl_dma_pool;
3344                 }
3345                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3346                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3347                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3348         }
3349
3350         /* Allocate memory for SNS commands */
3351         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3352         /* Get consistent memory allocated for SNS commands */
3353                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3354                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3355                 if (!ha->sns_cmd)
3356                         goto fail_dma_pool;
3357                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3358                     "sns_cmd: %p.\n", ha->sns_cmd);
3359         } else {
3360         /* Get consistent memory allocated for MS IOCB */
3361                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3362                         &ha->ms_iocb_dma);
3363                 if (!ha->ms_iocb)
3364                         goto fail_dma_pool;
3365         /* Get consistent memory allocated for CT SNS commands */
3366                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3367                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3368                 if (!ha->ct_sns)
3369                         goto fail_free_ms_iocb;
3370                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3371                     "ms_iocb=%p ct_sns=%p.\n",
3372                     ha->ms_iocb, ha->ct_sns);
3373         }
3374
3375         /* Allocate memory for request ring */
3376         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3377         if (!*req) {
3378                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3379                     "Failed to allocate memory for req.\n");
3380                 goto fail_req;
3381         }
3382         (*req)->length = req_len;
3383         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3384                 ((*req)->length + 1) * sizeof(request_t),
3385                 &(*req)->dma, GFP_KERNEL);
3386         if (!(*req)->ring) {
3387                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3388                     "Failed to allocate memory for req_ring.\n");
3389                 goto fail_req_ring;
3390         }
3391         /* Allocate memory for response ring */
3392         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3393         if (!*rsp) {
3394                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3395                     "Failed to allocate memory for rsp.\n");
3396                 goto fail_rsp;
3397         }
3398         (*rsp)->hw = ha;
3399         (*rsp)->length = rsp_len;
3400         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3401                 ((*rsp)->length + 1) * sizeof(response_t),
3402                 &(*rsp)->dma, GFP_KERNEL);
3403         if (!(*rsp)->ring) {
3404                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3405                     "Failed to allocate memory for rsp_ring.\n");
3406                 goto fail_rsp_ring;
3407         }
3408         (*req)->rsp = *rsp;
3409         (*rsp)->req = *req;
3410         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3411             "req=%p req->length=%d req->ring=%p rsp=%p "
3412             "rsp->length=%d rsp->ring=%p.\n",
3413             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3414             (*rsp)->ring);
3415         /* Allocate memory for NVRAM data for vports */
3416         if (ha->nvram_npiv_size) {
3417                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3418                     ha->nvram_npiv_size, GFP_KERNEL);
3419                 if (!ha->npiv_info) {
3420                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3421                             "Failed to allocate memory for npiv_info.\n");
3422                         goto fail_npiv_info;
3423                 }
3424         } else
3425                 ha->npiv_info = NULL;
3426
3427         /* Get consistent memory allocated for EX-INIT-CB. */
3428         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3429                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3430                     &ha->ex_init_cb_dma);
3431                 if (!ha->ex_init_cb)
3432                         goto fail_ex_init_cb;
3433                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3434                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3435         }
3436
3437         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3438
3439         /* Get consistent memory allocated for Async Port-Database. */
3440         if (!IS_FWI2_CAPABLE(ha)) {
3441                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3442                         &ha->async_pd_dma);
3443                 if (!ha->async_pd)
3444                         goto fail_async_pd;
3445                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3446                     "async_pd=%p.\n", ha->async_pd);
3447         }
3448
3449         INIT_LIST_HEAD(&ha->vp_list);
3450
3451         /* Allocate memory for our loop_id bitmap */
3452         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3453             GFP_KERNEL);
3454         if (!ha->loop_id_map)
3455                 goto fail_async_pd;
3456         else {
3457                 qla2x00_set_reserved_loop_ids(ha);
3458                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3459                     "loop_id_map=%p. \n", ha->loop_id_map);
3460         }
3461
3462         return 1;
3463
3464 fail_async_pd:
3465         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3466 fail_ex_init_cb:
3467         kfree(ha->npiv_info);
3468 fail_npiv_info:
3469         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3470                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3471         (*rsp)->ring = NULL;
3472         (*rsp)->dma = 0;
3473 fail_rsp_ring:
3474         kfree(*rsp);
3475 fail_rsp:
3476         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3477                 sizeof(request_t), (*req)->ring, (*req)->dma);
3478         (*req)->ring = NULL;
3479         (*req)->dma = 0;
3480 fail_req_ring:
3481         kfree(*req);
3482 fail_req:
3483         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3484                 ha->ct_sns, ha->ct_sns_dma);
3485         ha->ct_sns = NULL;
3486         ha->ct_sns_dma = 0;
3487 fail_free_ms_iocb:
3488         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3489         ha->ms_iocb = NULL;
3490         ha->ms_iocb_dma = 0;
3491 fail_dma_pool:
3492         if (IS_QLA82XX(ha) || ql2xenabledif) {
3493                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3494                 ha->fcp_cmnd_dma_pool = NULL;
3495         }
3496 fail_dl_dma_pool:
3497         if (IS_QLA82XX(ha) || ql2xenabledif) {
3498                 dma_pool_destroy(ha->dl_dma_pool);
3499                 ha->dl_dma_pool = NULL;
3500         }
3501 fail_s_dma_pool:
3502         dma_pool_destroy(ha->s_dma_pool);
3503         ha->s_dma_pool = NULL;
3504 fail_free_nvram:
3505         kfree(ha->nvram);
3506         ha->nvram = NULL;
3507 fail_free_ctx_mempool:
3508         mempool_destroy(ha->ctx_mempool);
3509         ha->ctx_mempool = NULL;
3510 fail_free_srb_mempool:
3511         mempool_destroy(ha->srb_mempool);
3512         ha->srb_mempool = NULL;
3513 fail_free_gid_list:
3514         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3515         ha->gid_list,
3516         ha->gid_list_dma);
3517         ha->gid_list = NULL;
3518         ha->gid_list_dma = 0;
3519 fail_free_tgt_mem:
3520         qlt_mem_free(ha);
3521 fail_free_init_cb:
3522         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3523         ha->init_cb_dma);
3524         ha->init_cb = NULL;
3525         ha->init_cb_dma = 0;
3526 fail:
3527         ql_log(ql_log_fatal, NULL, 0x0030,
3528             "Memory allocation failure.\n");
3529         return -ENOMEM;
3530 }
3531
3532 /*
3533 * qla2x00_free_fw_dump
3534 *       Frees fw dump stuff.
3535 *
3536 * Input:
3537 *       ha = adapter block pointer.
3538 */
3539 static void
3540 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3541 {
3542         if (ha->fce)
3543                 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3544                     ha->fce_dma);
3545
3546         if (ha->fw_dump) {
3547                 if (ha->eft)
3548                         dma_free_coherent(&ha->pdev->dev,
3549                             ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3550                 vfree(ha->fw_dump);
3551         }
3552         ha->fce = NULL;
3553         ha->fce_dma = 0;
3554         ha->eft = NULL;
3555         ha->eft_dma = 0;
3556         ha->fw_dump = NULL;
3557         ha->fw_dumped = 0;
3558         ha->fw_dump_reading = 0;
3559 }
3560
3561 /*
3562 * qla2x00_mem_free
3563 *      Frees all adapter allocated memory.
3564 *
3565 * Input:
3566 *      ha = adapter block pointer.
3567 */
3568 static void
3569 qla2x00_mem_free(struct qla_hw_data *ha)
3570 {
3571         qla2x00_free_fw_dump(ha);
3572
3573         if (ha->mctp_dump)
3574                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3575                     ha->mctp_dump_dma);
3576
3577         if (ha->srb_mempool)
3578                 mempool_destroy(ha->srb_mempool);
3579
3580         if (ha->dcbx_tlv)
3581                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3582                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3583
3584         if (ha->xgmac_data)
3585                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3586                     ha->xgmac_data, ha->xgmac_data_dma);
3587
3588         if (ha->sns_cmd)
3589                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3590                 ha->sns_cmd, ha->sns_cmd_dma);
3591
3592         if (ha->ct_sns)
3593                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3594                 ha->ct_sns, ha->ct_sns_dma);
3595
3596         if (ha->sfp_data)
3597                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3598
3599         if (ha->ms_iocb)
3600                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3601
3602         if (ha->ex_init_cb)
3603                 dma_pool_free(ha->s_dma_pool,
3604                         ha->ex_init_cb, ha->ex_init_cb_dma);
3605
3606         if (ha->async_pd)
3607                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3608
3609         if (ha->s_dma_pool)
3610                 dma_pool_destroy(ha->s_dma_pool);
3611
3612         if (ha->gid_list)
3613                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3614                 ha->gid_list, ha->gid_list_dma);
3615
3616         if (IS_QLA82XX(ha)) {
3617                 if (!list_empty(&ha->gbl_dsd_list)) {
3618                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3619
3620                         /* clean up allocated prev pool */
3621                         list_for_each_entry_safe(dsd_ptr,
3622                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3623                                 dma_pool_free(ha->dl_dma_pool,
3624                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3625                                 list_del(&dsd_ptr->list);
3626                                 kfree(dsd_ptr);
3627                         }
3628                 }
3629         }
3630
3631         if (ha->dl_dma_pool)
3632                 dma_pool_destroy(ha->dl_dma_pool);
3633
3634         if (ha->fcp_cmnd_dma_pool)
3635                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3636
3637         if (ha->ctx_mempool)
3638                 mempool_destroy(ha->ctx_mempool);
3639
3640         qlt_mem_free(ha);
3641
3642         if (ha->init_cb)
3643                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3644                         ha->init_cb, ha->init_cb_dma);
3645         vfree(ha->optrom_buffer);
3646         kfree(ha->nvram);
3647         kfree(ha->npiv_info);
3648         kfree(ha->swl);
3649         kfree(ha->loop_id_map);
3650
3651         ha->srb_mempool = NULL;
3652         ha->ctx_mempool = NULL;
3653         ha->sns_cmd = NULL;
3654         ha->sns_cmd_dma = 0;
3655         ha->ct_sns = NULL;
3656         ha->ct_sns_dma = 0;
3657         ha->ms_iocb = NULL;
3658         ha->ms_iocb_dma = 0;
3659         ha->init_cb = NULL;
3660         ha->init_cb_dma = 0;
3661         ha->ex_init_cb = NULL;
3662         ha->ex_init_cb_dma = 0;
3663         ha->async_pd = NULL;
3664         ha->async_pd_dma = 0;
3665
3666         ha->s_dma_pool = NULL;
3667         ha->dl_dma_pool = NULL;
3668         ha->fcp_cmnd_dma_pool = NULL;
3669
3670         ha->gid_list = NULL;
3671         ha->gid_list_dma = 0;
3672
3673         ha->tgt.atio_ring = NULL;
3674         ha->tgt.atio_dma = 0;
3675         ha->tgt.tgt_vp_map = NULL;
3676 }
3677
3678 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3679                                                 struct qla_hw_data *ha)
3680 {
3681         struct Scsi_Host *host;
3682         struct scsi_qla_host *vha = NULL;
3683
3684         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3685         if (host == NULL) {
3686                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3687                     "Failed to allocate host from the scsi layer, aborting.\n");
3688                 goto fail;
3689         }
3690
3691         /* Clear our data area */
3692         vha = shost_priv(host);
3693         memset(vha, 0, sizeof(scsi_qla_host_t));
3694
3695         vha->host = host;
3696         vha->host_no = host->host_no;
3697         vha->hw = ha;
3698
3699         INIT_LIST_HEAD(&vha->vp_fcports);
3700         INIT_LIST_HEAD(&vha->work_list);
3701         INIT_LIST_HEAD(&vha->list);
3702
3703         spin_lock_init(&vha->work_lock);
3704
3705         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3706         ql_dbg(ql_dbg_init, vha, 0x0041,
3707             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3708             vha->host, vha->hw, vha,
3709             dev_name(&(ha->pdev->dev)));
3710
3711         return vha;
3712
3713 fail:
3714         return vha;
3715 }
3716
3717 static struct qla_work_evt *
3718 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3719 {
3720         struct qla_work_evt *e;
3721         uint8_t bail;
3722
3723         QLA_VHA_MARK_BUSY(vha, bail);
3724         if (bail)
3725                 return NULL;
3726
3727         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3728         if (!e) {
3729                 QLA_VHA_MARK_NOT_BUSY(vha);
3730                 return NULL;
3731         }
3732
3733         INIT_LIST_HEAD(&e->list);
3734         e->type = type;
3735         e->flags = QLA_EVT_FLAG_FREE;
3736         return e;
3737 }
3738
3739 static int
3740 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3741 {
3742         unsigned long flags;
3743
3744         spin_lock_irqsave(&vha->work_lock, flags);
3745         list_add_tail(&e->list, &vha->work_list);
3746         spin_unlock_irqrestore(&vha->work_lock, flags);
3747         qla2xxx_wake_dpc(vha);
3748
3749         return QLA_SUCCESS;
3750 }
3751
3752 int
3753 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3754     u32 data)
3755 {
3756         struct qla_work_evt *e;
3757
3758         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3759         if (!e)
3760                 return QLA_FUNCTION_FAILED;
3761
3762         e->u.aen.code = code;
3763         e->u.aen.data = data;
3764         return qla2x00_post_work(vha, e);
3765 }
3766
3767 int
3768 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3769 {
3770         struct qla_work_evt *e;
3771
3772         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3773         if (!e)
3774                 return QLA_FUNCTION_FAILED;
3775
3776         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3777         return qla2x00_post_work(vha, e);
3778 }
3779
3780 #define qla2x00_post_async_work(name, type)     \
3781 int qla2x00_post_async_##name##_work(           \
3782     struct scsi_qla_host *vha,                  \
3783     fc_port_t *fcport, uint16_t *data)          \
3784 {                                               \
3785         struct qla_work_evt *e;                 \
3786                                                 \
3787         e = qla2x00_alloc_work(vha, type);      \
3788         if (!e)                                 \
3789                 return QLA_FUNCTION_FAILED;     \
3790                                                 \
3791         e->u.logio.fcport = fcport;             \
3792         if (data) {                             \
3793                 e->u.logio.data[0] = data[0];   \
3794                 e->u.logio.data[1] = data[1];   \
3795         }                                       \
3796         return qla2x00_post_work(vha, e);       \
3797 }
3798
3799 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3800 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3801 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3802 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3803 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3804 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3805
3806 int
3807 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3808 {
3809         struct qla_work_evt *e;
3810
3811         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3812         if (!e)
3813                 return QLA_FUNCTION_FAILED;
3814
3815         e->u.uevent.code = code;
3816         return qla2x00_post_work(vha, e);
3817 }
3818
3819 static void
3820 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3821 {
3822         char event_string[40];
3823         char *envp[] = { event_string, NULL };
3824
3825         switch (code) {
3826         case QLA_UEVENT_CODE_FW_DUMP:
3827                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3828                     vha->host_no);
3829                 break;
3830         default:
3831                 /* do nothing */
3832                 break;
3833         }
3834         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3835 }
3836
3837 int
3838 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3839                         uint32_t *data, int cnt)
3840 {
3841         struct qla_work_evt *e;
3842
3843         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3844         if (!e)
3845                 return QLA_FUNCTION_FAILED;
3846
3847         e->u.aenfx.evtcode = evtcode;
3848         e->u.aenfx.count = cnt;
3849         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3850         return qla2x00_post_work(vha, e);
3851 }
3852
3853 void
3854 qla2x00_do_work(struct scsi_qla_host *vha)
3855 {
3856         struct qla_work_evt *e, *tmp;
3857         unsigned long flags;
3858         LIST_HEAD(work);
3859
3860         spin_lock_irqsave(&vha->work_lock, flags);
3861         list_splice_init(&vha->work_list, &work);
3862         spin_unlock_irqrestore(&vha->work_lock, flags);
3863
3864         list_for_each_entry_safe(e, tmp, &work, list) {
3865                 list_del_init(&e->list);
3866
3867                 switch (e->type) {
3868                 case QLA_EVT_AEN:
3869                         fc_host_post_event(vha->host, fc_get_event_number(),
3870                             e->u.aen.code, e->u.aen.data);
3871                         break;
3872                 case QLA_EVT_IDC_ACK:
3873                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3874                         break;
3875                 case QLA_EVT_ASYNC_LOGIN:
3876                         qla2x00_async_login(vha, e->u.logio.fcport,
3877                             e->u.logio.data);
3878                         break;
3879                 case QLA_EVT_ASYNC_LOGIN_DONE:
3880                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3881                             e->u.logio.data);
3882                         break;
3883                 case QLA_EVT_ASYNC_LOGOUT:
3884                         qla2x00_async_logout(vha, e->u.logio.fcport);
3885                         break;
3886                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3887                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3888                             e->u.logio.data);
3889                         break;
3890                 case QLA_EVT_ASYNC_ADISC:
3891                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3892                             e->u.logio.data);
3893                         break;
3894                 case QLA_EVT_ASYNC_ADISC_DONE:
3895                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3896                             e->u.logio.data);
3897                         break;
3898                 case QLA_EVT_UEVENT:
3899                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3900                         break;
3901                 case QLA_EVT_AENFX:
3902                         qlafx00_process_aen(vha, e);
3903                         break;
3904                 }
3905                 if (e->flags & QLA_EVT_FLAG_FREE)
3906                         kfree(e);
3907
3908                 /* For each work completed decrement vha ref count */
3909                 QLA_VHA_MARK_NOT_BUSY(vha);
3910         }
3911 }
3912
3913 /* Relogins all the fcports of a vport
3914  * Context: dpc thread
3915  */
3916 void qla2x00_relogin(struct scsi_qla_host *vha)
3917 {
3918         fc_port_t       *fcport;
3919         int status;
3920         uint16_t        next_loopid = 0;
3921         struct qla_hw_data *ha = vha->hw;
3922         uint16_t data[2];
3923
3924         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3925         /*
3926          * If the port is not ONLINE then try to login
3927          * to it if we haven't run out of retries.
3928          */
3929                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3930                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3931                         fcport->login_retry--;
3932                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3933                                 if (fcport->flags & FCF_FCP2_DEVICE)
3934                                         ha->isp_ops->fabric_logout(vha,
3935                                                         fcport->loop_id,
3936                                                         fcport->d_id.b.domain,
3937                                                         fcport->d_id.b.area,
3938                                                         fcport->d_id.b.al_pa);
3939
3940                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
3941                                         fcport->loop_id = next_loopid =
3942                                             ha->min_external_loopid;
3943                                         status = qla2x00_find_new_loop_id(
3944                                             vha, fcport);
3945                                         if (status != QLA_SUCCESS) {
3946                                                 /* Ran out of IDs to use */
3947                                                 break;
3948                                         }
3949                                 }
3950
3951                                 if (IS_ALOGIO_CAPABLE(ha)) {
3952                                         fcport->flags |= FCF_ASYNC_SENT;
3953                                         data[0] = 0;
3954                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
3955                                         status = qla2x00_post_async_login_work(
3956                                             vha, fcport, data);
3957                                         if (status == QLA_SUCCESS)
3958                                                 continue;
3959                                         /* Attempt a retry. */
3960                                         status = 1;
3961                                 } else {
3962                                         status = qla2x00_fabric_login(vha,
3963                                             fcport, &next_loopid);
3964                                         if (status ==  QLA_SUCCESS) {
3965                                                 int status2;
3966                                                 uint8_t opts;
3967
3968                                                 opts = 0;
3969                                                 if (fcport->flags &
3970                                                     FCF_FCP2_DEVICE)
3971                                                         opts |= BIT_1;
3972                                                 status2 =
3973                                                     qla2x00_get_port_database(
3974                                                         vha, fcport, opts);
3975                                                 if (status2 != QLA_SUCCESS)
3976                                                         status = 1;
3977                                         }
3978                                 }
3979                         } else
3980                                 status = qla2x00_local_device_login(vha,
3981                                                                 fcport);
3982
3983                         if (status == QLA_SUCCESS) {
3984                                 fcport->old_loop_id = fcport->loop_id;
3985
3986                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
3987                                     "Port login OK: logged in ID 0x%x.\n",
3988                                     fcport->loop_id);
3989
3990                                 qla2x00_update_fcport(vha, fcport);
3991
3992                         } else if (status == 1) {
3993                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3994                                 /* retry the login again */
3995                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
3996                                     "Retrying %d login again loop_id 0x%x.\n",
3997                                     fcport->login_retry, fcport->loop_id);
3998                         } else {
3999                                 fcport->login_retry = 0;
4000                         }
4001
4002                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4003                                 qla2x00_clear_loop_id(fcport);
4004                 }
4005                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4006                         break;
4007         }
4008 }
4009
4010 /* Schedule work on any of the dpc-workqueues */
4011 void
4012 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4013 {
4014         struct qla_hw_data *ha = base_vha->hw;
4015
4016         switch (work_code) {
4017         case MBA_IDC_AEN: /* 0x8200 */
4018                 if (ha->dpc_lp_wq)
4019                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4020                 break;
4021
4022         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4023                 if (!ha->flags.nic_core_reset_hdlr_active) {
4024                         if (ha->dpc_hp_wq)
4025                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4026                 } else
4027                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4028                             "NIC Core reset is already active. Skip "
4029                             "scheduling it again.\n");
4030                 break;
4031         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4032                 if (ha->dpc_hp_wq)
4033                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4034                 break;
4035         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4036                 if (ha->dpc_hp_wq)
4037                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4038                 break;
4039         default:
4040                 ql_log(ql_log_warn, base_vha, 0xb05f,
4041                     "Unknow work-code=0x%x.\n", work_code);
4042         }
4043
4044         return;
4045 }
4046
4047 /* Work: Perform NIC Core Unrecoverable state handling */
4048 void
4049 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4050 {
4051         struct qla_hw_data *ha =
4052                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4053         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4054         uint32_t dev_state = 0;
4055
4056         qla83xx_idc_lock(base_vha, 0);
4057         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4058         qla83xx_reset_ownership(base_vha);
4059         if (ha->flags.nic_core_reset_owner) {
4060                 ha->flags.nic_core_reset_owner = 0;
4061                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4062                     QLA8XXX_DEV_FAILED);
4063                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4064                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4065         }
4066         qla83xx_idc_unlock(base_vha, 0);
4067 }
4068
4069 /* Work: Execute IDC state handler */
4070 void
4071 qla83xx_idc_state_handler_work(struct work_struct *work)
4072 {
4073         struct qla_hw_data *ha =
4074                 container_of(work, struct qla_hw_data, idc_state_handler);
4075         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4076         uint32_t dev_state = 0;
4077
4078         qla83xx_idc_lock(base_vha, 0);
4079         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4080         if (dev_state == QLA8XXX_DEV_FAILED ||
4081                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4082                 qla83xx_idc_state_handler(base_vha);
4083         qla83xx_idc_unlock(base_vha, 0);
4084 }
4085
4086 static int
4087 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4088 {
4089         int rval = QLA_SUCCESS;
4090         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4091         uint32_t heart_beat_counter1, heart_beat_counter2;
4092
4093         do {
4094                 if (time_after(jiffies, heart_beat_wait)) {
4095                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4096                             "Nic Core f/w is not alive.\n");
4097                         rval = QLA_FUNCTION_FAILED;
4098                         break;
4099                 }
4100
4101                 qla83xx_idc_lock(base_vha, 0);
4102                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4103                     &heart_beat_counter1);
4104                 qla83xx_idc_unlock(base_vha, 0);
4105                 msleep(100);
4106                 qla83xx_idc_lock(base_vha, 0);
4107                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4108                     &heart_beat_counter2);
4109                 qla83xx_idc_unlock(base_vha, 0);
4110         } while (heart_beat_counter1 == heart_beat_counter2);
4111
4112         return rval;
4113 }
4114
4115 /* Work: Perform NIC Core Reset handling */
4116 void
4117 qla83xx_nic_core_reset_work(struct work_struct *work)
4118 {
4119         struct qla_hw_data *ha =
4120                 container_of(work, struct qla_hw_data, nic_core_reset);
4121         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4122         uint32_t dev_state = 0;
4123
4124         if (IS_QLA2031(ha)) {
4125                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4126                         ql_log(ql_log_warn, base_vha, 0xb081,
4127                             "Failed to dump mctp\n");
4128                 return;
4129         }
4130
4131         if (!ha->flags.nic_core_reset_hdlr_active) {
4132                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4133                         qla83xx_idc_lock(base_vha, 0);
4134                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4135                             &dev_state);
4136                         qla83xx_idc_unlock(base_vha, 0);
4137                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4138                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4139                                     "Nic Core f/w is alive.\n");
4140                                 return;
4141                         }
4142                 }
4143
4144                 ha->flags.nic_core_reset_hdlr_active = 1;
4145                 if (qla83xx_nic_core_reset(base_vha)) {
4146                         /* NIC Core reset failed. */
4147                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4148                             "NIC Core reset failed.\n");
4149                 }
4150                 ha->flags.nic_core_reset_hdlr_active = 0;
4151         }
4152 }
4153
4154 /* Work: Handle 8200 IDC aens */
4155 void
4156 qla83xx_service_idc_aen(struct work_struct *work)
4157 {
4158         struct qla_hw_data *ha =
4159                 container_of(work, struct qla_hw_data, idc_aen);
4160         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4161         uint32_t dev_state, idc_control;
4162
4163         qla83xx_idc_lock(base_vha, 0);
4164         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4165         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4166         qla83xx_idc_unlock(base_vha, 0);
4167         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4168                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4169                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4170                             "Application requested NIC Core Reset.\n");
4171                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4172                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4173                     QLA_SUCCESS) {
4174                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4175                             "Other protocol driver requested NIC Core Reset.\n");
4176                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4177                 }
4178         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4179                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4180                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4181         }
4182 }
4183
4184 static void
4185 qla83xx_wait_logic(void)
4186 {
4187         int i;
4188
4189         /* Yield CPU */
4190         if (!in_interrupt()) {
4191                 /*
4192                  * Wait about 200ms before retrying again.
4193                  * This controls the number of retries for single
4194                  * lock operation.
4195                  */
4196                 msleep(100);
4197                 schedule();
4198         } else {
4199                 for (i = 0; i < 20; i++)
4200                         cpu_relax(); /* This a nop instr on i386 */
4201         }
4202 }
4203
4204 static int
4205 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4206 {
4207         int rval;
4208         uint32_t data;
4209         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4210         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4211         struct qla_hw_data *ha = base_vha->hw;
4212         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4213             "Trying force recovery of the IDC lock.\n");
4214
4215         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4216         if (rval)
4217                 return rval;
4218
4219         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4220                 return QLA_SUCCESS;
4221         } else {
4222                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4223                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4224                     data);
4225                 if (rval)
4226                         return rval;
4227
4228                 msleep(200);
4229
4230                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4231                     &data);
4232                 if (rval)
4233                         return rval;
4234
4235                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4236                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4237                                         ~(idc_lck_rcvry_stage_mask));
4238                         rval = qla83xx_wr_reg(base_vha,
4239                             QLA83XX_IDC_LOCK_RECOVERY, data);
4240                         if (rval)
4241                                 return rval;
4242
4243                         /* Forcefully perform IDC UnLock */
4244                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4245                             &data);
4246                         if (rval)
4247                                 return rval;
4248                         /* Clear lock-id by setting 0xff */
4249                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4250                             0xff);
4251                         if (rval)
4252                                 return rval;
4253                         /* Clear lock-recovery by setting 0x0 */
4254                         rval = qla83xx_wr_reg(base_vha,
4255                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4256                         if (rval)
4257                                 return rval;
4258                 } else
4259                         return QLA_SUCCESS;
4260         }
4261
4262         return rval;
4263 }
4264
4265 static int
4266 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4267 {
4268         int rval = QLA_SUCCESS;
4269         uint32_t o_drv_lockid, n_drv_lockid;
4270         unsigned long lock_recovery_timeout;
4271
4272         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4273 retry_lockid:
4274         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4275         if (rval)
4276                 goto exit;
4277
4278         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4279         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4280                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4281                         return QLA_SUCCESS;
4282                 else
4283                         return QLA_FUNCTION_FAILED;
4284         }
4285
4286         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4287         if (rval)
4288                 goto exit;
4289
4290         if (o_drv_lockid == n_drv_lockid) {
4291                 qla83xx_wait_logic();
4292                 goto retry_lockid;
4293         } else
4294                 return QLA_SUCCESS;
4295
4296 exit:
4297         return rval;
4298 }
4299
4300 void
4301 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4302 {
4303         uint16_t options = (requester_id << 15) | BIT_6;
4304         uint32_t data;
4305         uint32_t lock_owner;
4306         struct qla_hw_data *ha = base_vha->hw;
4307
4308         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4309 retry_lock:
4310         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4311             == QLA_SUCCESS) {
4312                 if (data) {
4313                         /* Setting lock-id to our function-number */
4314                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4315                             ha->portnum);
4316                 } else {
4317                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4318                             &lock_owner);
4319                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4320                             "Failed to acquire IDC lock, acquired by %d, "
4321                             "retrying...\n", lock_owner);
4322
4323                         /* Retry/Perform IDC-Lock recovery */
4324                         if (qla83xx_idc_lock_recovery(base_vha)
4325                             == QLA_SUCCESS) {
4326                                 qla83xx_wait_logic();
4327                                 goto retry_lock;
4328                         } else
4329                                 ql_log(ql_log_warn, base_vha, 0xb075,
4330                                     "IDC Lock recovery FAILED.\n");
4331                 }
4332
4333         }
4334
4335         return;
4336
4337         /* XXX: IDC-lock implementation using access-control mbx */
4338 retry_lock2:
4339         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4340                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4341                     "Failed to acquire IDC lock. retrying...\n");
4342                 /* Retry/Perform IDC-Lock recovery */
4343                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4344                         qla83xx_wait_logic();
4345                         goto retry_lock2;
4346                 } else
4347                         ql_log(ql_log_warn, base_vha, 0xb076,
4348                             "IDC Lock recovery FAILED.\n");
4349         }
4350
4351         return;
4352 }
4353
4354 void
4355 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4356 {
4357         uint16_t options = (requester_id << 15) | BIT_7, retry;
4358         uint32_t data;
4359         struct qla_hw_data *ha = base_vha->hw;
4360
4361         /* IDC-unlock implementation using driver-unlock/lock-id
4362          * remote registers
4363          */
4364         retry = 0;
4365 retry_unlock:
4366         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4367             == QLA_SUCCESS) {
4368                 if (data == ha->portnum) {
4369                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4370                         /* Clearing lock-id by setting 0xff */
4371                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4372                 } else if (retry < 10) {
4373                         /* SV: XXX: IDC unlock retrying needed here? */
4374
4375                         /* Retry for IDC-unlock */
4376                         qla83xx_wait_logic();
4377                         retry++;
4378                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4379                             "Failed to release IDC lock, retyring=%d\n", retry);
4380                         goto retry_unlock;
4381                 }
4382         } else if (retry < 10) {
4383                 /* Retry for IDC-unlock */
4384                 qla83xx_wait_logic();
4385                 retry++;
4386                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4387                     "Failed to read drv-lockid, retyring=%d\n", retry);
4388                 goto retry_unlock;
4389         }
4390
4391         return;
4392
4393         /* XXX: IDC-unlock implementation using access-control mbx */
4394         retry = 0;
4395 retry_unlock2:
4396         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4397                 if (retry < 10) {
4398                         /* Retry for IDC-unlock */
4399                         qla83xx_wait_logic();
4400                         retry++;
4401                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4402                             "Failed to release IDC lock, retyring=%d\n", retry);
4403                         goto retry_unlock2;
4404                 }
4405         }
4406
4407         return;
4408 }
4409
4410 int
4411 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4412 {
4413         int rval = QLA_SUCCESS;
4414         struct qla_hw_data *ha = vha->hw;
4415         uint32_t drv_presence;
4416
4417         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4418         if (rval == QLA_SUCCESS) {
4419                 drv_presence |= (1 << ha->portnum);
4420                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4421                     drv_presence);
4422         }
4423
4424         return rval;
4425 }
4426
4427 int
4428 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4429 {
4430         int rval = QLA_SUCCESS;
4431
4432         qla83xx_idc_lock(vha, 0);
4433         rval = __qla83xx_set_drv_presence(vha);
4434         qla83xx_idc_unlock(vha, 0);
4435
4436         return rval;
4437 }
4438
4439 int
4440 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4441 {
4442         int rval = QLA_SUCCESS;
4443         struct qla_hw_data *ha = vha->hw;
4444         uint32_t drv_presence;
4445
4446         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4447         if (rval == QLA_SUCCESS) {
4448                 drv_presence &= ~(1 << ha->portnum);
4449                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4450                     drv_presence);
4451         }
4452
4453         return rval;
4454 }
4455
4456 int
4457 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4458 {
4459         int rval = QLA_SUCCESS;
4460
4461         qla83xx_idc_lock(vha, 0);
4462         rval = __qla83xx_clear_drv_presence(vha);
4463         qla83xx_idc_unlock(vha, 0);
4464
4465         return rval;
4466 }
4467
4468 static void
4469 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4470 {
4471         struct qla_hw_data *ha = vha->hw;
4472         uint32_t drv_ack, drv_presence;
4473         unsigned long ack_timeout;
4474
4475         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4476         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4477         while (1) {
4478                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4479                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4480                 if ((drv_ack & drv_presence) == drv_presence)
4481                         break;
4482
4483                 if (time_after_eq(jiffies, ack_timeout)) {
4484                         ql_log(ql_log_warn, vha, 0xb067,
4485                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4486                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4487                         /*
4488                          * The function(s) which did not ack in time are forced
4489                          * to withdraw any further participation in the IDC
4490                          * reset.
4491                          */
4492                         if (drv_ack != drv_presence)
4493                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4494                                     drv_ack);
4495                         break;
4496                 }
4497
4498                 qla83xx_idc_unlock(vha, 0);
4499                 msleep(1000);
4500                 qla83xx_idc_lock(vha, 0);
4501         }
4502
4503         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4504         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4505 }
4506
4507 static int
4508 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4509 {
4510         int rval = QLA_SUCCESS;
4511         uint32_t idc_control;
4512
4513         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4514         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4515
4516         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4517         __qla83xx_get_idc_control(vha, &idc_control);
4518         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4519         __qla83xx_set_idc_control(vha, 0);
4520
4521         qla83xx_idc_unlock(vha, 0);
4522         rval = qla83xx_restart_nic_firmware(vha);
4523         qla83xx_idc_lock(vha, 0);
4524
4525         if (rval != QLA_SUCCESS) {
4526                 ql_log(ql_log_fatal, vha, 0xb06a,
4527                     "Failed to restart NIC f/w.\n");
4528                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4529                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4530         } else {
4531                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4532                     "Success in restarting nic f/w.\n");
4533                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4534                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4535         }
4536
4537         return rval;
4538 }
4539
4540 /* Assumes idc_lock always held on entry */
4541 int
4542 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4543 {
4544         struct qla_hw_data *ha = base_vha->hw;
4545         int rval = QLA_SUCCESS;
4546         unsigned long dev_init_timeout;
4547         uint32_t dev_state;
4548
4549         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4550         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4551
4552         while (1) {
4553
4554                 if (time_after_eq(jiffies, dev_init_timeout)) {
4555                         ql_log(ql_log_warn, base_vha, 0xb06e,
4556                             "Initialization TIMEOUT!\n");
4557                         /* Init timeout. Disable further NIC Core
4558                          * communication.
4559                          */
4560                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4561                                 QLA8XXX_DEV_FAILED);
4562                         ql_log(ql_log_info, base_vha, 0xb06f,
4563                             "HW State: FAILED.\n");
4564                 }
4565
4566                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4567                 switch (dev_state) {
4568                 case QLA8XXX_DEV_READY:
4569                         if (ha->flags.nic_core_reset_owner)
4570                                 qla83xx_idc_audit(base_vha,
4571                                     IDC_AUDIT_COMPLETION);
4572                         ha->flags.nic_core_reset_owner = 0;
4573                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4574                             "Reset_owner reset by 0x%x.\n",
4575                             ha->portnum);
4576                         goto exit;
4577                 case QLA8XXX_DEV_COLD:
4578                         if (ha->flags.nic_core_reset_owner)
4579                                 rval = qla83xx_device_bootstrap(base_vha);
4580                         else {
4581                         /* Wait for AEN to change device-state */
4582                                 qla83xx_idc_unlock(base_vha, 0);
4583                                 msleep(1000);
4584                                 qla83xx_idc_lock(base_vha, 0);
4585                         }
4586                         break;
4587                 case QLA8XXX_DEV_INITIALIZING:
4588                         /* Wait for AEN to change device-state */
4589                         qla83xx_idc_unlock(base_vha, 0);
4590                         msleep(1000);
4591                         qla83xx_idc_lock(base_vha, 0);
4592                         break;
4593                 case QLA8XXX_DEV_NEED_RESET:
4594                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4595                                 qla83xx_need_reset_handler(base_vha);
4596                         else {
4597                                 /* Wait for AEN to change device-state */
4598                                 qla83xx_idc_unlock(base_vha, 0);
4599                                 msleep(1000);
4600                                 qla83xx_idc_lock(base_vha, 0);
4601                         }
4602                         /* reset timeout value after need reset handler */
4603                         dev_init_timeout = jiffies +
4604                             (ha->fcoe_dev_init_timeout * HZ);
4605                         break;
4606                 case QLA8XXX_DEV_NEED_QUIESCENT:
4607                         /* XXX: DEBUG for now */
4608                         qla83xx_idc_unlock(base_vha, 0);
4609                         msleep(1000);
4610                         qla83xx_idc_lock(base_vha, 0);
4611                         break;
4612                 case QLA8XXX_DEV_QUIESCENT:
4613                         /* XXX: DEBUG for now */
4614                         if (ha->flags.quiesce_owner)
4615                                 goto exit;
4616
4617                         qla83xx_idc_unlock(base_vha, 0);
4618                         msleep(1000);
4619                         qla83xx_idc_lock(base_vha, 0);
4620                         dev_init_timeout = jiffies +
4621                             (ha->fcoe_dev_init_timeout * HZ);
4622                         break;
4623                 case QLA8XXX_DEV_FAILED:
4624                         if (ha->flags.nic_core_reset_owner)
4625                                 qla83xx_idc_audit(base_vha,
4626                                     IDC_AUDIT_COMPLETION);
4627                         ha->flags.nic_core_reset_owner = 0;
4628                         __qla83xx_clear_drv_presence(base_vha);
4629                         qla83xx_idc_unlock(base_vha, 0);
4630                         qla8xxx_dev_failed_handler(base_vha);
4631                         rval = QLA_FUNCTION_FAILED;
4632                         qla83xx_idc_lock(base_vha, 0);
4633                         goto exit;
4634                 case QLA8XXX_BAD_VALUE:
4635                         qla83xx_idc_unlock(base_vha, 0);
4636                         msleep(1000);
4637                         qla83xx_idc_lock(base_vha, 0);
4638                         break;
4639                 default:
4640                         ql_log(ql_log_warn, base_vha, 0xb071,
4641                             "Unknow Device State: %x.\n", dev_state);
4642                         qla83xx_idc_unlock(base_vha, 0);
4643                         qla8xxx_dev_failed_handler(base_vha);
4644                         rval = QLA_FUNCTION_FAILED;
4645                         qla83xx_idc_lock(base_vha, 0);
4646                         goto exit;
4647                 }
4648         }
4649
4650 exit:
4651         return rval;
4652 }
4653
4654 /**************************************************************************
4655 * qla2x00_do_dpc
4656 *   This kernel thread is a task that is schedule by the interrupt handler
4657 *   to perform the background processing for interrupts.
4658 *
4659 * Notes:
4660 * This task always run in the context of a kernel thread.  It
4661 * is kick-off by the driver's detect code and starts up
4662 * up one per adapter. It immediately goes to sleep and waits for
4663 * some fibre event.  When either the interrupt handler or
4664 * the timer routine detects a event it will one of the task
4665 * bits then wake us up.
4666 **************************************************************************/
4667 static int
4668 qla2x00_do_dpc(void *data)
4669 {
4670         int             rval;
4671         scsi_qla_host_t *base_vha;
4672         struct qla_hw_data *ha;
4673
4674         ha = (struct qla_hw_data *)data;
4675         base_vha = pci_get_drvdata(ha->pdev);
4676
4677         set_user_nice(current, -20);
4678
4679         set_current_state(TASK_INTERRUPTIBLE);
4680         while (!kthread_should_stop()) {
4681                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4682                     "DPC handler sleeping.\n");
4683
4684                 schedule();
4685                 __set_current_state(TASK_RUNNING);
4686
4687                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4688                         goto end_loop;
4689
4690                 if (ha->flags.eeh_busy) {
4691                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4692                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4693                         goto end_loop;
4694                 }
4695
4696                 ha->dpc_active = 1;
4697
4698                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4699                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4700                     base_vha->dpc_flags);
4701
4702                 qla2x00_do_work(base_vha);
4703
4704                 if (IS_QLA82XX(ha)) {
4705                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4706                                 &base_vha->dpc_flags)) {
4707                                 qla82xx_idc_lock(ha);
4708                                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4709                                         QLA8XXX_DEV_FAILED);
4710                                 qla82xx_idc_unlock(ha);
4711                                 ql_log(ql_log_info, base_vha, 0x4004,
4712                                     "HW State: FAILED.\n");
4713                                 qla82xx_device_state_handler(base_vha);
4714                                 continue;
4715                         }
4716
4717                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4718                                 &base_vha->dpc_flags)) {
4719
4720                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4721                                     "FCoE context reset scheduled.\n");
4722                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4723                                         &base_vha->dpc_flags))) {
4724                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4725                                                 /* FCoE-ctx reset failed.
4726                                                  * Escalate to chip-reset
4727                                                  */
4728                                                 set_bit(ISP_ABORT_NEEDED,
4729                                                         &base_vha->dpc_flags);
4730                                         }
4731                                         clear_bit(ABORT_ISP_ACTIVE,
4732                                                 &base_vha->dpc_flags);
4733                                 }
4734
4735                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4736                                     "FCoE context reset end.\n");
4737                         }
4738                 } else if (IS_QLAFX00(ha)) {
4739                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4740                                 &base_vha->dpc_flags)) {
4741                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4742                                     "Firmware Reset Recovery\n");
4743                                 if (qlafx00_reset_initialize(base_vha)) {
4744                                         /* Failed. Abort isp later. */
4745                                         if (!test_bit(UNLOADING,
4746                                             &base_vha->dpc_flags))
4747                                                 set_bit(ISP_UNRECOVERABLE,
4748                                                     &base_vha->dpc_flags);
4749                                                 ql_dbg(ql_dbg_dpc, base_vha,
4750                                                     0x4021,
4751                                                     "Reset Recovery Failed\n");
4752                                 }
4753                         }
4754
4755                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4756                                 &base_vha->dpc_flags)) {
4757                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4758                                     "ISPFx00 Target Scan scheduled\n");
4759                                 if (qlafx00_rescan_isp(base_vha)) {
4760                                         if (!test_bit(UNLOADING,
4761                                             &base_vha->dpc_flags))
4762                                                 set_bit(ISP_UNRECOVERABLE,
4763                                                     &base_vha->dpc_flags);
4764                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4765                                             "ISPFx00 Target Scan Failed\n");
4766                                 }
4767                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4768                                     "ISPFx00 Target Scan End\n");
4769                         }
4770                 }
4771
4772                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4773                                                 &base_vha->dpc_flags)) {
4774
4775                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4776                             "ISP abort scheduled.\n");
4777                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4778                             &base_vha->dpc_flags))) {
4779
4780                                 if (ha->isp_ops->abort_isp(base_vha)) {
4781                                         /* failed. retry later */
4782                                         set_bit(ISP_ABORT_NEEDED,
4783                                             &base_vha->dpc_flags);
4784                                 }
4785                                 clear_bit(ABORT_ISP_ACTIVE,
4786                                                 &base_vha->dpc_flags);
4787                         }
4788
4789                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4790                             "ISP abort end.\n");
4791                 }
4792
4793                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4794                     &base_vha->dpc_flags)) {
4795                         qla2x00_update_fcports(base_vha);
4796                 }
4797
4798                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4799                         int ret;
4800                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4801                         if (ret != QLA_SUCCESS)
4802                                 ql_log(ql_log_warn, base_vha, 0x121,
4803                                     "Failed to enable receiving of RSCN "
4804                                     "requests: 0x%x.\n", ret);
4805                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4806                 }
4807
4808                 if (IS_QLAFX00(ha))
4809                         goto loop_resync_check;
4810
4811                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4812                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4813                             "Quiescence mode scheduled.\n");
4814                         if (IS_QLA82XX(ha)) {
4815                                 qla82xx_device_state_handler(base_vha);
4816                                 clear_bit(ISP_QUIESCE_NEEDED,
4817                                     &base_vha->dpc_flags);
4818                                 if (!ha->flags.quiesce_owner) {
4819                                         qla2x00_perform_loop_resync(base_vha);
4820
4821                                         qla82xx_idc_lock(ha);
4822                                         qla82xx_clear_qsnt_ready(base_vha);
4823                                         qla82xx_idc_unlock(ha);
4824                                 }
4825                         } else {
4826                                 clear_bit(ISP_QUIESCE_NEEDED,
4827                                     &base_vha->dpc_flags);
4828                                 qla2x00_quiesce_io(base_vha);
4829                         }
4830                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4831                             "Quiescence mode end.\n");
4832                 }
4833
4834                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4835                                 &base_vha->dpc_flags) &&
4836                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4837
4838                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4839                             "Reset marker scheduled.\n");
4840                         qla2x00_rst_aen(base_vha);
4841                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4842                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4843                             "Reset marker end.\n");
4844                 }
4845
4846                 /* Retry each device up to login retry count */
4847                 if ((test_and_clear_bit(RELOGIN_NEEDED,
4848                                                 &base_vha->dpc_flags)) &&
4849                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
4850                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
4851
4852                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
4853                             "Relogin scheduled.\n");
4854                         qla2x00_relogin(base_vha);
4855                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
4856                             "Relogin end.\n");
4857                 }
4858 loop_resync_check:
4859                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4860                     &base_vha->dpc_flags)) {
4861
4862                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
4863                             "Loop resync scheduled.\n");
4864
4865                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4866                             &base_vha->dpc_flags))) {
4867
4868                                 rval = qla2x00_loop_resync(base_vha);
4869
4870                                 clear_bit(LOOP_RESYNC_ACTIVE,
4871                                                 &base_vha->dpc_flags);
4872                         }
4873
4874                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
4875                             "Loop resync end.\n");
4876                 }
4877
4878                 if (IS_QLAFX00(ha))
4879                         goto intr_on_check;
4880
4881                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
4882                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
4883                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
4884                         qla2xxx_flash_npiv_conf(base_vha);
4885                 }
4886
4887                 if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH,
4888                     &base_vha->dpc_flags)) {
4889                         /* Prevents simultaneous ramp up and down */
4890                         clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
4891                             &base_vha->dpc_flags);
4892                         qla2x00_host_ramp_down_queuedepth(base_vha);
4893                 }
4894
4895                 if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
4896                     &base_vha->dpc_flags))
4897                         qla2x00_host_ramp_up_queuedepth(base_vha);
4898 intr_on_check:
4899                 if (!ha->interrupts_on)
4900                         ha->isp_ops->enable_intrs(ha);
4901
4902                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
4903                                         &base_vha->dpc_flags))
4904                         ha->isp_ops->beacon_blink(base_vha);
4905
4906                 if (!IS_QLAFX00(ha))
4907                         qla2x00_do_dpc_all_vps(base_vha);
4908
4909                 ha->dpc_active = 0;
4910 end_loop:
4911                 set_current_state(TASK_INTERRUPTIBLE);
4912         } /* End of while(1) */
4913         __set_current_state(TASK_RUNNING);
4914
4915         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
4916             "DPC handler exiting.\n");
4917
4918         /*
4919          * Make sure that nobody tries to wake us up again.
4920          */
4921         ha->dpc_active = 0;
4922
4923         /* Cleanup any residual CTX SRBs. */
4924         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4925
4926         return 0;
4927 }
4928
4929 void
4930 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4931 {
4932         struct qla_hw_data *ha = vha->hw;
4933         struct task_struct *t = ha->dpc_thread;
4934
4935         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4936                 wake_up_process(t);
4937 }
4938
4939 /*
4940 *  qla2x00_rst_aen
4941 *      Processes asynchronous reset.
4942 *
4943 * Input:
4944 *      ha  = adapter block pointer.
4945 */
4946 static void
4947 qla2x00_rst_aen(scsi_qla_host_t *vha)
4948 {
4949         if (vha->flags.online && !vha->flags.reset_active &&
4950             !atomic_read(&vha->loop_down_timer) &&
4951             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
4952                 do {
4953                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4954
4955                         /*
4956                          * Issue marker command only when we are going to start
4957                          * the I/O.
4958                          */
4959                         vha->marker_needed = 1;
4960                 } while (!atomic_read(&vha->loop_down_timer) &&
4961                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
4962         }
4963 }
4964
4965 /**************************************************************************
4966 *   qla2x00_timer
4967 *
4968 * Description:
4969 *   One second timer
4970 *
4971 * Context: Interrupt
4972 ***************************************************************************/
4973 void
4974 qla2x00_timer(scsi_qla_host_t *vha)
4975 {
4976         unsigned long   cpu_flags = 0;
4977         int             start_dpc = 0;
4978         int             index;
4979         srb_t           *sp;
4980         uint16_t        w;
4981         struct qla_hw_data *ha = vha->hw;
4982         struct req_que *req;
4983
4984         if (ha->flags.eeh_busy) {
4985                 ql_dbg(ql_dbg_timer, vha, 0x6000,
4986                     "EEH = %d, restarting timer.\n",
4987                     ha->flags.eeh_busy);
4988                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
4989                 return;
4990         }
4991
4992         /* Hardware read to raise pending EEH errors during mailbox waits. */
4993         if (!pci_channel_offline(ha->pdev))
4994                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
4995
4996         /* Make sure qla82xx_watchdog is run only for physical port */
4997         if (!vha->vp_idx && IS_QLA82XX(ha)) {
4998                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
4999                         start_dpc++;
5000                 qla82xx_watchdog(vha);
5001         }
5002
5003         if (!vha->vp_idx && IS_QLAFX00(ha))
5004                 qlafx00_timer_routine(vha);
5005
5006         /* Loop down handler. */
5007         if (atomic_read(&vha->loop_down_timer) > 0 &&
5008             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5009             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5010                 && vha->flags.online) {
5011
5012                 if (atomic_read(&vha->loop_down_timer) ==
5013                     vha->loop_down_abort_time) {
5014
5015                         ql_log(ql_log_info, vha, 0x6008,
5016                             "Loop down - aborting the queues before time expires.\n");
5017
5018                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5019                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5020
5021                         /*
5022                          * Schedule an ISP abort to return any FCP2-device
5023                          * commands.
5024                          */
5025                         /* NPIV - scan physical port only */
5026                         if (!vha->vp_idx) {
5027                                 spin_lock_irqsave(&ha->hardware_lock,
5028                                     cpu_flags);
5029                                 req = ha->req_q_map[0];
5030                                 for (index = 1;
5031                                     index < req->num_outstanding_cmds;
5032                                     index++) {
5033                                         fc_port_t *sfcp;
5034
5035                                         sp = req->outstanding_cmds[index];
5036                                         if (!sp)
5037                                                 continue;
5038                                         if (sp->type != SRB_SCSI_CMD)
5039                                                 continue;
5040                                         sfcp = sp->fcport;
5041                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5042                                                 continue;
5043
5044                                         if (IS_QLA82XX(ha))
5045                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5046                                                         &vha->dpc_flags);
5047                                         else
5048                                                 set_bit(ISP_ABORT_NEEDED,
5049                                                         &vha->dpc_flags);
5050                                         break;
5051                                 }
5052                                 spin_unlock_irqrestore(&ha->hardware_lock,
5053                                                                 cpu_flags);
5054                         }
5055                         start_dpc++;
5056                 }
5057
5058                 /* if the loop has been down for 4 minutes, reinit adapter */
5059                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5060                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5061                                 ql_log(ql_log_warn, vha, 0x6009,
5062                                     "Loop down - aborting ISP.\n");
5063
5064                                 if (IS_QLA82XX(ha))
5065                                         set_bit(FCOE_CTX_RESET_NEEDED,
5066                                                 &vha->dpc_flags);
5067                                 else
5068                                         set_bit(ISP_ABORT_NEEDED,
5069                                                 &vha->dpc_flags);
5070                         }
5071                 }
5072                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5073                     "Loop down - seconds remaining %d.\n",
5074                     atomic_read(&vha->loop_down_timer));
5075         }
5076
5077         /* Check if beacon LED needs to be blinked for physical host only */
5078         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5079                 /* There is no beacon_blink function for ISP82xx */
5080                 if (!IS_QLA82XX(ha)) {
5081                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5082                         start_dpc++;
5083                 }
5084         }
5085
5086         /* Process any deferred work. */
5087         if (!list_empty(&vha->work_list))
5088                 start_dpc++;
5089
5090         /* Schedule the DPC routine if needed */
5091         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5092             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5093             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5094             start_dpc ||
5095             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5096             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5097             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5098             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5099             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5100             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
5101             test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags) ||
5102             test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags))) {
5103                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5104                     "isp_abort_needed=%d loop_resync_needed=%d "
5105                     "fcport_update_needed=%d start_dpc=%d "
5106                     "reset_marker_needed=%d",
5107                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5108                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5109                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5110                     start_dpc,
5111                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5112                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5113                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5114                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5115                     "relogin_needed=%d, host_ramp_down_needed=%d "
5116                     "host_ramp_up_needed=%d.\n",
5117                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5118                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5119                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5120                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5121                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
5122                     test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags),
5123                     test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags));
5124                 qla2xxx_wake_dpc(vha);
5125         }
5126
5127         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5128 }
5129
5130 /* Firmware interface routines. */
5131
5132 #define FW_BLOBS        10
5133 #define FW_ISP21XX      0
5134 #define FW_ISP22XX      1
5135 #define FW_ISP2300      2
5136 #define FW_ISP2322      3
5137 #define FW_ISP24XX      4
5138 #define FW_ISP25XX      5
5139 #define FW_ISP81XX      6
5140 #define FW_ISP82XX      7
5141 #define FW_ISP2031      8
5142 #define FW_ISP8031      9
5143
5144 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5145 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5146 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5147 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5148 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5149 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5150 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5151 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5152 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5153 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5154
5155 static DEFINE_MUTEX(qla_fw_lock);
5156
5157 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5158         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5159         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5160         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5161         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5162         { .name = FW_FILE_ISP24XX, },
5163         { .name = FW_FILE_ISP25XX, },
5164         { .name = FW_FILE_ISP81XX, },
5165         { .name = FW_FILE_ISP82XX, },
5166         { .name = FW_FILE_ISP2031, },
5167         { .name = FW_FILE_ISP8031, },
5168 };
5169
5170 struct fw_blob *
5171 qla2x00_request_firmware(scsi_qla_host_t *vha)
5172 {
5173         struct qla_hw_data *ha = vha->hw;
5174         struct fw_blob *blob;
5175
5176         if (IS_QLA2100(ha)) {
5177                 blob = &qla_fw_blobs[FW_ISP21XX];
5178         } else if (IS_QLA2200(ha)) {
5179                 blob = &qla_fw_blobs[FW_ISP22XX];
5180         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5181                 blob = &qla_fw_blobs[FW_ISP2300];
5182         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5183                 blob = &qla_fw_blobs[FW_ISP2322];
5184         } else if (IS_QLA24XX_TYPE(ha)) {
5185                 blob = &qla_fw_blobs[FW_ISP24XX];
5186         } else if (IS_QLA25XX(ha)) {
5187                 blob = &qla_fw_blobs[FW_ISP25XX];
5188         } else if (IS_QLA81XX(ha)) {
5189                 blob = &qla_fw_blobs[FW_ISP81XX];
5190         } else if (IS_QLA82XX(ha)) {
5191                 blob = &qla_fw_blobs[FW_ISP82XX];
5192         } else if (IS_QLA2031(ha)) {
5193                 blob = &qla_fw_blobs[FW_ISP2031];
5194         } else if (IS_QLA8031(ha)) {
5195                 blob = &qla_fw_blobs[FW_ISP8031];
5196         } else {
5197                 return NULL;
5198         }
5199
5200         mutex_lock(&qla_fw_lock);
5201         if (blob->fw)
5202                 goto out;
5203
5204         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5205                 ql_log(ql_log_warn, vha, 0x0063,
5206                     "Failed to load firmware image (%s).\n", blob->name);
5207                 blob->fw = NULL;
5208                 blob = NULL;
5209                 goto out;
5210         }
5211
5212 out:
5213         mutex_unlock(&qla_fw_lock);
5214         return blob;
5215 }
5216
5217 static void
5218 qla2x00_release_firmware(void)
5219 {
5220         int idx;
5221
5222         mutex_lock(&qla_fw_lock);
5223         for (idx = 0; idx < FW_BLOBS; idx++)
5224                 release_firmware(qla_fw_blobs[idx].fw);
5225         mutex_unlock(&qla_fw_lock);
5226 }
5227
5228 static pci_ers_result_t
5229 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5230 {
5231         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5232         struct qla_hw_data *ha = vha->hw;
5233
5234         ql_dbg(ql_dbg_aer, vha, 0x9000,
5235             "PCI error detected, state %x.\n", state);
5236
5237         switch (state) {
5238         case pci_channel_io_normal:
5239                 ha->flags.eeh_busy = 0;
5240                 return PCI_ERS_RESULT_CAN_RECOVER;
5241         case pci_channel_io_frozen:
5242                 ha->flags.eeh_busy = 1;
5243                 /* For ISP82XX complete any pending mailbox cmd */
5244                 if (IS_QLA82XX(ha)) {
5245                         ha->flags.isp82xx_fw_hung = 1;
5246                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5247                         qla82xx_clear_pending_mbx(vha);
5248                 }
5249                 qla2x00_free_irqs(vha);
5250                 pci_disable_device(pdev);
5251                 /* Return back all IOs */
5252                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5253                 return PCI_ERS_RESULT_NEED_RESET;
5254         case pci_channel_io_perm_failure:
5255                 ha->flags.pci_channel_io_perm_failure = 1;
5256                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5257                 return PCI_ERS_RESULT_DISCONNECT;
5258         }
5259         return PCI_ERS_RESULT_NEED_RESET;
5260 }
5261
5262 static pci_ers_result_t
5263 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5264 {
5265         int risc_paused = 0;
5266         uint32_t stat;
5267         unsigned long flags;
5268         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5269         struct qla_hw_data *ha = base_vha->hw;
5270         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5271         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5272
5273         if (IS_QLA82XX(ha))
5274                 return PCI_ERS_RESULT_RECOVERED;
5275
5276         spin_lock_irqsave(&ha->hardware_lock, flags);
5277         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5278                 stat = RD_REG_DWORD(&reg->hccr);
5279                 if (stat & HCCR_RISC_PAUSE)
5280                         risc_paused = 1;
5281         } else if (IS_QLA23XX(ha)) {
5282                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5283                 if (stat & HSR_RISC_PAUSED)
5284                         risc_paused = 1;
5285         } else if (IS_FWI2_CAPABLE(ha)) {
5286                 stat = RD_REG_DWORD(&reg24->host_status);
5287                 if (stat & HSRX_RISC_PAUSED)
5288                         risc_paused = 1;
5289         }
5290         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5291
5292         if (risc_paused) {
5293                 ql_log(ql_log_info, base_vha, 0x9003,
5294                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5295                 ha->isp_ops->fw_dump(base_vha, 0);
5296
5297                 return PCI_ERS_RESULT_NEED_RESET;
5298         } else
5299                 return PCI_ERS_RESULT_RECOVERED;
5300 }
5301
5302 static uint32_t
5303 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5304 {
5305         uint32_t rval = QLA_FUNCTION_FAILED;
5306         uint32_t drv_active = 0;
5307         struct qla_hw_data *ha = base_vha->hw;
5308         int fn;
5309         struct pci_dev *other_pdev = NULL;
5310
5311         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5312             "Entered %s.\n", __func__);
5313
5314         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5315
5316         if (base_vha->flags.online) {
5317                 /* Abort all outstanding commands,
5318                  * so as to be requeued later */
5319                 qla2x00_abort_isp_cleanup(base_vha);
5320         }
5321
5322
5323         fn = PCI_FUNC(ha->pdev->devfn);
5324         while (fn > 0) {
5325                 fn--;
5326                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5327                     "Finding pci device at function = 0x%x.\n", fn);
5328                 other_pdev =
5329                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5330                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5331                     fn));
5332
5333                 if (!other_pdev)
5334                         continue;
5335                 if (atomic_read(&other_pdev->enable_cnt)) {
5336                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5337                             "Found PCI func available and enable at 0x%x.\n",
5338                             fn);
5339                         pci_dev_put(other_pdev);
5340                         break;
5341                 }
5342                 pci_dev_put(other_pdev);
5343         }
5344
5345         if (!fn) {
5346                 /* Reset owner */
5347                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5348                     "This devfn is reset owner = 0x%x.\n",
5349                     ha->pdev->devfn);
5350                 qla82xx_idc_lock(ha);
5351
5352                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5353                     QLA8XXX_DEV_INITIALIZING);
5354
5355                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5356                     QLA82XX_IDC_VERSION);
5357
5358                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5359                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5360                     "drv_active = 0x%x.\n", drv_active);
5361
5362                 qla82xx_idc_unlock(ha);
5363                 /* Reset if device is not already reset
5364                  * drv_active would be 0 if a reset has already been done
5365                  */
5366                 if (drv_active)
5367                         rval = qla82xx_start_firmware(base_vha);
5368                 else
5369                         rval = QLA_SUCCESS;
5370                 qla82xx_idc_lock(ha);
5371
5372                 if (rval != QLA_SUCCESS) {
5373                         ql_log(ql_log_info, base_vha, 0x900b,
5374                             "HW State: FAILED.\n");
5375                         qla82xx_clear_drv_active(ha);
5376                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5377                             QLA8XXX_DEV_FAILED);
5378                 } else {
5379                         ql_log(ql_log_info, base_vha, 0x900c,
5380                             "HW State: READY.\n");
5381                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5382                             QLA8XXX_DEV_READY);
5383                         qla82xx_idc_unlock(ha);
5384                         ha->flags.isp82xx_fw_hung = 0;
5385                         rval = qla82xx_restart_isp(base_vha);
5386                         qla82xx_idc_lock(ha);
5387                         /* Clear driver state register */
5388                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5389                         qla82xx_set_drv_active(base_vha);
5390                 }
5391                 qla82xx_idc_unlock(ha);
5392         } else {
5393                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5394                     "This devfn is not reset owner = 0x%x.\n",
5395                     ha->pdev->devfn);
5396                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5397                     QLA8XXX_DEV_READY)) {
5398                         ha->flags.isp82xx_fw_hung = 0;
5399                         rval = qla82xx_restart_isp(base_vha);
5400                         qla82xx_idc_lock(ha);
5401                         qla82xx_set_drv_active(base_vha);
5402                         qla82xx_idc_unlock(ha);
5403                 }
5404         }
5405         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5406
5407         return rval;
5408 }
5409
5410 static pci_ers_result_t
5411 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5412 {
5413         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5414         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5415         struct qla_hw_data *ha = base_vha->hw;
5416         struct rsp_que *rsp;
5417         int rc, retries = 10;
5418
5419         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5420             "Slot Reset.\n");
5421
5422         /* Workaround: qla2xxx driver which access hardware earlier
5423          * needs error state to be pci_channel_io_online.
5424          * Otherwise mailbox command timesout.
5425          */
5426         pdev->error_state = pci_channel_io_normal;
5427
5428         pci_restore_state(pdev);
5429
5430         /* pci_restore_state() clears the saved_state flag of the device
5431          * save restored state which resets saved_state flag
5432          */
5433         pci_save_state(pdev);
5434
5435         if (ha->mem_only)
5436                 rc = pci_enable_device_mem(pdev);
5437         else
5438                 rc = pci_enable_device(pdev);
5439
5440         if (rc) {
5441                 ql_log(ql_log_warn, base_vha, 0x9005,
5442                     "Can't re-enable PCI device after reset.\n");
5443                 goto exit_slot_reset;
5444         }
5445
5446         rsp = ha->rsp_q_map[0];
5447         if (qla2x00_request_irqs(ha, rsp))
5448                 goto exit_slot_reset;
5449
5450         if (ha->isp_ops->pci_config(base_vha))
5451                 goto exit_slot_reset;
5452
5453         if (IS_QLA82XX(ha)) {
5454                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5455                         ret = PCI_ERS_RESULT_RECOVERED;
5456                         goto exit_slot_reset;
5457                 } else
5458                         goto exit_slot_reset;
5459         }
5460
5461         while (ha->flags.mbox_busy && retries--)
5462                 msleep(1000);
5463
5464         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5465         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5466                 ret =  PCI_ERS_RESULT_RECOVERED;
5467         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5468
5469
5470 exit_slot_reset:
5471         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5472             "slot_reset return %x.\n", ret);
5473
5474         return ret;
5475 }
5476
5477 static void
5478 qla2xxx_pci_resume(struct pci_dev *pdev)
5479 {
5480         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5481         struct qla_hw_data *ha = base_vha->hw;
5482         int ret;
5483
5484         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5485             "pci_resume.\n");
5486
5487         ret = qla2x00_wait_for_hba_online(base_vha);
5488         if (ret != QLA_SUCCESS) {
5489                 ql_log(ql_log_fatal, base_vha, 0x9002,
5490                     "The device failed to resume I/O from slot/link_reset.\n");
5491         }
5492
5493         pci_cleanup_aer_uncorrect_error_status(pdev);
5494
5495         ha->flags.eeh_busy = 0;
5496 }
5497
5498 static const struct pci_error_handlers qla2xxx_err_handler = {
5499         .error_detected = qla2xxx_pci_error_detected,
5500         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5501         .slot_reset = qla2xxx_pci_slot_reset,
5502         .resume = qla2xxx_pci_resume,
5503 };
5504
5505 static struct pci_device_id qla2xxx_pci_tbl[] = {
5506         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5507         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5508         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5509         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5510         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5511         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5512         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5513         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5514         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5515         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5516         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5517         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5518         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5519         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5520         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5521         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5522         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5523         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5524         { 0 },
5525 };
5526 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5527
5528 static struct pci_driver qla2xxx_pci_driver = {
5529         .name           = QLA2XXX_DRIVER_NAME,
5530         .driver         = {
5531                 .owner          = THIS_MODULE,
5532         },
5533         .id_table       = qla2xxx_pci_tbl,
5534         .probe          = qla2x00_probe_one,
5535         .remove         = qla2x00_remove_one,
5536         .shutdown       = qla2x00_shutdown,
5537         .err_handler    = &qla2xxx_err_handler,
5538 };
5539
5540 static const struct file_operations apidev_fops = {
5541         .owner = THIS_MODULE,
5542         .llseek = noop_llseek,
5543 };
5544
5545 /**
5546  * qla2x00_module_init - Module initialization.
5547  **/
5548 static int __init
5549 qla2x00_module_init(void)
5550 {
5551         int ret = 0;
5552
5553         /* Allocate cache for SRBs. */
5554         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5555             SLAB_HWCACHE_ALIGN, NULL);
5556         if (srb_cachep == NULL) {
5557                 ql_log(ql_log_fatal, NULL, 0x0001,
5558                     "Unable to allocate SRB cache...Failing load!.\n");
5559                 return -ENOMEM;
5560         }
5561
5562         /* Initialize target kmem_cache and mem_pools */
5563         ret = qlt_init();
5564         if (ret < 0) {
5565                 kmem_cache_destroy(srb_cachep);
5566                 return ret;
5567         } else if (ret > 0) {
5568                 /*
5569                  * If initiator mode is explictly disabled by qlt_init(),
5570                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5571                  * performing scsi_scan_target() during LOOP UP event.
5572                  */
5573                 qla2xxx_transport_functions.disable_target_scan = 1;
5574                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5575         }
5576
5577         /* Derive version string. */
5578         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5579         if (ql2xextended_error_logging)
5580                 strcat(qla2x00_version_str, "-debug");
5581
5582         qla2xxx_transport_template =
5583             fc_attach_transport(&qla2xxx_transport_functions);
5584         if (!qla2xxx_transport_template) {
5585                 kmem_cache_destroy(srb_cachep);
5586                 ql_log(ql_log_fatal, NULL, 0x0002,
5587                     "fc_attach_transport failed...Failing load!.\n");
5588                 qlt_exit();
5589                 return -ENODEV;
5590         }
5591
5592         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5593         if (apidev_major < 0) {
5594                 ql_log(ql_log_fatal, NULL, 0x0003,
5595                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5596         }
5597
5598         qla2xxx_transport_vport_template =
5599             fc_attach_transport(&qla2xxx_transport_vport_functions);
5600         if (!qla2xxx_transport_vport_template) {
5601                 kmem_cache_destroy(srb_cachep);
5602                 qlt_exit();
5603                 fc_release_transport(qla2xxx_transport_template);
5604                 ql_log(ql_log_fatal, NULL, 0x0004,
5605                     "fc_attach_transport vport failed...Failing load!.\n");
5606                 return -ENODEV;
5607         }
5608         ql_log(ql_log_info, NULL, 0x0005,
5609             "QLogic Fibre Channel HBA Driver: %s.\n",
5610             qla2x00_version_str);
5611         ret = pci_register_driver(&qla2xxx_pci_driver);
5612         if (ret) {
5613                 kmem_cache_destroy(srb_cachep);
5614                 qlt_exit();
5615                 fc_release_transport(qla2xxx_transport_template);
5616                 fc_release_transport(qla2xxx_transport_vport_template);
5617                 ql_log(ql_log_fatal, NULL, 0x0006,
5618                     "pci_register_driver failed...ret=%d Failing load!.\n",
5619                     ret);
5620         }
5621         return ret;
5622 }
5623
5624 /**
5625  * qla2x00_module_exit - Module cleanup.
5626  **/
5627 static void __exit
5628 qla2x00_module_exit(void)
5629 {
5630         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5631         pci_unregister_driver(&qla2xxx_pci_driver);
5632         qla2x00_release_firmware();
5633         kmem_cache_destroy(srb_cachep);
5634         qlt_exit();
5635         if (ctx_cachep)
5636                 kmem_cache_destroy(ctx_cachep);
5637         fc_release_transport(qla2xxx_transport_template);
5638         fc_release_transport(qla2xxx_transport_vport_template);
5639 }
5640
5641 module_init(qla2x00_module_init);
5642 module_exit(qla2x00_module_exit);
5643
5644 MODULE_AUTHOR("QLogic Corporation");
5645 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5646 MODULE_LICENSE("GPL");
5647 MODULE_VERSION(QLA2XXX_VERSION);
5648 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5649 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5650 MODULE_FIRMWARE(FW_FILE_ISP2300);
5651 MODULE_FIRMWARE(FW_FILE_ISP2322);
5652 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5653 MODULE_FIRMWARE(FW_FILE_ISP25XX);