drivers/scsi/ufs/ufshcd.c

   1 /*
   2  * Universal Flash Storage Host controller driver Core
   3  *
   4  * This code is based on drivers/scsi/ufs/ufshcd.c
   5  * Copyright (C) 2011-2013 Samsung India Software Operations
   6  * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
   7  *
   8  * Authors:
   9  *      Santosh Yaraganavi <santosh.sy@samsung.com>
  10  *      Vinayak Holikatti <h.vinayak@samsung.com>
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  * See the COPYING file in the top-level directory or visit
  17  * <http://www.gnu.org/licenses/gpl-2.0.html>
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * This program is provided "AS IS" and "WITH ALL FAULTS" and
  25  * without warranty of any kind. You are solely responsible for
  26  * determining the appropriateness of using and distributing
  27  * the program and assume all risks associated with your exercise
  28  * of rights with respect to the program, including but not limited
  29  * to infringement of third party rights, the risks and costs of
  30  * program errors, damage to or loss of data, programs or equipment,
  31  * and unavailability or interruption of operations. Under no
  32  * circumstances will the contributor of this Program be liable for
  33  * any damages of any kind arising from your use or distribution of
  34  * this program.
  35  *
  36  * The Linux Foundation chooses to take subject only to the GPLv2
  37  * license terms, and distributes only under these terms.
  38  */
  39
  40 #include <linux/async.h>
  41 #include <linux/devfreq.h>
  42 #include <linux/nls.h>
  43 #include <linux/of.h>
  44 #include <linux/bitfield.h>
  45 #include "ufshcd.h"
  46 #include "ufs_quirks.h"
  47 #include "unipro.h"
  48 #include "ufs-sysfs.h"
  49 #include "ufs_bsg.h"
  50
  51 #define CREATE_TRACE_POINTS
  52 #include <trace/events/ufs.h>
  53
  54 #define UFSHCD_ENABLE_INTRS     (UTP_TRANSFER_REQ_COMPL |\
  55                                  UTP_TASK_REQ_COMPL |\
  56                                  UFSHCD_ERROR_MASK)
  57 /* UIC command timeout, unit: ms */
  58 #define UIC_CMD_TIMEOUT 500
  59
  60 /* NOP OUT retries waiting for NOP IN response */
  61 #define NOP_OUT_RETRIES    10
  62 /* Timeout after 30 msecs if NOP OUT hangs without response */
  63 #define NOP_OUT_TIMEOUT    30 /* msecs */
  64
  65 /* Query request retries */
  66 #define QUERY_REQ_RETRIES 3
  67 /* Query request timeout */
  68 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
  69
  70 /* Task management command timeout */
  71 #define TM_CMD_TIMEOUT  100 /* msecs */
  72
  73 /* maximum number of retries for a general UIC command  */
  74 #define UFS_UIC_COMMAND_RETRIES 3
  75
  76 /* maximum number of link-startup retries */
  77 #define DME_LINKSTARTUP_RETRIES 3
  78
  79 /* Maximum retries for Hibern8 enter */
  80 #define UIC_HIBERN8_ENTER_RETRIES 3
  81
  82 /* maximum number of reset retries before giving up */
  83 #define MAX_HOST_RESET_RETRIES 5
  84
  85 /* Expose the flag value from utp_upiu_query.value */
  86 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  87
  88 /* Interrupt aggregation default timeout, unit: 40us */
  89 #define INT_AGGR_DEF_TO 0x02
  90
  91 #define ufshcd_toggle_vreg(_dev, _vreg, _on)                            \
  92         ({                                                              \
  93                 int _ret;                                               \
  94                 if (_on)                                                \
  95                         _ret = ufshcd_enable_vreg(_dev, _vreg);         \
  96                 else                                                    \
  97                         _ret = ufshcd_disable_vreg(_dev, _vreg);        \
  98                 _ret;                                                   \
  99         })
 100
 101 #define ufshcd_hex_dump(prefix_str, buf, len) do {                       \
 102         size_t __len = (len);                                            \
 103         print_hex_dump(KERN_ERR, prefix_str,                             \
 104                        __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
 105                        16, 4, buf, __len, false);                        \
 106 } while (0)
 107
 108 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
 109                      const char *prefix)
 110 {
 111         u32 *regs;
 112         size_t pos;
 113
 114         if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
 115                 return -EINVAL;
 116
 117         regs = kzalloc(len, GFP_KERNEL);
 118         if (!regs)
 119                 return -ENOMEM;
 120
 121         for (pos = 0; pos < len; pos += 4)
 122                 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
 123
 124         ufshcd_hex_dump(prefix, regs, len);
 125         kfree(regs);
 126
 127         return 0;
 128 }
 129 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
 130
 131 enum {
 132         UFSHCD_MAX_CHANNEL      = 0,
 133         UFSHCD_MAX_ID           = 1,
 134         UFSHCD_CMD_PER_LUN      = 32,
 135         UFSHCD_CAN_QUEUE        = 32,
 136 };
 137
 138 /* UFSHCD states */
 139 enum {
 140         UFSHCD_STATE_RESET,
 141         UFSHCD_STATE_ERROR,
 142         UFSHCD_STATE_OPERATIONAL,
 143         UFSHCD_STATE_EH_SCHEDULED,
 144 };
 145
 146 /* UFSHCD error handling flags */
 147 enum {
 148         UFSHCD_EH_IN_PROGRESS = (1 << 0),
 149 };
 150
 151 /* UFSHCD UIC layer error flags */
 152 enum {
 153         UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
 154         UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
 155         UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
 156         UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
 157         UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
 158         UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
 159 };
 160
 161 #define ufshcd_set_eh_in_progress(h) \
 162         ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
 163 #define ufshcd_eh_in_progress(h) \
 164         ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
 165 #define ufshcd_clear_eh_in_progress(h) \
 166         ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
 167
 168 #define ufshcd_set_ufs_dev_active(h) \
 169         ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
 170 #define ufshcd_set_ufs_dev_sleep(h) \
 171         ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
 172 #define ufshcd_set_ufs_dev_poweroff(h) \
 173         ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
 174 #define ufshcd_is_ufs_dev_active(h) \
 175         ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
 176 #define ufshcd_is_ufs_dev_sleep(h) \
 177         ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
 178 #define ufshcd_is_ufs_dev_poweroff(h) \
 179         ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
 180
 181 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
 182         {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 183         {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 184         {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
 185         {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 186         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
 187         {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
 188 };
 189
 190 static inline enum ufs_dev_pwr_mode
 191 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
 192 {
 193         return ufs_pm_lvl_states[lvl].dev_state;
 194 }
 195
 196 static inline enum uic_link_state
 197 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
 198 {
 199         return ufs_pm_lvl_states[lvl].link_state;
 200 }
 201
 202 static inline enum ufs_pm_level
 203 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
 204                                         enum uic_link_state link_state)
 205 {
 206         enum ufs_pm_level lvl;
 207
 208         for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
 209                 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
 210                         (ufs_pm_lvl_states[lvl].link_state == link_state))
 211                         return lvl;
 212         }
 213
 214         /* if no match found, return the level 0 */
 215         return UFS_PM_LVL_0;
 216 }
 217
 218 static struct ufs_dev_fix ufs_fixups[] = {
 219         /* UFS cards deviations table */
 220         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 221                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 222         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
 223         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 224                 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
 225         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 226                 UFS_DEVICE_NO_FASTAUTO),
 227         UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
 228                 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
 229         UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
 230                 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
 231         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
 232                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 233         UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
 234                 UFS_DEVICE_QUIRK_PA_TACTIVATE),
 235         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL, UFS_DEVICE_NO_VCCQ),
 236         UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
 237                 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
 238         UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
 239                 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
 240
 241         END_FIX
 242 };
 243
 244 static void ufshcd_tmc_handler(struct ufs_hba *hba);
 245 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
 246 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
 247 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
 248 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
 249 static void ufshcd_hba_exit(struct ufs_hba *hba);
 250 static int ufshcd_probe_hba(struct ufs_hba *hba);
 251 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
 252                                  bool skip_ref_clk);
 253 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
 254 static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused);
 255 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
 256 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
 257 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
 258 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
 259 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
 260 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 261 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
 262 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
 263 static irqreturn_t ufshcd_intr(int irq, void *__hba);
 264 static int ufshcd_change_power_mode(struct ufs_hba *hba,
 265                              struct ufs_pa_layer_attr *pwr_mode);
 266 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
 267 {
 268         return tag >= 0 && tag < hba->nutrs;
 269 }
 270
 271 static inline int ufshcd_enable_irq(struct ufs_hba *hba)
 272 {
 273         int ret = 0;
 274
 275         if (!hba->is_irq_enabled) {
 276                 ret = request_irq(hba->irq, ufshcd_intr, IRQF_SHARED, UFSHCD,
 277                                 hba);
 278                 if (ret)
 279                         dev_err(hba->dev, "%s: request_irq failed, ret=%d\n",
 280                                 __func__, ret);
 281                 hba->is_irq_enabled = true;
 282         }
 283
 284         return ret;
 285 }
 286
 287 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
 288 {
 289         if (hba->is_irq_enabled) {
 290                 free_irq(hba->irq, hba);
 291                 hba->is_irq_enabled = false;
 292         }
 293 }
 294
 295 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
 296 {
 297         if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
 298                 scsi_unblock_requests(hba->host);
 299 }
 300
 301 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
 302 {
 303         if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
 304                 scsi_block_requests(hba->host);
 305 }
 306
 307 /* replace non-printable or non-ASCII characters with spaces */
 308 static inline void ufshcd_remove_non_printable(char *val)
 309 {
 310         if (!val)
 311                 return;
 312
 313         if (*val < 0x20 || *val > 0x7e)
 314                 *val = ' ';
 315 }
 316
 317 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 318                 const char *str)
 319 {
 320         struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
 321
 322         trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
 323 }
 324
 325 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 326                 const char *str)
 327 {
 328         struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
 329
 330         trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
 331 }
 332
 333 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
 334                 const char *str)
 335 {
 336         int off = (int)tag - hba->nutrs;
 337         struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
 338
 339         trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
 340                         &descp->input_param1);
 341 }
 342
 343 static void ufshcd_add_command_trace(struct ufs_hba *hba,
 344                 unsigned int tag, const char *str)
 345 {
 346         sector_t lba = -1;
 347         u8 opcode = 0;
 348         u32 intr, doorbell;
 349         struct ufshcd_lrb *lrbp = &hba->lrb[tag];
 350         int transfer_len = -1;
 351
 352         if (!trace_ufshcd_command_enabled()) {
 353                 /* trace UPIU W/O tracing command */
 354                 if (lrbp->cmd)
 355                         ufshcd_add_cmd_upiu_trace(hba, tag, str);
 356                 return;
 357         }
 358
 359         if (lrbp->cmd) { /* data phase exists */
 360                 /* trace UPIU also */
 361                 ufshcd_add_cmd_upiu_trace(hba, tag, str);
 362                 opcode = (u8)(*lrbp->cmd->cmnd);
 363                 if ((opcode == READ_10) || (opcode == WRITE_10)) {
 364                         /*
 365                          * Currently we only fully trace read(10) and write(10)
 366                          * commands
 367                          */
 368                         if (lrbp->cmd->request && lrbp->cmd->request->bio)
 369                                 lba =
 370                                   lrbp->cmd->request->bio->bi_iter.bi_sector;
 371                         transfer_len = be32_to_cpu(
 372                                 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
 373                 }
 374         }
 375
 376         intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
 377         doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
 378         trace_ufshcd_command(dev_name(hba->dev), str, tag,
 379                                 doorbell, transfer_len, intr, lba, opcode);
 380 }
 381
 382 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
 383 {
 384         struct ufs_clk_info *clki;
 385         struct list_head *head = &hba->clk_list_head;
 386
 387         if (list_empty(head))
 388                 return;
 389
 390         list_for_each_entry(clki, head, list) {
 391                 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
 392                                 clki->max_freq)
 393                         dev_err(hba->dev, "clk: %s, rate: %u\n",
 394                                         clki->name, clki->curr_freq);
 395         }
 396 }
 397
 398 static void ufshcd_print_uic_err_hist(struct ufs_hba *hba,
 399                 struct ufs_uic_err_reg_hist *err_hist, char *err_name)
 400 {
 401         int i;
 402
 403         for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) {
 404                 int p = (i + err_hist->pos - 1) % UIC_ERR_REG_HIST_LENGTH;
 405
 406                 if (err_hist->reg[p] == 0)
 407                         continue;
 408                 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i,
 409                         err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
 410         }
 411 }
 412
 413 static void ufshcd_print_host_regs(struct ufs_hba *hba)
 414 {
 415         ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
 416         dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
 417                 hba->ufs_version, hba->capabilities);
 418         dev_err(hba->dev,
 419                 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
 420                 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
 421         dev_err(hba->dev,
 422                 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
 423                 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
 424                 hba->ufs_stats.hibern8_exit_cnt);
 425
 426         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
 427         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
 428         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
 429         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
 430         ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
 431
 432         ufshcd_print_clk_freqs(hba);
 433
 434         if (hba->vops && hba->vops->dbg_register_dump)
 435                 hba->vops->dbg_register_dump(hba);
 436 }
 437
 438 static
 439 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
 440 {
 441         struct ufshcd_lrb *lrbp;
 442         int prdt_length;
 443         int tag;
 444
 445         for_each_set_bit(tag, &bitmap, hba->nutrs) {
 446                 lrbp = &hba->lrb[tag];
 447
 448                 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
 449                                 tag, ktime_to_us(lrbp->issue_time_stamp));
 450                 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
 451                                 tag, ktime_to_us(lrbp->compl_time_stamp));
 452                 dev_err(hba->dev,
 453                         "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
 454                         tag, (u64)lrbp->utrd_dma_addr);
 455
 456                 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
 457                                 sizeof(struct utp_transfer_req_desc));
 458                 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
 459                         (u64)lrbp->ucd_req_dma_addr);
 460                 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
 461                                 sizeof(struct utp_upiu_req));
 462                 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
 463                         (u64)lrbp->ucd_rsp_dma_addr);
 464                 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
 465                                 sizeof(struct utp_upiu_rsp));
 466
 467                 prdt_length = le16_to_cpu(
 468                         lrbp->utr_descriptor_ptr->prd_table_length);
 469                 dev_err(hba->dev,
 470                         "UPIU[%d] - PRDT - %d entries  phys@0x%llx\n",
 471                         tag, prdt_length,
 472                         (u64)lrbp->ucd_prdt_dma_addr);
 473
 474                 if (pr_prdt)
 475                         ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
 476                                 sizeof(struct ufshcd_sg_entry) * prdt_length);
 477         }
 478 }
 479
 480 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
 481 {
 482         int tag;
 483
 484         for_each_set_bit(tag, &bitmap, hba->nutmrs) {
 485                 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
 486
 487                 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
 488                 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
 489         }
 490 }
 491
 492 static void ufshcd_print_host_state(struct ufs_hba *hba)
 493 {
 494         dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
 495         dev_err(hba->dev, "lrb in use=0x%lx, outstanding reqs=0x%lx tasks=0x%lx\n",
 496                 hba->lrb_in_use, hba->outstanding_reqs, hba->outstanding_tasks);
 497         dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
 498                 hba->saved_err, hba->saved_uic_err);
 499         dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
 500                 hba->curr_dev_pwr_mode, hba->uic_link_state);
 501         dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
 502                 hba->pm_op_in_progress, hba->is_sys_suspended);
 503         dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
 504                 hba->auto_bkops_enabled, hba->host->host_self_blocked);
 505         dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
 506         dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
 507                 hba->eh_flags, hba->req_abort_count);
 508         dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
 509                 hba->capabilities, hba->caps);
 510         dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
 511                 hba->dev_quirks);
 512 }
 513
 514 /**
 515  * ufshcd_print_pwr_info - print power params as saved in hba
 516  * power info
 517  * @hba: per-adapter instance
 518  */
 519 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
 520 {
 521         static const char * const names[] = {
 522                 "INVALID MODE",
 523                 "FAST MODE",
 524                 "SLOW_MODE",
 525                 "INVALID MODE",
 526                 "FASTAUTO_MODE",
 527                 "SLOWAUTO_MODE",
 528                 "INVALID MODE",
 529         };
 530
 531         dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
 532                  __func__,
 533                  hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
 534                  hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
 535                  names[hba->pwr_info.pwr_rx],
 536                  names[hba->pwr_info.pwr_tx],
 537                  hba->pwr_info.hs_rate);
 538 }
 539
 540 /*
 541  * ufshcd_wait_for_register - wait for register value to change
 542  * @hba - per-adapter interface
 543  * @reg - mmio register offset
 544  * @mask - mask to apply to read register value
 545  * @val - wait condition
 546  * @interval_us - polling interval in microsecs
 547  * @timeout_ms - timeout in millisecs
 548  * @can_sleep - perform sleep or just spin
 549  *
 550  * Returns -ETIMEDOUT on error, zero on success
 551  */
 552 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
 553                                 u32 val, unsigned long interval_us,
 554                                 unsigned long timeout_ms, bool can_sleep)
 555 {
 556         int err = 0;
 557         unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
 558
 559         /* ignore bits that we don't intend to wait on */
 560         val = val & mask;
 561
 562         while ((ufshcd_readl(hba, reg) & mask) != val) {
 563                 if (can_sleep)
 564                         usleep_range(interval_us, interval_us + 50);
 565                 else
 566                         udelay(interval_us);
 567                 if (time_after(jiffies, timeout)) {
 568                         if ((ufshcd_readl(hba, reg) & mask) != val)
 569                                 err = -ETIMEDOUT;
 570                         break;
 571                 }
 572         }
 573
 574         return err;
 575 }
 576
 577 /**
 578  * ufshcd_get_intr_mask - Get the interrupt bit mask
 579  * @hba: Pointer to adapter instance
 580  *
 581  * Returns interrupt bit mask per version
 582  */
 583 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
 584 {
 585         u32 intr_mask = 0;
 586
 587         switch (hba->ufs_version) {
 588         case UFSHCI_VERSION_10:
 589                 intr_mask = INTERRUPT_MASK_ALL_VER_10;
 590                 break;
 591         case UFSHCI_VERSION_11:
 592         case UFSHCI_VERSION_20:
 593                 intr_mask = INTERRUPT_MASK_ALL_VER_11;
 594                 break;
 595         case UFSHCI_VERSION_21:
 596         default:
 597                 intr_mask = INTERRUPT_MASK_ALL_VER_21;
 598                 break;
 599         }
 600
 601         return intr_mask;
 602 }
 603
 604 /**
 605  * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
 606  * @hba: Pointer to adapter instance
 607  *
 608  * Returns UFSHCI version supported by the controller
 609  */
 610 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
 611 {
 612         if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
 613                 return ufshcd_vops_get_ufs_hci_version(hba);
 614
 615         return ufshcd_readl(hba, REG_UFS_VERSION);
 616 }
 617
 618 /**
 619  * ufshcd_is_device_present - Check if any device connected to
 620  *                            the host controller
 621  * @hba: pointer to adapter instance
 622  *
 623  * Returns true if device present, false if no device detected
 624  */
 625 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
 626 {
 627         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
 628                                                 DEVICE_PRESENT) ? true : false;
 629 }
 630
 631 /**
 632  * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
 633  * @lrbp: pointer to local command reference block
 634  *
 635  * This function is used to get the OCS field from UTRD
 636  * Returns the OCS field in the UTRD
 637  */
 638 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
 639 {
 640         return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
 641 }
 642
 643 /**
 644  * ufshcd_get_tm_free_slot - get a free slot for task management request
 645  * @hba: per adapter instance
 646  * @free_slot: pointer to variable with available slot value
 647  *
 648  * Get a free tag and lock it until ufshcd_put_tm_slot() is called.
 649  * Returns 0 if free slot is not available, else return 1 with tag value
 650  * in @free_slot.
 651  */
 652 static bool ufshcd_get_tm_free_slot(struct ufs_hba *hba, int *free_slot)
 653 {
 654         int tag;
 655         bool ret = false;
 656
 657         if (!free_slot)
 658                 goto out;
 659
 660         do {
 661                 tag = find_first_zero_bit(&hba->tm_slots_in_use, hba->nutmrs);
 662                 if (tag >= hba->nutmrs)
 663                         goto out;
 664         } while (test_and_set_bit_lock(tag, &hba->tm_slots_in_use));
 665
 666         *free_slot = tag;
 667         ret = true;
 668 out:
 669         return ret;
 670 }
 671
 672 static inline void ufshcd_put_tm_slot(struct ufs_hba *hba, int slot)
 673 {
 674         clear_bit_unlock(slot, &hba->tm_slots_in_use);
 675 }
 676
 677 /**
 678  * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
 679  * @hba: per adapter instance
 680  * @pos: position of the bit to be cleared
 681  */
 682 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
 683 {
 684         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 685                 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 686         else
 687                 ufshcd_writel(hba, ~(1 << pos),
 688                                 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
 689 }
 690
 691 /**
 692  * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
 693  * @hba: per adapter instance
 694  * @pos: position of the bit to be cleared
 695  */
 696 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
 697 {
 698         if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
 699                 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 700         else
 701                 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
 702 }
 703
 704 /**
 705  * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
 706  * @hba: per adapter instance
 707  * @tag: position of the bit to be cleared
 708  */
 709 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
 710 {
 711         __clear_bit(tag, &hba->outstanding_reqs);
 712 }
 713
 714 /**
 715  * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
 716  * @reg: Register value of host controller status
 717  *
 718  * Returns integer, 0 on Success and positive value if failed
 719  */
 720 static inline int ufshcd_get_lists_status(u32 reg)
 721 {
 722         return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
 723 }
 724
 725 /**
 726  * ufshcd_get_uic_cmd_result - Get the UIC command result
 727  * @hba: Pointer to adapter instance
 728  *
 729  * This function gets the result of UIC command completion
 730  * Returns 0 on success, non zero value on error
 731  */
 732 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
 733 {
 734         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
 735                MASK_UIC_COMMAND_RESULT;
 736 }
 737
 738 /**
 739  * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
 740  * @hba: Pointer to adapter instance
 741  *
 742  * This function gets UIC command argument3
 743  * Returns 0 on success, non zero value on error
 744  */
 745 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
 746 {
 747         return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
 748 }
 749
 750 /**
 751  * ufshcd_get_req_rsp - returns the TR response transaction type
 752  * @ucd_rsp_ptr: pointer to response UPIU
 753  */
 754 static inline int
 755 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
 756 {
 757         return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
 758 }
 759
 760 /**
 761  * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
 762  * @ucd_rsp_ptr: pointer to response UPIU
 763  *
 764  * This function gets the response status and scsi_status from response UPIU
 765  * Returns the response result code.
 766  */
 767 static inline int
 768 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
 769 {
 770         return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
 771 }
 772
 773 /*
 774  * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
 775  *                              from response UPIU
 776  * @ucd_rsp_ptr: pointer to response UPIU
 777  *
 778  * Return the data segment length.
 779  */
 780 static inline unsigned int
 781 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
 782 {
 783         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 784                 MASK_RSP_UPIU_DATA_SEG_LEN;
 785 }
 786
 787 /**
 788  * ufshcd_is_exception_event - Check if the device raised an exception event
 789  * @ucd_rsp_ptr: pointer to response UPIU
 790  *
 791  * The function checks if the device raised an exception event indicated in
 792  * the Device Information field of response UPIU.
 793  *
 794  * Returns true if exception is raised, false otherwise.
 795  */
 796 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
 797 {
 798         return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
 799                         MASK_RSP_EXCEPTION_EVENT ? true : false;
 800 }
 801
 802 /**
 803  * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
 804  * @hba: per adapter instance
 805  */
 806 static inline void
 807 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
 808 {
 809         ufshcd_writel(hba, INT_AGGR_ENABLE |
 810                       INT_AGGR_COUNTER_AND_TIMER_RESET,
 811                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 812 }
 813
 814 /**
 815  * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
 816  * @hba: per adapter instance
 817  * @cnt: Interrupt aggregation counter threshold
 818  * @tmout: Interrupt aggregation timeout value
 819  */
 820 static inline void
 821 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
 822 {
 823         ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
 824                       INT_AGGR_COUNTER_THLD_VAL(cnt) |
 825                       INT_AGGR_TIMEOUT_VAL(tmout),
 826                       REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 827 }
 828
 829 /**
 830  * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
 831  * @hba: per adapter instance
 832  */
 833 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
 834 {
 835         ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
 836 }
 837
 838 /**
 839  * ufshcd_enable_run_stop_reg - Enable run-stop registers,
 840  *                      When run-stop registers are set to 1, it indicates the
 841  *                      host controller that it can process the requests
 842  * @hba: per adapter instance
 843  */
 844 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
 845 {
 846         ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
 847                       REG_UTP_TASK_REQ_LIST_RUN_STOP);
 848         ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
 849                       REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
 850 }
 851
 852 /**
 853  * ufshcd_hba_start - Start controller initialization sequence
 854  * @hba: per adapter instance
 855  */
 856 static inline void ufshcd_hba_start(struct ufs_hba *hba)
 857 {
 858         ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
 859 }
 860
 861 /**
 862  * ufshcd_is_hba_active - Get controller state
 863  * @hba: per adapter instance
 864  *
 865  * Returns false if controller is active, true otherwise
 866  */
 867 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
 868 {
 869         return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
 870                 ? false : true;
 871 }
 872
 873 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
 874 {
 875         /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
 876         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
 877             (hba->ufs_version == UFSHCI_VERSION_11))
 878                 return UFS_UNIPRO_VER_1_41;
 879         else
 880                 return UFS_UNIPRO_VER_1_6;
 881 }
 882 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
 883
 884 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
 885 {
 886         /*
 887          * If both host and device support UniPro ver1.6 or later, PA layer
 888          * parameters tuning happens during link startup itself.
 889          *
 890          * We can manually tune PA layer parameters if either host or device
 891          * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
 892          * logic simple, we will only do manual tuning if local unipro version
 893          * doesn't support ver1.6 or later.
 894          */
 895         if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
 896                 return true;
 897         else
 898                 return false;
 899 }
 900
 901 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
 902 {
 903         int ret = 0;
 904         struct ufs_clk_info *clki;
 905         struct list_head *head = &hba->clk_list_head;
 906         ktime_t start = ktime_get();
 907         bool clk_state_changed = false;
 908
 909         if (list_empty(head))
 910                 goto out;
 911
 912         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
 913         if (ret)
 914                 return ret;
 915
 916         list_for_each_entry(clki, head, list) {
 917                 if (!IS_ERR_OR_NULL(clki->clk)) {
 918                         if (scale_up && clki->max_freq) {
 919                                 if (clki->curr_freq == clki->max_freq)
 920                                         continue;
 921
 922                                 clk_state_changed = true;
 923                                 ret = clk_set_rate(clki->clk, clki->max_freq);
 924                                 if (ret) {
 925                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 926                                                 __func__, clki->name,
 927                                                 clki->max_freq, ret);
 928                                         break;
 929                                 }
 930                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 931                                                 "scaled up", clki->name,
 932                                                 clki->curr_freq,
 933                                                 clki->max_freq);
 934
 935                                 clki->curr_freq = clki->max_freq;
 936
 937                         } else if (!scale_up && clki->min_freq) {
 938                                 if (clki->curr_freq == clki->min_freq)
 939                                         continue;
 940
 941                                 clk_state_changed = true;
 942                                 ret = clk_set_rate(clki->clk, clki->min_freq);
 943                                 if (ret) {
 944                                         dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
 945                                                 __func__, clki->name,
 946                                                 clki->min_freq, ret);
 947                                         break;
 948                                 }
 949                                 trace_ufshcd_clk_scaling(dev_name(hba->dev),
 950                                                 "scaled down", clki->name,
 951                                                 clki->curr_freq,
 952                                                 clki->min_freq);
 953                                 clki->curr_freq = clki->min_freq;
 954                         }
 955                 }
 956                 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
 957                                 clki->name, clk_get_rate(clki->clk));
 958         }
 959
 960         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
 961
 962 out:
 963         if (clk_state_changed)
 964                 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
 965                         (scale_up ? "up" : "down"),
 966                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
 967         return ret;
 968 }
 969
 970 /**
 971  * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
 972  * @hba: per adapter instance
 973  * @scale_up: True if scaling up and false if scaling down
 974  *
 975  * Returns true if scaling is required, false otherwise.
 976  */
 977 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
 978                                                bool scale_up)
 979 {
 980         struct ufs_clk_info *clki;
 981         struct list_head *head = &hba->clk_list_head;
 982
 983         if (list_empty(head))
 984                 return false;
 985
 986         list_for_each_entry(clki, head, list) {
 987                 if (!IS_ERR_OR_NULL(clki->clk)) {
 988                         if (scale_up && clki->max_freq) {
 989                                 if (clki->curr_freq == clki->max_freq)
 990                                         continue;
 991                                 return true;
 992                         } else if (!scale_up && clki->min_freq) {
 993                                 if (clki->curr_freq == clki->min_freq)
 994                                         continue;
 995                                 return true;
 996                         }
 997                 }
 998         }
 999
1000         return false;
1001 }
1002
1003 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
1004                                         u64 wait_timeout_us)
1005 {
1006         unsigned long flags;
1007         int ret = 0;
1008         u32 tm_doorbell;
1009         u32 tr_doorbell;
1010         bool timeout = false, do_last_check = false;
1011         ktime_t start;
1012
1013         ufshcd_hold(hba, false);
1014         spin_lock_irqsave(hba->host->host_lock, flags);
1015         /*
1016          * Wait for all the outstanding tasks/transfer requests.
1017          * Verify by checking the doorbell registers are clear.
1018          */
1019         start = ktime_get();
1020         do {
1021                 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
1022                         ret = -EBUSY;
1023                         goto out;
1024                 }
1025
1026                 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1027                 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1028                 if (!tm_doorbell && !tr_doorbell) {
1029                         timeout = false;
1030                         break;
1031                 } else if (do_last_check) {
1032                         break;
1033                 }
1034
1035                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1036                 schedule();
1037                 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1038                     wait_timeout_us) {
1039                         timeout = true;
1040                         /*
1041                          * We might have scheduled out for long time so make
1042                          * sure to check if doorbells are cleared by this time
1043                          * or not.
1044                          */
1045                         do_last_check = true;
1046                 }
1047                 spin_lock_irqsave(hba->host->host_lock, flags);
1048         } while (tm_doorbell || tr_doorbell);
1049
1050         if (timeout) {
1051                 dev_err(hba->dev,
1052                         "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1053                         __func__, tm_doorbell, tr_doorbell);
1054                 ret = -EBUSY;
1055         }
1056 out:
1057         spin_unlock_irqrestore(hba->host->host_lock, flags);
1058         ufshcd_release(hba);
1059         return ret;
1060 }
1061
1062 /**
1063  * ufshcd_scale_gear - scale up/down UFS gear
1064  * @hba: per adapter instance
1065  * @scale_up: True for scaling up gear and false for scaling down
1066  *
1067  * Returns 0 for success,
1068  * Returns -EBUSY if scaling can't happen at this time
1069  * Returns non-zero for any other errors
1070  */
1071 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1072 {
1073         #define UFS_MIN_GEAR_TO_SCALE_DOWN      UFS_HS_G1
1074         int ret = 0;
1075         struct ufs_pa_layer_attr new_pwr_info;
1076
1077         if (scale_up) {
1078                 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1079                        sizeof(struct ufs_pa_layer_attr));
1080         } else {
1081                 memcpy(&new_pwr_info, &hba->pwr_info,
1082                        sizeof(struct ufs_pa_layer_attr));
1083
1084                 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1085                     || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1086                         /* save the current power mode */
1087                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
1088                                 &hba->pwr_info,
1089                                 sizeof(struct ufs_pa_layer_attr));
1090
1091                         /* scale down gear */
1092                         new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1093                         new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1094                 }
1095         }
1096
1097         /* check if the power mode needs to be changed or not? */
1098         ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1099
1100         if (ret)
1101                 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1102                         __func__, ret,
1103                         hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1104                         new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1105
1106         return ret;
1107 }
1108
1109 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1110 {
1111         #define DOORBELL_CLR_TOUT_US            (1000 * 1000) /* 1 sec */
1112         int ret = 0;
1113         /*
1114          * make sure that there are no outstanding requests when
1115          * clock scaling is in progress
1116          */
1117         ufshcd_scsi_block_requests(hba);
1118         down_write(&hba->clk_scaling_lock);
1119         if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1120                 ret = -EBUSY;
1121                 up_write(&hba->clk_scaling_lock);
1122                 ufshcd_scsi_unblock_requests(hba);
1123         }
1124
1125         return ret;
1126 }
1127
1128 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1129 {
1130         up_write(&hba->clk_scaling_lock);
1131         ufshcd_scsi_unblock_requests(hba);
1132 }
1133
1134 /**
1135  * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1136  * @hba: per adapter instance
1137  * @scale_up: True for scaling up and false for scalin down
1138  *
1139  * Returns 0 for success,
1140  * Returns -EBUSY if scaling can't happen at this time
1141  * Returns non-zero for any other errors
1142  */
1143 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1144 {
1145         int ret = 0;
1146
1147         /* let's not get into low power until clock scaling is completed */
1148         ufshcd_hold(hba, false);
1149
1150         ret = ufshcd_clock_scaling_prepare(hba);
1151         if (ret)
1152                 return ret;
1153
1154         /* scale down the gear before scaling down clocks */
1155         if (!scale_up) {
1156                 ret = ufshcd_scale_gear(hba, false);
1157                 if (ret)
1158                         goto out;
1159         }
1160
1161         ret = ufshcd_scale_clks(hba, scale_up);
1162         if (ret) {
1163                 if (!scale_up)
1164                         ufshcd_scale_gear(hba, true);
1165                 goto out;
1166         }
1167
1168         /* scale up the gear after scaling up clocks */
1169         if (scale_up) {
1170                 ret = ufshcd_scale_gear(hba, true);
1171                 if (ret) {
1172                         ufshcd_scale_clks(hba, false);
1173                         goto out;
1174                 }
1175         }
1176
1177         ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1178
1179 out:
1180         ufshcd_clock_scaling_unprepare(hba);
1181         ufshcd_release(hba);
1182         return ret;
1183 }
1184
1185 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1186 {
1187         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1188                                            clk_scaling.suspend_work);
1189         unsigned long irq_flags;
1190
1191         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1192         if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1193                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1194                 return;
1195         }
1196         hba->clk_scaling.is_suspended = true;
1197         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1198
1199         __ufshcd_suspend_clkscaling(hba);
1200 }
1201
1202 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1203 {
1204         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1205                                            clk_scaling.resume_work);
1206         unsigned long irq_flags;
1207
1208         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1209         if (!hba->clk_scaling.is_suspended) {
1210                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1211                 return;
1212         }
1213         hba->clk_scaling.is_suspended = false;
1214         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1215
1216         devfreq_resume_device(hba->devfreq);
1217 }
1218
1219 static int ufshcd_devfreq_target(struct device *dev,
1220                                 unsigned long *freq, u32 flags)
1221 {
1222         int ret = 0;
1223         struct ufs_hba *hba = dev_get_drvdata(dev);
1224         ktime_t start;
1225         bool scale_up, sched_clk_scaling_suspend_work = false;
1226         struct list_head *clk_list = &hba->clk_list_head;
1227         struct ufs_clk_info *clki;
1228         unsigned long irq_flags;
1229
1230         if (!ufshcd_is_clkscaling_supported(hba))
1231                 return -EINVAL;
1232
1233         spin_lock_irqsave(hba->host->host_lock, irq_flags);
1234         if (ufshcd_eh_in_progress(hba)) {
1235                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1236                 return 0;
1237         }
1238
1239         if (!hba->clk_scaling.active_reqs)
1240                 sched_clk_scaling_suspend_work = true;
1241
1242         if (list_empty(clk_list)) {
1243                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1244                 goto out;
1245         }
1246
1247         clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1248         scale_up = (*freq == clki->max_freq) ? true : false;
1249         if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1250                 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1251                 ret = 0;
1252                 goto out; /* no state change required */
1253         }
1254         spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1255
1256         start = ktime_get();
1257         ret = ufshcd_devfreq_scale(hba, scale_up);
1258
1259         trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1260                 (scale_up ? "up" : "down"),
1261                 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1262
1263 out:
1264         if (sched_clk_scaling_suspend_work)
1265                 queue_work(hba->clk_scaling.workq,
1266                            &hba->clk_scaling.suspend_work);
1267
1268         return ret;
1269 }
1270
1271
1272 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1273                 struct devfreq_dev_status *stat)
1274 {
1275         struct ufs_hba *hba = dev_get_drvdata(dev);
1276         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1277         unsigned long flags;
1278
1279         if (!ufshcd_is_clkscaling_supported(hba))
1280                 return -EINVAL;
1281
1282         memset(stat, 0, sizeof(*stat));
1283
1284         spin_lock_irqsave(hba->host->host_lock, flags);
1285         if (!scaling->window_start_t)
1286                 goto start_window;
1287
1288         if (scaling->is_busy_started)
1289                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1290                                         scaling->busy_start_t));
1291
1292         stat->total_time = jiffies_to_usecs((long)jiffies -
1293                                 (long)scaling->window_start_t);
1294         stat->busy_time = scaling->tot_busy_t;
1295 start_window:
1296         scaling->window_start_t = jiffies;
1297         scaling->tot_busy_t = 0;
1298
1299         if (hba->outstanding_reqs) {
1300                 scaling->busy_start_t = ktime_get();
1301                 scaling->is_busy_started = true;
1302         } else {
1303                 scaling->busy_start_t = 0;
1304                 scaling->is_busy_started = false;
1305         }
1306         spin_unlock_irqrestore(hba->host->host_lock, flags);
1307         return 0;
1308 }
1309
1310 static struct devfreq_dev_profile ufs_devfreq_profile = {
1311         .polling_ms     = 100,
1312         .target         = ufshcd_devfreq_target,
1313         .get_dev_status = ufshcd_devfreq_get_dev_status,
1314 };
1315
1316 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1317 {
1318         struct list_head *clk_list = &hba->clk_list_head;
1319         struct ufs_clk_info *clki;
1320         struct devfreq *devfreq;
1321         int ret;
1322
1323         /* Skip devfreq if we don't have any clocks in the list */
1324         if (list_empty(clk_list))
1325                 return 0;
1326
1327         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1328         dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1329         dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1330
1331         devfreq = devfreq_add_device(hba->dev,
1332                         &ufs_devfreq_profile,
1333                         DEVFREQ_GOV_SIMPLE_ONDEMAND,
1334                         NULL);
1335         if (IS_ERR(devfreq)) {
1336                 ret = PTR_ERR(devfreq);
1337                 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1338
1339                 dev_pm_opp_remove(hba->dev, clki->min_freq);
1340                 dev_pm_opp_remove(hba->dev, clki->max_freq);
1341                 return ret;
1342         }
1343
1344         hba->devfreq = devfreq;
1345
1346         return 0;
1347 }
1348
1349 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1350 {
1351         struct list_head *clk_list = &hba->clk_list_head;
1352         struct ufs_clk_info *clki;
1353
1354         if (!hba->devfreq)
1355                 return;
1356
1357         devfreq_remove_device(hba->devfreq);
1358         hba->devfreq = NULL;
1359
1360         clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1361         dev_pm_opp_remove(hba->dev, clki->min_freq);
1362         dev_pm_opp_remove(hba->dev, clki->max_freq);
1363 }
1364
1365 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1366 {
1367         unsigned long flags;
1368
1369         devfreq_suspend_device(hba->devfreq);
1370         spin_lock_irqsave(hba->host->host_lock, flags);
1371         hba->clk_scaling.window_start_t = 0;
1372         spin_unlock_irqrestore(hba->host->host_lock, flags);
1373 }
1374
1375 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1376 {
1377         unsigned long flags;
1378         bool suspend = false;
1379
1380         if (!ufshcd_is_clkscaling_supported(hba))
1381                 return;
1382
1383         spin_lock_irqsave(hba->host->host_lock, flags);
1384         if (!hba->clk_scaling.is_suspended) {
1385                 suspend = true;
1386                 hba->clk_scaling.is_suspended = true;
1387         }
1388         spin_unlock_irqrestore(hba->host->host_lock, flags);
1389
1390         if (suspend)
1391                 __ufshcd_suspend_clkscaling(hba);
1392 }
1393
1394 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1395 {
1396         unsigned long flags;
1397         bool resume = false;
1398
1399         if (!ufshcd_is_clkscaling_supported(hba))
1400                 return;
1401
1402         spin_lock_irqsave(hba->host->host_lock, flags);
1403         if (hba->clk_scaling.is_suspended) {
1404                 resume = true;
1405                 hba->clk_scaling.is_suspended = false;
1406         }
1407         spin_unlock_irqrestore(hba->host->host_lock, flags);
1408
1409         if (resume)
1410                 devfreq_resume_device(hba->devfreq);
1411 }
1412
1413 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1414                 struct device_attribute *attr, char *buf)
1415 {
1416         struct ufs_hba *hba = dev_get_drvdata(dev);
1417
1418         return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1419 }
1420
1421 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1422                 struct device_attribute *attr, const char *buf, size_t count)
1423 {
1424         struct ufs_hba *hba = dev_get_drvdata(dev);
1425         u32 value;
1426         int err;
1427
1428         if (kstrtou32(buf, 0, &value))
1429                 return -EINVAL;
1430
1431         value = !!value;
1432         if (value == hba->clk_scaling.is_allowed)
1433                 goto out;
1434
1435         pm_runtime_get_sync(hba->dev);
1436         ufshcd_hold(hba, false);
1437
1438         cancel_work_sync(&hba->clk_scaling.suspend_work);
1439         cancel_work_sync(&hba->clk_scaling.resume_work);
1440
1441         hba->clk_scaling.is_allowed = value;
1442
1443         if (value) {
1444                 ufshcd_resume_clkscaling(hba);
1445         } else {
1446                 ufshcd_suspend_clkscaling(hba);
1447                 err = ufshcd_devfreq_scale(hba, true);
1448                 if (err)
1449                         dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1450                                         __func__, err);
1451         }
1452
1453         ufshcd_release(hba);
1454         pm_runtime_put_sync(hba->dev);
1455 out:
1456         return count;
1457 }
1458
1459 static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1460 {
1461         hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1462         hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1463         sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1464         hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1465         hba->clk_scaling.enable_attr.attr.mode = 0644;
1466         if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1467                 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1468 }
1469
1470 static void ufshcd_ungate_work(struct work_struct *work)
1471 {
1472         int ret;
1473         unsigned long flags;
1474         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1475                         clk_gating.ungate_work);
1476
1477         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1478
1479         spin_lock_irqsave(hba->host->host_lock, flags);
1480         if (hba->clk_gating.state == CLKS_ON) {
1481                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1482                 goto unblock_reqs;
1483         }
1484
1485         spin_unlock_irqrestore(hba->host->host_lock, flags);
1486         ufshcd_setup_clocks(hba, true);
1487
1488         /* Exit from hibern8 */
1489         if (ufshcd_can_hibern8_during_gating(hba)) {
1490                 /* Prevent gating in this path */
1491                 hba->clk_gating.is_suspended = true;
1492                 if (ufshcd_is_link_hibern8(hba)) {
1493                         ret = ufshcd_uic_hibern8_exit(hba);
1494                         if (ret)
1495                                 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1496                                         __func__, ret);
1497                         else
1498                                 ufshcd_set_link_active(hba);
1499                 }
1500                 hba->clk_gating.is_suspended = false;
1501         }
1502 unblock_reqs:
1503         ufshcd_scsi_unblock_requests(hba);
1504 }
1505
1506 /**
1507  * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1508  * Also, exit from hibern8 mode and set the link as active.
1509  * @hba: per adapter instance
1510  * @async: This indicates whether caller should ungate clocks asynchronously.
1511  */
1512 int ufshcd_hold(struct ufs_hba *hba, bool async)
1513 {
1514         int rc = 0;
1515         unsigned long flags;
1516
1517         if (!ufshcd_is_clkgating_allowed(hba))
1518                 goto out;
1519         spin_lock_irqsave(hba->host->host_lock, flags);
1520         hba->clk_gating.active_reqs++;
1521
1522         if (ufshcd_eh_in_progress(hba)) {
1523                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1524                 return 0;
1525         }
1526
1527 start:
1528         switch (hba->clk_gating.state) {
1529         case CLKS_ON:
1530                 /*
1531                  * Wait for the ungate work to complete if in progress.
1532                  * Though the clocks may be in ON state, the link could
1533                  * still be in hibner8 state if hibern8 is allowed
1534                  * during clock gating.
1535                  * Make sure we exit hibern8 state also in addition to
1536                  * clocks being ON.
1537                  */
1538                 if (ufshcd_can_hibern8_during_gating(hba) &&
1539                     ufshcd_is_link_hibern8(hba)) {
1540                         spin_unlock_irqrestore(hba->host->host_lock, flags);
1541                         flush_work(&hba->clk_gating.ungate_work);
1542                         spin_lock_irqsave(hba->host->host_lock, flags);
1543                         goto start;
1544                 }
1545                 break;
1546         case REQ_CLKS_OFF:
1547                 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1548                         hba->clk_gating.state = CLKS_ON;
1549                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1550                                                 hba->clk_gating.state);
1551                         break;
1552                 }
1553                 /*
1554                  * If we are here, it means gating work is either done or
1555                  * currently running. Hence, fall through to cancel gating
1556                  * work and to enable clocks.
1557                  */
1558                 /* fallthrough */
1559         case CLKS_OFF:
1560                 ufshcd_scsi_block_requests(hba);
1561                 hba->clk_gating.state = REQ_CLKS_ON;
1562                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1563                                         hba->clk_gating.state);
1564                 queue_work(hba->clk_gating.clk_gating_workq,
1565                            &hba->clk_gating.ungate_work);
1566                 /*
1567                  * fall through to check if we should wait for this
1568                  * work to be done or not.
1569                  */
1570                 /* fallthrough */
1571         case REQ_CLKS_ON:
1572                 if (async) {
1573                         rc = -EAGAIN;
1574                         hba->clk_gating.active_reqs--;
1575                         break;
1576                 }
1577
1578                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1579                 flush_work(&hba->clk_gating.ungate_work);
1580                 /* Make sure state is CLKS_ON before returning */
1581                 spin_lock_irqsave(hba->host->host_lock, flags);
1582                 goto start;
1583         default:
1584                 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1585                                 __func__, hba->clk_gating.state);
1586                 break;
1587         }
1588         spin_unlock_irqrestore(hba->host->host_lock, flags);
1589 out:
1590         return rc;
1591 }
1592 EXPORT_SYMBOL_GPL(ufshcd_hold);
1593
1594 static void ufshcd_gate_work(struct work_struct *work)
1595 {
1596         struct ufs_hba *hba = container_of(work, struct ufs_hba,
1597                         clk_gating.gate_work.work);
1598         unsigned long flags;
1599
1600         spin_lock_irqsave(hba->host->host_lock, flags);
1601         /*
1602          * In case you are here to cancel this work the gating state
1603          * would be marked as REQ_CLKS_ON. In this case save time by
1604          * skipping the gating work and exit after changing the clock
1605          * state to CLKS_ON.
1606          */
1607         if (hba->clk_gating.is_suspended ||
1608                 (hba->clk_gating.state == REQ_CLKS_ON)) {
1609                 hba->clk_gating.state = CLKS_ON;
1610                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1611                                         hba->clk_gating.state);
1612                 goto rel_lock;
1613         }
1614
1615         if (hba->clk_gating.active_reqs
1616                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1617                 || hba->lrb_in_use || hba->outstanding_tasks
1618                 || hba->active_uic_cmd || hba->uic_async_done)
1619                 goto rel_lock;
1620
1621         spin_unlock_irqrestore(hba->host->host_lock, flags);
1622
1623         /* put the link into hibern8 mode before turning off clocks */
1624         if (ufshcd_can_hibern8_during_gating(hba)) {
1625                 if (ufshcd_uic_hibern8_enter(hba)) {
1626                         hba->clk_gating.state = CLKS_ON;
1627                         trace_ufshcd_clk_gating(dev_name(hba->dev),
1628                                                 hba->clk_gating.state);
1629                         goto out;
1630                 }
1631                 ufshcd_set_link_hibern8(hba);
1632         }
1633
1634         if (!ufshcd_is_link_active(hba))
1635                 ufshcd_setup_clocks(hba, false);
1636         else
1637                 /* If link is active, device ref_clk can't be switched off */
1638                 __ufshcd_setup_clocks(hba, false, true);
1639
1640         /*
1641          * In case you are here to cancel this work the gating state
1642          * would be marked as REQ_CLKS_ON. In this case keep the state
1643          * as REQ_CLKS_ON which would anyway imply that clocks are off
1644          * and a request to turn them on is pending. By doing this way,
1645          * we keep the state machine in tact and this would ultimately
1646          * prevent from doing cancel work multiple times when there are
1647          * new requests arriving before the current cancel work is done.
1648          */
1649         spin_lock_irqsave(hba->host->host_lock, flags);
1650         if (hba->clk_gating.state == REQ_CLKS_OFF) {
1651                 hba->clk_gating.state = CLKS_OFF;
1652                 trace_ufshcd_clk_gating(dev_name(hba->dev),
1653                                         hba->clk_gating.state);
1654         }
1655 rel_lock:
1656         spin_unlock_irqrestore(hba->host->host_lock, flags);
1657 out:
1658         return;
1659 }
1660
1661 /* host lock must be held before calling this variant */
1662 static void __ufshcd_release(struct ufs_hba *hba)
1663 {
1664         if (!ufshcd_is_clkgating_allowed(hba))
1665                 return;
1666
1667         hba->clk_gating.active_reqs--;
1668
1669         if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1670                 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1671                 || hba->lrb_in_use || hba->outstanding_tasks
1672                 || hba->active_uic_cmd || hba->uic_async_done
1673                 || ufshcd_eh_in_progress(hba))
1674                 return;
1675
1676         hba->clk_gating.state = REQ_CLKS_OFF;
1677         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1678         queue_delayed_work(hba->clk_gating.clk_gating_workq,
1679                            &hba->clk_gating.gate_work,
1680                            msecs_to_jiffies(hba->clk_gating.delay_ms));
1681 }
1682
1683 void ufshcd_release(struct ufs_hba *hba)
1684 {
1685         unsigned long flags;
1686
1687         spin_lock_irqsave(hba->host->host_lock, flags);
1688         __ufshcd_release(hba);
1689         spin_unlock_irqrestore(hba->host->host_lock, flags);
1690 }
1691 EXPORT_SYMBOL_GPL(ufshcd_release);
1692
1693 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1694                 struct device_attribute *attr, char *buf)
1695 {
1696         struct ufs_hba *hba = dev_get_drvdata(dev);
1697
1698         return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1699 }
1700
1701 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1702                 struct device_attribute *attr, const char *buf, size_t count)
1703 {
1704         struct ufs_hba *hba = dev_get_drvdata(dev);
1705         unsigned long flags, value;
1706
1707         if (kstrtoul(buf, 0, &value))
1708                 return -EINVAL;
1709
1710         spin_lock_irqsave(hba->host->host_lock, flags);
1711         hba->clk_gating.delay_ms = value;
1712         spin_unlock_irqrestore(hba->host->host_lock, flags);
1713         return count;
1714 }
1715
1716 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1717                 struct device_attribute *attr, char *buf)
1718 {
1719         struct ufs_hba *hba = dev_get_drvdata(dev);
1720
1721         return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1722 }
1723
1724 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1725                 struct device_attribute *attr, const char *buf, size_t count)
1726 {
1727         struct ufs_hba *hba = dev_get_drvdata(dev);
1728         unsigned long flags;
1729         u32 value;
1730
1731         if (kstrtou32(buf, 0, &value))
1732                 return -EINVAL;
1733
1734         value = !!value;
1735         if (value == hba->clk_gating.is_enabled)
1736                 goto out;
1737
1738         if (value) {
1739                 ufshcd_release(hba);
1740         } else {
1741                 spin_lock_irqsave(hba->host->host_lock, flags);
1742                 hba->clk_gating.active_reqs++;
1743                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1744         }
1745
1746         hba->clk_gating.is_enabled = value;
1747 out:
1748         return count;
1749 }
1750
1751 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1752 {
1753         char wq_name[sizeof("ufs_clkscaling_00")];
1754
1755         if (!ufshcd_is_clkscaling_supported(hba))
1756                 return;
1757
1758         INIT_WORK(&hba->clk_scaling.suspend_work,
1759                   ufshcd_clk_scaling_suspend_work);
1760         INIT_WORK(&hba->clk_scaling.resume_work,
1761                   ufshcd_clk_scaling_resume_work);
1762
1763         snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1764                  hba->host->host_no);
1765         hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1766
1767         ufshcd_clkscaling_init_sysfs(hba);
1768 }
1769
1770 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1771 {
1772         if (!ufshcd_is_clkscaling_supported(hba))
1773                 return;
1774
1775         destroy_workqueue(hba->clk_scaling.workq);
1776         ufshcd_devfreq_remove(hba);
1777 }
1778
1779 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1780 {
1781         char wq_name[sizeof("ufs_clk_gating_00")];
1782
1783         if (!ufshcd_is_clkgating_allowed(hba))
1784                 return;
1785
1786         hba->clk_gating.delay_ms = 150;
1787         INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1788         INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1789
1790         snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1791                  hba->host->host_no);
1792         hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1793                                                            WQ_MEM_RECLAIM);
1794
1795         hba->clk_gating.is_enabled = true;
1796
1797         hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1798         hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1799         sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1800         hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1801         hba->clk_gating.delay_attr.attr.mode = 0644;
1802         if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1803                 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1804
1805         hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1806         hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1807         sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1808         hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1809         hba->clk_gating.enable_attr.attr.mode = 0644;
1810         if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1811                 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1812 }
1813
1814 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1815 {
1816         if (!ufshcd_is_clkgating_allowed(hba))
1817                 return;
1818         device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1819         device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1820         cancel_work_sync(&hba->clk_gating.ungate_work);
1821         cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1822         destroy_workqueue(hba->clk_gating.clk_gating_workq);
1823 }
1824
1825 /* Must be called with host lock acquired */
1826 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1827 {
1828         bool queue_resume_work = false;
1829
1830         if (!ufshcd_is_clkscaling_supported(hba))
1831                 return;
1832
1833         if (!hba->clk_scaling.active_reqs++)
1834                 queue_resume_work = true;
1835
1836         if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1837                 return;
1838
1839         if (queue_resume_work)
1840                 queue_work(hba->clk_scaling.workq,
1841                            &hba->clk_scaling.resume_work);
1842
1843         if (!hba->clk_scaling.window_start_t) {
1844                 hba->clk_scaling.window_start_t = jiffies;
1845                 hba->clk_scaling.tot_busy_t = 0;
1846                 hba->clk_scaling.is_busy_started = false;
1847         }
1848
1849         if (!hba->clk_scaling.is_busy_started) {
1850                 hba->clk_scaling.busy_start_t = ktime_get();
1851                 hba->clk_scaling.is_busy_started = true;
1852         }
1853 }
1854
1855 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1856 {
1857         struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1858
1859         if (!ufshcd_is_clkscaling_supported(hba))
1860                 return;
1861
1862         if (!hba->outstanding_reqs && scaling->is_busy_started) {
1863                 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1864                                         scaling->busy_start_t));
1865                 scaling->busy_start_t = 0;
1866                 scaling->is_busy_started = false;
1867         }
1868 }
1869 /**
1870  * ufshcd_send_command - Send SCSI or device management commands
1871  * @hba: per adapter instance
1872  * @task_tag: Task tag of the command
1873  */
1874 static inline
1875 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1876 {
1877         hba->lrb[task_tag].issue_time_stamp = ktime_get();
1878         hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1879         ufshcd_clk_scaling_start_busy(hba);
1880         __set_bit(task_tag, &hba->outstanding_reqs);
1881         ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1882         /* Make sure that doorbell is committed immediately */
1883         wmb();
1884         ufshcd_add_command_trace(hba, task_tag, "send");
1885 }
1886
1887 /**
1888  * ufshcd_copy_sense_data - Copy sense data in case of check condition
1889  * @lrbp: pointer to local reference block
1890  */
1891 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1892 {
1893         int len;
1894         if (lrbp->sense_buffer &&
1895             ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1896                 int len_to_copy;
1897
1898                 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1899                 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
1900
1901                 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1902                        len_to_copy);
1903         }
1904 }
1905
1906 /**
1907  * ufshcd_copy_query_response() - Copy the Query Response and the data
1908  * descriptor
1909  * @hba: per adapter instance
1910  * @lrbp: pointer to local reference block
1911  */
1912 static
1913 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1914 {
1915         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1916
1917         memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
1918
1919         /* Get the descriptor */
1920         if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
1921                 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1922                                 GENERAL_UPIU_REQUEST_SIZE;
1923                 u16 resp_len;
1924                 u16 buf_len;
1925
1926                 /* data segment length */
1927                 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1928                                                 MASK_QUERY_DATA_SEG_LEN;
1929                 buf_len = be16_to_cpu(
1930                                 hba->dev_cmd.query.request.upiu_req.length);
1931                 if (likely(buf_len >= resp_len)) {
1932                         memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1933                 } else {
1934                         dev_warn(hba->dev,
1935                                 "%s: Response size is bigger than buffer",
1936                                 __func__);
1937                         return -EINVAL;
1938                 }
1939         }
1940
1941         return 0;
1942 }
1943
1944 /**
1945  * ufshcd_hba_capabilities - Read controller capabilities
1946  * @hba: per adapter instance
1947  */
1948 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1949 {
1950         hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
1951
1952         /* nutrs and nutmrs are 0 based values */
1953         hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1954         hba->nutmrs =
1955         ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1956 }
1957
1958 /**
1959  * ufshcd_ready_for_uic_cmd - Check if controller is ready
1960  *                            to accept UIC commands
1961  * @hba: per adapter instance
1962  * Return true on success, else false
1963  */
1964 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1965 {
1966         if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1967                 return true;
1968         else
1969                 return false;
1970 }
1971
1972 /**
1973  * ufshcd_get_upmcrs - Get the power mode change request status
1974  * @hba: Pointer to adapter instance
1975  *
1976  * This function gets the UPMCRS field of HCS register
1977  * Returns value of UPMCRS field
1978  */
1979 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1980 {
1981         return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1982 }
1983
1984 /**
1985  * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1986  * @hba: per adapter instance
1987  * @uic_cmd: UIC command
1988  *
1989  * Mutex must be held.
1990  */
1991 static inline void
1992 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1993 {
1994         WARN_ON(hba->active_uic_cmd);
1995
1996         hba->active_uic_cmd = uic_cmd;
1997
1998         /* Write Args */
1999         ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
2000         ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
2001         ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
2002
2003         /* Write UIC Cmd */
2004         ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
2005                       REG_UIC_COMMAND);
2006 }
2007
2008 /**
2009  * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
2010  * @hba: per adapter instance
2011  * @uic_cmd: UIC command
2012  *
2013  * Must be called with mutex held.
2014  * Returns 0 only if success.
2015  */
2016 static int
2017 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2018 {
2019         int ret;
2020         unsigned long flags;
2021
2022         if (wait_for_completion_timeout(&uic_cmd->done,
2023                                         msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2024                 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2025         else
2026                 ret = -ETIMEDOUT;
2027
2028         spin_lock_irqsave(hba->host->host_lock, flags);
2029         hba->active_uic_cmd = NULL;
2030         spin_unlock_irqrestore(hba->host->host_lock, flags);
2031
2032         return ret;
2033 }
2034
2035 /**
2036  * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2037  * @hba: per adapter instance
2038  * @uic_cmd: UIC command
2039  * @completion: initialize the completion only if this is set to true
2040  *
2041  * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2042  * with mutex held and host_lock locked.
2043  * Returns 0 only if success.
2044  */
2045 static int
2046 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2047                       bool completion)
2048 {
2049         if (!ufshcd_ready_for_uic_cmd(hba)) {
2050                 dev_err(hba->dev,
2051                         "Controller not ready to accept UIC commands\n");
2052                 return -EIO;
2053         }
2054
2055         if (completion)
2056                 init_completion(&uic_cmd->done);
2057
2058         ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2059
2060         return 0;
2061 }
2062
2063 /**
2064  * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2065  * @hba: per adapter instance
2066  * @uic_cmd: UIC command
2067  *
2068  * Returns 0 only if success.
2069  */
2070 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2071 {
2072         int ret;
2073         unsigned long flags;
2074
2075         ufshcd_hold(hba, false);
2076         mutex_lock(&hba->uic_cmd_mutex);
2077         ufshcd_add_delay_before_dme_cmd(hba);
2078
2079         spin_lock_irqsave(hba->host->host_lock, flags);
2080         ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2081         spin_unlock_irqrestore(hba->host->host_lock, flags);
2082         if (!ret)
2083                 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2084
2085         mutex_unlock(&hba->uic_cmd_mutex);
2086
2087         ufshcd_release(hba);
2088         return ret;
2089 }
2090
2091 /**
2092  * ufshcd_map_sg - Map scatter-gather list to prdt
2093  * @hba: per adapter instance
2094  * @lrbp: pointer to local reference block
2095  *
2096  * Returns 0 in case of success, non-zero value in case of failure
2097  */
2098 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2099 {
2100         struct ufshcd_sg_entry *prd_table;
2101         struct scatterlist *sg;
2102         struct scsi_cmnd *cmd;
2103         int sg_segments;
2104         int i;
2105
2106         cmd = lrbp->cmd;
2107         sg_segments = scsi_dma_map(cmd);
2108         if (sg_segments < 0)
2109                 return sg_segments;
2110
2111         if (sg_segments) {
2112                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2113                         lrbp->utr_descriptor_ptr->prd_table_length =
2114                                 cpu_to_le16((u16)(sg_segments *
2115                                         sizeof(struct ufshcd_sg_entry)));
2116                 else
2117                         lrbp->utr_descriptor_ptr->prd_table_length =
2118                                 cpu_to_le16((u16) (sg_segments));
2119
2120                 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2121
2122                 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2123                         prd_table[i].size  =
2124                                 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2125                         prd_table[i].base_addr =
2126                                 cpu_to_le32(lower_32_bits(sg->dma_address));
2127                         prd_table[i].upper_addr =
2128                                 cpu_to_le32(upper_32_bits(sg->dma_address));
2129                         prd_table[i].reserved = 0;
2130                 }
2131         } else {
2132                 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2133         }
2134
2135         return 0;
2136 }
2137
2138 /**
2139  * ufshcd_enable_intr - enable interrupts
2140  * @hba: per adapter instance
2141  * @intrs: interrupt bits
2142  */
2143 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2144 {
2145         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2146
2147         if (hba->ufs_version == UFSHCI_VERSION_10) {
2148                 u32 rw;
2149                 rw = set & INTERRUPT_MASK_RW_VER_10;
2150                 set = rw | ((set ^ intrs) & intrs);
2151         } else {
2152                 set |= intrs;
2153         }
2154
2155         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2156 }
2157
2158 /**
2159  * ufshcd_disable_intr - disable interrupts
2160  * @hba: per adapter instance
2161  * @intrs: interrupt bits
2162  */
2163 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2164 {
2165         u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2166
2167         if (hba->ufs_version == UFSHCI_VERSION_10) {
2168                 u32 rw;
2169                 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2170                         ~(intrs & INTERRUPT_MASK_RW_VER_10);
2171                 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2172
2173         } else {
2174                 set &= ~intrs;
2175         }
2176
2177         ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2178 }
2179
2180 /**
2181  * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2182  * descriptor according to request
2183  * @lrbp: pointer to local reference block
2184  * @upiu_flags: flags required in the header
2185  * @cmd_dir: requests data direction
2186  */
2187 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2188                         u32 *upiu_flags, enum dma_data_direction cmd_dir)
2189 {
2190         struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2191         u32 data_direction;
2192         u32 dword_0;
2193
2194         if (cmd_dir == DMA_FROM_DEVICE) {
2195                 data_direction = UTP_DEVICE_TO_HOST;
2196                 *upiu_flags = UPIU_CMD_FLAGS_READ;
2197         } else if (cmd_dir == DMA_TO_DEVICE) {
2198                 data_direction = UTP_HOST_TO_DEVICE;
2199                 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2200         } else {
2201                 data_direction = UTP_NO_DATA_TRANSFER;
2202                 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2203         }
2204
2205         dword_0 = data_direction | (lrbp->command_type
2206                                 << UPIU_COMMAND_TYPE_OFFSET);
2207         if (lrbp->intr_cmd)
2208                 dword_0 |= UTP_REQ_DESC_INT_CMD;
2209
2210         /* Transfer request descriptor header fields */
2211         req_desc->header.dword_0 = cpu_to_le32(dword_0);
2212         /* dword_1 is reserved, hence it is set to 0 */
2213         req_desc->header.dword_1 = 0;
2214         /*
2215          * assigning invalid value for command status. Controller
2216          * updates OCS on command completion, with the command
2217          * status
2218          */
2219         req_desc->header.dword_2 =
2220                 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2221         /* dword_3 is reserved, hence it is set to 0 */
2222         req_desc->header.dword_3 = 0;
2223
2224         req_desc->prd_table_length = 0;
2225 }
2226
2227 /**
2228  * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2229  * for scsi commands
2230  * @lrbp: local reference block pointer
2231  * @upiu_flags: flags
2232  */
2233 static
2234 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2235 {
2236         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2237         unsigned short cdb_len;
2238
2239         /* command descriptor fields */
2240         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2241                                 UPIU_TRANSACTION_COMMAND, upiu_flags,
2242                                 lrbp->lun, lrbp->task_tag);
2243         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2244                                 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2245
2246         /* Total EHS length and Data segment length will be zero */
2247         ucd_req_ptr->header.dword_2 = 0;
2248
2249         ucd_req_ptr->sc.exp_data_transfer_len =
2250                 cpu_to_be32(lrbp->cmd->sdb.length);
2251
2252         cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2253         memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2254         memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2255
2256         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2257 }
2258
2259 /**
2260  * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2261  * for query requsts
2262  * @hba: UFS hba
2263  * @lrbp: local reference block pointer
2264  * @upiu_flags: flags
2265  */
2266 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2267                                 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2268 {
2269         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2270         struct ufs_query *query = &hba->dev_cmd.query;
2271         u16 len = be16_to_cpu(query->request.upiu_req.length);
2272
2273         /* Query request header */
2274         ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2275                         UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2276                         lrbp->lun, lrbp->task_tag);
2277         ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2278                         0, query->request.query_func, 0, 0);
2279
2280         /* Data segment length only need for WRITE_DESC */
2281         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2282                 ucd_req_ptr->header.dword_2 =
2283                         UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2284         else
2285                 ucd_req_ptr->header.dword_2 = 0;
2286
2287         /* Copy the Query Request buffer as is */
2288         memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2289                         QUERY_OSF_SIZE);
2290
2291         /* Copy the Descriptor */
2292         if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2293                 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2294
2295         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2296 }
2297
2298 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2299 {
2300         struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2301
2302         memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2303
2304         /* command descriptor fields */
2305         ucd_req_ptr->header.dword_0 =
2306                 UPIU_HEADER_DWORD(
2307                         UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2308         /* clear rest of the fields of basic header */
2309         ucd_req_ptr->header.dword_1 = 0;
2310         ucd_req_ptr->header.dword_2 = 0;
2311
2312         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2313 }
2314
2315 /**
2316  * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2317  *                           for Device Management Purposes
2318  * @hba: per adapter instance
2319  * @lrbp: pointer to local reference block
2320  */
2321 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2322 {
2323         u32 upiu_flags;
2324         int ret = 0;
2325
2326         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2327             (hba->ufs_version == UFSHCI_VERSION_11))
2328                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2329         else
2330                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2331
2332         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2333         if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2334                 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2335         else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2336                 ufshcd_prepare_utp_nop_upiu(lrbp);
2337         else
2338                 ret = -EINVAL;
2339
2340         return ret;
2341 }
2342
2343 /**
2344  * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2345  *                         for SCSI Purposes
2346  * @hba: per adapter instance
2347  * @lrbp: pointer to local reference block
2348  */
2349 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2350 {
2351         u32 upiu_flags;
2352         int ret = 0;
2353
2354         if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2355             (hba->ufs_version == UFSHCI_VERSION_11))
2356                 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2357         else
2358                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2359
2360         if (likely(lrbp->cmd)) {
2361                 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2362                                                 lrbp->cmd->sc_data_direction);
2363                 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2364         } else {
2365                 ret = -EINVAL;
2366         }
2367
2368         return ret;
2369 }
2370
2371 /**
2372  * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2373  * @upiu_wlun_id: UPIU W-LUN id
2374  *
2375  * Returns SCSI W-LUN id
2376  */
2377 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2378 {
2379         return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2380 }
2381
2382 /**
2383  * ufshcd_queuecommand - main entry point for SCSI requests
2384  * @host: SCSI host pointer
2385  * @cmd: command from SCSI Midlayer
2386  *
2387  * Returns 0 for success, non-zero in case of failure
2388  */
2389 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2390 {
2391         struct ufshcd_lrb *lrbp;
2392         struct ufs_hba *hba;
2393         unsigned long flags;
2394         int tag;
2395         int err = 0;
2396
2397         hba = shost_priv(host);
2398
2399         tag = cmd->request->tag;
2400         if (!ufshcd_valid_tag(hba, tag)) {
2401                 dev_err(hba->dev,
2402                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2403                         __func__, tag, cmd, cmd->request);
2404                 BUG();
2405         }
2406
2407         if (!down_read_trylock(&hba->clk_scaling_lock))
2408                 return SCSI_MLQUEUE_HOST_BUSY;
2409
2410         spin_lock_irqsave(hba->host->host_lock, flags);
2411         switch (hba->ufshcd_state) {
2412         case UFSHCD_STATE_OPERATIONAL:
2413                 break;
2414         case UFSHCD_STATE_EH_SCHEDULED:
2415         case UFSHCD_STATE_RESET:
2416                 err = SCSI_MLQUEUE_HOST_BUSY;
2417                 goto out_unlock;
2418         case UFSHCD_STATE_ERROR:
2419                 set_host_byte(cmd, DID_ERROR);
2420                 cmd->scsi_done(cmd);
2421                 goto out_unlock;
2422         default:
2423                 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2424                                 __func__, hba->ufshcd_state);
2425                 set_host_byte(cmd, DID_BAD_TARGET);
2426                 cmd->scsi_done(cmd);
2427                 goto out_unlock;
2428         }
2429
2430         /* if error handling is in progress, don't issue commands */
2431         if (ufshcd_eh_in_progress(hba)) {
2432                 set_host_byte(cmd, DID_ERROR);
2433                 cmd->scsi_done(cmd);
2434                 goto out_unlock;
2435         }
2436         spin_unlock_irqrestore(hba->host->host_lock, flags);
2437
2438         hba->req_abort_count = 0;
2439
2440         /* acquire the tag to make sure device cmds don't use it */
2441         if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
2442                 /*
2443                  * Dev manage command in progress, requeue the command.
2444                  * Requeuing the command helps in cases where the request *may*
2445                  * find different tag instead of waiting for dev manage command
2446                  * completion.
2447                  */
2448                 err = SCSI_MLQUEUE_HOST_BUSY;
2449                 goto out;
2450         }
2451
2452         err = ufshcd_hold(hba, true);
2453         if (err) {
2454                 err = SCSI_MLQUEUE_HOST_BUSY;
2455                 clear_bit_unlock(tag, &hba->lrb_in_use);
2456                 goto out;
2457         }
2458         WARN_ON(hba->clk_gating.state != CLKS_ON);
2459
2460         lrbp = &hba->lrb[tag];
2461
2462         WARN_ON(lrbp->cmd);
2463         lrbp->cmd = cmd;
2464         lrbp->sense_bufflen = UFS_SENSE_SIZE;
2465         lrbp->sense_buffer = cmd->sense_buffer;
2466         lrbp->task_tag = tag;
2467         lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2468         lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2469         lrbp->req_abort_skip = false;
2470
2471         ufshcd_comp_scsi_upiu(hba, lrbp);
2472
2473         err = ufshcd_map_sg(hba, lrbp);
2474         if (err) {
2475                 lrbp->cmd = NULL;
2476                 clear_bit_unlock(tag, &hba->lrb_in_use);
2477                 goto out;
2478         }
2479         /* Make sure descriptors are ready before ringing the doorbell */
2480         wmb();
2481
2482         /* issue command to the controller */
2483         spin_lock_irqsave(hba->host->host_lock, flags);
2484         ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2485         ufshcd_send_command(hba, tag);
2486 out_unlock:
2487         spin_unlock_irqrestore(hba->host->host_lock, flags);
2488 out:
2489         up_read(&hba->clk_scaling_lock);
2490         return err;
2491 }
2492
2493 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2494                 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2495 {
2496         lrbp->cmd = NULL;
2497         lrbp->sense_bufflen = 0;
2498         lrbp->sense_buffer = NULL;
2499         lrbp->task_tag = tag;
2500         lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2501         lrbp->intr_cmd = true; /* No interrupt aggregation */
2502         hba->dev_cmd.type = cmd_type;
2503
2504         return ufshcd_comp_devman_upiu(hba, lrbp);
2505 }
2506
2507 static int
2508 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2509 {
2510         int err = 0;
2511         unsigned long flags;
2512         u32 mask = 1 << tag;
2513
2514         /* clear outstanding transaction before retry */
2515         spin_lock_irqsave(hba->host->host_lock, flags);
2516         ufshcd_utrl_clear(hba, tag);
2517         spin_unlock_irqrestore(hba->host->host_lock, flags);
2518
2519         /*
2520          * wait for for h/w to clear corresponding bit in door-bell.
2521          * max. wait is 1 sec.
2522          */
2523         err = ufshcd_wait_for_register(hba,
2524                         REG_UTP_TRANSFER_REQ_DOOR_BELL,
2525                         mask, ~mask, 1000, 1000, true);
2526
2527         return err;
2528 }
2529
2530 static int
2531 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2532 {
2533         struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2534
2535         /* Get the UPIU response */
2536         query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2537                                 UPIU_RSP_CODE_OFFSET;
2538         return query_res->response;
2539 }
2540
2541 /**
2542  * ufshcd_dev_cmd_completion() - handles device management command responses
2543  * @hba: per adapter instance
2544  * @lrbp: pointer to local reference block
2545  */
2546 static int
2547 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2548 {
2549         int resp;
2550         int err = 0;
2551
2552         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2553         resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2554
2555         switch (resp) {
2556         case UPIU_TRANSACTION_NOP_IN:
2557                 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2558                         err = -EINVAL;
2559                         dev_err(hba->dev, "%s: unexpected response %x\n",
2560                                         __func__, resp);
2561                 }
2562                 break;
2563         case UPIU_TRANSACTION_QUERY_RSP:
2564                 err = ufshcd_check_query_response(hba, lrbp);
2565                 if (!err)
2566                         err = ufshcd_copy_query_response(hba, lrbp);
2567                 break;
2568         case UPIU_TRANSACTION_REJECT_UPIU:
2569                 /* TODO: handle Reject UPIU Response */
2570                 err = -EPERM;
2571                 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2572                                 __func__);
2573                 break;
2574         default:
2575                 err = -EINVAL;
2576                 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2577                                 __func__, resp);
2578                 break;
2579         }
2580
2581         return err;
2582 }
2583
2584 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2585                 struct ufshcd_lrb *lrbp, int max_timeout)
2586 {
2587         int err = 0;
2588         unsigned long time_left;
2589         unsigned long flags;
2590
2591         time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2592                         msecs_to_jiffies(max_timeout));
2593
2594         /* Make sure descriptors are ready before ringing the doorbell */
2595         wmb();
2596         spin_lock_irqsave(hba->host->host_lock, flags);
2597         hba->dev_cmd.complete = NULL;
2598         if (likely(time_left)) {
2599                 err = ufshcd_get_tr_ocs(lrbp);
2600                 if (!err)
2601                         err = ufshcd_dev_cmd_completion(hba, lrbp);
2602         }
2603         spin_unlock_irqrestore(hba->host->host_lock, flags);
2604
2605         if (!time_left) {
2606                 err = -ETIMEDOUT;
2607                 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2608                         __func__, lrbp->task_tag);
2609                 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2610                         /* successfully cleared the command, retry if needed */
2611                         err = -EAGAIN;
2612                 /*
2613                  * in case of an error, after clearing the doorbell,
2614                  * we also need to clear the outstanding_request
2615                  * field in hba
2616                  */
2617                 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2618         }
2619
2620         return err;
2621 }
2622
2623 /**
2624  * ufshcd_get_dev_cmd_tag - Get device management command tag
2625  * @hba: per-adapter instance
2626  * @tag_out: pointer to variable with available slot value
2627  *
2628  * Get a free slot and lock it until device management command
2629  * completes.
2630  *
2631  * Returns false if free slot is unavailable for locking, else
2632  * return true with tag value in @tag.
2633  */
2634 static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
2635 {
2636         int tag;
2637         bool ret = false;
2638         unsigned long tmp;
2639
2640         if (!tag_out)
2641                 goto out;
2642
2643         do {
2644                 tmp = ~hba->lrb_in_use;
2645                 tag = find_last_bit(&tmp, hba->nutrs);
2646                 if (tag >= hba->nutrs)
2647                         goto out;
2648         } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
2649
2650         *tag_out = tag;
2651         ret = true;
2652 out:
2653         return ret;
2654 }
2655
2656 static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
2657 {
2658         clear_bit_unlock(tag, &hba->lrb_in_use);
2659 }
2660
2661 /**
2662  * ufshcd_exec_dev_cmd - API for sending device management requests
2663  * @hba: UFS hba
2664  * @cmd_type: specifies the type (NOP, Query...)
2665  * @timeout: time in seconds
2666  *
2667  * NOTE: Since there is only one available tag for device management commands,
2668  * it is expected you hold the hba->dev_cmd.lock mutex.
2669  */
2670 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2671                 enum dev_cmd_type cmd_type, int timeout)
2672 {
2673         struct ufshcd_lrb *lrbp;
2674         int err;
2675         int tag;
2676         struct completion wait;
2677         unsigned long flags;
2678
2679         down_read(&hba->clk_scaling_lock);
2680
2681         /*
2682          * Get free slot, sleep if slots are unavailable.
2683          * Even though we use wait_event() which sleeps indefinitely,
2684          * the maximum wait time is bounded by SCSI request timeout.
2685          */
2686         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
2687
2688         init_completion(&wait);
2689         lrbp = &hba->lrb[tag];
2690         WARN_ON(lrbp->cmd);
2691         err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2692         if (unlikely(err))
2693                 goto out_put_tag;
2694
2695         hba->dev_cmd.complete = &wait;
2696
2697         ufshcd_add_query_upiu_trace(hba, tag, "query_send");
2698         /* Make sure descriptors are ready before ringing the doorbell */
2699         wmb();
2700         spin_lock_irqsave(hba->host->host_lock, flags);
2701         ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2702         ufshcd_send_command(hba, tag);
2703         spin_unlock_irqrestore(hba->host->host_lock, flags);
2704
2705         err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2706
2707         ufshcd_add_query_upiu_trace(hba, tag,
2708                         err ? "query_complete_err" : "query_complete");
2709
2710 out_put_tag:
2711         ufshcd_put_dev_cmd_tag(hba, tag);
2712         wake_up(&hba->dev_cmd.tag_wq);
2713         up_read(&hba->clk_scaling_lock);
2714         return err;
2715 }
2716
2717 /**
2718  * ufshcd_init_query() - init the query response and request parameters
2719  * @hba: per-adapter instance
2720  * @request: address of the request pointer to be initialized
2721  * @response: address of the response pointer to be initialized
2722  * @opcode: operation to perform
2723  * @idn: flag idn to access
2724  * @index: LU number to access
2725  * @selector: query/flag/descriptor further identification
2726  */
2727 static inline void ufshcd_init_query(struct ufs_hba *hba,
2728                 struct ufs_query_req **request, struct ufs_query_res **response,
2729                 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2730 {
2731         *request = &hba->dev_cmd.query.request;
2732         *response = &hba->dev_cmd.query.response;
2733         memset(*request, 0, sizeof(struct ufs_query_req));
2734         memset(*response, 0, sizeof(struct ufs_query_res));
2735         (*request)->upiu_req.opcode = opcode;
2736         (*request)->upiu_req.idn = idn;
2737         (*request)->upiu_req.index = index;
2738         (*request)->upiu_req.selector = selector;
2739 }
2740
2741 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2742         enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2743 {
2744         int ret;
2745         int retries;
2746
2747         for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2748                 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2749                 if (ret)
2750                         dev_dbg(hba->dev,
2751                                 "%s: failed with error %d, retries %d\n",
2752                                 __func__, ret, retries);
2753                 else
2754                         break;
2755         }
2756
2757         if (ret)
2758                 dev_err(hba->dev,
2759                         "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2760                         __func__, opcode, idn, ret, retries);
2761         return ret;
2762 }
2763
2764 /**
2765  * ufshcd_query_flag() - API function for sending flag query requests
2766  * @hba: per-adapter instance
2767  * @opcode: flag query to perform
2768  * @idn: flag idn to access
2769  * @flag_res: the flag value after the query request completes
2770  *
2771  * Returns 0 for success, non-zero in case of failure
2772  */
2773 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2774                         enum flag_idn idn, bool *flag_res)
2775 {
2776         struct ufs_query_req *request = NULL;
2777         struct ufs_query_res *response = NULL;
2778         int err, index = 0, selector = 0;
2779         int timeout = QUERY_REQ_TIMEOUT;
2780
2781         BUG_ON(!hba);
2782
2783         ufshcd_hold(hba, false);
2784         mutex_lock(&hba->dev_cmd.lock);
2785         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2786                         selector);
2787
2788         switch (opcode) {
2789         case UPIU_QUERY_OPCODE_SET_FLAG:
2790         case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2791         case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2792                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2793                 break;
2794         case UPIU_QUERY_OPCODE_READ_FLAG:
2795                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2796                 if (!flag_res) {
2797                         /* No dummy reads */
2798                         dev_err(hba->dev, "%s: Invalid argument for read request\n",
2799                                         __func__);
2800                         err = -EINVAL;
2801                         goto out_unlock;
2802                 }
2803                 break;
2804         default:
2805                 dev_err(hba->dev,
2806                         "%s: Expected query flag opcode but got = %d\n",
2807                         __func__, opcode);
2808                 err = -EINVAL;
2809                 goto out_unlock;
2810         }
2811
2812         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2813
2814         if (err) {
2815                 dev_err(hba->dev,
2816                         "%s: Sending flag query for idn %d failed, err = %d\n",
2817                         __func__, idn, err);
2818                 goto out_unlock;
2819         }
2820
2821         if (flag_res)
2822                 *flag_res = (be32_to_cpu(response->upiu_res.value) &
2823                                 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2824
2825 out_unlock:
2826         mutex_unlock(&hba->dev_cmd.lock);
2827         ufshcd_release(hba);
2828         return err;
2829 }
2830
2831 /**
2832  * ufshcd_query_attr - API function for sending attribute requests
2833  * @hba: per-adapter instance
2834  * @opcode: attribute opcode
2835  * @idn: attribute idn to access
2836  * @index: index field
2837  * @selector: selector field
2838  * @attr_val: the attribute value after the query request completes
2839  *
2840  * Returns 0 for success, non-zero in case of failure
2841 */
2842 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2843                       enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2844 {
2845         struct ufs_query_req *request = NULL;
2846         struct ufs_query_res *response = NULL;
2847         int err;
2848
2849         BUG_ON(!hba);
2850
2851         ufshcd_hold(hba, false);
2852         if (!attr_val) {
2853                 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2854                                 __func__, opcode);
2855                 err = -EINVAL;
2856                 goto out;
2857         }
2858
2859         mutex_lock(&hba->dev_cmd.lock);
2860         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2861                         selector);
2862
2863         switch (opcode) {
2864         case UPIU_QUERY_OPCODE_WRITE_ATTR:
2865                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2866                 request->upiu_req.value = cpu_to_be32(*attr_val);
2867                 break;
2868         case UPIU_QUERY_OPCODE_READ_ATTR:
2869                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2870                 break;
2871         default:
2872                 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2873                                 __func__, opcode);
2874                 err = -EINVAL;
2875                 goto out_unlock;
2876         }
2877
2878         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2879
2880         if (err) {
2881                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2882                                 __func__, opcode, idn, index, err);
2883                 goto out_unlock;
2884         }
2885
2886         *attr_val = be32_to_cpu(response->upiu_res.value);
2887
2888 out_unlock:
2889         mutex_unlock(&hba->dev_cmd.lock);
2890 out:
2891         ufshcd_release(hba);
2892         return err;
2893 }
2894
2895 /**
2896  * ufshcd_query_attr_retry() - API function for sending query
2897  * attribute with retries
2898  * @hba: per-adapter instance
2899  * @opcode: attribute opcode
2900  * @idn: attribute idn to access
2901  * @index: index field
2902  * @selector: selector field
2903  * @attr_val: the attribute value after the query request
2904  * completes
2905  *
2906  * Returns 0 for success, non-zero in case of failure
2907 */
2908 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2909         enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2910         u32 *attr_val)
2911 {
2912         int ret = 0;
2913         u32 retries;
2914
2915          for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2916                 ret = ufshcd_query_attr(hba, opcode, idn, index,
2917                                                 selector, attr_val);
2918                 if (ret)
2919                         dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2920                                 __func__, ret, retries);
2921                 else
2922                         break;
2923         }
2924
2925         if (ret)
2926                 dev_err(hba->dev,
2927                         "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2928                         __func__, idn, ret, QUERY_REQ_RETRIES);
2929         return ret;
2930 }
2931
2932 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
2933                         enum query_opcode opcode, enum desc_idn idn, u8 index,
2934                         u8 selector, u8 *desc_buf, int *buf_len)
2935 {
2936         struct ufs_query_req *request = NULL;
2937         struct ufs_query_res *response = NULL;
2938         int err;
2939
2940         BUG_ON(!hba);
2941
2942         ufshcd_hold(hba, false);
2943         if (!desc_buf) {
2944                 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2945                                 __func__, opcode);
2946                 err = -EINVAL;
2947                 goto out;
2948         }
2949
2950         if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
2951                 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2952                                 __func__, *buf_len);
2953                 err = -EINVAL;
2954                 goto out;
2955         }
2956
2957         mutex_lock(&hba->dev_cmd.lock);
2958         ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2959                         selector);
2960         hba->dev_cmd.query.descriptor = desc_buf;
2961         request->upiu_req.length = cpu_to_be16(*buf_len);
2962
2963         switch (opcode) {
2964         case UPIU_QUERY_OPCODE_WRITE_DESC:
2965                 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2966                 break;
2967         case UPIU_QUERY_OPCODE_READ_DESC:
2968                 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2969                 break;
2970         default:
2971                 dev_err(hba->dev,
2972                                 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2973                                 __func__, opcode);
2974                 err = -EINVAL;
2975                 goto out_unlock;
2976         }
2977
2978         err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2979
2980         if (err) {
2981                 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2982                                 __func__, opcode, idn, index, err);
2983                 goto out_unlock;
2984         }
2985
2986         hba->dev_cmd.query.descriptor = NULL;
2987         *buf_len = be16_to_cpu(response->upiu_res.length);
2988
2989 out_unlock:
2990         mutex_unlock(&hba->dev_cmd.lock);
2991 out:
2992         ufshcd_release(hba);
2993         return err;
2994 }
2995
2996 /**
2997  * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2998  * @hba: per-adapter instance
2999  * @opcode: attribute opcode
3000  * @idn: attribute idn to access
3001  * @index: index field
3002  * @selector: selector field
3003  * @desc_buf: the buffer that contains the descriptor
3004  * @buf_len: length parameter passed to the device
3005  *
3006  * Returns 0 for success, non-zero in case of failure.
3007  * The buf_len parameter will contain, on return, the length parameter
3008  * received on the response.
3009  */
3010 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
3011                                   enum query_opcode opcode,
3012                                   enum desc_idn idn, u8 index,
3013                                   u8 selector,
3014                                   u8 *desc_buf, int *buf_len)
3015 {
3016         int err;
3017         int retries;
3018
3019         for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
3020                 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
3021                                                 selector, desc_buf, buf_len);
3022                 if (!err || err == -EINVAL)
3023                         break;
3024         }
3025
3026         return err;
3027 }
3028
3029 /**
3030  * ufshcd_read_desc_length - read the specified descriptor length from header
3031  * @hba: Pointer to adapter instance
3032  * @desc_id: descriptor idn value
3033  * @desc_index: descriptor index
3034  * @desc_length: pointer to variable to read the length of descriptor
3035  *
3036  * Return 0 in case of success, non-zero otherwise
3037  */
3038 static int ufshcd_read_desc_length(struct ufs_hba *hba,
3039         enum desc_idn desc_id,
3040         int desc_index,
3041         int *desc_length)
3042 {
3043         int ret;
3044         u8 header[QUERY_DESC_HDR_SIZE];
3045         int header_len = QUERY_DESC_HDR_SIZE;
3046
3047         if (desc_id >= QUERY_DESC_IDN_MAX)
3048                 return -EINVAL;
3049
3050         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3051                                         desc_id, desc_index, 0, header,
3052                                         &header_len);
3053
3054         if (ret) {
3055                 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
3056                         __func__, desc_id);
3057                 return ret;
3058         } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
3059                 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
3060                         __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3061                         desc_id);
3062                 ret = -EINVAL;
3063         }
3064
3065         *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3066         return ret;
3067
3068 }
3069
3070 /**
3071  * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3072  * @hba: Pointer to adapter instance
3073  * @desc_id: descriptor idn value
3074  * @desc_len: mapped desc length (out)
3075  *
3076  * Return 0 in case of success, non-zero otherwise
3077  */
3078 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3079         enum desc_idn desc_id, int *desc_len)
3080 {
3081         switch (desc_id) {
3082         case QUERY_DESC_IDN_DEVICE:
3083                 *desc_len = hba->desc_size.dev_desc;
3084                 break;
3085         case QUERY_DESC_IDN_POWER:
3086                 *desc_len = hba->desc_size.pwr_desc;
3087                 break;
3088         case QUERY_DESC_IDN_GEOMETRY:
3089                 *desc_len = hba->desc_size.geom_desc;
3090                 break;
3091         case QUERY_DESC_IDN_CONFIGURATION:
3092                 *desc_len = hba->desc_size.conf_desc;
3093                 break;
3094         case QUERY_DESC_IDN_UNIT:
3095                 *desc_len = hba->desc_size.unit_desc;
3096                 break;
3097         case QUERY_DESC_IDN_INTERCONNECT:
3098                 *desc_len = hba->desc_size.interc_desc;
3099                 break;
3100         case QUERY_DESC_IDN_STRING:
3101                 *desc_len = QUERY_DESC_MAX_SIZE;
3102                 break;
3103         case QUERY_DESC_IDN_HEALTH:
3104                 *desc_len = hba->desc_size.hlth_desc;
3105                 break;
3106         case QUERY_DESC_IDN_RFU_0:
3107         case QUERY_DESC_IDN_RFU_1:
3108                 *desc_len = 0;
3109                 break;
3110         default:
3111                 *desc_len = 0;
3112                 return -EINVAL;
3113         }
3114         return 0;
3115 }
3116 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3117
3118 /**
3119  * ufshcd_read_desc_param - read the specified descriptor parameter
3120  * @hba: Pointer to adapter instance
3121  * @desc_id: descriptor idn value
3122  * @desc_index: descriptor index
3123  * @param_offset: offset of the parameter to read
3124  * @param_read_buf: pointer to buffer where parameter would be read
3125  * @param_size: sizeof(param_read_buf)
3126  *
3127  * Return 0 in case of success, non-zero otherwise
3128  */
3129 int ufshcd_read_desc_param(struct ufs_hba *hba,
3130                            enum desc_idn desc_id,
3131                            int desc_index,
3132                            u8 param_offset,
3133                            u8 *param_read_buf,
3134                            u8 param_size)
3135 {
3136         int ret;
3137         u8 *desc_buf;
3138         int buff_len;
3139         bool is_kmalloc = true;
3140
3141         /* Safety check */
3142         if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3143                 return -EINVAL;
3144
3145         /* Get the max length of descriptor from structure filled up at probe
3146          * time.
3147          */
3148         ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3149
3150         /* Sanity checks */
3151         if (ret || !buff_len) {
3152                 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3153                         __func__);
3154                 return ret;
3155         }
3156
3157         /* Check whether we need temp memory */
3158         if (param_offset != 0 || param_size < buff_len) {
3159                 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3160                 if (!desc_buf)
3161                         return -ENOMEM;
3162         } else {
3163                 desc_buf = param_read_buf;
3164                 is_kmalloc = false;
3165         }
3166
3167         /* Request for full descriptor */
3168         ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3169                                         desc_id, desc_index, 0,
3170                                         desc_buf, &buff_len);
3171
3172         if (ret) {
3173                 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3174                         __func__, desc_id, desc_index, param_offset, ret);
3175                 goto out;
3176         }
3177
3178         /* Sanity check */
3179         if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3180                 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3181                         __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3182                 ret = -EINVAL;
3183                 goto out;
3184         }
3185
3186         /* Check wherher we will not copy more data, than available */
3187         if (is_kmalloc && param_size > buff_len)
3188                 param_size = buff_len;
3189
3190         if (is_kmalloc)
3191                 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3192 out:
3193         if (is_kmalloc)
3194                 kfree(desc_buf);
3195         return ret;
3196 }
3197
3198 static inline int ufshcd_read_desc(struct ufs_hba *hba,
3199                                    enum desc_idn desc_id,
3200                                    int desc_index,
3201                                    u8 *buf,
3202                                    u32 size)
3203 {
3204         return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3205 }
3206
3207 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3208                                          u8 *buf,
3209                                          u32 size)
3210 {
3211         return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3212 }
3213
3214 static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3215 {
3216         return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3217 }
3218
3219 /**
3220  * ufshcd_read_string_desc - read string descriptor
3221  * @hba: pointer to adapter instance
3222  * @desc_index: descriptor index
3223  * @buf: pointer to buffer where descriptor would be read
3224  * @size: size of buf
3225  * @ascii: if true convert from unicode to ascii characters
3226  *
3227  * Return 0 in case of success, non-zero otherwise
3228  */
3229 int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index,
3230                             u8 *buf, u32 size, bool ascii)
3231 {
3232         int err = 0;
3233
3234         err = ufshcd_read_desc(hba,
3235                                 QUERY_DESC_IDN_STRING, desc_index, buf, size);
3236
3237         if (err) {
3238                 dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n",
3239                         __func__, QUERY_REQ_RETRIES, err);
3240                 goto out;
3241         }
3242
3243         if (ascii) {
3244                 int desc_len;
3245                 int ascii_len;
3246                 int i;
3247                 char *buff_ascii;
3248
3249                 desc_len = buf[0];
3250                 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3251                 ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3252                 if (size < ascii_len + QUERY_DESC_HDR_SIZE) {
3253                         dev_err(hba->dev, "%s: buffer allocated size is too small\n",
3254                                         __func__);
3255                         err = -ENOMEM;
3256                         goto out;
3257                 }
3258
3259                 buff_ascii = kmalloc(ascii_len, GFP_KERNEL);
3260                 if (!buff_ascii) {
3261                         err = -ENOMEM;
3262                         goto out;
3263                 }
3264
3265                 /*
3266                  * the descriptor contains string in UTF16 format
3267                  * we need to convert to utf-8 so it can be displayed
3268                  */
3269                 utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE],
3270                                 desc_len - QUERY_DESC_HDR_SIZE,
3271                                 UTF16_BIG_ENDIAN, buff_ascii, ascii_len);
3272
3273                 /* replace non-printable or non-ASCII characters with spaces */
3274                 for (i = 0; i < ascii_len; i++)
3275                         ufshcd_remove_non_printable(&buff_ascii[i]);
3276
3277                 memset(buf + QUERY_DESC_HDR_SIZE, 0,
3278                                 size - QUERY_DESC_HDR_SIZE);
3279                 memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len);
3280                 buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE;
3281                 kfree(buff_ascii);
3282         }
3283 out:
3284         return err;
3285 }
3286
3287 /**
3288  * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3289  * @hba: Pointer to adapter instance
3290  * @lun: lun id
3291  * @param_offset: offset of the parameter to read
3292  * @param_read_buf: pointer to buffer where parameter would be read
3293  * @param_size: sizeof(param_read_buf)
3294  *
3295  * Return 0 in case of success, non-zero otherwise
3296  */
3297 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3298                                               int lun,
3299                                               enum unit_desc_param param_offset,
3300                                               u8 *param_read_buf,
3301                                               u32 param_size)
3302 {
3303         /*
3304          * Unit descriptors are only available for general purpose LUs (LUN id
3305          * from 0 to 7) and RPMB Well known LU.
3306          */
3307         if (!ufs_is_valid_unit_desc_lun(lun))
3308                 return -EOPNOTSUPP;
3309
3310         return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3311                                       param_offset, param_read_buf, param_size);
3312 }
3313
3314 /**
3315  * ufshcd_memory_alloc - allocate memory for host memory space data structures
3316  * @hba: per adapter instance
3317  *
3318  * 1. Allocate DMA memory for Command Descriptor array
3319  *      Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3320  * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3321  * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3322  *      (UTMRDL)
3323  * 4. Allocate memory for local reference block(lrb).
3324  *
3325  * Returns 0 for success, non-zero in case of failure
3326  */
3327 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3328 {
3329         size_t utmrdl_size, utrdl_size, ucdl_size;
3330
3331         /* Allocate memory for UTP command descriptors */
3332         ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3333         hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3334                                                   ucdl_size,
3335                                                   &hba->ucdl_dma_addr,
3336                                                   GFP_KERNEL);
3337
3338         /*
3339          * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3340          * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3341          * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3342          * be aligned to 128 bytes as well
3343          */
3344         if (!hba->ucdl_base_addr ||
3345             WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3346                 dev_err(hba->dev,
3347                         "Command Descriptor Memory allocation failed\n");
3348                 goto out;
3349         }
3350
3351         /*
3352          * Allocate memory for UTP Transfer descriptors
3353          * UFSHCI requires 1024 byte alignment of UTRD
3354          */
3355         utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3356         hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3357                                                    utrdl_size,
3358                                                    &hba->utrdl_dma_addr,
3359                                                    GFP_KERNEL);
3360         if (!hba->utrdl_base_addr ||
3361             WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3362                 dev_err(hba->dev,
3363                         "Transfer Descriptor Memory allocation failed\n");
3364                 goto out;
3365         }
3366
3367         /*
3368          * Allocate memory for UTP Task Management descriptors
3369          * UFSHCI requires 1024 byte alignment of UTMRD
3370          */
3371         utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3372         hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3373                                                     utmrdl_size,
3374                                                     &hba->utmrdl_dma_addr,
3375                                                     GFP_KERNEL);
3376         if (!hba->utmrdl_base_addr ||
3377             WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3378                 dev_err(hba->dev,
3379                 "Task Management Descriptor Memory allocation failed\n");
3380                 goto out;
3381         }
3382
3383         /* Allocate memory for local reference block */
3384         hba->lrb = devm_kcalloc(hba->dev,
3385                                 hba->nutrs, sizeof(struct ufshcd_lrb),
3386                                 GFP_KERNEL);
3387         if (!hba->lrb) {
3388                 dev_err(hba->dev, "LRB Memory allocation failed\n");
3389                 goto out;
3390         }
3391         return 0;
3392 out:
3393         return -ENOMEM;
3394 }
3395
3396 /**
3397  * ufshcd_host_memory_configure - configure local reference block with
3398  *                              memory offsets
3399  * @hba: per adapter instance
3400  *
3401  * Configure Host memory space
3402  * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3403  * address.
3404  * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3405  * and PRDT offset.
3406  * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3407  * into local reference block.
3408  */
3409 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3410 {
3411         struct utp_transfer_cmd_desc *cmd_descp;
3412         struct utp_transfer_req_desc *utrdlp;
3413         dma_addr_t cmd_desc_dma_addr;
3414         dma_addr_t cmd_desc_element_addr;
3415         u16 response_offset;
3416         u16 prdt_offset;
3417         int cmd_desc_size;
3418         int i;
3419
3420         utrdlp = hba->utrdl_base_addr;
3421         cmd_descp = hba->ucdl_base_addr;
3422
3423         response_offset =
3424                 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3425         prdt_offset =
3426                 offsetof(struct utp_transfer_cmd_desc, prd_table);
3427
3428         cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3429         cmd_desc_dma_addr = hba->ucdl_dma_addr;
3430
3431         for (i = 0; i < hba->nutrs; i++) {
3432                 /* Configure UTRD with command descriptor base address */
3433                 cmd_desc_element_addr =
3434                                 (cmd_desc_dma_addr + (cmd_desc_size * i));
3435                 utrdlp[i].command_desc_base_addr_lo =
3436                                 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3437                 utrdlp[i].command_desc_base_addr_hi =
3438                                 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3439
3440                 /* Response upiu and prdt offset should be in double words */
3441                 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3442                         utrdlp[i].response_upiu_offset =
3443                                 cpu_to_le16(response_offset);
3444                         utrdlp[i].prd_table_offset =
3445                                 cpu_to_le16(prdt_offset);
3446                         utrdlp[i].response_upiu_length =
3447                                 cpu_to_le16(ALIGNED_UPIU_SIZE);
3448                 } else {
3449                         utrdlp[i].response_upiu_offset =
3450                                 cpu_to_le16((response_offset >> 2));
3451                         utrdlp[i].prd_table_offset =
3452                                 cpu_to_le16((prdt_offset >> 2));
3453                         utrdlp[i].response_upiu_length =
3454                                 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3455                 }
3456
3457                 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
3458                 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3459                                 (i * sizeof(struct utp_transfer_req_desc));
3460                 hba->lrb[i].ucd_req_ptr =
3461                         (struct utp_upiu_req *)(cmd_descp + i);
3462                 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
3463                 hba->lrb[i].ucd_rsp_ptr =
3464                         (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
3465                 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3466                                 response_offset;
3467                 hba->lrb[i].ucd_prdt_ptr =
3468                         (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
3469                 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3470                                 prdt_offset;
3471         }
3472 }
3473
3474 /**
3475  * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3476  * @hba: per adapter instance
3477  *
3478  * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3479  * in order to initialize the Unipro link startup procedure.
3480  * Once the Unipro links are up, the device connected to the controller
3481  * is detected.
3482  *
3483  * Returns 0 on success, non-zero value on failure
3484  */
3485 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3486 {
3487         struct uic_command uic_cmd = {0};
3488         int ret;
3489
3490         uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3491
3492         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3493         if (ret)
3494                 dev_dbg(hba->dev,
3495                         "dme-link-startup: error code %d\n", ret);
3496         return ret;
3497 }
3498 /**
3499  * ufshcd_dme_reset - UIC command for DME_RESET
3500  * @hba: per adapter instance
3501  *
3502  * DME_RESET command is issued in order to reset UniPro stack.
3503  * This function now deal with cold reset.
3504  *
3505  * Returns 0 on success, non-zero value on failure
3506  */
3507 static int ufshcd_dme_reset(struct ufs_hba *hba)
3508 {
3509         struct uic_command uic_cmd = {0};
3510         int ret;
3511
3512         uic_cmd.command = UIC_CMD_DME_RESET;
3513
3514         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3515         if (ret)
3516                 dev_err(hba->dev,
3517                         "dme-reset: error code %d\n", ret);
3518
3519         return ret;
3520 }
3521
3522 /**
3523  * ufshcd_dme_enable - UIC command for DME_ENABLE
3524  * @hba: per adapter instance
3525  *
3526  * DME_ENABLE command is issued in order to enable UniPro stack.
3527  *
3528  * Returns 0 on success, non-zero value on failure
3529  */
3530 static int ufshcd_dme_enable(struct ufs_hba *hba)
3531 {
3532         struct uic_command uic_cmd = {0};
3533         int ret;
3534
3535         uic_cmd.command = UIC_CMD_DME_ENABLE;
3536
3537         ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3538         if (ret)
3539                 dev_err(hba->dev,
3540                         "dme-reset: error code %d\n", ret);
3541
3542         return ret;
3543 }
3544
3545 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3546 {
3547         #define MIN_DELAY_BEFORE_DME_CMDS_US    1000
3548         unsigned long min_sleep_time_us;
3549
3550         if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3551                 return;
3552
3553         /*
3554          * last_dme_cmd_tstamp will be 0 only for 1st call to
3555          * this function
3556          */
3557         if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3558                 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3559         } else {
3560                 unsigned long delta =
3561                         (unsigned long) ktime_to_us(
3562                                 ktime_sub(ktime_get(),
3563                                 hba->last_dme_cmd_tstamp));
3564
3565                 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3566                         min_sleep_time_us =
3567                                 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3568                 else
3569                         return; /* no more delay required */
3570         }
3571
3572         /* allow sleep for extra 50us if needed */
3573         usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3574 }
3575
3576 /**
3577  * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3578  * @hba: per adapter instance
3579  * @attr_sel: uic command argument1
3580  * @attr_set: attribute set type as uic command argument2
3581  * @mib_val: setting value as uic command argument3
3582  * @peer: indicate whether peer or local
3583  *
3584  * Returns 0 on success, non-zero value on failure
3585  */
3586 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3587                         u8 attr_set, u32 mib_val, u8 peer)
3588 {
3589         struct uic_command uic_cmd = {0};
3590         static const char *const action[] = {
3591                 "dme-set",
3592                 "dme-peer-set"
3593         };
3594         const char *set = action[!!peer];
3595         int ret;
3596         int retries = UFS_UIC_COMMAND_RETRIES;
3597
3598         uic_cmd.command = peer ?
3599                 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3600         uic_cmd.argument1 = attr_sel;
3601         uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3602         uic_cmd.argument3 = mib_val;
3603
3604         do {
3605                 /* for peer attributes we retry upon failure */
3606                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3607                 if (ret)
3608                         dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3609                                 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3610         } while (ret && peer && --retries);
3611
3612         if (ret)
3613                 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3614                         set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3615                         UFS_UIC_COMMAND_RETRIES - retries);
3616
3617         return ret;
3618 }
3619 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3620
3621 /**
3622  * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3623  * @hba: per adapter instance
3624  * @attr_sel: uic command argument1
3625  * @mib_val: the value of the attribute as returned by the UIC command
3626  * @peer: indicate whether peer or local
3627  *
3628  * Returns 0 on success, non-zero value on failure
3629  */
3630 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3631                         u32 *mib_val, u8 peer)
3632 {
3633         struct uic_command uic_cmd = {0};
3634         static const char *const action[] = {
3635                 "dme-get",
3636                 "dme-peer-get"
3637         };
3638         const char *get = action[!!peer];
3639         int ret;
3640         int retries = UFS_UIC_COMMAND_RETRIES;
3641         struct ufs_pa_layer_attr orig_pwr_info;
3642         struct ufs_pa_layer_attr temp_pwr_info;
3643         bool pwr_mode_change = false;
3644
3645         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3646                 orig_pwr_info = hba->pwr_info;
3647                 temp_pwr_info = orig_pwr_info;
3648
3649                 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3650                     orig_pwr_info.pwr_rx == FAST_MODE) {
3651                         temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3652                         temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3653                         pwr_mode_change = true;
3654                 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3655                     orig_pwr_info.pwr_rx == SLOW_MODE) {
3656                         temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3657                         temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3658                         pwr_mode_change = true;
3659                 }
3660                 if (pwr_mode_change) {
3661                         ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3662                         if (ret)
3663                                 goto out;
3664                 }
3665         }
3666
3667         uic_cmd.command = peer ?
3668                 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3669         uic_cmd.argument1 = attr_sel;
3670
3671         do {
3672                 /* for peer attributes we retry upon failure */
3673                 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3674                 if (ret)
3675                         dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3676                                 get, UIC_GET_ATTR_ID(attr_sel), ret);
3677         } while (ret && peer && --retries);
3678
3679         if (ret)
3680                 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3681                         get, UIC_GET_ATTR_ID(attr_sel),
3682                         UFS_UIC_COMMAND_RETRIES - retries);
3683
3684         if (mib_val && !ret)
3685                 *mib_val = uic_cmd.argument3;
3686
3687         if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3688             && pwr_mode_change)
3689                 ufshcd_change_power_mode(hba, &orig_pwr_info);
3690 out:
3691         return ret;
3692 }
3693 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3694
3695 /**
3696  * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3697  * state) and waits for it to take effect.
3698  *
3699  * @hba: per adapter instance
3700  * @cmd: UIC command to execute
3701  *
3702  * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3703  * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3704  * and device UniPro link and hence it's final completion would be indicated by
3705  * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3706  * addition to normal UIC command completion Status (UCCS). This function only
3707  * returns after the relevant status bits indicate the completion.
3708  *
3709  * Returns 0 on success, non-zero value on failure
3710  */
3711 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3712 {
3713         struct completion uic_async_done;
3714         unsigned long flags;
3715         u8 status;
3716         int ret;
3717         bool reenable_intr = false;
3718
3719         mutex_lock(&hba->uic_cmd_mutex);
3720         init_completion(&uic_async_done);
3721         ufshcd_add_delay_before_dme_cmd(hba);
3722
3723         spin_lock_irqsave(hba->host->host_lock, flags);
3724         hba->uic_async_done = &uic_async_done;
3725         if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3726                 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3727                 /*
3728                  * Make sure UIC command completion interrupt is disabled before
3729                  * issuing UIC command.
3730                  */
3731                 wmb();
3732                 reenable_intr = true;
3733         }
3734         ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3735         spin_unlock_irqrestore(hba->host->host_lock, flags);
3736         if (ret) {
3737                 dev_err(hba->dev,
3738                         "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3739                         cmd->command, cmd->argument3, ret);
3740                 goto out;
3741         }
3742
3743         if (!wait_for_completion_timeout(hba->uic_async_done,
3744                                          msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3745                 dev_err(hba->dev,
3746                         "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3747                         cmd->command, cmd->argument3);
3748                 ret = -ETIMEDOUT;
3749                 goto out;
3750         }
3751
3752         status = ufshcd_get_upmcrs(hba);
3753         if (status != PWR_LOCAL) {
3754                 dev_err(hba->dev,
3755                         "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3756                         cmd->command, status);
3757                 ret = (status != PWR_OK) ? status : -1;
3758         }
3759 out:
3760         if (ret) {
3761                 ufshcd_print_host_state(hba);
3762                 ufshcd_print_pwr_info(hba);
3763                 ufshcd_print_host_regs(hba);
3764         }
3765
3766         spin_lock_irqsave(hba->host->host_lock, flags);
3767         hba->active_uic_cmd = NULL;
3768         hba->uic_async_done = NULL;
3769         if (reenable_intr)
3770                 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3771         spin_unlock_irqrestore(hba->host->host_lock, flags);
3772         mutex_unlock(&hba->uic_cmd_mutex);
3773
3774         return ret;
3775 }
3776
3777 /**
3778  * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3779  *                              using DME_SET primitives.
3780  * @hba: per adapter instance
3781  * @mode: powr mode value
3782  *
3783  * Returns 0 on success, non-zero value on failure
3784  */
3785 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
3786 {
3787         struct uic_command uic_cmd = {0};
3788         int ret;
3789
3790         if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3791                 ret = ufshcd_dme_set(hba,
3792                                 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3793                 if (ret) {
3794                         dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3795                                                 __func__, ret);
3796                         goto out;
3797                 }
3798         }
3799
3800         uic_cmd.command = UIC_CMD_DME_SET;
3801         uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3802         uic_cmd.argument3 = mode;
3803         ufshcd_hold(hba, false);
3804         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3805         ufshcd_release(hba);
3806
3807 out:
3808         return ret;
3809 }
3810
3811 static int ufshcd_link_recovery(struct ufs_hba *hba)
3812 {
3813         int ret;
3814         unsigned long flags;
3815
3816         spin_lock_irqsave(hba->host->host_lock, flags);
3817         hba->ufshcd_state = UFSHCD_STATE_RESET;
3818         ufshcd_set_eh_in_progress(hba);
3819         spin_unlock_irqrestore(hba->host->host_lock, flags);
3820
3821         ret = ufshcd_host_reset_and_restore(hba);
3822
3823         spin_lock_irqsave(hba->host->host_lock, flags);
3824         if (ret)
3825                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3826         ufshcd_clear_eh_in_progress(hba);
3827         spin_unlock_irqrestore(hba->host->host_lock, flags);
3828
3829         if (ret)
3830                 dev_err(hba->dev, "%s: link recovery failed, err %d",
3831                         __func__, ret);
3832
3833         return ret;
3834 }
3835
3836 static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3837 {
3838         int ret;
3839         struct uic_command uic_cmd = {0};
3840         ktime_t start = ktime_get();
3841
3842         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3843
3844         uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3845         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3846         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3847                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3848
3849         if (ret) {
3850                 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3851                         __func__, ret);
3852
3853                 /*
3854                  * If link recovery fails then return error so that caller
3855                  * don't retry the hibern8 enter again.
3856                  */
3857                 if (ufshcd_link_recovery(hba))
3858                         ret = -ENOLINK;
3859         } else
3860                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3861                                                                 POST_CHANGE);
3862
3863         return ret;
3864 }
3865
3866 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3867 {
3868         int ret = 0, retries;
3869
3870         for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3871                 ret = __ufshcd_uic_hibern8_enter(hba);
3872                 if (!ret || ret == -ENOLINK)
3873                         goto out;
3874         }
3875 out:
3876         return ret;
3877 }
3878
3879 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3880 {
3881         struct uic_command uic_cmd = {0};
3882         int ret;
3883         ktime_t start = ktime_get();
3884
3885         ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3886
3887         uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3888         ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3889         trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3890                              ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3891
3892         if (ret) {
3893                 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3894                         __func__, ret);
3895                 ret = ufshcd_link_recovery(hba);
3896         } else {
3897                 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3898                                                                 POST_CHANGE);
3899                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3900                 hba->ufs_stats.hibern8_exit_cnt++;
3901         }
3902
3903         return ret;
3904 }
3905
3906 static void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3907 {
3908         unsigned long flags;
3909
3910         if (!(hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) || !hba->ahit)
3911                 return;
3912
3913         spin_lock_irqsave(hba->host->host_lock, flags);
3914         ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3915         spin_unlock_irqrestore(hba->host->host_lock, flags);
3916 }
3917
3918  /**
3919  * ufshcd_init_pwr_info - setting the POR (power on reset)
3920  * values in hba power info
3921  * @hba: per-adapter instance
3922  */
3923 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3924 {
3925         hba->pwr_info.gear_rx = UFS_PWM_G1;
3926         hba->pwr_info.gear_tx = UFS_PWM_G1;
3927         hba->pwr_info.lane_rx = 1;
3928         hba->pwr_info.lane_tx = 1;
3929         hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3930         hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3931         hba->pwr_info.hs_rate = 0;
3932 }
3933
3934 /**
3935  * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3936  * @hba: per-adapter instance
3937  */
3938 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
3939 {
3940         struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3941
3942         if (hba->max_pwr_info.is_valid)
3943                 return 0;
3944
3945         pwr_info->pwr_tx = FAST_MODE;
3946         pwr_info->pwr_rx = FAST_MODE;
3947         pwr_info->hs_rate = PA_HS_MODE_B;
3948
3949         /* Get the connected lane count */
3950         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3951                         &pwr_info->lane_rx);
3952         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3953                         &pwr_info->lane_tx);
3954
3955         if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3956                 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3957                                 __func__,
3958                                 pwr_info->lane_rx,
3959                                 pwr_info->lane_tx);
3960                 return -EINVAL;
3961         }
3962
3963         /*
3964          * First, get the maximum gears of HS speed.
3965          * If a zero value, it means there is no HSGEAR capability.
3966          * Then, get the maximum gears of PWM speed.
3967          */
3968         ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3969         if (!pwr_info->gear_rx) {
3970                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3971                                 &pwr_info->gear_rx);
3972                 if (!pwr_info->gear_rx) {
3973                         dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3974                                 __func__, pwr_info->gear_rx);
3975                         return -EINVAL;
3976                 }
3977                 pwr_info->pwr_rx = SLOW_MODE;
3978         }
3979
3980         ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3981                         &pwr_info->gear_tx);
3982         if (!pwr_info->gear_tx) {
3983                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3984                                 &pwr_info->gear_tx);
3985                 if (!pwr_info->gear_tx) {
3986                         dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3987                                 __func__, pwr_info->gear_tx);
3988                         return -EINVAL;
3989                 }
3990                 pwr_info->pwr_tx = SLOW_MODE;
3991         }
3992
3993         hba->max_pwr_info.is_valid = true;
3994         return 0;
3995 }
3996
3997 static int ufshcd_change_power_mode(struct ufs_hba *hba,
3998                              struct ufs_pa_layer_attr *pwr_mode)
3999 {
4000         int ret;
4001
4002         /* if already configured to the requested pwr_mode */
4003         if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
4004             pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
4005             pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
4006             pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
4007             pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
4008             pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
4009             pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
4010                 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4011                 return 0;
4012         }
4013
4014         /*
4015          * Configure attributes for power mode change with below.
4016          * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4017          * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4018          * - PA_HSSERIES
4019          */
4020         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4021         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4022                         pwr_mode->lane_rx);
4023         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4024                         pwr_mode->pwr_rx == FAST_MODE)
4025                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4026         else
4027                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4028
4029         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4030         ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4031                         pwr_mode->lane_tx);
4032         if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4033                         pwr_mode->pwr_tx == FAST_MODE)
4034                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4035         else
4036                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4037
4038         if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4039             pwr_mode->pwr_tx == FASTAUTO_MODE ||
4040             pwr_mode->pwr_rx == FAST_MODE ||
4041             pwr_mode->pwr_tx == FAST_MODE)
4042                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4043                                                 pwr_mode->hs_rate);
4044
4045         ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4046                         | pwr_mode->pwr_tx);
4047
4048         if (ret) {
4049                 dev_err(hba->dev,
4050                         "%s: power mode change failed %d\n", __func__, ret);
4051         } else {
4052                 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4053                                                                 pwr_mode);
4054
4055                 memcpy(&hba->pwr_info, pwr_mode,
4056                         sizeof(struct ufs_pa_layer_attr));
4057         }
4058
4059         return ret;
4060 }
4061
4062 /**
4063  * ufshcd_config_pwr_mode - configure a new power mode
4064  * @hba: per-adapter instance
4065  * @desired_pwr_mode: desired power configuration
4066  */
4067 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4068                 struct ufs_pa_layer_attr *desired_pwr_mode)
4069 {
4070         struct ufs_pa_layer_attr final_params = { 0 };
4071         int ret;
4072
4073         ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4074                                         desired_pwr_mode, &final_params);
4075
4076         if (ret)
4077                 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4078
4079         ret = ufshcd_change_power_mode(hba, &final_params);
4080         if (!ret)
4081                 ufshcd_print_pwr_info(hba);
4082
4083         return ret;
4084 }
4085 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4086
4087 /**
4088  * ufshcd_complete_dev_init() - checks device readiness
4089  * @hba: per-adapter instance
4090  *
4091  * Set fDeviceInit flag and poll until device toggles it.
4092  */
4093 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4094 {
4095         int i;
4096         int err;
4097         bool flag_res = 1;
4098
4099         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4100                 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
4101         if (err) {
4102                 dev_err(hba->dev,
4103                         "%s setting fDeviceInit flag failed with error %d\n",
4104                         __func__, err);
4105                 goto out;
4106         }
4107
4108         /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4109         for (i = 0; i < 1000 && !err && flag_res; i++)
4110                 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4111                         QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4112
4113         if (err)
4114                 dev_err(hba->dev,
4115                         "%s reading fDeviceInit flag failed with error %d\n",
4116                         __func__, err);
4117         else if (flag_res)
4118                 dev_err(hba->dev,
4119                         "%s fDeviceInit was not cleared by the device\n",
4120                         __func__);
4121
4122 out:
4123         return err;
4124 }
4125
4126 /**
4127  * ufshcd_make_hba_operational - Make UFS controller operational
4128  * @hba: per adapter instance
4129  *
4130  * To bring UFS host controller to operational state,
4131  * 1. Enable required interrupts
4132  * 2. Configure interrupt aggregation
4133  * 3. Program UTRL and UTMRL base address
4134  * 4. Configure run-stop-registers
4135  *
4136  * Returns 0 on success, non-zero value on failure
4137  */
4138 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4139 {
4140         int err = 0;
4141         u32 reg;
4142
4143         /* Enable required interrupts */
4144         ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4145
4146         /* Configure interrupt aggregation */
4147         if (ufshcd_is_intr_aggr_allowed(hba))
4148                 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4149         else
4150                 ufshcd_disable_intr_aggr(hba);
4151
4152         /* Configure UTRL and UTMRL base address registers */
4153         ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4154                         REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4155         ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4156                         REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4157         ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4158                         REG_UTP_TASK_REQ_LIST_BASE_L);
4159         ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4160                         REG_UTP_TASK_REQ_LIST_BASE_H);
4161
4162         /*
4163          * Make sure base address and interrupt setup are updated before
4164          * enabling the run/stop registers below.
4165          */
4166         wmb();
4167
4168         /*
4169          * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4170          */
4171         reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4172         if (!(ufshcd_get_lists_status(reg))) {
4173                 ufshcd_enable_run_stop_reg(hba);
4174         } else {
4175                 dev_err(hba->dev,
4176                         "Host controller not ready to process requests");
4177                 err = -EIO;
4178                 goto out;
4179         }
4180
4181 out:
4182         return err;
4183 }
4184
4185 /**
4186  * ufshcd_hba_stop - Send controller to reset state
4187  * @hba: per adapter instance
4188  * @can_sleep: perform sleep or just spin
4189  */
4190 static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4191 {
4192         int err;
4193
4194         ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
4195         err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4196                                         CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4197                                         10, 1, can_sleep);
4198         if (err)
4199                 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4200 }
4201
4202 /**
4203  * ufshcd_hba_execute_hce - initialize the controller
4204  * @hba: per adapter instance
4205  *
4206  * The controller resets itself and controller firmware initialization
4207  * sequence kicks off. When controller is ready it will set
4208  * the Host Controller Enable bit to 1.
4209  *
4210  * Returns 0 on success, non-zero value on failure
4211  */
4212 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4213 {
4214         int retry;
4215
4216         /*
4217          * msleep of 1 and 5 used in this function might result in msleep(20),
4218          * but it was necessary to send the UFS FPGA to reset mode during
4219          * development and testing of this driver. msleep can be changed to
4220          * mdelay and retry count can be reduced based on the controller.
4221          */
4222         if (!ufshcd_is_hba_active(hba))
4223                 /* change controller state to "reset state" */
4224                 ufshcd_hba_stop(hba, true);
4225
4226         /* UniPro link is disabled at this point */
4227         ufshcd_set_link_off(hba);
4228
4229         ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4230
4231         /* start controller initialization sequence */
4232         ufshcd_hba_start(hba);
4233
4234         /*
4235          * To initialize a UFS host controller HCE bit must be set to 1.
4236          * During initialization the HCE bit value changes from 1->0->1.
4237          * When the host controller completes initialization sequence
4238          * it sets the value of HCE bit to 1. The same HCE bit is read back
4239          * to check if the controller has completed initialization sequence.
4240          * So without this delay the value HCE = 1, set in the previous
4241          * instruction might be read back.
4242          * This delay can be changed based on the controller.
4243          */
4244         msleep(1);
4245
4246         /* wait for the host controller to complete initialization */
4247         retry = 10;
4248         while (ufshcd_is_hba_active(hba)) {
4249                 if (retry) {
4250                         retry--;
4251                 } else {
4252                         dev_err(hba->dev,
4253                                 "Controller enable failed\n");
4254                         return -EIO;
4255                 }
4256                 msleep(5);
4257         }
4258
4259         /* enable UIC related interrupts */
4260         ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4261
4262         ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4263
4264         return 0;
4265 }
4266
4267 static int ufshcd_hba_enable(struct ufs_hba *hba)
4268 {
4269         int ret;
4270
4271         if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4272                 ufshcd_set_link_off(hba);
4273                 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4274
4275                 /* enable UIC related interrupts */
4276                 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4277                 ret = ufshcd_dme_reset(hba);
4278                 if (!ret) {
4279                         ret = ufshcd_dme_enable(hba);
4280                         if (!ret)
4281                                 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4282                         if (ret)
4283                                 dev_err(hba->dev,
4284                                         "Host controller enable failed with non-hce\n");
4285                 }
4286         } else {
4287                 ret = ufshcd_hba_execute_hce(hba);
4288         }
4289
4290         return ret;
4291 }
4292 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4293 {
4294         int tx_lanes, i, err = 0;
4295
4296         if (!peer)
4297                 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4298                                &tx_lanes);
4299         else
4300                 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4301                                     &tx_lanes);
4302         for (i = 0; i < tx_lanes; i++) {
4303                 if (!peer)
4304                         err = ufshcd_dme_set(hba,
4305                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4306                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4307                                         0);
4308                 else
4309                         err = ufshcd_dme_peer_set(hba,
4310                                 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4311                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4312                                         0);
4313                 if (err) {
4314                         dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4315                                 __func__, peer, i, err);
4316                         break;
4317                 }
4318         }
4319
4320         return err;
4321 }
4322
4323 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4324 {
4325         return ufshcd_disable_tx_lcc(hba, true);
4326 }
4327
4328 /**
4329  * ufshcd_link_startup - Initialize unipro link startup
4330  * @hba: per adapter instance
4331  *
4332  * Returns 0 for success, non-zero in case of failure
4333  */
4334 static int ufshcd_link_startup(struct ufs_hba *hba)
4335 {
4336         int ret;
4337         int retries = DME_LINKSTARTUP_RETRIES;
4338         bool link_startup_again = false;
4339
4340         /*
4341          * If UFS device isn't active then we will have to issue link startup
4342          * 2 times to make sure the device state move to active.
4343          */
4344         if (!ufshcd_is_ufs_dev_active(hba))
4345                 link_startup_again = true;
4346
4347 link_startup:
4348         do {
4349                 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4350
4351                 ret = ufshcd_dme_link_startup(hba);
4352
4353                 /* check if device is detected by inter-connect layer */
4354                 if (!ret && !ufshcd_is_device_present(hba)) {
4355                         dev_err(hba->dev, "%s: Device not present\n", __func__);
4356                         ret = -ENXIO;
4357                         goto out;
4358                 }
4359
4360                 /*
4361                  * DME link lost indication is only received when link is up,
4362                  * but we can't be sure if the link is up until link startup
4363                  * succeeds. So reset the local Uni-Pro and try again.
4364                  */
4365                 if (ret && ufshcd_hba_enable(hba))
4366                         goto out;
4367         } while (ret && retries--);
4368
4369         if (ret)
4370                 /* failed to get the link up... retire */
4371                 goto out;
4372
4373         if (link_startup_again) {
4374                 link_startup_again = false;
4375                 retries = DME_LINKSTARTUP_RETRIES;
4376                 goto link_startup;
4377         }
4378
4379         /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4380         ufshcd_init_pwr_info(hba);
4381         ufshcd_print_pwr_info(hba);
4382
4383         if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4384                 ret = ufshcd_disable_device_tx_lcc(hba);
4385                 if (ret)
4386                         goto out;
4387         }
4388
4389         /* Include any host controller configuration via UIC commands */
4390         ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4391         if (ret)
4392                 goto out;
4393
4394         ret = ufshcd_make_hba_operational(hba);
4395 out:
4396         if (ret) {
4397                 dev_err(hba->dev, "link startup failed %d\n", ret);
4398                 ufshcd_print_host_state(hba);
4399                 ufshcd_print_pwr_info(hba);
4400                 ufshcd_print_host_regs(hba);
4401         }
4402         return ret;
4403 }
4404
4405 /**
4406  * ufshcd_verify_dev_init() - Verify device initialization
4407  * @hba: per-adapter instance
4408  *
4409  * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4410  * device Transport Protocol (UTP) layer is ready after a reset.
4411  * If the UTP layer at the device side is not initialized, it may
4412  * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4413  * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4414  */
4415 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4416 {
4417         int err = 0;
4418         int retries;
4419
4420         ufshcd_hold(hba, false);
4421         mutex_lock(&hba->dev_cmd.lock);
4422         for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4423                 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4424                                                NOP_OUT_TIMEOUT);
4425
4426                 if (!err || err == -ETIMEDOUT)
4427                         break;
4428
4429                 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4430         }
4431         mutex_unlock(&hba->dev_cmd.lock);
4432         ufshcd_release(hba);
4433
4434         if (err)
4435                 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4436         return err;
4437 }
4438
4439 /**
4440  * ufshcd_set_queue_depth - set lun queue depth
4441  * @sdev: pointer to SCSI device
4442  *
4443  * Read bLUQueueDepth value and activate scsi tagged command
4444  * queueing. For WLUN, queue depth is set to 1. For best-effort
4445  * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4446  * value that host can queue.
4447  */
4448 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4449 {
4450         int ret = 0;
4451         u8 lun_qdepth;
4452         struct ufs_hba *hba;
4453
4454         hba = shost_priv(sdev->host);
4455
4456         lun_qdepth = hba->nutrs;
4457         ret = ufshcd_read_unit_desc_param(hba,
4458                                           ufshcd_scsi_to_upiu_lun(sdev->lun),
4459                                           UNIT_DESC_PARAM_LU_Q_DEPTH,
4460                                           &lun_qdepth,
4461                                           sizeof(lun_qdepth));
4462
4463         /* Some WLUN doesn't support unit descriptor */
4464         if (ret == -EOPNOTSUPP)
4465                 lun_qdepth = 1;
4466         else if (!lun_qdepth)
4467                 /* eventually, we can figure out the real queue depth */
4468                 lun_qdepth = hba->nutrs;
4469         else
4470                 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4471
4472         dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4473                         __func__, lun_qdepth);
4474         scsi_change_queue_depth(sdev, lun_qdepth);
4475 }
4476
4477 /*
4478  * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4479  * @hba: per-adapter instance
4480  * @lun: UFS device lun id
4481  * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4482  *
4483  * Returns 0 in case of success and b_lu_write_protect status would be returned
4484  * @b_lu_write_protect parameter.
4485  * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4486  * Returns -EINVAL in case of invalid parameters passed to this function.
4487  */
4488 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4489                             u8 lun,
4490                             u8 *b_lu_write_protect)
4491 {
4492         int ret;
4493
4494         if (!b_lu_write_protect)
4495                 ret = -EINVAL;
4496         /*
4497          * According to UFS device spec, RPMB LU can't be write
4498          * protected so skip reading bLUWriteProtect parameter for
4499          * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4500          */
4501         else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4502                 ret = -ENOTSUPP;
4503         else
4504                 ret = ufshcd_read_unit_desc_param(hba,
4505                                           lun,
4506                                           UNIT_DESC_PARAM_LU_WR_PROTECT,
4507                                           b_lu_write_protect,
4508                                           sizeof(*b_lu_write_protect));
4509         return ret;
4510 }
4511
4512 /**
4513  * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4514  * status
4515  * @hba: per-adapter instance
4516  * @sdev: pointer to SCSI device
4517  *
4518  */
4519 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4520                                                     struct scsi_device *sdev)
4521 {
4522         if (hba->dev_info.f_power_on_wp_en &&
4523             !hba->dev_info.is_lu_power_on_wp) {
4524                 u8 b_lu_write_protect;
4525
4526                 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4527                                       &b_lu_write_protect) &&
4528                     (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4529                         hba->dev_info.is_lu_power_on_wp = true;
4530         }
4531 }
4532
4533 /**
4534  * ufshcd_slave_alloc - handle initial SCSI device configurations
4535  * @sdev: pointer to SCSI device
4536  *
4537  * Returns success
4538  */
4539 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4540 {
4541         struct ufs_hba *hba;
4542
4543         hba = shost_priv(sdev->host);
4544
4545         /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4546         sdev->use_10_for_ms = 1;
4547
4548         /* allow SCSI layer to restart the device in case of errors */
4549         sdev->allow_restart = 1;
4550
4551         /* REPORT SUPPORTED OPERATION CODES is not supported */
4552         sdev->no_report_opcodes = 1;
4553
4554         /* WRITE_SAME command is not supported */
4555         sdev->no_write_same = 1;
4556
4557         ufshcd_set_queue_depth(sdev);
4558
4559         ufshcd_get_lu_power_on_wp_status(hba, sdev);
4560
4561         return 0;
4562 }
4563
4564 /**
4565  * ufshcd_change_queue_depth - change queue depth
4566  * @sdev: pointer to SCSI device
4567  * @depth: required depth to set
4568  *
4569  * Change queue depth and make sure the max. limits are not crossed.
4570  */
4571 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4572 {
4573         struct ufs_hba *hba = shost_priv(sdev->host);
4574
4575         if (depth > hba->nutrs)
4576                 depth = hba->nutrs;
4577         return scsi_change_queue_depth(sdev, depth);
4578 }
4579
4580 /**
4581  * ufshcd_slave_configure - adjust SCSI device configurations
4582  * @sdev: pointer to SCSI device
4583  */
4584 static int ufshcd_slave_configure(struct scsi_device *sdev)
4585 {
4586         struct request_queue *q = sdev->request_queue;
4587
4588         blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4589         blk_queue_max_segment_size(q, PRDT_DATA_BYTE_COUNT_MAX);
4590
4591         return 0;
4592 }
4593
4594 /**
4595  * ufshcd_slave_destroy - remove SCSI device configurations
4596  * @sdev: pointer to SCSI device
4597  */
4598 static void ufshcd_slave_destroy(struct scsi_device *sdev)
4599 {
4600         struct ufs_hba *hba;
4601
4602         hba = shost_priv(sdev->host);
4603         /* Drop the reference as it won't be needed anymore */
4604         if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4605                 unsigned long flags;
4606
4607                 spin_lock_irqsave(hba->host->host_lock, flags);
4608                 hba->sdev_ufs_device = NULL;
4609                 spin_unlock_irqrestore(hba->host->host_lock, flags);
4610         }
4611 }
4612
4613 /**
4614  * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4615  * @lrbp: pointer to local reference block of completed command
4616  * @scsi_status: SCSI command status
4617  *
4618  * Returns value base on SCSI command status
4619  */
4620 static inline int
4621 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4622 {
4623         int result = 0;
4624
4625         switch (scsi_status) {
4626         case SAM_STAT_CHECK_CONDITION:
4627                 ufshcd_copy_sense_data(lrbp);
4628                 /* fallthrough */
4629         case SAM_STAT_GOOD:
4630                 result |= DID_OK << 16 |
4631                           COMMAND_COMPLETE << 8 |
4632                           scsi_status;
4633                 break;
4634         case SAM_STAT_TASK_SET_FULL:
4635         case SAM_STAT_BUSY:
4636         case SAM_STAT_TASK_ABORTED:
4637                 ufshcd_copy_sense_data(lrbp);
4638                 result |= scsi_status;
4639                 break;
4640         default:
4641                 result |= DID_ERROR << 16;
4642                 break;
4643         } /* end of switch */
4644
4645         return result;
4646 }
4647
4648 /**
4649  * ufshcd_transfer_rsp_status - Get overall status of the response
4650  * @hba: per adapter instance
4651  * @lrbp: pointer to local reference block of completed command
4652  *
4653  * Returns result of the command to notify SCSI midlayer
4654  */
4655 static inline int
4656 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4657 {
4658         int result = 0;
4659         int scsi_status;
4660         int ocs;
4661
4662         /* overall command status of utrd */
4663         ocs = ufshcd_get_tr_ocs(lrbp);
4664
4665         switch (ocs) {
4666         case OCS_SUCCESS:
4667                 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4668                 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4669                 switch (result) {
4670                 case UPIU_TRANSACTION_RESPONSE:
4671                         /*
4672                          * get the response UPIU result to extract
4673                          * the SCSI command status
4674                          */
4675                         result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4676
4677                         /*
4678                          * get the result based on SCSI status response
4679                          * to notify the SCSI midlayer of the command status
4680                          */
4681                         scsi_status = result & MASK_SCSI_STATUS;
4682                         result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4683
4684                         /*
4685                          * Currently we are only supporting BKOPs exception
4686                          * events hence we can ignore BKOPs exception event
4687                          * during power management callbacks. BKOPs exception
4688                          * event is not expected to be raised in runtime suspend
4689                          * callback as it allows the urgent bkops.
4690                          * During system suspend, we are anyway forcefully
4691                          * disabling the bkops and if urgent bkops is needed
4692                          * it will be enabled on system resume. Long term
4693                          * solution could be to abort the system suspend if
4694                          * UFS device needs urgent BKOPs.
4695                          */
4696                         if (!hba->pm_op_in_progress &&
4697                             ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
4698                                 schedule_work(&hba->eeh_work);
4699                         break;
4700                 case UPIU_TRANSACTION_REJECT_UPIU:
4701                         /* TODO: handle Reject UPIU Response */
4702                         result = DID_ERROR << 16;
4703                         dev_err(hba->dev,
4704                                 "Reject UPIU not fully implemented\n");
4705                         break;
4706                 default:
4707                         result = DID_ERROR << 16;
4708                         dev_err(hba->dev,
4709                                 "Unexpected request response code = %x\n",
4710                                 result);
4711                         break;
4712                 }
4713                 break;
4714         case OCS_ABORTED:
4715                 result |= DID_ABORT << 16;
4716                 break;
4717         case OCS_INVALID_COMMAND_STATUS:
4718                 result |= DID_REQUEUE << 16;
4719                 break;
4720         case OCS_INVALID_CMD_TABLE_ATTR:
4721         case OCS_INVALID_PRDT_ATTR:
4722         case OCS_MISMATCH_DATA_BUF_SIZE:
4723         case OCS_MISMATCH_RESP_UPIU_SIZE:
4724         case OCS_PEER_COMM_FAILURE:
4725         case OCS_FATAL_ERROR:
4726         default:
4727                 result |= DID_ERROR << 16;
4728                 dev_err(hba->dev,
4729                                 "OCS error from controller = %x for tag %d\n",
4730                                 ocs, lrbp->task_tag);
4731                 ufshcd_print_host_regs(hba);
4732                 ufshcd_print_host_state(hba);
4733                 break;
4734         } /* end of switch */
4735
4736         if (host_byte(result) != DID_OK)
4737                 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4738         return result;
4739 }
4740
4741 /**
4742  * ufshcd_uic_cmd_compl - handle completion of uic command
4743  * @hba: per adapter instance
4744  * @intr_status: interrupt status generated by the controller
4745  */
4746 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4747 {
4748         if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4749                 hba->active_uic_cmd->argument2 |=
4750                         ufshcd_get_uic_cmd_result(hba);
4751                 hba->active_uic_cmd->argument3 =
4752                         ufshcd_get_dme_attr_val(hba);
4753                 complete(&hba->active_uic_cmd->done);
4754         }
4755
4756         if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done)
4757                 complete(hba->uic_async_done);
4758 }
4759
4760 /**
4761  * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4762  * @hba: per adapter instance
4763  * @completed_reqs: requests to complete
4764  */
4765 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4766                                         unsigned long completed_reqs)
4767 {
4768         struct ufshcd_lrb *lrbp;
4769         struct scsi_cmnd *cmd;
4770         int result;
4771         int index;
4772
4773         for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4774                 lrbp = &hba->lrb[index];
4775                 cmd = lrbp->cmd;
4776                 if (cmd) {
4777                         ufshcd_add_command_trace(hba, index, "complete");
4778                         result = ufshcd_transfer_rsp_status(hba, lrbp);
4779                         scsi_dma_unmap(cmd);
4780                         cmd->result = result;
4781                         /* Mark completed command as NULL in LRB */
4782                         lrbp->cmd = NULL;
4783                         clear_bit_unlock(index, &hba->lrb_in_use);
4784                         /* Do not touch lrbp after scsi done */
4785                         cmd->scsi_done(cmd);
4786                         __ufshcd_release(hba);
4787                 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4788                         lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4789                         if (hba->dev_cmd.complete) {
4790                                 ufshcd_add_command_trace(hba, index,
4791                                                 "dev_complete");
4792                                 complete(hba->dev_cmd.complete);
4793                         }
4794                 }
4795                 if (ufshcd_is_clkscaling_supported(hba))
4796                         hba->clk_scaling.active_reqs--;
4797
4798                 lrbp->compl_time_stamp = ktime_get();
4799         }
4800
4801         /* clear corresponding bits of completed commands */
4802         hba->outstanding_reqs ^= completed_reqs;
4803
4804         ufshcd_clk_scaling_update_busy(hba);
4805
4806         /* we might have free'd some tags above */
4807         wake_up(&hba->dev_cmd.tag_wq);
4808 }
4809
4810 /**
4811  * ufshcd_transfer_req_compl - handle SCSI and query command completion
4812  * @hba: per adapter instance
4813  */
4814 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
4815 {
4816         unsigned long completed_reqs;
4817         u32 tr_doorbell;
4818
4819         /* Resetting interrupt aggregation counters first and reading the
4820          * DOOR_BELL afterward allows us to handle all the completed requests.
4821          * In order to prevent other interrupts starvation the DB is read once
4822          * after reset. The down side of this solution is the possibility of
4823          * false interrupt if device completes another request after resetting
4824          * aggregation and before reading the DB.
4825          */
4826         if (ufshcd_is_intr_aggr_allowed(hba) &&
4827             !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
4828                 ufshcd_reset_intr_aggr(hba);
4829
4830         tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4831         completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4832
4833         __ufshcd_transfer_req_compl(hba, completed_reqs);
4834 }
4835
4836 /**
4837  * ufshcd_disable_ee - disable exception event
4838  * @hba: per-adapter instance
4839  * @mask: exception event to disable
4840  *
4841  * Disables exception event in the device so that the EVENT_ALERT
4842  * bit is not set.
4843  *
4844  * Returns zero on success, non-zero error value on failure.
4845  */
4846 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4847 {
4848         int err = 0;
4849         u32 val;
4850
4851         if (!(hba->ee_ctrl_mask & mask))
4852                 goto out;
4853
4854         val = hba->ee_ctrl_mask & ~mask;
4855         val &= MASK_EE_STATUS;
4856         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4857                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4858         if (!err)
4859                 hba->ee_ctrl_mask &= ~mask;
4860 out:
4861         return err;
4862 }
4863
4864 /**
4865  * ufshcd_enable_ee - enable exception event
4866  * @hba: per-adapter instance
4867  * @mask: exception event to enable
4868  *
4869  * Enable corresponding exception event in the device to allow
4870  * device to alert host in critical scenarios.
4871  *
4872  * Returns zero on success, non-zero error value on failure.
4873  */
4874 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4875 {
4876         int err = 0;
4877         u32 val;
4878
4879         if (hba->ee_ctrl_mask & mask)
4880                 goto out;
4881
4882         val = hba->ee_ctrl_mask | mask;
4883         val &= MASK_EE_STATUS;
4884         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4885                         QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4886         if (!err)
4887                 hba->ee_ctrl_mask |= mask;
4888 out:
4889         return err;
4890 }
4891
4892 /**
4893  * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4894  * @hba: per-adapter instance
4895  *
4896  * Allow device to manage background operations on its own. Enabling
4897  * this might lead to inconsistent latencies during normal data transfers
4898  * as the device is allowed to manage its own way of handling background
4899  * operations.
4900  *
4901  * Returns zero on success, non-zero on failure.
4902  */
4903 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4904 {
4905         int err = 0;
4906
4907         if (hba->auto_bkops_enabled)
4908                 goto out;
4909
4910         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4911                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
4912         if (err) {
4913                 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4914                                 __func__, err);
4915                 goto out;
4916         }
4917
4918         hba->auto_bkops_enabled = true;
4919         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
4920
4921         /* No need of URGENT_BKOPS exception from the device */
4922         err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4923         if (err)
4924                 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4925                                 __func__, err);
4926 out:
4927         return err;
4928 }
4929
4930 /**
4931  * ufshcd_disable_auto_bkops - block device in doing background operations
4932  * @hba: per-adapter instance
4933  *
4934  * Disabling background operations improves command response latency but
4935  * has drawback of device moving into critical state where the device is
4936  * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4937  * host is idle so that BKOPS are managed effectively without any negative
4938  * impacts.
4939  *
4940  * Returns zero on success, non-zero on failure.
4941  */
4942 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4943 {
4944         int err = 0;
4945
4946         if (!hba->auto_bkops_enabled)
4947                 goto out;
4948
4949         /*
4950          * If host assisted BKOPs is to be enabled, make sure
4951          * urgent bkops exception is allowed.
4952          */
4953         err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4954         if (err) {
4955                 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4956                                 __func__, err);
4957                 goto out;
4958         }
4959
4960         err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
4961                         QUERY_FLAG_IDN_BKOPS_EN, NULL);
4962         if (err) {
4963                 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
4964                                 __func__, err);
4965                 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4966                 goto out;
4967         }
4968
4969         hba->auto_bkops_enabled = false;
4970         trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
4971 out:
4972         return err;
4973 }
4974
4975 /**
4976  * ufshcd_force_reset_auto_bkops - force reset auto bkops state
4977  * @hba: per adapter instance
4978  *
4979  * After a device reset the device may toggle the BKOPS_EN flag
4980  * to default value. The s/w tracking variables should be updated
4981  * as well. This function would change the auto-bkops state based on
4982  * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
4983  */
4984 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
4985 {
4986         if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
4987                 hba->auto_bkops_enabled = false;
4988                 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
4989                 ufshcd_enable_auto_bkops(hba);
4990         } else {
4991                 hba->auto_bkops_enabled = true;
4992                 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
4993                 ufshcd_disable_auto_bkops(hba);
4994         }
4995 }
4996
4997 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
4998 {
4999         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5000                         QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5001 }
5002
5003 /**
5004  * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5005  * @hba: per-adapter instance
5006  * @status: bkops_status value
5007  *
5008  * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5009  * flag in the device to permit background operations if the device
5010  * bkops_status is greater than or equal to "status" argument passed to
5011  * this function, disable otherwise.
5012  *
5013  * Returns 0 for success, non-zero in case of failure.
5014  *
5015  * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5016  * to know whether auto bkops is enabled or disabled after this function
5017  * returns control to it.
5018  */
5019 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5020                              enum bkops_status status)
5021 {
5022         int err;
5023         u32 curr_status = 0;
5024
5025         err = ufshcd_get_bkops_status(hba, &curr_status);
5026         if (err) {
5027                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5028                                 __func__, err);
5029                 goto out;
5030         } else if (curr_status > BKOPS_STATUS_MAX) {
5031                 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5032                                 __func__, curr_status);
5033                 err = -EINVAL;
5034                 goto out;
5035         }
5036
5037         if (curr_status >= status)
5038                 err = ufshcd_enable_auto_bkops(hba);
5039         else
5040                 err = ufshcd_disable_auto_bkops(hba);
5041 out:
5042         return err;
5043 }
5044
5045 /**
5046  * ufshcd_urgent_bkops - handle urgent bkops exception event
5047  * @hba: per-adapter instance
5048  *
5049  * Enable fBackgroundOpsEn flag in the device to permit background
5050  * operations.
5051  *
5052  * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5053  * and negative error value for any other failure.
5054  */
5055 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5056 {
5057         return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5058 }
5059
5060 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5061 {
5062         return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5063                         QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5064 }
5065
5066 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5067 {
5068         int err;
5069         u32 curr_status = 0;
5070
5071         if (hba->is_urgent_bkops_lvl_checked)
5072                 goto enable_auto_bkops;
5073
5074         err = ufshcd_get_bkops_status(hba, &curr_status);
5075         if (err) {
5076                 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5077                                 __func__, err);
5078                 goto out;
5079         }
5080
5081         /*
5082          * We are seeing that some devices are raising the urgent bkops
5083          * exception events even when BKOPS status doesn't indicate performace
5084          * impacted or critical. Handle these device by determining their urgent
5085          * bkops status at runtime.
5086          */
5087         if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5088                 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5089                                 __func__, curr_status);
5090                 /* update the current status as the urgent bkops level */
5091                 hba->urgent_bkops_lvl = curr_status;
5092                 hba->is_urgent_bkops_lvl_checked = true;
5093         }
5094
5095 enable_auto_bkops:
5096         err = ufshcd_enable_auto_bkops(hba);
5097 out:
5098         if (err < 0)
5099                 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5100                                 __func__, err);
5101 }
5102
5103 /**
5104  * ufshcd_exception_event_handler - handle exceptions raised by device
5105  * @work: pointer to work data
5106  *
5107  * Read bExceptionEventStatus attribute from the device and handle the
5108  * exception event accordingly.
5109  */
5110 static void ufshcd_exception_event_handler(struct work_struct *work)
5111 {
5112         struct ufs_hba *hba;
5113         int err;
5114         u32 status = 0;
5115         hba = container_of(work, struct ufs_hba, eeh_work);
5116
5117         pm_runtime_get_sync(hba->dev);
5118         scsi_block_requests(hba->host);
5119         err = ufshcd_get_ee_status(hba, &status);
5120         if (err) {
5121                 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5122                                 __func__, err);
5123                 goto out;
5124         }
5125
5126         status &= hba->ee_ctrl_mask;
5127
5128         if (status & MASK_EE_URGENT_BKOPS)
5129                 ufshcd_bkops_exception_event_handler(hba);
5130
5131 out:
5132         scsi_unblock_requests(hba->host);
5133         pm_runtime_put_sync(hba->dev);
5134         return;
5135 }
5136
5137 /* Complete requests that have door-bell cleared */
5138 static void ufshcd_complete_requests(struct ufs_hba *hba)
5139 {
5140         ufshcd_transfer_req_compl(hba);
5141         ufshcd_tmc_handler(hba);
5142 }
5143
5144 /**
5145  * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5146  *                              to recover from the DL NAC errors or not.
5147  * @hba: per-adapter instance
5148  *
5149  * Returns true if error handling is required, false otherwise
5150  */
5151 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5152 {
5153         unsigned long flags;
5154         bool err_handling = true;
5155
5156         spin_lock_irqsave(hba->host->host_lock, flags);
5157         /*
5158          * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5159          * device fatal error and/or DL NAC & REPLAY timeout errors.
5160          */
5161         if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5162                 goto out;
5163
5164         if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5165             ((hba->saved_err & UIC_ERROR) &&
5166              (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5167                 goto out;
5168
5169         if ((hba->saved_err & UIC_ERROR) &&
5170             (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5171                 int err;
5172                 /*
5173                  * wait for 50ms to see if we can get any other errors or not.
5174                  */
5175                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5176                 msleep(50);
5177                 spin_lock_irqsave(hba->host->host_lock, flags);
5178
5179                 /*
5180                  * now check if we have got any other severe errors other than
5181                  * DL NAC error?
5182                  */
5183                 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5184                     ((hba->saved_err & UIC_ERROR) &&
5185                     (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5186                         goto out;
5187
5188                 /*
5189                  * As DL NAC is the only error received so far, send out NOP
5190                  * command to confirm if link is still active or not.
5191                  *   - If we don't get any response then do error recovery.
5192                  *   - If we get response then clear the DL NAC error bit.
5193                  */
5194
5195                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5196                 err = ufshcd_verify_dev_init(hba);
5197                 spin_lock_irqsave(hba->host->host_lock, flags);
5198
5199                 if (err)
5200                         goto out;
5201
5202                 /* Link seems to be alive hence ignore the DL NAC errors */
5203                 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5204                         hba->saved_err &= ~UIC_ERROR;
5205                 /* clear NAC error */
5206                 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5207                 if (!hba->saved_uic_err) {
5208                         err_handling = false;
5209                         goto out;
5210                 }
5211         }
5212 out:
5213         spin_unlock_irqrestore(hba->host->host_lock, flags);
5214         return err_handling;
5215 }
5216
5217 /**
5218  * ufshcd_err_handler - handle UFS errors that require s/w attention
5219  * @work: pointer to work structure
5220  */
5221 static void ufshcd_err_handler(struct work_struct *work)
5222 {
5223         struct ufs_hba *hba;
5224         unsigned long flags;
5225         u32 err_xfer = 0;
5226         u32 err_tm = 0;
5227         int err = 0;
5228         int tag;
5229         bool needs_reset = false;
5230
5231         hba = container_of(work, struct ufs_hba, eh_work);
5232
5233         pm_runtime_get_sync(hba->dev);
5234         ufshcd_hold(hba, false);
5235
5236         spin_lock_irqsave(hba->host->host_lock, flags);
5237         if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5238                 goto out;
5239
5240         hba->ufshcd_state = UFSHCD_STATE_RESET;
5241         ufshcd_set_eh_in_progress(hba);
5242
5243         /* Complete requests that have door-bell cleared by h/w */
5244         ufshcd_complete_requests(hba);
5245
5246         if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5247                 bool ret;
5248
5249                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5250                 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5251                 ret = ufshcd_quirk_dl_nac_errors(hba);
5252                 spin_lock_irqsave(hba->host->host_lock, flags);
5253                 if (!ret)
5254                         goto skip_err_handling;
5255         }
5256         if ((hba->saved_err & INT_FATAL_ERRORS) ||
5257             ((hba->saved_err & UIC_ERROR) &&
5258             (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5259                                    UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5260                                    UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5261                 needs_reset = true;
5262
5263         /*
5264          * if host reset is required then skip clearing the pending
5265          * transfers forcefully because they will automatically get
5266          * cleared after link startup.
5267          */
5268         if (needs_reset)
5269                 goto skip_pending_xfer_clear;
5270
5271         /* release lock as clear command might sleep */
5272         spin_unlock_irqrestore(hba->host->host_lock, flags);
5273         /* Clear pending transfer requests */
5274         for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5275                 if (ufshcd_clear_cmd(hba, tag)) {
5276                         err_xfer = true;
5277                         goto lock_skip_pending_xfer_clear;
5278                 }
5279         }
5280
5281         /* Clear pending task management requests */
5282         for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5283                 if (ufshcd_clear_tm_cmd(hba, tag)) {
5284                         err_tm = true;
5285                         goto lock_skip_pending_xfer_clear;
5286                 }
5287         }
5288
5289 lock_skip_pending_xfer_clear:
5290         spin_lock_irqsave(hba->host->host_lock, flags);
5291
5292         /* Complete the requests that are cleared by s/w */
5293         ufshcd_complete_requests(hba);
5294
5295         if (err_xfer || err_tm)
5296                 needs_reset = true;
5297
5298 skip_pending_xfer_clear:
5299         /* Fatal errors need reset */
5300         if (needs_reset) {
5301                 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5302
5303                 /*
5304                  * ufshcd_reset_and_restore() does the link reinitialization
5305                  * which will need atleast one empty doorbell slot to send the
5306                  * device management commands (NOP and query commands).
5307                  * If there is no slot empty at this moment then free up last
5308                  * slot forcefully.
5309                  */
5310                 if (hba->outstanding_reqs == max_doorbells)
5311                         __ufshcd_transfer_req_compl(hba,
5312                                                     (1UL << (hba->nutrs - 1)));
5313
5314                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5315                 err = ufshcd_reset_and_restore(hba);
5316                 spin_lock_irqsave(hba->host->host_lock, flags);
5317                 if (err) {
5318                         dev_err(hba->dev, "%s: reset and restore failed\n",
5319                                         __func__);
5320                         hba->ufshcd_state = UFSHCD_STATE_ERROR;
5321                 }
5322                 /*
5323                  * Inform scsi mid-layer that we did reset and allow to handle
5324                  * Unit Attention properly.
5325                  */
5326                 scsi_report_bus_reset(hba->host, 0);
5327                 hba->saved_err = 0;
5328                 hba->saved_uic_err = 0;
5329         }
5330
5331 skip_err_handling:
5332         if (!needs_reset) {
5333                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5334                 if (hba->saved_err || hba->saved_uic_err)
5335                         dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5336                             __func__, hba->saved_err, hba->saved_uic_err);
5337         }
5338
5339         ufshcd_clear_eh_in_progress(hba);
5340
5341 out:
5342         spin_unlock_irqrestore(hba->host->host_lock, flags);
5343         ufshcd_scsi_unblock_requests(hba);
5344         ufshcd_release(hba);
5345         pm_runtime_put_sync(hba->dev);
5346 }
5347
5348 static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist,
5349                 u32 reg)
5350 {
5351         reg_hist->reg[reg_hist->pos] = reg;
5352         reg_hist->tstamp[reg_hist->pos] = ktime_get();
5353         reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH;
5354 }
5355
5356 /**
5357  * ufshcd_update_uic_error - check and set fatal UIC error flags.
5358  * @hba: per-adapter instance
5359  */
5360 static void ufshcd_update_uic_error(struct ufs_hba *hba)
5361 {
5362         u32 reg;
5363
5364         /* PHY layer lane error */
5365         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5366         /* Ignore LINERESET indication, as this is not an error */
5367         if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5368                         (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5369                 /*
5370                  * To know whether this error is fatal or not, DB timeout
5371                  * must be checked but this error is handled separately.
5372                  */
5373                 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5374                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg);
5375         }
5376
5377         /* PA_INIT_ERROR is fatal and needs UIC reset */
5378         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5379         if (reg)
5380                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg);
5381
5382         if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5383                 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5384         else if (hba->dev_quirks &
5385                    UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5386                 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5387                         hba->uic_error |=
5388                                 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5389                 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5390                         hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5391         }
5392
5393         /* UIC NL/TL/DME errors needs software retry */
5394         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5395         if (reg) {
5396                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg);
5397                 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5398         }
5399
5400         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5401         if (reg) {
5402                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg);
5403                 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5404         }
5405
5406         reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5407         if (reg) {
5408                 ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg);
5409                 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5410         }
5411
5412         dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5413                         __func__, hba->uic_error);
5414 }
5415
5416 /**
5417  * ufshcd_check_errors - Check for errors that need s/w attention
5418  * @hba: per-adapter instance
5419  */
5420 static void ufshcd_check_errors(struct ufs_hba *hba)
5421 {
5422         bool queue_eh_work = false;
5423
5424         if (hba->errors & INT_FATAL_ERRORS)
5425                 queue_eh_work = true;
5426
5427         if (hba->errors & UIC_ERROR) {
5428                 hba->uic_error = 0;
5429                 ufshcd_update_uic_error(hba);
5430                 if (hba->uic_error)
5431                         queue_eh_work = true;
5432         }
5433
5434         if (queue_eh_work) {
5435                 /*
5436                  * update the transfer error masks to sticky bits, let's do this
5437                  * irrespective of current ufshcd_state.
5438                  */
5439                 hba->saved_err |= hba->errors;
5440                 hba->saved_uic_err |= hba->uic_error;
5441
5442                 /* handle fatal errors only when link is functional */
5443                 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5444                         /* block commands from scsi mid-layer */
5445                         ufshcd_scsi_block_requests(hba);
5446
5447                         hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5448
5449                         /* dump controller state before resetting */
5450                         if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5451                                 bool pr_prdt = !!(hba->saved_err &
5452                                                 SYSTEM_BUS_FATAL_ERROR);
5453
5454                                 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5455                                         __func__, hba->saved_err,
5456                                         hba->saved_uic_err);
5457
5458                                 ufshcd_print_host_regs(hba);
5459                                 ufshcd_print_pwr_info(hba);
5460                                 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5461                                 ufshcd_print_trs(hba, hba->outstanding_reqs,
5462                                                         pr_prdt);
5463                         }
5464                         schedule_work(&hba->eh_work);
5465                 }
5466         }
5467         /*
5468          * if (!queue_eh_work) -
5469          * Other errors are either non-fatal where host recovers
5470          * itself without s/w intervention or errors that will be
5471          * handled by the SCSI core layer.
5472          */
5473 }
5474
5475 /**
5476  * ufshcd_tmc_handler - handle task management function completion
5477  * @hba: per adapter instance
5478  */
5479 static void ufshcd_tmc_handler(struct ufs_hba *hba)
5480 {
5481         u32 tm_doorbell;
5482
5483         tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
5484         hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
5485         wake_up(&hba->tm_wq);
5486 }
5487
5488 /**
5489  * ufshcd_sl_intr - Interrupt service routine
5490  * @hba: per adapter instance
5491  * @intr_status: contains interrupts generated by the controller
5492  */
5493 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5494 {
5495         hba->errors = UFSHCD_ERROR_MASK & intr_status;
5496         if (hba->errors)
5497                 ufshcd_check_errors(hba);
5498
5499         if (intr_status & UFSHCD_UIC_MASK)
5500                 ufshcd_uic_cmd_compl(hba, intr_status);
5501
5502         if (intr_status & UTP_TASK_REQ_COMPL)
5503                 ufshcd_tmc_handler(hba);
5504
5505         if (intr_status & UTP_TRANSFER_REQ_COMPL)
5506                 ufshcd_transfer_req_compl(hba);
5507 }
5508
5509 /**
5510  * ufshcd_intr - Main interrupt service routine
5511  * @irq: irq number
5512  * @__hba: pointer to adapter instance
5513  *
5514  * Returns IRQ_HANDLED - If interrupt is valid
5515  *              IRQ_NONE - If invalid interrupt
5516  */
5517 static irqreturn_t ufshcd_intr(int irq, void *__hba)
5518 {
5519         u32 intr_status, enabled_intr_status;
5520         irqreturn_t retval = IRQ_NONE;
5521         struct ufs_hba *hba = __hba;
5522         int retries = hba->nutrs;
5523
5524         spin_lock(hba->host->host_lock);
5525         intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5526
5527         /*
5528          * There could be max of hba->nutrs reqs in flight and in worst case
5529          * if the reqs get finished 1 by 1 after the interrupt status is
5530          * read, make sure we handle them by checking the interrupt status
5531          * again in a loop until we process all of the reqs before returning.
5532          */
5533         do {
5534                 enabled_intr_status =
5535                         intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5536                 if (intr_status)
5537                         ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5538                 if (enabled_intr_status) {
5539                         ufshcd_sl_intr(hba, enabled_intr_status);
5540                         retval = IRQ_HANDLED;
5541                 }
5542
5543                 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5544         } while (intr_status && --retries);
5545
5546         spin_unlock(hba->host->host_lock);
5547         return retval;
5548 }
5549
5550 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5551 {
5552         int err = 0;
5553         u32 mask = 1 << tag;
5554         unsigned long flags;
5555
5556         if (!test_bit(tag, &hba->outstanding_tasks))
5557                 goto out;
5558
5559         spin_lock_irqsave(hba->host->host_lock, flags);
5560         ufshcd_utmrl_clear(hba, tag);
5561         spin_unlock_irqrestore(hba->host->host_lock, flags);
5562
5563         /* poll for max. 1 sec to clear door bell register by h/w */
5564         err = ufshcd_wait_for_register(hba,
5565                         REG_UTP_TASK_REQ_DOOR_BELL,
5566                         mask, 0, 1000, 1000, true);
5567 out:
5568         return err;
5569 }
5570
5571 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5572                 struct utp_task_req_desc *treq, u8 tm_function)
5573 {
5574         struct Scsi_Host *host = hba->host;
5575         unsigned long flags;
5576         int free_slot, task_tag, err;
5577
5578         /*
5579          * Get free slot, sleep if slots are unavailable.
5580          * Even though we use wait_event() which sleeps indefinitely,
5581          * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5582          */
5583         wait_event(hba->tm_tag_wq, ufshcd_get_tm_free_slot(hba, &free_slot));
5584         ufshcd_hold(hba, false);
5585
5586         spin_lock_irqsave(host->host_lock, flags);
5587         task_tag = hba->nutrs + free_slot;
5588
5589         treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5590
5591         memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
5592         ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5593
5594         /* send command to the controller */
5595         __set_bit(free_slot, &hba->outstanding_tasks);
5596
5597         /* Make sure descriptors are ready before ringing the task doorbell */
5598         wmb();
5599
5600         ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
5601         /* Make sure that doorbell is committed immediately */
5602         wmb();
5603
5604         spin_unlock_irqrestore(host->host_lock, flags);
5605
5606         ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5607
5608         /* wait until the task management command is completed */
5609         err = wait_event_timeout(hba->tm_wq,
5610                         test_bit(free_slot, &hba->tm_condition),
5611                         msecs_to_jiffies(TM_CMD_TIMEOUT));
5612         if (!err) {
5613                 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
5614                 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5615                                 __func__, tm_function);
5616                 if (ufshcd_clear_tm_cmd(hba, free_slot))
5617                         dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5618                                         __func__, free_slot);
5619                 err = -ETIMEDOUT;
5620         } else {
5621                 err = 0;
5622                 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5623
5624                 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
5625
5626                 spin_lock_irqsave(hba->host->host_lock, flags);
5627                 __clear_bit(free_slot, &hba->outstanding_tasks);
5628                 spin_unlock_irqrestore(hba->host->host_lock, flags);
5629
5630         }
5631
5632         clear_bit(free_slot, &hba->tm_condition);
5633         ufshcd_put_tm_slot(hba, free_slot);
5634         wake_up(&hba->tm_tag_wq);
5635
5636         ufshcd_release(hba);
5637         return err;
5638 }
5639
5640 /**
5641  * ufshcd_issue_tm_cmd - issues task management commands to controller
5642  * @hba: per adapter instance
5643  * @lun_id: LUN ID to which TM command is sent
5644  * @task_id: task ID to which the TM command is applicable
5645  * @tm_function: task management function opcode
5646  * @tm_response: task management service response return value
5647  *
5648  * Returns non-zero value on error, zero on success.
5649  */
5650 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5651                 u8 tm_function, u8 *tm_response)
5652 {
5653         struct utp_task_req_desc treq = { { 0 }, };
5654         int ocs_value, err;
5655
5656         /* Configure task request descriptor */
5657         treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5658         treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5659
5660         /* Configure task request UPIU */
5661         treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5662                                   cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5663         treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5664
5665         /*
5666          * The host shall provide the same value for LUN field in the basic
5667          * header and for Input Parameter.
5668          */
5669         treq.input_param1 = cpu_to_be32(lun_id);
5670         treq.input_param2 = cpu_to_be32(task_id);
5671
5672         err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5673         if (err == -ETIMEDOUT)
5674                 return err;
5675
5676         ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5677         if (ocs_value != OCS_SUCCESS)
5678                 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5679                                 __func__, ocs_value);
5680         else if (tm_response)
5681                 *tm_response = be32_to_cpu(treq.output_param1) &
5682                                 MASK_TM_SERVICE_RESP;
5683         return err;
5684 }
5685
5686 /**
5687  * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5688  * @hba:        per-adapter instance
5689  * @req_upiu:   upiu request
5690  * @rsp_upiu:   upiu reply
5691  * @msgcode:    message code, one of UPIU Transaction Codes Initiator to Target
5692  * @desc_buff:  pointer to descriptor buffer, NULL if NA
5693  * @buff_len:   descriptor size, 0 if NA
5694  * @desc_op:    descriptor operation
5695  *
5696  * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5697  * Therefore, it "rides" the device management infrastructure: uses its tag and
5698  * tasks work queues.
5699  *
5700  * Since there is only one available tag for device management commands,
5701  * the caller is expected to hold the hba->dev_cmd.lock mutex.
5702  */
5703 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5704                                         struct utp_upiu_req *req_upiu,
5705                                         struct utp_upiu_req *rsp_upiu,
5706                                         u8 *desc_buff, int *buff_len,
5707                                         int cmd_type,
5708                                         enum query_opcode desc_op)
5709 {
5710         struct ufshcd_lrb *lrbp;
5711         int err = 0;
5712         int tag;
5713         struct completion wait;
5714         unsigned long flags;
5715         u32 upiu_flags;
5716
5717         down_read(&hba->clk_scaling_lock);
5718
5719         wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
5720
5721         init_completion(&wait);
5722         lrbp = &hba->lrb[tag];
5723         WARN_ON(lrbp->cmd);
5724
5725         lrbp->cmd = NULL;
5726         lrbp->sense_bufflen = 0;
5727         lrbp->sense_buffer = NULL;
5728         lrbp->task_tag = tag;
5729         lrbp->lun = 0;
5730         lrbp->intr_cmd = true;
5731         hba->dev_cmd.type = cmd_type;
5732
5733         switch (hba->ufs_version) {
5734         case UFSHCI_VERSION_10:
5735         case UFSHCI_VERSION_11:
5736                 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5737                 break;
5738         default:
5739                 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5740                 break;
5741         }
5742
5743         /* update the task tag in the request upiu */
5744         req_upiu->header.dword_0 |= cpu_to_be32(tag);
5745
5746         ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5747
5748         /* just copy the upiu request as it is */
5749         memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5750         if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5751                 /* The Data Segment Area is optional depending upon the query
5752                  * function value. for WRITE DESCRIPTOR, the data segment
5753                  * follows right after the tsf.
5754                  */
5755                 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5756                 *buff_len = 0;
5757         }
5758
5759         memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5760
5761         hba->dev_cmd.complete = &wait;
5762
5763         /* Make sure descriptors are ready before ringing the doorbell */
5764         wmb();
5765         spin_lock_irqsave(hba->host->host_lock, flags);
5766         ufshcd_send_command(hba, tag);
5767         spin_unlock_irqrestore(hba->host->host_lock, flags);
5768
5769         /*
5770          * ignore the returning value here - ufshcd_check_query_response is
5771          * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5772          * read the response directly ignoring all errors.
5773          */
5774         ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5775
5776         /* just copy the upiu response as it is */
5777         memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
5778
5779         ufshcd_put_dev_cmd_tag(hba, tag);
5780         wake_up(&hba->dev_cmd.tag_wq);
5781         up_read(&hba->clk_scaling_lock);
5782         return err;
5783 }
5784
5785 /**
5786  * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5787  * @hba:        per-adapter instance
5788  * @req_upiu:   upiu request
5789  * @rsp_upiu:   upiu reply - only 8 DW as we do not support scsi commands
5790  * @msgcode:    message code, one of UPIU Transaction Codes Initiator to Target
5791  * @desc_buff:  pointer to descriptor buffer, NULL if NA
5792  * @buff_len:   descriptor size, 0 if NA
5793  * @desc_op:    descriptor operation
5794  *
5795  * Supports UTP Transfer requests (nop and query), and UTP Task
5796  * Management requests.
5797  * It is up to the caller to fill the upiu conent properly, as it will
5798  * be copied without any further input validations.
5799  */
5800 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5801                              struct utp_upiu_req *req_upiu,
5802                              struct utp_upiu_req *rsp_upiu,
5803                              int msgcode,
5804                              u8 *desc_buff, int *buff_len,
5805                              enum query_opcode desc_op)
5806 {
5807         int err;
5808         int cmd_type = DEV_CMD_TYPE_QUERY;
5809         struct utp_task_req_desc treq = { { 0 }, };
5810         int ocs_value;
5811         u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5812
5813         if (desc_buff && desc_op != UPIU_QUERY_OPCODE_WRITE_DESC) {
5814                 err = -ENOTSUPP;
5815                 goto out;
5816         }
5817
5818         switch (msgcode) {
5819         case UPIU_TRANSACTION_NOP_OUT:
5820                 cmd_type = DEV_CMD_TYPE_NOP;
5821                 /* fall through */
5822         case UPIU_TRANSACTION_QUERY_REQ:
5823                 ufshcd_hold(hba, false);
5824                 mutex_lock(&hba->dev_cmd.lock);
5825                 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5826                                                    desc_buff, buff_len,
5827                                                    cmd_type, desc_op);
5828                 mutex_unlock(&hba->dev_cmd.lock);
5829                 ufshcd_release(hba);
5830
5831                 break;
5832         case UPIU_TRANSACTION_TASK_REQ:
5833                 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5834                 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5835
5836                 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5837
5838                 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5839                 if (err == -ETIMEDOUT)
5840                         break;
5841
5842                 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5843                 if (ocs_value != OCS_SUCCESS) {
5844                         dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
5845                                 ocs_value);
5846                         break;
5847                 }
5848
5849                 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
5850
5851                 break;
5852         default:
5853                 err = -EINVAL;
5854
5855                 break;
5856         }
5857
5858 out:
5859         return err;
5860 }
5861
5862 /**
5863  * ufshcd_eh_device_reset_handler - device reset handler registered to
5864  *                                    scsi layer.
5865  * @cmd: SCSI command pointer
5866  *
5867  * Returns SUCCESS/FAILED
5868  */
5869 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
5870 {
5871         struct Scsi_Host *host;
5872         struct ufs_hba *hba;
5873         unsigned int tag;
5874         u32 pos;
5875         int err;
5876         u8 resp = 0xF;
5877         struct ufshcd_lrb *lrbp;
5878         unsigned long flags;
5879
5880         host = cmd->device->host;
5881         hba = shost_priv(host);
5882         tag = cmd->request->tag;
5883
5884         lrbp = &hba->lrb[tag];
5885         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
5886         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
5887                 if (!err)
5888                         err = resp;
5889                 goto out;
5890         }
5891
5892         /* clear the commands that were pending for corresponding LUN */
5893         for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
5894                 if (hba->lrb[pos].lun == lrbp->lun) {
5895                         err = ufshcd_clear_cmd(hba, pos);
5896                         if (err)
5897                                 break;
5898                 }
5899         }
5900         spin_lock_irqsave(host->host_lock, flags);
5901         ufshcd_transfer_req_compl(hba);
5902         spin_unlock_irqrestore(host->host_lock, flags);
5903
5904 out:
5905         hba->req_abort_count = 0;
5906         if (!err) {
5907                 err = SUCCESS;
5908         } else {
5909                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
5910                 err = FAILED;
5911         }
5912         return err;
5913 }
5914
5915 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
5916 {
5917         struct ufshcd_lrb *lrbp;
5918         int tag;
5919
5920         for_each_set_bit(tag, &bitmap, hba->nutrs) {
5921                 lrbp = &hba->lrb[tag];
5922                 lrbp->req_abort_skip = true;
5923         }
5924 }
5925
5926 /**
5927  * ufshcd_abort - abort a specific command
5928  * @cmd: SCSI command pointer
5929  *
5930  * Abort the pending command in device by sending UFS_ABORT_TASK task management
5931  * command, and in host controller by clearing the door-bell register. There can
5932  * be race between controller sending the command to the device while abort is
5933  * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
5934  * really issued and then try to abort it.
5935  *
5936  * Returns SUCCESS/FAILED
5937  */
5938 static int ufshcd_abort(struct scsi_cmnd *cmd)
5939 {
5940         struct Scsi_Host *host;
5941         struct ufs_hba *hba;
5942         unsigned long flags;
5943         unsigned int tag;
5944         int err = 0;
5945         int poll_cnt;
5946         u8 resp = 0xF;
5947         struct ufshcd_lrb *lrbp;
5948         u32 reg;
5949
5950         host = cmd->device->host;
5951         hba = shost_priv(host);
5952         tag = cmd->request->tag;
5953         lrbp = &hba->lrb[tag];
5954         if (!ufshcd_valid_tag(hba, tag)) {
5955                 dev_err(hba->dev,
5956                         "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
5957                         __func__, tag, cmd, cmd->request);
5958                 BUG();
5959         }
5960
5961         /*
5962          * Task abort to the device W-LUN is illegal. When this command
5963          * will fail, due to spec violation, scsi err handling next step
5964          * will be to send LU reset which, again, is a spec violation.
5965          * To avoid these unnecessary/illegal step we skip to the last error
5966          * handling stage: reset and restore.
5967          */
5968         if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
5969                 return ufshcd_eh_host_reset_handler(cmd);
5970
5971         ufshcd_hold(hba, false);
5972         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
5973         /* If command is already aborted/completed, return SUCCESS */
5974         if (!(test_bit(tag, &hba->outstanding_reqs))) {
5975                 dev_err(hba->dev,
5976                         "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
5977                         __func__, tag, hba->outstanding_reqs, reg);
5978                 goto out;
5979         }
5980
5981         if (!(reg & (1 << tag))) {
5982                 dev_err(hba->dev,
5983                 "%s: cmd was completed, but without a notifying intr, tag = %d",
5984                 __func__, tag);
5985         }
5986
5987         /* Print Transfer Request of aborted task */
5988         dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
5989
5990         /*
5991          * Print detailed info about aborted request.
5992          * As more than one request might get aborted at the same time,
5993          * print full information only for the first aborted request in order
5994          * to reduce repeated printouts. For other aborted requests only print
5995          * basic details.
5996          */
5997         scsi_print_command(hba->lrb[tag].cmd);
5998         if (!hba->req_abort_count) {
5999                 ufshcd_print_host_regs(hba);
6000                 ufshcd_print_host_state(hba);
6001                 ufshcd_print_pwr_info(hba);
6002                 ufshcd_print_trs(hba, 1 << tag, true);
6003         } else {
6004                 ufshcd_print_trs(hba, 1 << tag, false);
6005         }
6006         hba->req_abort_count++;
6007
6008         /* Skip task abort in case previous aborts failed and report failure */
6009         if (lrbp->req_abort_skip) {
6010                 err = -EIO;
6011                 goto out;
6012         }
6013
6014         for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6015                 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6016                                 UFS_QUERY_TASK, &resp);
6017                 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6018                         /* cmd pending in the device */
6019                         dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6020                                 __func__, tag);
6021                         break;
6022                 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6023                         /*
6024                          * cmd not pending in the device, check if it is
6025                          * in transition.
6026                          */
6027                         dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6028                                 __func__, tag);
6029                         reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6030                         if (reg & (1 << tag)) {
6031                                 /* sleep for max. 200us to stabilize */
6032                                 usleep_range(100, 200);
6033                                 continue;
6034                         }
6035                         /* command completed already */
6036                         dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6037                                 __func__, tag);
6038                         goto out;
6039                 } else {
6040                         dev_err(hba->dev,
6041                                 "%s: no response from device. tag = %d, err %d\n",
6042                                 __func__, tag, err);
6043                         if (!err)
6044                                 err = resp; /* service response error */
6045                         goto out;
6046                 }
6047         }
6048
6049         if (!poll_cnt) {
6050                 err = -EBUSY;
6051                 goto out;
6052         }
6053
6054         err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6055                         UFS_ABORT_TASK, &resp);
6056         if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6057                 if (!err) {
6058                         err = resp; /* service response error */
6059                         dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6060                                 __func__, tag, err);
6061                 }
6062                 goto out;
6063         }
6064
6065         err = ufshcd_clear_cmd(hba, tag);
6066         if (err) {
6067                 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6068                         __func__, tag, err);
6069                 goto out;
6070         }
6071
6072         scsi_dma_unmap(cmd);
6073
6074         spin_lock_irqsave(host->host_lock, flags);
6075         ufshcd_outstanding_req_clear(hba, tag);
6076         hba->lrb[tag].cmd = NULL;
6077         spin_unlock_irqrestore(host->host_lock, flags);
6078
6079         clear_bit_unlock(tag, &hba->lrb_in_use);
6080         wake_up(&hba->dev_cmd.tag_wq);
6081
6082 out:
6083         if (!err) {
6084                 err = SUCCESS;
6085         } else {
6086                 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6087                 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
6088                 err = FAILED;
6089         }
6090
6091         /*
6092          * This ufshcd_release() corresponds to the original scsi cmd that got
6093          * aborted here (as we won't get any IRQ for it).
6094          */
6095         ufshcd_release(hba);
6096         return err;
6097 }
6098
6099 /**
6100  * ufshcd_host_reset_and_restore - reset and restore host controller
6101  * @hba: per-adapter instance
6102  *
6103  * Note that host controller reset may issue DME_RESET to
6104  * local and remote (device) Uni-Pro stack and the attributes
6105  * are reset to default state.
6106  *
6107  * Returns zero on success, non-zero on failure
6108  */
6109 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6110 {
6111         int err;
6112         unsigned long flags;
6113
6114         /* Reset the host controller */
6115         spin_lock_irqsave(hba->host->host_lock, flags);
6116         ufshcd_hba_stop(hba, false);
6117         spin_unlock_irqrestore(hba->host->host_lock, flags);
6118
6119         /* scale up clocks to max frequency before full reinitialization */
6120         ufshcd_scale_clks(hba, true);
6121
6122         err = ufshcd_hba_enable(hba);
6123         if (err)
6124                 goto out;
6125
6126         /* Establish the link again and restore the device */
6127         err = ufshcd_probe_hba(hba);
6128
6129         if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
6130                 err = -EIO;
6131 out:
6132         if (err)
6133                 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6134
6135         return err;
6136 }
6137
6138 /**
6139  * ufshcd_reset_and_restore - reset and re-initialize host/device
6140  * @hba: per-adapter instance
6141  *
6142  * Reset and recover device, host and re-establish link. This
6143  * is helpful to recover the communication in fatal error conditions.
6144  *
6145  * Returns zero on success, non-zero on failure
6146  */
6147 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6148 {
6149         int err = 0;
6150         unsigned long flags;
6151         int retries = MAX_HOST_RESET_RETRIES;
6152
6153         do {
6154                 err = ufshcd_host_reset_and_restore(hba);
6155         } while (err && --retries);
6156
6157         /*
6158          * After reset the door-bell might be cleared, complete
6159          * outstanding requests in s/w here.
6160          */
6161         spin_lock_irqsave(hba->host->host_lock, flags);
6162         ufshcd_transfer_req_compl(hba);
6163         ufshcd_tmc_handler(hba);
6164         spin_unlock_irqrestore(hba->host->host_lock, flags);
6165
6166         return err;
6167 }
6168
6169 /**
6170  * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6171  * @cmd: SCSI command pointer
6172  *
6173  * Returns SUCCESS/FAILED
6174  */
6175 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6176 {
6177         int err;
6178         unsigned long flags;
6179         struct ufs_hba *hba;
6180
6181         hba = shost_priv(cmd->device->host);
6182
6183         ufshcd_hold(hba, false);
6184         /*
6185          * Check if there is any race with fatal error handling.
6186          * If so, wait for it to complete. Even though fatal error
6187          * handling does reset and restore in some cases, don't assume
6188          * anything out of it. We are just avoiding race here.
6189          */
6190         do {
6191                 spin_lock_irqsave(hba->host->host_lock, flags);
6192                 if (!(work_pending(&hba->eh_work) ||
6193                             hba->ufshcd_state == UFSHCD_STATE_RESET ||
6194                             hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
6195                         break;
6196                 spin_unlock_irqrestore(hba->host->host_lock, flags);
6197                 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
6198                 flush_work(&hba->eh_work);
6199         } while (1);
6200
6201         hba->ufshcd_state = UFSHCD_STATE_RESET;
6202         ufshcd_set_eh_in_progress(hba);
6203         spin_unlock_irqrestore(hba->host->host_lock, flags);
6204
6205         err = ufshcd_reset_and_restore(hba);
6206
6207         spin_lock_irqsave(hba->host->host_lock, flags);
6208         if (!err) {
6209                 err = SUCCESS;
6210                 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6211         } else {
6212                 err = FAILED;
6213                 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6214         }
6215         ufshcd_clear_eh_in_progress(hba);
6216         spin_unlock_irqrestore(hba->host->host_lock, flags);
6217
6218         ufshcd_release(hba);
6219         return err;
6220 }
6221
6222 /**
6223  * ufshcd_get_max_icc_level - calculate the ICC level
6224  * @sup_curr_uA: max. current supported by the regulator
6225  * @start_scan: row at the desc table to start scan from
6226  * @buff: power descriptor buffer
6227  *
6228  * Returns calculated max ICC level for specific regulator
6229  */
6230 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6231 {
6232         int i;
6233         int curr_uA;
6234         u16 data;
6235         u16 unit;
6236
6237         for (i = start_scan; i >= 0; i--) {
6238                 data = be16_to_cpup((__be16 *)&buff[2 * i]);
6239                 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6240                                                 ATTR_ICC_LVL_UNIT_OFFSET;
6241                 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6242                 switch (unit) {
6243                 case UFSHCD_NANO_AMP:
6244                         curr_uA = curr_uA / 1000;
6245                         break;
6246                 case UFSHCD_MILI_AMP:
6247                         curr_uA = curr_uA * 1000;
6248                         break;
6249                 case UFSHCD_AMP:
6250                         curr_uA = curr_uA * 1000 * 1000;
6251                         break;
6252                 case UFSHCD_MICRO_AMP:
6253                 default:
6254                         break;
6255                 }
6256                 if (sup_curr_uA >= curr_uA)
6257                         break;
6258         }
6259         if (i < 0) {
6260                 i = 0;
6261                 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6262         }
6263
6264         return (u32)i;
6265 }
6266
6267 /**
6268  * ufshcd_calc_icc_level - calculate the max ICC level
6269  * In case regulators are not initialized we'll return 0
6270  * @hba: per-adapter instance
6271  * @desc_buf: power descriptor buffer to extract ICC levels from.
6272  * @len: length of desc_buff
6273  *
6274  * Returns calculated ICC level
6275  */
6276 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6277                                                         u8 *desc_buf, int len)
6278 {
6279         u32 icc_level = 0;
6280
6281         if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6282                                                 !hba->vreg_info.vccq2) {
6283                 dev_err(hba->dev,
6284                         "%s: Regulator capability was not set, actvIccLevel=%d",
6285                                                         __func__, icc_level);
6286                 goto out;
6287         }
6288
6289         if (hba->vreg_info.vcc)
6290                 icc_level = ufshcd_get_max_icc_level(
6291                                 hba->vreg_info.vcc->max_uA,
6292                                 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6293                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6294
6295         if (hba->vreg_info.vccq)
6296                 icc_level = ufshcd_get_max_icc_level(
6297                                 hba->vreg_info.vccq->max_uA,
6298                                 icc_level,
6299                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6300
6301         if (hba->vreg_info.vccq2)
6302                 icc_level = ufshcd_get_max_icc_level(
6303                                 hba->vreg_info.vccq2->max_uA,
6304                                 icc_level,
6305                                 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6306 out:
6307         return icc_level;
6308 }
6309
6310 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6311 {
6312         int ret;
6313         int buff_len = hba->desc_size.pwr_desc;
6314         u8 *desc_buf;
6315
6316         desc_buf = kmalloc(buff_len, GFP_KERNEL);
6317         if (!desc_buf)
6318                 return;
6319
6320         ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6321         if (ret) {
6322                 dev_err(hba->dev,
6323                         "%s: Failed reading power descriptor.len = %d ret = %d",
6324                         __func__, buff_len, ret);
6325                 goto out;
6326         }
6327
6328         hba->init_prefetch_data.icc_level =
6329                         ufshcd_find_max_sup_active_icc_level(hba,
6330                         desc_buf, buff_len);
6331         dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6332                         __func__, hba->init_prefetch_data.icc_level);
6333
6334         ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6335                 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6336                 &hba->init_prefetch_data.icc_level);
6337
6338         if (ret)
6339                 dev_err(hba->dev,
6340                         "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6341                         __func__, hba->init_prefetch_data.icc_level , ret);
6342
6343 out:
6344         kfree(desc_buf);
6345 }
6346
6347 /**
6348  * ufshcd_scsi_add_wlus - Adds required W-LUs
6349  * @hba: per-adapter instance
6350  *
6351  * UFS device specification requires the UFS devices to support 4 well known
6352  * logical units:
6353  *      "REPORT_LUNS" (address: 01h)
6354  *      "UFS Device" (address: 50h)
6355  *      "RPMB" (address: 44h)
6356  *      "BOOT" (address: 30h)
6357  * UFS device's power management needs to be controlled by "POWER CONDITION"
6358  * field of SSU (START STOP UNIT) command. But this "power condition" field
6359  * will take effect only when its sent to "UFS device" well known logical unit
6360  * hence we require the scsi_device instance to represent this logical unit in
6361  * order for the UFS host driver to send the SSU command for power management.
6362  *
6363  * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6364  * Block) LU so user space process can control this LU. User space may also
6365  * want to have access to BOOT LU.
6366  *
6367  * This function adds scsi device instances for each of all well known LUs
6368  * (except "REPORT LUNS" LU).
6369  *
6370  * Returns zero on success (all required W-LUs are added successfully),
6371  * non-zero error value on failure (if failed to add any of the required W-LU).
6372  */
6373 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6374 {
6375         int ret = 0;
6376         struct scsi_device *sdev_rpmb;
6377         struct scsi_device *sdev_boot;
6378
6379         hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6380                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6381         if (IS_ERR(hba->sdev_ufs_device)) {
6382                 ret = PTR_ERR(hba->sdev_ufs_device);
6383                 hba->sdev_ufs_device = NULL;
6384                 goto out;
6385         }
6386         scsi_device_put(hba->sdev_ufs_device);
6387
6388         sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6389                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6390         if (IS_ERR(sdev_rpmb)) {
6391                 ret = PTR_ERR(sdev_rpmb);
6392                 goto remove_sdev_ufs_device;
6393         }
6394         scsi_device_put(sdev_rpmb);
6395
6396         sdev_boot = __scsi_add_device(hba->host, 0, 0,
6397                 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6398         if (IS_ERR(sdev_boot))
6399                 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6400         else
6401                 scsi_device_put(sdev_boot);
6402         goto out;
6403
6404 remove_sdev_ufs_device:
6405         scsi_remove_device(hba->sdev_ufs_device);
6406 out:
6407         return ret;
6408 }
6409
6410 static int ufs_get_device_desc(struct ufs_hba *hba,
6411                                struct ufs_dev_desc *dev_desc)
6412 {
6413         int err;
6414         size_t buff_len;
6415         u8 model_index;
6416         u8 *desc_buf;
6417
6418         buff_len = max_t(size_t, hba->desc_size.dev_desc,
6419                          QUERY_DESC_MAX_SIZE + 1);
6420         desc_buf = kmalloc(buff_len, GFP_KERNEL);
6421         if (!desc_buf) {
6422                 err = -ENOMEM;
6423                 goto out;
6424         }
6425
6426         err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
6427         if (err) {
6428                 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6429                         __func__, err);
6430                 goto out;
6431         }
6432
6433         /*
6434          * getting vendor (manufacturerID) and Bank Index in big endian
6435          * format
6436          */
6437         dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
6438                                      desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6439
6440         model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6441
6442         /* Zero-pad entire buffer for string termination. */
6443         memset(desc_buf, 0, buff_len);
6444
6445         err = ufshcd_read_string_desc(hba, model_index, desc_buf,
6446                                       QUERY_DESC_MAX_SIZE, true/*ASCII*/);
6447         if (err) {
6448                 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6449                         __func__, err);
6450                 goto out;
6451         }
6452
6453         desc_buf[QUERY_DESC_MAX_SIZE] = '\0';
6454         strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE),
6455                 min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET],
6456                       MAX_MODEL_LEN));
6457
6458         /* Null terminate the model string */
6459         dev_desc->model[MAX_MODEL_LEN] = '\0';
6460
6461 out:
6462         kfree(desc_buf);
6463         return err;
6464 }
6465
6466 static void ufs_fixup_device_setup(struct ufs_hba *hba,
6467                                    struct ufs_dev_desc *dev_desc)
6468 {
6469         struct ufs_dev_fix *f;
6470
6471         for (f = ufs_fixups; f->quirk; f++) {
6472                 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6473                      f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6474                     (STR_PRFX_EQUAL(f->card.model, dev_desc->model) ||
6475                      !strcmp(f->card.model, UFS_ANY_MODEL)))
6476                         hba->dev_quirks |= f->quirk;
6477         }
6478 }
6479
6480 /**
6481  * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6482  * @hba: per-adapter instance
6483  *
6484  * PA_TActivate parameter can be tuned manually if UniPro version is less than
6485  * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6486  * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6487  * the hibern8 exit latency.
6488  *
6489  * Returns zero on success, non-zero error value on failure.
6490  */
6491 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6492 {
6493         int ret = 0;
6494         u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6495
6496         ret = ufshcd_dme_peer_get(hba,
6497                                   UIC_ARG_MIB_SEL(
6498                                         RX_MIN_ACTIVATETIME_CAPABILITY,
6499                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6500                                   &peer_rx_min_activatetime);
6501         if (ret)
6502                 goto out;
6503
6504         /* make sure proper unit conversion is applied */
6505         tuned_pa_tactivate =
6506                 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6507                  / PA_TACTIVATE_TIME_UNIT_US);
6508         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6509                              tuned_pa_tactivate);
6510
6511 out:
6512         return ret;
6513 }
6514
6515 /**
6516  * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6517  * @hba: per-adapter instance
6518  *
6519  * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6520  * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6521  * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6522  * This optimal value can help reduce the hibern8 exit latency.
6523  *
6524  * Returns zero on success, non-zero error value on failure.
6525  */
6526 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6527 {
6528         int ret = 0;
6529         u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6530         u32 max_hibern8_time, tuned_pa_hibern8time;
6531
6532         ret = ufshcd_dme_get(hba,
6533                              UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6534                                         UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6535                                   &local_tx_hibern8_time_cap);
6536         if (ret)
6537                 goto out;
6538
6539         ret = ufshcd_dme_peer_get(hba,
6540                                   UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6541                                         UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6542                                   &peer_rx_hibern8_time_cap);
6543         if (ret)
6544                 goto out;
6545
6546         max_hibern8_time = max(local_tx_hibern8_time_cap,
6547                                peer_rx_hibern8_time_cap);
6548         /* make sure proper unit conversion is applied */
6549         tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6550                                 / PA_HIBERN8_TIME_UNIT_US);
6551         ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6552                              tuned_pa_hibern8time);
6553 out:
6554         return ret;
6555 }
6556
6557 /**
6558  * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6559  * less than device PA_TACTIVATE time.
6560  * @hba: per-adapter instance
6561  *
6562  * Some UFS devices require host PA_TACTIVATE to be lower than device
6563  * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6564  * for such devices.
6565  *
6566  * Returns zero on success, non-zero error value on failure.
6567  */
6568 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6569 {
6570         int ret = 0;
6571         u32 granularity, peer_granularity;
6572         u32 pa_tactivate, peer_pa_tactivate;
6573         u32 pa_tactivate_us, peer_pa_tactivate_us;
6574         u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6575
6576         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6577                                   &granularity);
6578         if (ret)
6579                 goto out;
6580
6581         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6582                                   &peer_granularity);
6583         if (ret)
6584                 goto out;
6585
6586         if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6587             (granularity > PA_GRANULARITY_MAX_VAL)) {
6588                 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6589                         __func__, granularity);
6590                 return -EINVAL;
6591         }
6592
6593         if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6594             (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6595                 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6596                         __func__, peer_granularity);
6597                 return -EINVAL;
6598         }
6599
6600         ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6601         if (ret)
6602                 goto out;
6603
6604         ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6605                                   &peer_pa_tactivate);
6606         if (ret)
6607                 goto out;
6608
6609         pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6610         peer_pa_tactivate_us = peer_pa_tactivate *
6611                              gran_to_us_table[peer_granularity - 1];
6612
6613         if (pa_tactivate_us > peer_pa_tactivate_us) {
6614                 u32 new_peer_pa_tactivate;
6615
6616                 new_peer_pa_tactivate = pa_tactivate_us /
6617                                       gran_to_us_table[peer_granularity - 1];
6618                 new_peer_pa_tactivate++;
6619                 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6620                                           new_peer_pa_tactivate);
6621         }
6622
6623 out:
6624         return ret;
6625 }
6626
6627 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6628 {
6629         if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6630                 ufshcd_tune_pa_tactivate(hba);
6631                 ufshcd_tune_pa_hibern8time(hba);
6632         }
6633
6634         if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6635                 /* set 1ms timeout for PA_TACTIVATE */
6636                 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
6637
6638         if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6639                 ufshcd_quirk_tune_host_pa_tactivate(hba);
6640
6641         ufshcd_vops_apply_dev_quirks(hba);
6642 }
6643
6644 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6645 {
6646         int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist);
6647
6648         hba->ufs_stats.hibern8_exit_cnt = 0;
6649         hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6650
6651         memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size);
6652         memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size);
6653         memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size);
6654         memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size);
6655         memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size);
6656
6657         hba->req_abort_count = 0;
6658 }
6659
6660 static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6661 {
6662         int err;
6663
6664         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6665                 &hba->desc_size.dev_desc);
6666         if (err)
6667                 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6668
6669         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6670                 &hba->desc_size.pwr_desc);
6671         if (err)
6672                 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6673
6674         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6675                 &hba->desc_size.interc_desc);
6676         if (err)
6677                 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6678
6679         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6680                 &hba->desc_size.conf_desc);
6681         if (err)
6682                 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6683
6684         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6685                 &hba->desc_size.unit_desc);
6686         if (err)
6687                 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6688
6689         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6690                 &hba->desc_size.geom_desc);
6691         if (err)
6692                 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6693         err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6694                 &hba->desc_size.hlth_desc);
6695         if (err)
6696                 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6697 }
6698
6699 static void ufshcd_def_desc_sizes(struct ufs_hba *hba)
6700 {
6701         hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6702         hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6703         hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6704         hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6705         hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6706         hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6707         hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6708 }
6709
6710 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6711         {19200000, REF_CLK_FREQ_19_2_MHZ},
6712         {26000000, REF_CLK_FREQ_26_MHZ},
6713         {38400000, REF_CLK_FREQ_38_4_MHZ},
6714         {52000000, REF_CLK_FREQ_52_MHZ},
6715         {0, REF_CLK_FREQ_INVAL},
6716 };
6717
6718 static enum ufs_ref_clk_freq
6719 ufs_get_bref_clk_from_hz(unsigned long freq)
6720 {
6721         int i;
6722
6723         for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6724                 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6725                         return ufs_ref_clk_freqs[i].val;
6726
6727         return REF_CLK_FREQ_INVAL;
6728 }
6729
6730 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6731 {
6732         unsigned long freq;
6733
6734         freq = clk_get_rate(refclk);
6735
6736         hba->dev_ref_clk_freq =
6737                 ufs_get_bref_clk_from_hz(freq);
6738
6739         if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6740                 dev_err(hba->dev,
6741                 "invalid ref_clk setting = %ld\n", freq);
6742 }
6743
6744 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6745 {
6746         int err;
6747         u32 ref_clk;
6748         u32 freq = hba->dev_ref_clk_freq;
6749
6750         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6751                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6752
6753         if (err) {
6754                 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6755                         err);
6756                 goto out;
6757         }
6758
6759         if (ref_clk == freq)
6760                 goto out; /* nothing to update */
6761
6762         err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6763                         QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6764
6765         if (err) {
6766                 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6767                         ufs_ref_clk_freqs[freq].freq_hz);
6768                 goto out;
6769         }
6770
6771         dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6772                         ufs_ref_clk_freqs[freq].freq_hz);
6773
6774 out:
6775         return err;
6776 }
6777
6778 /**
6779  * ufshcd_probe_hba - probe hba to detect device and initialize
6780  * @hba: per-adapter instance
6781  *
6782  * Execute link-startup and verify device initialization
6783  */
6784 static int ufshcd_probe_hba(struct ufs_hba *hba)
6785 {
6786         struct ufs_dev_desc card = {0};
6787         int ret;
6788         ktime_t start = ktime_get();
6789
6790         ret = ufshcd_link_startup(hba);
6791         if (ret)
6792                 goto out;
6793
6794         /* set the default level for urgent bkops */
6795         hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6796         hba->is_urgent_bkops_lvl_checked = false;
6797
6798         /* Debug counters initialization */
6799         ufshcd_clear_dbg_ufs_stats(hba);
6800
6801         /* UniPro link is active now */
6802         ufshcd_set_link_active(hba);
6803
6804         /* Enable Auto-Hibernate if configured */
6805         ufshcd_auto_hibern8_enable(hba);
6806
6807         ret = ufshcd_verify_dev_init(hba);
6808         if (ret)
6809                 goto out;
6810
6811         ret = ufshcd_complete_dev_init(hba);
6812         if (ret)
6813                 goto out;
6814
6815         /* Init check for device descriptor sizes */
6816         ufshcd_init_desc_sizes(hba);
6817
6818         ret = ufs_get_device_desc(hba, &card);
6819         if (ret) {
6820                 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6821                         __func__, ret);
6822                 goto out;
6823         }
6824
6825         ufs_fixup_device_setup(hba, &card);
6826         ufshcd_tune_unipro_params(hba);
6827
6828         ret = ufshcd_set_vccq_rail_unused(hba,
6829                 (hba->dev_quirks & UFS_DEVICE_NO_VCCQ) ? true : false);
6830         if (ret)
6831                 goto out;
6832
6833         /* UFS device is also active now */
6834         ufshcd_set_ufs_dev_active(hba);
6835         ufshcd_force_reset_auto_bkops(hba);
6836         hba->wlun_dev_clr_ua = true;
6837
6838         if (ufshcd_get_max_pwr_mode(hba)) {
6839                 dev_err(hba->dev,
6840                         "%s: Failed getting max supported power mode\n",
6841                         __func__);
6842         } else {
6843                 /*
6844                  * Set the right value to bRefClkFreq before attempting to
6845                  * switch to HS gears.
6846                  */
6847                 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6848                         ufshcd_set_dev_ref_clk(hba);
6849                 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
6850                 if (ret) {
6851                         dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6852                                         __func__, ret);
6853                         goto out;
6854                 }
6855         }
6856
6857         /* set the state as operational after switching to desired gear */
6858         hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6859
6860         /*
6861          * If we are in error handling context or in power management callbacks
6862          * context, no need to scan the host
6863          */
6864         if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6865                 bool flag;
6866
6867                 /* clear any previous UFS device information */
6868                 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
6869                 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
6870                                 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
6871                         hba->dev_info.f_power_on_wp_en = flag;
6872
6873                 if (!hba->is_init_prefetch)
6874                         ufshcd_init_icc_levels(hba);
6875
6876                 /* Add required well known logical units to scsi mid layer */
6877                 if (ufshcd_scsi_add_wlus(hba))
6878                         goto out;
6879
6880                 /* Initialize devfreq after UFS device is detected */
6881                 if (ufshcd_is_clkscaling_supported(hba)) {
6882                         memcpy(&hba->clk_scaling.saved_pwr_info.info,
6883                                 &hba->pwr_info,
6884                                 sizeof(struct ufs_pa_layer_attr));
6885                         hba->clk_scaling.saved_pwr_info.is_valid = true;
6886                         if (!hba->devfreq) {
6887                                 ret = ufshcd_devfreq_init(hba);
6888                                 if (ret)
6889                                         goto out;
6890                         }
6891                         hba->clk_scaling.is_allowed = true;
6892                 }
6893
6894                 ufs_bsg_probe(hba);
6895
6896                 scsi_scan_host(hba->host);
6897                 pm_runtime_put_sync(hba->dev);
6898         }
6899
6900         if (!hba->is_init_prefetch)
6901                 hba->is_init_prefetch = true;
6902
6903 out:
6904         /*
6905          * If we failed to initialize the device or the device is not
6906          * present, turn off the power/clocks etc.
6907          */
6908         if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
6909                 pm_runtime_put_sync(hba->dev);
6910                 ufshcd_exit_clk_scaling(hba);
6911                 ufshcd_hba_exit(hba);
6912         }
6913
6914         trace_ufshcd_init(dev_name(hba->dev), ret,
6915                 ktime_to_us(ktime_sub(ktime_get(), start)),
6916                 hba->curr_dev_pwr_mode, hba->uic_link_state);
6917         return ret;
6918 }
6919
6920 /**
6921  * ufshcd_async_scan - asynchronous execution for probing hba
6922  * @data: data pointer to pass to this function
6923  * @cookie: cookie data
6924  */
6925 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
6926 {
6927         struct ufs_hba *hba = (struct ufs_hba *)data;
6928
6929         ufshcd_probe_hba(hba);
6930 }
6931
6932 static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
6933 {
6934         unsigned long flags;
6935         struct Scsi_Host *host;
6936         struct ufs_hba *hba;
6937         int index;
6938         bool found = false;
6939
6940         if (!scmd || !scmd->device || !scmd->device->host)
6941                 return BLK_EH_DONE;
6942
6943         host = scmd->device->host;
6944         hba = shost_priv(host);
6945         if (!hba)
6946                 return BLK_EH_DONE;
6947
6948         spin_lock_irqsave(host->host_lock, flags);
6949
6950         for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
6951                 if (hba->lrb[index].cmd == scmd) {
6952                         found = true;
6953                         break;
6954                 }
6955         }
6956
6957         spin_unlock_irqrestore(host->host_lock, flags);
6958
6959         /*
6960          * Bypass SCSI error handling and reset the block layer timer if this
6961          * SCSI command was not actually dispatched to UFS driver, otherwise
6962          * let SCSI layer handle the error as usual.
6963          */
6964         return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
6965 }
6966
6967 static const struct attribute_group *ufshcd_driver_groups[] = {
6968         &ufs_sysfs_unit_descriptor_group,
6969         &ufs_sysfs_lun_attributes_group,
6970         NULL,
6971 };
6972
6973 static struct scsi_host_template ufshcd_driver_template = {
6974         .module                 = THIS_MODULE,
6975         .name                   = UFSHCD,
6976         .proc_name              = UFSHCD,
6977         .queuecommand           = ufshcd_queuecommand,
6978         .slave_alloc            = ufshcd_slave_alloc,
6979         .slave_configure        = ufshcd_slave_configure,
6980         .slave_destroy          = ufshcd_slave_destroy,
6981         .change_queue_depth     = ufshcd_change_queue_depth,
6982         .eh_abort_handler       = ufshcd_abort,
6983         .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
6984         .eh_host_reset_handler   = ufshcd_eh_host_reset_handler,
6985         .eh_timed_out           = ufshcd_eh_timed_out,
6986         .this_id                = -1,
6987         .sg_tablesize           = SG_ALL,
6988         .cmd_per_lun            = UFSHCD_CMD_PER_LUN,
6989         .can_queue              = UFSHCD_CAN_QUEUE,
6990         .max_host_blocked       = 1,
6991         .track_queue_depth      = 1,
6992         .sdev_groups            = ufshcd_driver_groups,
6993         .dma_boundary           = PAGE_SIZE - 1,
6994 };
6995
6996 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
6997                                    int ua)
6998 {
6999         int ret;
7000
7001         if (!vreg)
7002                 return 0;
7003
7004         ret = regulator_set_load(vreg->reg, ua);
7005         if (ret < 0) {
7006                 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7007                                 __func__, vreg->name, ua, ret);
7008         }
7009
7010         return ret;
7011 }
7012
7013 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7014                                          struct ufs_vreg *vreg)
7015 {
7016         if (!vreg)
7017                 return 0;
7018         else if (vreg->unused)
7019                 return 0;
7020         else
7021                 return ufshcd_config_vreg_load(hba->dev, vreg,
7022                                                UFS_VREG_LPM_LOAD_UA);
7023 }
7024
7025 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7026                                          struct ufs_vreg *vreg)
7027 {
7028         if (!vreg)
7029                 return 0;
7030         else if (vreg->unused)
7031                 return 0;
7032         else
7033                 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
7034 }
7035
7036 static int ufshcd_config_vreg(struct device *dev,
7037                 struct ufs_vreg *vreg, bool on)
7038 {
7039         int ret = 0;
7040         struct regulator *reg;
7041         const char *name;
7042         int min_uV, uA_load;
7043
7044         BUG_ON(!vreg);
7045
7046         reg = vreg->reg;
7047         name = vreg->name;
7048
7049         if (regulator_count_voltages(reg) > 0) {
7050                 min_uV = on ? vreg->min_uV : 0;
7051                 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7052                 if (ret) {
7053                         dev_err(dev, "%s: %s set voltage failed, err=%d\n",
7054                                         __func__, name, ret);
7055                         goto out;
7056                 }
7057
7058                 uA_load = on ? vreg->max_uA : 0;
7059                 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7060                 if (ret)
7061                         goto out;
7062         }
7063 out:
7064         return ret;
7065 }
7066
7067 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7068 {
7069         int ret = 0;
7070
7071         if (!vreg)
7072                 goto out;
7073         else if (vreg->enabled || vreg->unused)
7074                 goto out;
7075
7076         ret = ufshcd_config_vreg(dev, vreg, true);
7077         if (!ret)
7078                 ret = regulator_enable(vreg->reg);
7079
7080         if (!ret)
7081                 vreg->enabled = true;
7082         else
7083                 dev_err(dev, "%s: %s enable failed, err=%d\n",
7084                                 __func__, vreg->name, ret);
7085 out:
7086         return ret;
7087 }
7088
7089 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7090 {
7091         int ret = 0;
7092
7093         if (!vreg)
7094                 goto out;
7095         else if (!vreg->enabled || vreg->unused)
7096                 goto out;
7097
7098         ret = regulator_disable(vreg->reg);
7099
7100         if (!ret) {
7101                 /* ignore errors on applying disable config */
7102                 ufshcd_config_vreg(dev, vreg, false);
7103                 vreg->enabled = false;
7104         } else {
7105                 dev_err(dev, "%s: %s disable failed, err=%d\n",
7106                                 __func__, vreg->name, ret);
7107         }
7108 out:
7109         return ret;
7110 }
7111
7112 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7113 {
7114         int ret = 0;
7115         struct device *dev = hba->dev;
7116         struct ufs_vreg_info *info = &hba->vreg_info;
7117
7118         if (!info)
7119                 goto out;
7120
7121         ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7122         if (ret)
7123                 goto out;
7124
7125         ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7126         if (ret)
7127                 goto out;
7128
7129         ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7130         if (ret)
7131                 goto out;
7132
7133 out:
7134         if (ret) {
7135                 ufshcd_toggle_vreg(dev, info->vccq2, false);
7136                 ufshcd_toggle_vreg(dev, info->vccq, false);
7137                 ufshcd_toggle_vreg(dev, info->vcc, false);
7138         }
7139         return ret;
7140 }
7141
7142 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7143 {
7144         struct ufs_vreg_info *info = &hba->vreg_info;
7145
7146         if (info)
7147                 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7148
7149         return 0;
7150 }
7151
7152 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7153 {
7154         int ret = 0;
7155
7156         if (!vreg)
7157                 goto out;
7158
7159         vreg->reg = devm_regulator_get(dev, vreg->name);
7160         if (IS_ERR(vreg->reg)) {
7161                 ret = PTR_ERR(vreg->reg);
7162                 dev_err(dev, "%s: %s get failed, err=%d\n",
7163                                 __func__, vreg->name, ret);
7164         }
7165 out:
7166         return ret;
7167 }
7168
7169 static int ufshcd_init_vreg(struct ufs_hba *hba)
7170 {
7171         int ret = 0;
7172         struct device *dev = hba->dev;
7173         struct ufs_vreg_info *info = &hba->vreg_info;
7174
7175         if (!info)
7176                 goto out;
7177
7178         ret = ufshcd_get_vreg(dev, info->vcc);
7179         if (ret)
7180                 goto out;
7181
7182         ret = ufshcd_get_vreg(dev, info->vccq);
7183         if (ret)
7184                 goto out;
7185
7186         ret = ufshcd_get_vreg(dev, info->vccq2);
7187 out:
7188         return ret;
7189 }
7190
7191 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7192 {
7193         struct ufs_vreg_info *info = &hba->vreg_info;
7194
7195         if (info)
7196                 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7197
7198         return 0;
7199 }
7200
7201 static int ufshcd_set_vccq_rail_unused(struct ufs_hba *hba, bool unused)
7202 {
7203         int ret = 0;
7204         struct ufs_vreg_info *info = &hba->vreg_info;
7205
7206         if (!info)
7207                 goto out;
7208         else if (!info->vccq)
7209                 goto out;
7210
7211         if (unused) {
7212                 /* shut off the rail here */
7213                 ret = ufshcd_toggle_vreg(hba->dev, info->vccq, false);
7214                 /*
7215                  * Mark this rail as no longer used, so it doesn't get enabled
7216                  * later by mistake
7217                  */
7218                 if (!ret)
7219                         info->vccq->unused = true;
7220         } else {
7221                 /*
7222                  * rail should have been already enabled hence just make sure
7223                  * that unused flag is cleared.
7224                  */
7225                 info->vccq->unused = false;
7226         }
7227 out:
7228         return ret;
7229 }
7230
7231 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7232                                         bool skip_ref_clk)
7233 {
7234         int ret = 0;
7235         struct ufs_clk_info *clki;
7236         struct list_head *head = &hba->clk_list_head;
7237         unsigned long flags;
7238         ktime_t start = ktime_get();
7239         bool clk_state_changed = false;
7240
7241         if (list_empty(head))
7242                 goto out;
7243
7244         /*
7245          * vendor specific setup_clocks ops may depend on clocks managed by
7246          * this standard driver hence call the vendor specific setup_clocks
7247          * before disabling the clocks managed here.
7248          */
7249         if (!on) {
7250                 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7251                 if (ret)
7252                         return ret;
7253         }
7254
7255         list_for_each_entry(clki, head, list) {
7256                 if (!IS_ERR_OR_NULL(clki->clk)) {
7257                         if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7258                                 continue;
7259
7260                         clk_state_changed = on ^ clki->enabled;
7261                         if (on && !clki->enabled) {
7262                                 ret = clk_prepare_enable(clki->clk);
7263                                 if (ret) {
7264                                         dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7265                                                 __func__, clki->name, ret);
7266                                         goto out;
7267                                 }
7268                         } else if (!on && clki->enabled) {
7269                                 clk_disable_unprepare(clki->clk);
7270                         }
7271                         clki->enabled = on;
7272                         dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7273                                         clki->name, on ? "en" : "dis");
7274                 }
7275         }
7276
7277         /*
7278          * vendor specific setup_clocks ops may depend on clocks managed by
7279          * this standard driver hence call the vendor specific setup_clocks
7280          * after enabling the clocks managed here.
7281          */
7282         if (on) {
7283                 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7284                 if (ret)
7285                         return ret;
7286         }
7287
7288 out:
7289         if (ret) {
7290                 list_for_each_entry(clki, head, list) {
7291                         if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7292                                 clk_disable_unprepare(clki->clk);
7293                 }
7294         } else if (!ret && on) {
7295                 spin_lock_irqsave(hba->host->host_lock, flags);
7296                 hba->clk_gating.state = CLKS_ON;
7297                 trace_ufshcd_clk_gating(dev_name(hba->dev),
7298                                         hba->clk_gating.state);
7299                 spin_unlock_irqrestore(hba->host->host_lock, flags);
7300         }
7301
7302         if (clk_state_changed)
7303                 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7304                         (on ? "on" : "off"),
7305                         ktime_to_us(ktime_sub(ktime_get(), start)), ret);
7306         return ret;
7307 }
7308
7309 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7310 {
7311         return  __ufshcd_setup_clocks(hba, on, false);
7312 }
7313
7314 static int ufshcd_init_clocks(struct ufs_hba *hba)
7315 {
7316         int ret = 0;
7317         struct ufs_clk_info *clki;
7318         struct device *dev = hba->dev;
7319         struct list_head *head = &hba->clk_list_head;
7320
7321         if (list_empty(head))
7322                 goto out;
7323
7324         list_for_each_entry(clki, head, list) {
7325                 if (!clki->name)
7326                         continue;
7327
7328                 clki->clk = devm_clk_get(dev, clki->name);
7329                 if (IS_ERR(clki->clk)) {
7330                         ret = PTR_ERR(clki->clk);
7331                         dev_err(dev, "%s: %s clk get failed, %d\n",
7332                                         __func__, clki->name, ret);
7333                         goto out;
7334                 }
7335
7336                 /*
7337                  * Parse device ref clk freq as per device tree "ref_clk".
7338                  * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7339                  * in ufshcd_alloc_host().
7340                  */
7341                 if (!strcmp(clki->name, "ref_clk"))
7342                         ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7343
7344                 if (clki->max_freq) {
7345                         ret = clk_set_rate(clki->clk, clki->max_freq);
7346                         if (ret) {
7347                                 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7348                                         __func__, clki->name,
7349                                         clki->max_freq, ret);
7350                                 goto out;
7351                         }
7352                         clki->curr_freq = clki->max_freq;
7353                 }
7354                 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7355                                 clki->name, clk_get_rate(clki->clk));
7356         }
7357 out:
7358         return ret;
7359 }
7360
7361 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7362 {
7363         int err = 0;
7364
7365         if (!hba->vops)
7366                 goto out;
7367
7368         err = ufshcd_vops_init(hba);
7369         if (err)
7370                 goto out;
7371
7372         err = ufshcd_vops_setup_regulators(hba, true);
7373         if (err)
7374                 goto out_exit;
7375
7376         goto out;
7377
7378 out_exit:
7379         ufshcd_vops_exit(hba);
7380 out:
7381         if (err)
7382                 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7383                         __func__, ufshcd_get_var_name(hba), err);
7384         return err;
7385 }
7386
7387 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7388 {
7389         if (!hba->vops)
7390                 return;
7391
7392         ufshcd_vops_setup_regulators(hba, false);
7393
7394         ufshcd_vops_exit(hba);
7395 }
7396
7397 static int ufshcd_hba_init(struct ufs_hba *hba)
7398 {
7399         int err;
7400
7401         /*
7402          * Handle host controller power separately from the UFS device power
7403          * rails as it will help controlling the UFS host controller power
7404          * collapse easily which is different than UFS device power collapse.
7405          * Also, enable the host controller power before we go ahead with rest
7406          * of the initialization here.
7407          */
7408         err = ufshcd_init_hba_vreg(hba);
7409         if (err)
7410                 goto out;
7411
7412         err = ufshcd_setup_hba_vreg(hba, true);
7413         if (err)
7414                 goto out;
7415
7416         err = ufshcd_init_clocks(hba);
7417         if (err)
7418                 goto out_disable_hba_vreg;
7419
7420         err = ufshcd_setup_clocks(hba, true);
7421         if (err)
7422                 goto out_disable_hba_vreg;
7423
7424         err = ufshcd_init_vreg(hba);
7425         if (err)
7426                 goto out_disable_clks;
7427
7428         err = ufshcd_setup_vreg(hba, true);
7429         if (err)
7430                 goto out_disable_clks;
7431
7432         err = ufshcd_variant_hba_init(hba);
7433         if (err)
7434                 goto out_disable_vreg;
7435
7436         hba->is_powered = true;
7437         goto out;
7438
7439 out_disable_vreg:
7440         ufshcd_setup_vreg(hba, false);
7441 out_disable_clks:
7442         ufshcd_setup_clocks(hba, false);
7443 out_disable_hba_vreg:
7444         ufshcd_setup_hba_vreg(hba, false);
7445 out:
7446         return err;
7447 }
7448
7449 static void ufshcd_hba_exit(struct ufs_hba *hba)
7450 {
7451         if (hba->is_powered) {
7452                 ufshcd_variant_hba_exit(hba);
7453                 ufshcd_setup_vreg(hba, false);
7454                 ufshcd_suspend_clkscaling(hba);
7455                 if (ufshcd_is_clkscaling_supported(hba))
7456                         if (hba->devfreq)
7457                                 ufshcd_suspend_clkscaling(hba);
7458                 ufshcd_setup_clocks(hba, false);
7459                 ufshcd_setup_hba_vreg(hba, false);
7460                 hba->is_powered = false;
7461         }
7462 }
7463
7464 static int
7465 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
7466 {
7467         unsigned char cmd[6] = {REQUEST_SENSE,
7468                                 0,
7469                                 0,
7470                                 0,
7471                                 UFS_SENSE_SIZE,
7472                                 0};
7473         char *buffer;
7474         int ret;
7475
7476         buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7477         if (!buffer) {
7478                 ret = -ENOMEM;
7479                 goto out;
7480         }
7481
7482         ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7483                         UFS_SENSE_SIZE, NULL, NULL,
7484                         msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7485         if (ret)
7486                 pr_err("%s: failed with err %d\n", __func__, ret);
7487
7488         kfree(buffer);
7489 out:
7490         return ret;
7491 }
7492
7493 /**
7494  * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7495  *                           power mode
7496  * @hba: per adapter instance
7497  * @pwr_mode: device power mode to set
7498  *
7499  * Returns 0 if requested power mode is set successfully
7500  * Returns non-zero if failed to set the requested power mode
7501  */
7502 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7503                                      enum ufs_dev_pwr_mode pwr_mode)
7504 {
7505         unsigned char cmd[6] = { START_STOP };
7506         struct scsi_sense_hdr sshdr;
7507         struct scsi_device *sdp;
7508         unsigned long flags;
7509         int ret;
7510
7511         spin_lock_irqsave(hba->host->host_lock, flags);
7512         sdp = hba->sdev_ufs_device;
7513         if (sdp) {
7514                 ret = scsi_device_get(sdp);
7515                 if (!ret && !scsi_device_online(sdp)) {
7516                         ret = -ENODEV;
7517                         scsi_device_put(sdp);
7518                 }
7519         } else {
7520                 ret = -ENODEV;
7521         }
7522         spin_unlock_irqrestore(hba->host->host_lock, flags);
7523
7524         if (ret)
7525                 return ret;
7526
7527         /*
7528          * If scsi commands fail, the scsi mid-layer schedules scsi error-
7529          * handling, which would wait for host to be resumed. Since we know
7530          * we are functional while we are here, skip host resume in error
7531          * handling context.
7532          */
7533         hba->host->eh_noresume = 1;
7534         if (hba->wlun_dev_clr_ua) {
7535                 ret = ufshcd_send_request_sense(hba, sdp);
7536                 if (ret)
7537                         goto out;
7538                 /* Unit attention condition is cleared now */
7539                 hba->wlun_dev_clr_ua = false;
7540         }
7541
7542         cmd[4] = pwr_mode << 4;
7543
7544         /*
7545          * Current function would be generally called from the power management
7546          * callbacks hence set the RQF_PM flag so that it doesn't resume the
7547          * already suspended childs.
7548          */
7549         ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7550                         START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
7551         if (ret) {
7552                 sdev_printk(KERN_WARNING, sdp,
7553                             "START_STOP failed for power mode: %d, result %x\n",
7554                             pwr_mode, ret);
7555                 if (driver_byte(ret) == DRIVER_SENSE)
7556                         scsi_print_sense_hdr(sdp, NULL, &sshdr);
7557         }
7558
7559         if (!ret)
7560                 hba->curr_dev_pwr_mode = pwr_mode;
7561 out:
7562         scsi_device_put(sdp);
7563         hba->host->eh_noresume = 0;
7564         return ret;
7565 }
7566
7567 static int ufshcd_link_state_transition(struct ufs_hba *hba,
7568                                         enum uic_link_state req_link_state,
7569                                         int check_for_bkops)
7570 {
7571         int ret = 0;
7572
7573         if (req_link_state == hba->uic_link_state)
7574                 return 0;
7575
7576         if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7577                 ret = ufshcd_uic_hibern8_enter(hba);
7578                 if (!ret)
7579                         ufshcd_set_link_hibern8(hba);
7580                 else
7581                         goto out;
7582         }
7583         /*
7584          * If autobkops is enabled, link can't be turned off because
7585          * turning off the link would also turn off the device.
7586          */
7587         else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7588                    (!check_for_bkops || (check_for_bkops &&
7589                     !hba->auto_bkops_enabled))) {
7590                 /*
7591                  * Let's make sure that link is in low power mode, we are doing
7592                  * this currently by putting the link in Hibern8. Otherway to
7593                  * put the link in low power mode is to send the DME end point
7594                  * to device and then send the DME reset command to local
7595                  * unipro. But putting the link in hibern8 is much faster.
7596                  */
7597                 ret = ufshcd_uic_hibern8_enter(hba);
7598                 if (ret)
7599                         goto out;
7600                 /*
7601                  * Change controller state to "reset state" which
7602                  * should also put the link in off/reset state
7603                  */
7604                 ufshcd_hba_stop(hba, true);
7605                 /*
7606                  * TODO: Check if we need any delay to make sure that
7607                  * controller is reset
7608                  */
7609                 ufshcd_set_link_off(hba);
7610         }
7611
7612 out:
7613         return ret;
7614 }
7615
7616 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7617 {
7618         /*
7619          * It seems some UFS devices may keep drawing more than sleep current
7620          * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7621          * To avoid this situation, add 2ms delay before putting these UFS
7622          * rails in LPM mode.
7623          */
7624         if (!ufshcd_is_link_active(hba) &&
7625             hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7626                 usleep_range(2000, 2100);
7627
7628         /*
7629          * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7630          * power.
7631          *
7632          * If UFS device and link is in OFF state, all power supplies (VCC,
7633          * VCCQ, VCCQ2) can be turned off if power on write protect is not
7634          * required. If UFS link is inactive (Hibern8 or OFF state) and device
7635          * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7636          *
7637          * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7638          * in low power state which would save some power.
7639          */
7640         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7641             !hba->dev_info.is_lu_power_on_wp) {
7642                 ufshcd_setup_vreg(hba, false);
7643         } else if (!ufshcd_is_ufs_dev_active(hba)) {
7644                 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7645                 if (!ufshcd_is_link_active(hba)) {
7646                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7647                         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7648                 }
7649         }
7650 }
7651
7652 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7653 {
7654         int ret = 0;
7655
7656         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7657             !hba->dev_info.is_lu_power_on_wp) {
7658                 ret = ufshcd_setup_vreg(hba, true);
7659         } else if (!ufshcd_is_ufs_dev_active(hba)) {
7660                 if (!ret && !ufshcd_is_link_active(hba)) {
7661                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7662                         if (ret)
7663                                 goto vcc_disable;
7664                         ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7665                         if (ret)
7666                                 goto vccq_lpm;
7667                 }
7668                 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
7669         }
7670         goto out;
7671
7672 vccq_lpm:
7673         ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7674 vcc_disable:
7675         ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7676 out:
7677         return ret;
7678 }
7679
7680 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7681 {
7682         if (ufshcd_is_link_off(hba))
7683                 ufshcd_setup_hba_vreg(hba, false);
7684 }
7685
7686 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7687 {
7688         if (ufshcd_is_link_off(hba))
7689                 ufshcd_setup_hba_vreg(hba, true);
7690 }
7691
7692 /**
7693  * ufshcd_suspend - helper function for suspend operations
7694  * @hba: per adapter instance
7695  * @pm_op: desired low power operation type
7696  *
7697  * This function will try to put the UFS device and link into low power
7698  * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7699  * (System PM level).
7700  *
7701  * If this function is called during shutdown, it will make sure that
7702  * both UFS device and UFS link is powered off.
7703  *
7704  * NOTE: UFS device & link must be active before we enter in this function.
7705  *
7706  * Returns 0 for success and non-zero for failure
7707  */
7708 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7709 {
7710         int ret = 0;
7711         enum ufs_pm_level pm_lvl;
7712         enum ufs_dev_pwr_mode req_dev_pwr_mode;
7713         enum uic_link_state req_link_state;
7714
7715         hba->pm_op_in_progress = 1;
7716         if (!ufshcd_is_shutdown_pm(pm_op)) {
7717                 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7718                          hba->rpm_lvl : hba->spm_lvl;
7719                 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7720                 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7721         } else {
7722                 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7723                 req_link_state = UIC_LINK_OFF_STATE;
7724         }
7725
7726         /*
7727          * If we can't transition into any of the low power modes
7728          * just gate the clocks.
7729          */
7730         ufshcd_hold(hba, false);
7731         hba->clk_gating.is_suspended = true;
7732
7733         if (hba->clk_scaling.is_allowed) {
7734                 cancel_work_sync(&hba->clk_scaling.suspend_work);
7735                 cancel_work_sync(&hba->clk_scaling.resume_work);
7736                 ufshcd_suspend_clkscaling(hba);
7737         }
7738
7739         if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7740                         req_link_state == UIC_LINK_ACTIVE_STATE) {
7741                 goto disable_clks;
7742         }
7743
7744         if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7745             (req_link_state == hba->uic_link_state))
7746                 goto enable_gating;
7747
7748         /* UFS device & link must be active before we enter in this function */
7749         if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7750                 ret = -EINVAL;
7751                 goto enable_gating;
7752         }
7753
7754         if (ufshcd_is_runtime_pm(pm_op)) {
7755                 if (ufshcd_can_autobkops_during_suspend(hba)) {
7756                         /*
7757                          * The device is idle with no requests in the queue,
7758                          * allow background operations if bkops status shows
7759                          * that performance might be impacted.
7760                          */
7761                         ret = ufshcd_urgent_bkops(hba);
7762                         if (ret)
7763                                 goto enable_gating;
7764                 } else {
7765                         /* make sure that auto bkops is disabled */
7766                         ufshcd_disable_auto_bkops(hba);
7767                 }
7768         }
7769
7770         if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7771              ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7772                !ufshcd_is_runtime_pm(pm_op))) {
7773                 /* ensure that bkops is disabled */
7774                 ufshcd_disable_auto_bkops(hba);
7775                 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7776                 if (ret)
7777                         goto enable_gating;
7778         }
7779
7780         ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7781         if (ret)
7782                 goto set_dev_active;
7783
7784         ufshcd_vreg_set_lpm(hba);
7785
7786 disable_clks:
7787         /*
7788          * Call vendor specific suspend callback. As these callbacks may access
7789          * vendor specific host controller register space call them before the
7790          * host clocks are ON.
7791          */
7792         ret = ufshcd_vops_suspend(hba, pm_op);
7793         if (ret)
7794                 goto set_link_active;
7795
7796         if (!ufshcd_is_link_active(hba))
7797                 ufshcd_setup_clocks(hba, false);
7798         else
7799                 /* If link is active, device ref_clk can't be switched off */
7800                 __ufshcd_setup_clocks(hba, false, true);
7801
7802         hba->clk_gating.state = CLKS_OFF;
7803         trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
7804         /*
7805          * Disable the host irq as host controller as there won't be any
7806          * host controller transaction expected till resume.
7807          */
7808         ufshcd_disable_irq(hba);
7809         /* Put the host controller in low power mode if possible */
7810         ufshcd_hba_vreg_set_lpm(hba);
7811         goto out;
7812
7813 set_link_active:
7814         if (hba->clk_scaling.is_allowed)
7815                 ufshcd_resume_clkscaling(hba);
7816         ufshcd_vreg_set_hpm(hba);
7817         if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7818                 ufshcd_set_link_active(hba);
7819         else if (ufshcd_is_link_off(hba))
7820                 ufshcd_host_reset_and_restore(hba);
7821 set_dev_active:
7822         if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7823                 ufshcd_disable_auto_bkops(hba);
7824 enable_gating:
7825         if (hba->clk_scaling.is_allowed)
7826                 ufshcd_resume_clkscaling(hba);
7827         hba->clk_gating.is_suspended = false;
7828         ufshcd_release(hba);
7829 out:
7830         hba->pm_op_in_progress = 0;
7831         return ret;
7832 }
7833
7834 /**
7835  * ufshcd_resume - helper function for resume operations
7836  * @hba: per adapter instance
7837  * @pm_op: runtime PM or system PM
7838  *
7839  * This function basically brings the UFS device, UniPro link and controller
7840  * to active state.
7841  *
7842  * Returns 0 for success and non-zero for failure
7843  */
7844 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7845 {
7846         int ret;
7847         enum uic_link_state old_link_state;
7848
7849         hba->pm_op_in_progress = 1;
7850         old_link_state = hba->uic_link_state;
7851
7852         ufshcd_hba_vreg_set_hpm(hba);
7853         /* Make sure clocks are enabled before accessing controller */
7854         ret = ufshcd_setup_clocks(hba, true);
7855         if (ret)
7856                 goto out;
7857
7858         /* enable the host irq as host controller would be active soon */
7859         ret = ufshcd_enable_irq(hba);
7860         if (ret)
7861                 goto disable_irq_and_vops_clks;
7862
7863         ret = ufshcd_vreg_set_hpm(hba);
7864         if (ret)
7865                 goto disable_irq_and_vops_clks;
7866
7867         /*
7868          * Call vendor specific resume callback. As these callbacks may access
7869          * vendor specific host controller register space call them when the
7870          * host clocks are ON.
7871          */
7872         ret = ufshcd_vops_resume(hba, pm_op);
7873         if (ret)
7874                 goto disable_vreg;
7875
7876         if (ufshcd_is_link_hibern8(hba)) {
7877                 ret = ufshcd_uic_hibern8_exit(hba);
7878                 if (!ret)
7879                         ufshcd_set_link_active(hba);
7880                 else
7881                         goto vendor_suspend;
7882         } else if (ufshcd_is_link_off(hba)) {
7883                 ret = ufshcd_host_reset_and_restore(hba);
7884                 /*
7885                  * ufshcd_host_reset_and_restore() should have already
7886                  * set the link state as active
7887                  */
7888                 if (ret || !ufshcd_is_link_active(hba))
7889                         goto vendor_suspend;
7890         }
7891
7892         if (!ufshcd_is_ufs_dev_active(hba)) {
7893                 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7894                 if (ret)
7895                         goto set_old_link_state;
7896         }
7897
7898         if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7899                 ufshcd_enable_auto_bkops(hba);
7900         else
7901                 /*
7902                  * If BKOPs operations are urgently needed at this moment then
7903                  * keep auto-bkops enabled or else disable it.
7904                  */
7905                 ufshcd_urgent_bkops(hba);
7906
7907         hba->clk_gating.is_suspended = false;
7908
7909         if (hba->clk_scaling.is_allowed)
7910                 ufshcd_resume_clkscaling(hba);
7911
7912         /* Schedule clock gating in case of no access to UFS device yet */
7913         ufshcd_release(hba);
7914
7915         /* Enable Auto-Hibernate if configured */
7916         ufshcd_auto_hibern8_enable(hba);
7917
7918         goto out;
7919
7920 set_old_link_state:
7921         ufshcd_link_state_transition(hba, old_link_state, 0);
7922 vendor_suspend:
7923         ufshcd_vops_suspend(hba, pm_op);
7924 disable_vreg:
7925         ufshcd_vreg_set_lpm(hba);
7926 disable_irq_and_vops_clks:
7927         ufshcd_disable_irq(hba);
7928         if (hba->clk_scaling.is_allowed)
7929                 ufshcd_suspend_clkscaling(hba);
7930         ufshcd_setup_clocks(hba, false);
7931 out:
7932         hba->pm_op_in_progress = 0;
7933         return ret;
7934 }
7935
7936 /**
7937  * ufshcd_system_suspend - system suspend routine
7938  * @hba: per adapter instance
7939  *
7940  * Check the description of ufshcd_suspend() function for more details.
7941  *
7942  * Returns 0 for success and non-zero for failure
7943  */
7944 int ufshcd_system_suspend(struct ufs_hba *hba)
7945 {
7946         int ret = 0;
7947         ktime_t start = ktime_get();
7948
7949         if (!hba || !hba->is_powered)
7950                 return 0;
7951
7952         if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
7953              hba->curr_dev_pwr_mode) &&
7954             (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
7955              hba->uic_link_state))
7956                 goto out;
7957
7958         if (pm_runtime_suspended(hba->dev)) {
7959                 /*
7960                  * UFS device and/or UFS link low power states during runtime
7961                  * suspend seems to be different than what is expected during
7962                  * system suspend. Hence runtime resume the devic & link and
7963                  * let the system suspend low power states to take effect.
7964                  * TODO: If resume takes longer time, we might have optimize
7965                  * it in future by not resuming everything if possible.
7966                  */
7967                 ret = ufshcd_runtime_resume(hba);
7968                 if (ret)
7969                         goto out;
7970         }
7971
7972         ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
7973 out:
7974         trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
7975                 ktime_to_us(ktime_sub(ktime_get(), start)),
7976                 hba->curr_dev_pwr_mode, hba->uic_link_state);
7977         if (!ret)
7978                 hba->is_sys_suspended = true;
7979         return ret;
7980 }
7981 EXPORT_SYMBOL(ufshcd_system_suspend);
7982
7983 /**
7984  * ufshcd_system_resume - system resume routine
7985  * @hba: per adapter instance
7986  *
7987  * Returns 0 for success and non-zero for failure
7988  */
7989
7990 int ufshcd_system_resume(struct ufs_hba *hba)
7991 {
7992         int ret = 0;
7993         ktime_t start = ktime_get();
7994
7995         if (!hba)
7996                 return -EINVAL;
7997
7998         if (!hba->is_powered || pm_runtime_suspended(hba->dev))
7999                 /*
8000                  * Let the runtime resume take care of resuming
8001                  * if runtime suspended.
8002                  */
8003                 goto out;
8004         else
8005                 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8006 out:
8007         trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8008                 ktime_to_us(ktime_sub(ktime_get(), start)),
8009                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8010         if (!ret)
8011                 hba->is_sys_suspended = false;
8012         return ret;
8013 }
8014 EXPORT_SYMBOL(ufshcd_system_resume);
8015
8016 /**
8017  * ufshcd_runtime_suspend - runtime suspend routine
8018  * @hba: per adapter instance
8019  *
8020  * Check the description of ufshcd_suspend() function for more details.
8021  *
8022  * Returns 0 for success and non-zero for failure
8023  */
8024 int ufshcd_runtime_suspend(struct ufs_hba *hba)
8025 {
8026         int ret = 0;
8027         ktime_t start = ktime_get();
8028
8029         if (!hba)
8030                 return -EINVAL;
8031
8032         if (!hba->is_powered)
8033                 goto out;
8034         else
8035                 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8036 out:
8037         trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8038                 ktime_to_us(ktime_sub(ktime_get(), start)),
8039                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8040         return ret;
8041 }
8042 EXPORT_SYMBOL(ufshcd_runtime_suspend);
8043
8044 /**
8045  * ufshcd_runtime_resume - runtime resume routine
8046  * @hba: per adapter instance
8047  *
8048  * This function basically brings the UFS device, UniPro link and controller
8049  * to active state. Following operations are done in this function:
8050  *
8051  * 1. Turn on all the controller related clocks
8052  * 2. Bring the UniPro link out of Hibernate state
8053  * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8054  *    to active state.
8055  * 4. If auto-bkops is enabled on the device, disable it.
8056  *
8057  * So following would be the possible power state after this function return
8058  * successfully:
8059  *      S1: UFS device in Active state with VCC rail ON
8060  *          UniPro link in Active state
8061  *          All the UFS/UniPro controller clocks are ON
8062  *
8063  * Returns 0 for success and non-zero for failure
8064  */
8065 int ufshcd_runtime_resume(struct ufs_hba *hba)
8066 {
8067         int ret = 0;
8068         ktime_t start = ktime_get();
8069
8070         if (!hba)
8071                 return -EINVAL;
8072
8073         if (!hba->is_powered)
8074                 goto out;
8075         else
8076                 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8077 out:
8078         trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8079                 ktime_to_us(ktime_sub(ktime_get(), start)),
8080                 hba->curr_dev_pwr_mode, hba->uic_link_state);
8081         return ret;
8082 }
8083 EXPORT_SYMBOL(ufshcd_runtime_resume);
8084
8085 int ufshcd_runtime_idle(struct ufs_hba *hba)
8086 {
8087         return 0;
8088 }
8089 EXPORT_SYMBOL(ufshcd_runtime_idle);
8090
8091 /**
8092  * ufshcd_shutdown - shutdown routine
8093  * @hba: per adapter instance
8094  *
8095  * This function would power off both UFS device and UFS link.
8096  *
8097  * Returns 0 always to allow force shutdown even in case of errors.
8098  */
8099 int ufshcd_shutdown(struct ufs_hba *hba)
8100 {
8101         int ret = 0;
8102
8103         if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8104                 goto out;
8105
8106         if (pm_runtime_suspended(hba->dev)) {
8107                 ret = ufshcd_runtime_resume(hba);
8108                 if (ret)
8109                         goto out;
8110         }
8111
8112         ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8113 out:
8114         if (ret)
8115                 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8116         /* allow force shutdown even in case of errors */
8117         return 0;
8118 }
8119 EXPORT_SYMBOL(ufshcd_shutdown);
8120
8121 /**
8122  * ufshcd_remove - de-allocate SCSI host and host memory space
8123  *              data structure memory
8124  * @hba: per adapter instance
8125  */
8126 void ufshcd_remove(struct ufs_hba *hba)
8127 {
8128         ufs_bsg_remove(hba);
8129         ufs_sysfs_remove_nodes(hba->dev);
8130         scsi_remove_host(hba->host);
8131         /* disable interrupts */
8132         ufshcd_disable_intr(hba, hba->intr_mask);
8133         ufshcd_hba_stop(hba, true);
8134
8135         ufshcd_exit_clk_scaling(hba);
8136         ufshcd_exit_clk_gating(hba);
8137         if (ufshcd_is_clkscaling_supported(hba))
8138                 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
8139         ufshcd_hba_exit(hba);
8140 }
8141 EXPORT_SYMBOL_GPL(ufshcd_remove);
8142
8143 /**
8144  * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8145  * @hba: pointer to Host Bus Adapter (HBA)
8146  */
8147 void ufshcd_dealloc_host(struct ufs_hba *hba)
8148 {
8149         scsi_host_put(hba->host);
8150 }
8151 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8152
8153 /**
8154  * ufshcd_set_dma_mask - Set dma mask based on the controller
8155  *                       addressing capability
8156  * @hba: per adapter instance
8157  *
8158  * Returns 0 for success, non-zero for failure
8159  */
8160 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8161 {
8162         if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8163                 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8164                         return 0;
8165         }
8166         return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8167 }
8168
8169 /**
8170  * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
8171  * @dev: pointer to device handle
8172  * @hba_handle: driver private handle
8173  * Returns 0 on success, non-zero value on failure
8174  */
8175 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
8176 {
8177         struct Scsi_Host *host;
8178         struct ufs_hba *hba;
8179         int err = 0;
8180
8181         if (!dev) {
8182                 dev_err(dev,
8183                 "Invalid memory reference for dev is NULL\n");
8184                 err = -ENODEV;
8185                 goto out_error;
8186         }
8187
8188         host = scsi_host_alloc(&ufshcd_driver_template,
8189                                 sizeof(struct ufs_hba));
8190         if (!host) {
8191                 dev_err(dev, "scsi_host_alloc failed\n");
8192                 err = -ENOMEM;
8193                 goto out_error;
8194         }
8195         hba = shost_priv(host);
8196         hba->host = host;
8197         hba->dev = dev;
8198         *hba_handle = hba;
8199         hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
8200
8201         INIT_LIST_HEAD(&hba->clk_list_head);
8202
8203 out_error:
8204         return err;
8205 }
8206 EXPORT_SYMBOL(ufshcd_alloc_host);
8207
8208 /**
8209  * ufshcd_init - Driver initialization routine
8210  * @hba: per-adapter instance
8211  * @mmio_base: base register address
8212  * @irq: Interrupt line of device
8213  * Returns 0 on success, non-zero value on failure
8214  */
8215 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8216 {
8217         int err;
8218         struct Scsi_Host *host = hba->host;
8219         struct device *dev = hba->dev;
8220
8221         if (!mmio_base) {
8222                 dev_err(hba->dev,
8223                 "Invalid memory reference for mmio_base is NULL\n");
8224                 err = -ENODEV;
8225                 goto out_error;
8226         }
8227
8228         hba->mmio_base = mmio_base;
8229         hba->irq = irq;
8230
8231         /* Set descriptor lengths to specification defaults */
8232         ufshcd_def_desc_sizes(hba);
8233
8234         err = ufshcd_hba_init(hba);
8235         if (err)
8236                 goto out_error;
8237
8238         /* Read capabilities registers */
8239         ufshcd_hba_capabilities(hba);
8240
8241         /* Get UFS version supported by the controller */
8242         hba->ufs_version = ufshcd_get_ufs_version(hba);
8243
8244         if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8245             (hba->ufs_version != UFSHCI_VERSION_11) &&
8246             (hba->ufs_version != UFSHCI_VERSION_20) &&
8247             (hba->ufs_version != UFSHCI_VERSION_21))
8248                 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8249                         hba->ufs_version);
8250
8251         /* Get Interrupt bit mask per version */
8252         hba->intr_mask = ufshcd_get_intr_mask(hba);
8253
8254         err = ufshcd_set_dma_mask(hba);
8255         if (err) {
8256                 dev_err(hba->dev, "set dma mask failed\n");
8257                 goto out_disable;
8258         }
8259
8260         /* Allocate memory for host memory space */
8261         err = ufshcd_memory_alloc(hba);
8262         if (err) {
8263                 dev_err(hba->dev, "Memory allocation failed\n");
8264                 goto out_disable;
8265         }
8266
8267         /* Configure LRB */
8268         ufshcd_host_memory_configure(hba);
8269
8270         host->can_queue = hba->nutrs;
8271         host->cmd_per_lun = hba->nutrs;
8272         host->max_id = UFSHCD_MAX_ID;
8273         host->max_lun = UFS_MAX_LUNS;
8274         host->max_channel = UFSHCD_MAX_CHANNEL;
8275         host->unique_id = host->host_no;
8276         host->max_cmd_len = UFS_CDB_SIZE;
8277
8278         hba->max_pwr_info.is_valid = false;
8279
8280         /* Initailize wait queue for task management */
8281         init_waitqueue_head(&hba->tm_wq);
8282         init_waitqueue_head(&hba->tm_tag_wq);
8283
8284         /* Initialize work queues */
8285         INIT_WORK(&hba->eh_work, ufshcd_err_handler);
8286         INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
8287
8288         /* Initialize UIC command mutex */
8289         mutex_init(&hba->uic_cmd_mutex);
8290
8291         /* Initialize mutex for device management commands */
8292         mutex_init(&hba->dev_cmd.lock);
8293
8294         init_rwsem(&hba->clk_scaling_lock);
8295
8296         /* Initialize device management tag acquire wait queue */
8297         init_waitqueue_head(&hba->dev_cmd.tag_wq);
8298
8299         ufshcd_init_clk_gating(hba);
8300
8301         ufshcd_init_clk_scaling(hba);
8302
8303         /*
8304          * In order to avoid any spurious interrupt immediately after
8305          * registering UFS controller interrupt handler, clear any pending UFS
8306          * interrupt status and disable all the UFS interrupts.
8307          */
8308         ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8309                       REG_INTERRUPT_STATUS);
8310         ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8311         /*
8312          * Make sure that UFS interrupts are disabled and any pending interrupt
8313          * status is cleared before registering UFS interrupt handler.
8314          */
8315         mb();
8316
8317         /* IRQ registration */
8318         err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
8319         if (err) {
8320                 dev_err(hba->dev, "request irq failed\n");
8321                 goto exit_gating;
8322         } else {
8323                 hba->is_irq_enabled = true;
8324         }
8325
8326         err = scsi_add_host(host, hba->dev);
8327         if (err) {
8328                 dev_err(hba->dev, "scsi_add_host failed\n");
8329                 goto exit_gating;
8330         }
8331
8332         /* Host controller enable */
8333         err = ufshcd_hba_enable(hba);
8334         if (err) {
8335                 dev_err(hba->dev, "Host controller enable failed\n");
8336                 ufshcd_print_host_regs(hba);
8337                 ufshcd_print_host_state(hba);
8338                 goto out_remove_scsi_host;
8339         }
8340
8341         /*
8342          * Set the default power management level for runtime and system PM.
8343          * Default power saving mode is to keep UFS link in Hibern8 state
8344          * and UFS device in sleep state.
8345          */
8346         hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8347                                                 UFS_SLEEP_PWR_MODE,
8348                                                 UIC_LINK_HIBERN8_STATE);
8349         hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8350                                                 UFS_SLEEP_PWR_MODE,
8351                                                 UIC_LINK_HIBERN8_STATE);
8352
8353         /* Set the default auto-hiberate idle timer value to 150 ms */
8354         if (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) {
8355                 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8356                             FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8357         }
8358
8359         /* Hold auto suspend until async scan completes */
8360         pm_runtime_get_sync(dev);
8361         atomic_set(&hba->scsi_block_reqs_cnt, 0);
8362         /*
8363          * We are assuming that device wasn't put in sleep/power-down
8364          * state exclusively during the boot stage before kernel.
8365          * This assumption helps avoid doing link startup twice during
8366          * ufshcd_probe_hba().
8367          */
8368         ufshcd_set_ufs_dev_active(hba);
8369
8370         async_schedule(ufshcd_async_scan, hba);
8371         ufs_sysfs_add_nodes(hba->dev);
8372
8373         return 0;
8374
8375 out_remove_scsi_host:
8376         scsi_remove_host(hba->host);
8377 exit_gating:
8378         ufshcd_exit_clk_scaling(hba);
8379         ufshcd_exit_clk_gating(hba);
8380 out_disable:
8381         hba->is_irq_enabled = false;
8382         ufshcd_hba_exit(hba);
8383 out_error:
8384         return err;
8385 }
8386 EXPORT_SYMBOL_GPL(ufshcd_init);
8387
8388 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8389 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8390 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8391 MODULE_LICENSE("GPL");
8392 MODULE_VERSION(UFSHCD_DRIVER_VERSION);