drivers/staging/iio/adc/ad7280a.c

   1 /*
   2  * AD7280A Lithium Ion Battery Monitoring System
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/crc8.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/sysfs.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/err.h>
  16 #include <linux/delay.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/module.h>
  19
  20 #include <linux/iio/iio.h>
  21 #include <linux/iio/sysfs.h>
  22 #include <linux/iio/events.h>
  23
  24 #include "ad7280a.h"
  25
  26 /* Registers */
  27 #define AD7280A_CELL_VOLTAGE_1          0x0  /* D11 to D0, Read only */
  28 #define AD7280A_CELL_VOLTAGE_2          0x1  /* D11 to D0, Read only */
  29 #define AD7280A_CELL_VOLTAGE_3          0x2  /* D11 to D0, Read only */
  30 #define AD7280A_CELL_VOLTAGE_4          0x3  /* D11 to D0, Read only */
  31 #define AD7280A_CELL_VOLTAGE_5          0x4  /* D11 to D0, Read only */
  32 #define AD7280A_CELL_VOLTAGE_6          0x5  /* D11 to D0, Read only */
  33 #define AD7280A_AUX_ADC_1               0x6  /* D11 to D0, Read only */
  34 #define AD7280A_AUX_ADC_2               0x7  /* D11 to D0, Read only */
  35 #define AD7280A_AUX_ADC_3               0x8  /* D11 to D0, Read only */
  36 #define AD7280A_AUX_ADC_4               0x9  /* D11 to D0, Read only */
  37 #define AD7280A_AUX_ADC_5               0xA  /* D11 to D0, Read only */
  38 #define AD7280A_AUX_ADC_6               0xB  /* D11 to D0, Read only */
  39 #define AD7280A_SELF_TEST               0xC  /* D11 to D0, Read only */
  40 #define AD7280A_CONTROL_HB              0xD  /* D15 to D8, Read/write */
  41 #define AD7280A_CONTROL_LB              0xE  /* D7 to D0, Read/write */
  42 #define AD7280A_CELL_OVERVOLTAGE        0xF  /* D7 to D0, Read/write */
  43 #define AD7280A_CELL_UNDERVOLTAGE       0x10 /* D7 to D0, Read/write */
  44 #define AD7280A_AUX_ADC_OVERVOLTAGE     0x11 /* D7 to D0, Read/write */
  45 #define AD7280A_AUX_ADC_UNDERVOLTAGE    0x12 /* D7 to D0, Read/write */
  46 #define AD7280A_ALERT                   0x13 /* D7 to D0, Read/write */
  47 #define AD7280A_CELL_BALANCE            0x14 /* D7 to D0, Read/write */
  48 #define AD7280A_CB1_TIMER               0x15 /* D7 to D0, Read/write */
  49 #define AD7280A_CB2_TIMER               0x16 /* D7 to D0, Read/write */
  50 #define AD7280A_CB3_TIMER               0x17 /* D7 to D0, Read/write */
  51 #define AD7280A_CB4_TIMER               0x18 /* D7 to D0, Read/write */
  52 #define AD7280A_CB5_TIMER               0x19 /* D7 to D0, Read/write */
  53 #define AD7280A_CB6_TIMER               0x1A /* D7 to D0, Read/write */
  54 #define AD7280A_PD_TIMER                0x1B /* D7 to D0, Read/write */
  55 #define AD7280A_READ                    0x1C /* D7 to D0, Read/write */
  56 #define AD7280A_CNVST_CONTROL           0x1D /* D7 to D0, Read/write */
  57
  58 /* Bits and Masks */
  59 #define AD7280A_CTRL_HB_CONV_INPUT_ALL                  0
  60 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4       BIT(6)
  61 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL                BIT(7)
  62 #define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST            (BIT(7) | BIT(6))
  63 #define AD7280A_CTRL_HB_CONV_RES_READ_ALL               0
  64 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4    BIT(4)
  65 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL             BIT(5)
  66 #define AD7280A_CTRL_HB_CONV_RES_READ_NO                (BIT(5) | BIT(4))
  67 #define AD7280A_CTRL_HB_CONV_START_CNVST                0
  68 #define AD7280A_CTRL_HB_CONV_START_CS                   BIT(3)
  69 #define AD7280A_CTRL_HB_CONV_AVG_DIS                    0
  70 #define AD7280A_CTRL_HB_CONV_AVG_2                      BIT(1)
  71 #define AD7280A_CTRL_HB_CONV_AVG_4                      BIT(2)
  72 #define AD7280A_CTRL_HB_CONV_AVG_8                      (BIT(2) | BIT(1))
  73 #define AD7280A_CTRL_HB_CONV_AVG(x)                     ((x) << 1)
  74 #define AD7280A_CTRL_HB_PWRDN_SW                        BIT(0)
  75
  76 #define AD7280A_CTRL_LB_SWRST                           BIT(7)
  77 #define AD7280A_CTRL_LB_ACQ_TIME_400ns                  0
  78 #define AD7280A_CTRL_LB_ACQ_TIME_800ns                  BIT(5)
  79 #define AD7280A_CTRL_LB_ACQ_TIME_1200ns                 BIT(6)
  80 #define AD7280A_CTRL_LB_ACQ_TIME_1600ns                 (BIT(6) | BIT(5))
  81 #define AD7280A_CTRL_LB_ACQ_TIME(x)                     ((x) << 5)
  82 #define AD7280A_CTRL_LB_MUST_SET                        BIT(4)
  83 #define AD7280A_CTRL_LB_THERMISTOR_EN                   BIT(3)
  84 #define AD7280A_CTRL_LB_LOCK_DEV_ADDR                   BIT(2)
  85 #define AD7280A_CTRL_LB_INC_DEV_ADDR                    BIT(1)
  86 #define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN               BIT(0)
  87
  88 #define AD7280A_ALERT_GEN_STATIC_HIGH                   BIT(6)
  89 #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN              (BIT(7) | BIT(6))
  90
  91 #define AD7280A_ALL_CELLS                               (0xAD << 16)
  92
  93 #define AD7280A_MAX_SPI_CLK_HZ          700000 /* < 1MHz */
  94 #define AD7280A_MAX_CHAIN               8
  95 #define AD7280A_CELLS_PER_DEV           6
  96 #define AD7280A_BITS                    12
  97 #define AD7280A_NUM_CH                  (AD7280A_AUX_ADC_6 - \
  98                                         AD7280A_CELL_VOLTAGE_1 + 1)
  99
 100 #define AD7280A_DEVADDR_MASTER          0
 101 #define AD7280A_DEVADDR_ALL             0x1F
 102 /* 5-bit device address is sent LSB first */
 103 static unsigned int ad7280a_devaddr(unsigned int addr)
 104 {
 105         return ((addr & 0x1) << 4) |
 106                ((addr & 0x2) << 3) |
 107                (addr & 0x4) |
 108                ((addr & 0x8) >> 3) |
 109                ((addr & 0x10) >> 4);
 110 }
 111
 112 /* During a read a valid write is mandatory.
 113  * So writing to the highest available address (Address 0x1F)
 114  * and setting the address all parts bit to 0 is recommended
 115  * So the TXVAL is AD7280A_DEVADDR_ALL + CRC
 116  */
 117 #define AD7280A_READ_TXVAL      0xF800030A
 118
 119 /*
 120  * AD7280 CRC
 121  *
 122  * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F
 123  */
 124 #define POLYNOM         0x2F
 125
 126 struct ad7280_state {
 127         struct spi_device               *spi;
 128         struct iio_chan_spec            *channels;
 129         struct iio_dev_attr             *iio_attr;
 130         int                             slave_num;
 131         int                             scan_cnt;
 132         int                             readback_delay_us;
 133         unsigned char                   crc_tab[CRC8_TABLE_SIZE];
 134         unsigned char                   ctrl_hb;
 135         unsigned char                   ctrl_lb;
 136         unsigned char                   cell_threshhigh;
 137         unsigned char                   cell_threshlow;
 138         unsigned char                   aux_threshhigh;
 139         unsigned char                   aux_threshlow;
 140         unsigned char                   cb_mask[AD7280A_MAX_CHAIN];
 141         struct mutex                    lock; /* protect sensor state */
 142
 143         __be32                          buf[2] ____cacheline_aligned;
 144 };
 145
 146 static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val)
 147 {
 148         unsigned char crc;
 149
 150         crc = crc_tab[val >> 16 & 0xFF];
 151         crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
 152
 153         return  crc ^ (val & 0xFF);
 154 }
 155
 156 static int ad7280_check_crc(struct ad7280_state *st, unsigned int val)
 157 {
 158         unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
 159
 160         if (crc != ((val >> 2) & 0xFF))
 161                 return -EIO;
 162
 163         return 0;
 164 }
 165
 166 /* After initiating a conversion sequence we need to wait until the
 167  * conversion is done. The delay is typically in the range of 15..30 us
 168  * however depending an the number of devices in the daisy chain and the
 169  * number of averages taken, conversion delays and acquisition time options
 170  * it may take up to 250us, in this case we better sleep instead of busy
 171  * wait.
 172  */
 173
 174 static void ad7280_delay(struct ad7280_state *st)
 175 {
 176         if (st->readback_delay_us < 50)
 177                 udelay(st->readback_delay_us);
 178         else
 179                 usleep_range(250, 500);
 180 }
 181
 182 static int __ad7280_read32(struct ad7280_state *st, unsigned int *val)
 183 {
 184         int ret;
 185         struct spi_transfer t = {
 186                 .tx_buf = &st->buf[0],
 187                 .rx_buf = &st->buf[1],
 188                 .len = 4,
 189         };
 190
 191         st->buf[0] = cpu_to_be32(AD7280A_READ_TXVAL);
 192
 193         ret = spi_sync_transfer(st->spi, &t, 1);
 194         if (ret)
 195                 return ret;
 196
 197         *val = be32_to_cpu(st->buf[1]);
 198
 199         return 0;
 200 }
 201
 202 static int ad7280_write(struct ad7280_state *st, unsigned int devaddr,
 203                         unsigned int addr, bool all, unsigned int val)
 204 {
 205         unsigned int reg = devaddr << 27 | addr << 21 |
 206                         (val & 0xFF) << 13 | all << 12;
 207
 208         reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2;
 209         st->buf[0] = cpu_to_be32(reg);
 210
 211         return spi_write(st->spi, &st->buf[0], 4);
 212 }
 213
 214 static int ad7280_read(struct ad7280_state *st, unsigned int devaddr,
 215                        unsigned int addr)
 216 {
 217         int ret;
 218         unsigned int tmp;
 219
 220         /* turns off the read operation on all parts */
 221         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 222                            AD7280A_CTRL_HB_CONV_INPUT_ALL |
 223                            AD7280A_CTRL_HB_CONV_RES_READ_NO |
 224                            st->ctrl_hb);
 225         if (ret)
 226                 return ret;
 227
 228         /* turns on the read operation on the addressed part */
 229         ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
 230                            AD7280A_CTRL_HB_CONV_INPUT_ALL |
 231                            AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 232                            st->ctrl_hb);
 233         if (ret)
 234                 return ret;
 235
 236         /* Set register address on the part to be read from */
 237         ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
 238         if (ret)
 239                 return ret;
 240
 241         ret = __ad7280_read32(st, &tmp);
 242         if (ret)
 243                 return ret;
 244
 245         if (ad7280_check_crc(st, tmp))
 246                 return -EIO;
 247
 248         if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr))
 249                 return -EFAULT;
 250
 251         return (tmp >> 13) & 0xFF;
 252 }
 253
 254 static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr,
 255                                unsigned int addr)
 256 {
 257         int ret;
 258         unsigned int tmp;
 259
 260         ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
 261         if (ret)
 262                 return ret;
 263
 264         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 265                            AD7280A_CTRL_HB_CONV_INPUT_ALL |
 266                            AD7280A_CTRL_HB_CONV_RES_READ_NO |
 267                            st->ctrl_hb);
 268         if (ret)
 269                 return ret;
 270
 271         ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
 272                            AD7280A_CTRL_HB_CONV_INPUT_ALL |
 273                            AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 274                            AD7280A_CTRL_HB_CONV_START_CS |
 275                            st->ctrl_hb);
 276         if (ret)
 277                 return ret;
 278
 279         ad7280_delay(st);
 280
 281         ret = __ad7280_read32(st, &tmp);
 282         if (ret)
 283                 return ret;
 284
 285         if (ad7280_check_crc(st, tmp))
 286                 return -EIO;
 287
 288         if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr))
 289                 return -EFAULT;
 290
 291         return (tmp >> 11) & 0xFFF;
 292 }
 293
 294 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt,
 295                                     unsigned int *array)
 296 {
 297         int i, ret;
 298         unsigned int tmp, sum = 0;
 299
 300         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
 301                            AD7280A_CELL_VOLTAGE_1 << 2);
 302         if (ret)
 303                 return ret;
 304
 305         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 306                            AD7280A_CTRL_HB_CONV_INPUT_ALL |
 307                            AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 308                            AD7280A_CTRL_HB_CONV_START_CS |
 309                            st->ctrl_hb);
 310         if (ret)
 311                 return ret;
 312
 313         ad7280_delay(st);
 314
 315         for (i = 0; i < cnt; i++) {
 316                 ret = __ad7280_read32(st, &tmp);
 317                 if (ret)
 318                         return ret;
 319
 320                 if (ad7280_check_crc(st, tmp))
 321                         return -EIO;
 322
 323                 if (array)
 324                         array[i] = tmp;
 325                 /* only sum cell voltages */
 326                 if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6)
 327                         sum += ((tmp >> 11) & 0xFFF);
 328         }
 329
 330         return sum;
 331 }
 332
 333 static void ad7280_sw_power_down(void *data)
 334 {
 335         struct ad7280_state *st = data;
 336
 337         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 338                      AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
 339 }
 340
 341 static int ad7280_chain_setup(struct ad7280_state *st)
 342 {
 343         unsigned int val, n;
 344         int ret;
 345
 346         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
 347                            AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
 348                            AD7280A_CTRL_LB_LOCK_DEV_ADDR |
 349                            AD7280A_CTRL_LB_MUST_SET |
 350                            AD7280A_CTRL_LB_SWRST |
 351                            st->ctrl_lb);
 352         if (ret)
 353                 return ret;
 354
 355         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
 356                            AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
 357                            AD7280A_CTRL_LB_LOCK_DEV_ADDR |
 358                            AD7280A_CTRL_LB_MUST_SET |
 359                            st->ctrl_lb);
 360         if (ret)
 361                 goto error_power_down;
 362
 363         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
 364                            AD7280A_CONTROL_LB << 2);
 365         if (ret)
 366                 goto error_power_down;
 367
 368         for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
 369                 ret = __ad7280_read32(st, &val);
 370                 if (ret)
 371                         goto error_power_down;
 372
 373                 if (val == 0)
 374                         return n - 1;
 375
 376                 if (ad7280_check_crc(st, val)) {
 377                         ret = -EIO;
 378                         goto error_power_down;
 379                 }
 380
 381                 if (n != ad7280a_devaddr(val >> 27)) {
 382                         ret = -EIO;
 383                         goto error_power_down;
 384                 }
 385         }
 386         ret = -EFAULT;
 387
 388 error_power_down:
 389         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 390                      AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
 391
 392         return ret;
 393 }
 394
 395 static ssize_t ad7280_show_balance_sw(struct device *dev,
 396                                       struct device_attribute *attr,
 397                                       char *buf)
 398 {
 399         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 400         struct ad7280_state *st = iio_priv(indio_dev);
 401         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 402
 403         return sprintf(buf, "%d\n",
 404                        !!(st->cb_mask[this_attr->address >> 8] &
 405                        (1 << ((this_attr->address & 0xFF) + 2))));
 406 }
 407
 408 static ssize_t ad7280_store_balance_sw(struct device *dev,
 409                                        struct device_attribute *attr,
 410                                        const char *buf,
 411                                        size_t len)
 412 {
 413         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 414         struct ad7280_state *st = iio_priv(indio_dev);
 415         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 416         bool readin;
 417         int ret;
 418         unsigned int devaddr, ch;
 419
 420         ret = strtobool(buf, &readin);
 421         if (ret)
 422                 return ret;
 423
 424         devaddr = this_attr->address >> 8;
 425         ch = this_attr->address & 0xFF;
 426
 427         mutex_lock(&st->lock);
 428         if (readin)
 429                 st->cb_mask[devaddr] |= 1 << (ch + 2);
 430         else
 431                 st->cb_mask[devaddr] &= ~(1 << (ch + 2));
 432
 433         ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE,
 434                            0, st->cb_mask[devaddr]);
 435         mutex_unlock(&st->lock);
 436
 437         return ret ? ret : len;
 438 }
 439
 440 static ssize_t ad7280_show_balance_timer(struct device *dev,
 441                                          struct device_attribute *attr,
 442                                          char *buf)
 443 {
 444         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 445         struct ad7280_state *st = iio_priv(indio_dev);
 446         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 447         int ret;
 448         unsigned int msecs;
 449
 450         mutex_lock(&st->lock);
 451         ret = ad7280_read(st, this_attr->address >> 8,
 452                           this_attr->address & 0xFF);
 453         mutex_unlock(&st->lock);
 454
 455         if (ret < 0)
 456                 return ret;
 457
 458         msecs = (ret >> 3) * 71500;
 459
 460         return sprintf(buf, "%u\n", msecs);
 461 }
 462
 463 static ssize_t ad7280_store_balance_timer(struct device *dev,
 464                                           struct device_attribute *attr,
 465                                           const char *buf,
 466                                           size_t len)
 467 {
 468         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 469         struct ad7280_state *st = iio_priv(indio_dev);
 470         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 471         unsigned long val;
 472         int ret;
 473
 474         ret = kstrtoul(buf, 10, &val);
 475         if (ret)
 476                 return ret;
 477
 478         val /= 71500;
 479
 480         if (val > 31)
 481                 return -EINVAL;
 482
 483         mutex_lock(&st->lock);
 484         ret = ad7280_write(st, this_attr->address >> 8,
 485                            this_attr->address & 0xFF,
 486                            0, (val & 0x1F) << 3);
 487         mutex_unlock(&st->lock);
 488
 489         return ret ? ret : len;
 490 }
 491
 492 static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN *
 493                                            AD7280A_CELLS_PER_DEV * 2 + 1];
 494
 495 static const struct attribute_group ad7280_attrs_group = {
 496         .attrs = ad7280_attributes,
 497 };
 498
 499 static int ad7280_channel_init(struct ad7280_state *st)
 500 {
 501         int dev, ch, cnt;
 502
 503         st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 2,
 504                                     sizeof(*st->channels), GFP_KERNEL);
 505         if (!st->channels)
 506                 return -ENOMEM;
 507
 508         for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
 509                 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6;
 510                         ch++, cnt++) {
 511                         if (ch < AD7280A_AUX_ADC_1) {
 512                                 st->channels[cnt].type = IIO_VOLTAGE;
 513                                 st->channels[cnt].differential = 1;
 514                                 st->channels[cnt].channel = (dev * 6) + ch;
 515                                 st->channels[cnt].channel2 =
 516                                         st->channels[cnt].channel + 1;
 517                         } else {
 518                                 st->channels[cnt].type = IIO_TEMP;
 519                                 st->channels[cnt].channel = (dev * 6) + ch - 6;
 520                         }
 521                         st->channels[cnt].indexed = 1;
 522                         st->channels[cnt].info_mask_separate =
 523                                 BIT(IIO_CHAN_INFO_RAW);
 524                         st->channels[cnt].info_mask_shared_by_type =
 525                                 BIT(IIO_CHAN_INFO_SCALE);
 526                         st->channels[cnt].address =
 527                                 ad7280a_devaddr(dev) << 8 | ch;
 528                         st->channels[cnt].scan_index = cnt;
 529                         st->channels[cnt].scan_type.sign = 'u';
 530                         st->channels[cnt].scan_type.realbits = 12;
 531                         st->channels[cnt].scan_type.storagebits = 32;
 532                         st->channels[cnt].scan_type.shift = 0;
 533                 }
 534
 535         st->channels[cnt].type = IIO_VOLTAGE;
 536         st->channels[cnt].differential = 1;
 537         st->channels[cnt].channel = 0;
 538         st->channels[cnt].channel2 = dev * 6;
 539         st->channels[cnt].address = AD7280A_ALL_CELLS;
 540         st->channels[cnt].indexed = 1;
 541         st->channels[cnt].info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 542         st->channels[cnt].info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 543         st->channels[cnt].scan_index = cnt;
 544         st->channels[cnt].scan_type.sign = 'u';
 545         st->channels[cnt].scan_type.realbits = 32;
 546         st->channels[cnt].scan_type.storagebits = 32;
 547         st->channels[cnt].scan_type.shift = 0;
 548         cnt++;
 549         st->channels[cnt].type = IIO_TIMESTAMP;
 550         st->channels[cnt].channel = -1;
 551         st->channels[cnt].scan_index = cnt;
 552         st->channels[cnt].scan_type.sign = 's';
 553         st->channels[cnt].scan_type.realbits = 64;
 554         st->channels[cnt].scan_type.storagebits = 64;
 555         st->channels[cnt].scan_type.shift = 0;
 556
 557         return cnt + 1;
 558 }
 559
 560 static int ad7280_attr_init(struct ad7280_state *st)
 561 {
 562         int dev, ch, cnt;
 563         unsigned int index;
 564
 565         st->iio_attr = devm_kcalloc(&st->spi->dev, 2, sizeof(*st->iio_attr) *
 566                                     (st->slave_num + 1) * AD7280A_CELLS_PER_DEV,
 567                                     GFP_KERNEL);
 568         if (!st->iio_attr)
 569                 return -ENOMEM;
 570
 571         for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
 572                 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6;
 573                         ch++, cnt++) {
 574                         index = dev * AD7280A_CELLS_PER_DEV + ch;
 575                         st->iio_attr[cnt].address =
 576                                 ad7280a_devaddr(dev) << 8 | ch;
 577                         st->iio_attr[cnt].dev_attr.attr.mode =
 578                                 0644;
 579                         st->iio_attr[cnt].dev_attr.show =
 580                                 ad7280_show_balance_sw;
 581                         st->iio_attr[cnt].dev_attr.store =
 582                                 ad7280_store_balance_sw;
 583                         st->iio_attr[cnt].dev_attr.attr.name =
 584                                 devm_kasprintf(&st->spi->dev, GFP_KERNEL,
 585                                                "in%d-in%d_balance_switch_en",
 586                                                index, index + 1);
 587                         ad7280_attributes[cnt] =
 588                                 &st->iio_attr[cnt].dev_attr.attr;
 589                         cnt++;
 590                         st->iio_attr[cnt].address =
 591                                 ad7280a_devaddr(dev) << 8 |
 592                                 (AD7280A_CB1_TIMER + ch);
 593                         st->iio_attr[cnt].dev_attr.attr.mode =
 594                                 0644;
 595                         st->iio_attr[cnt].dev_attr.show =
 596                                 ad7280_show_balance_timer;
 597                         st->iio_attr[cnt].dev_attr.store =
 598                                 ad7280_store_balance_timer;
 599                         st->iio_attr[cnt].dev_attr.attr.name =
 600                                 devm_kasprintf(&st->spi->dev, GFP_KERNEL,
 601                                                "in%d-in%d_balance_timer",
 602                                                index, index + 1);
 603                         ad7280_attributes[cnt] =
 604                                 &st->iio_attr[cnt].dev_attr.attr;
 605                 }
 606
 607         ad7280_attributes[cnt] = NULL;
 608
 609         return 0;
 610 }
 611
 612 static ssize_t ad7280_read_channel_config(struct device *dev,
 613                                           struct device_attribute *attr,
 614                                           char *buf)
 615 {
 616         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 617         struct ad7280_state *st = iio_priv(indio_dev);
 618         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 619         unsigned int val;
 620
 621         switch (this_attr->address) {
 622         case AD7280A_CELL_OVERVOLTAGE:
 623                 val = 1000 + (st->cell_threshhigh * 1568) / 100;
 624                 break;
 625         case AD7280A_CELL_UNDERVOLTAGE:
 626                 val = 1000 + (st->cell_threshlow * 1568) / 100;
 627                 break;
 628         case AD7280A_AUX_ADC_OVERVOLTAGE:
 629                 val = (st->aux_threshhigh * 196) / 10;
 630                 break;
 631         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 632                 val = (st->aux_threshlow * 196) / 10;
 633                 break;
 634         default:
 635                 return -EINVAL;
 636         }
 637
 638         return sprintf(buf, "%u\n", val);
 639 }
 640
 641 static ssize_t ad7280_write_channel_config(struct device *dev,
 642                                            struct device_attribute *attr,
 643                                            const char *buf,
 644                                            size_t len)
 645 {
 646         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 647         struct ad7280_state *st = iio_priv(indio_dev);
 648         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 649
 650         long val;
 651         int ret;
 652
 653         ret = kstrtol(buf, 10, &val);
 654         if (ret)
 655                 return ret;
 656
 657         switch (this_attr->address) {
 658         case AD7280A_CELL_OVERVOLTAGE:
 659         case AD7280A_CELL_UNDERVOLTAGE:
 660                 val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */
 661                 break;
 662         case AD7280A_AUX_ADC_OVERVOLTAGE:
 663         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 664                 val = (val * 10) / 196; /* LSB 19.6mV */
 665                 break;
 666         default:
 667                 return -EFAULT;
 668         }
 669
 670         val = clamp(val, 0L, 0xFFL);
 671
 672         mutex_lock(&st->lock);
 673         switch (this_attr->address) {
 674         case AD7280A_CELL_OVERVOLTAGE:
 675                 st->cell_threshhigh = val;
 676                 break;
 677         case AD7280A_CELL_UNDERVOLTAGE:
 678                 st->cell_threshlow = val;
 679                 break;
 680         case AD7280A_AUX_ADC_OVERVOLTAGE:
 681                 st->aux_threshhigh = val;
 682                 break;
 683         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 684                 st->aux_threshlow = val;
 685                 break;
 686         }
 687
 688         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
 689                            this_attr->address, 1, val);
 690
 691         mutex_unlock(&st->lock);
 692
 693         return ret ? ret : len;
 694 }
 695
 696 static irqreturn_t ad7280_event_handler(int irq, void *private)
 697 {
 698         struct iio_dev *indio_dev = private;
 699         struct ad7280_state *st = iio_priv(indio_dev);
 700         unsigned int *channels;
 701         int i, ret;
 702
 703         channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL);
 704         if (!channels)
 705                 return IRQ_HANDLED;
 706
 707         ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
 708         if (ret < 0)
 709                 goto out;
 710
 711         for (i = 0; i < st->scan_cnt; i++) {
 712                 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) {
 713                         if (((channels[i] >> 11) & 0xFFF) >=
 714                                 st->cell_threshhigh)
 715                                 iio_push_event(indio_dev,
 716                                                IIO_EVENT_CODE(IIO_VOLTAGE,
 717                                                         1,
 718                                                         0,
 719                                                         IIO_EV_DIR_RISING,
 720                                                         IIO_EV_TYPE_THRESH,
 721                                                         0, 0, 0),
 722                                                iio_get_time_ns(indio_dev));
 723                         else if (((channels[i] >> 11) & 0xFFF) <=
 724                                 st->cell_threshlow)
 725                                 iio_push_event(indio_dev,
 726                                                IIO_EVENT_CODE(IIO_VOLTAGE,
 727                                                         1,
 728                                                         0,
 729                                                         IIO_EV_DIR_FALLING,
 730                                                         IIO_EV_TYPE_THRESH,
 731                                                         0, 0, 0),
 732                                                iio_get_time_ns(indio_dev));
 733                 } else {
 734                         if (((channels[i] >> 11) & 0xFFF) >= st->aux_threshhigh)
 735                                 iio_push_event(indio_dev,
 736                                                IIO_UNMOD_EVENT_CODE(
 737                                                         IIO_TEMP,
 738                                                         0,
 739                                                         IIO_EV_TYPE_THRESH,
 740                                                         IIO_EV_DIR_RISING),
 741                                                iio_get_time_ns(indio_dev));
 742                         else if (((channels[i] >> 11) & 0xFFF) <=
 743                                 st->aux_threshlow)
 744                                 iio_push_event(indio_dev,
 745                                                IIO_UNMOD_EVENT_CODE(
 746                                                         IIO_TEMP,
 747                                                         0,
 748                                                         IIO_EV_TYPE_THRESH,
 749                                                         IIO_EV_DIR_FALLING),
 750                                                iio_get_time_ns(indio_dev));
 751                 }
 752         }
 753
 754 out:
 755         kfree(channels);
 756
 757         return IRQ_HANDLED;
 758 }
 759
 760 static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value,
 761                 in_voltage-voltage_thresh_low_value,
 762                 0644,
 763                 ad7280_read_channel_config,
 764                 ad7280_write_channel_config,
 765                 AD7280A_CELL_UNDERVOLTAGE);
 766
 767 static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value,
 768                 in_voltage-voltage_thresh_high_value,
 769                 0644,
 770                 ad7280_read_channel_config,
 771                 ad7280_write_channel_config,
 772                 AD7280A_CELL_OVERVOLTAGE);
 773
 774 static IIO_DEVICE_ATTR(in_temp_thresh_low_value,
 775                 0644,
 776                 ad7280_read_channel_config,
 777                 ad7280_write_channel_config,
 778                 AD7280A_AUX_ADC_UNDERVOLTAGE);
 779
 780 static IIO_DEVICE_ATTR(in_temp_thresh_high_value,
 781                 0644,
 782                 ad7280_read_channel_config,
 783                 ad7280_write_channel_config,
 784                 AD7280A_AUX_ADC_OVERVOLTAGE);
 785
 786 static struct attribute *ad7280_event_attributes[] = {
 787         &iio_dev_attr_in_thresh_low_value.dev_attr.attr,
 788         &iio_dev_attr_in_thresh_high_value.dev_attr.attr,
 789         &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr,
 790         &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr,
 791         NULL,
 792 };
 793
 794 static const struct attribute_group ad7280_event_attrs_group = {
 795         .attrs = ad7280_event_attributes,
 796 };
 797
 798 static int ad7280_read_raw(struct iio_dev *indio_dev,
 799                            struct iio_chan_spec const *chan,
 800                            int *val,
 801                            int *val2,
 802                            long m)
 803 {
 804         struct ad7280_state *st = iio_priv(indio_dev);
 805         int ret;
 806
 807         switch (m) {
 808         case IIO_CHAN_INFO_RAW:
 809                 mutex_lock(&st->lock);
 810                 if (chan->address == AD7280A_ALL_CELLS)
 811                         ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
 812                 else
 813                         ret = ad7280_read_channel(st, chan->address >> 8,
 814                                                   chan->address & 0xFF);
 815                 mutex_unlock(&st->lock);
 816
 817                 if (ret < 0)
 818                         return ret;
 819
 820                 *val = ret;
 821
 822                 return IIO_VAL_INT;
 823         case IIO_CHAN_INFO_SCALE:
 824                 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6)
 825                         *val = 4000;
 826                 else
 827                         *val = 5000;
 828
 829                 *val2 = AD7280A_BITS;
 830                 return IIO_VAL_FRACTIONAL_LOG2;
 831         }
 832         return -EINVAL;
 833 }
 834
 835 static const struct iio_info ad7280_info = {
 836         .read_raw = ad7280_read_raw,
 837         .event_attrs = &ad7280_event_attrs_group,
 838         .attrs = &ad7280_attrs_group,
 839 };
 840
 841 static const struct ad7280_platform_data ad7793_default_pdata = {
 842         .acquisition_time = AD7280A_ACQ_TIME_400ns,
 843         .conversion_averaging = AD7280A_CONV_AVG_DIS,
 844         .thermistor_term_en = true,
 845 };
 846
 847 static int ad7280_probe(struct spi_device *spi)
 848 {
 849         const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev);
 850         struct ad7280_state *st;
 851         int ret;
 852         const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890};
 853         const unsigned short nAVG[4] = {1, 2, 4, 8};
 854         struct iio_dev *indio_dev;
 855
 856         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 857         if (!indio_dev)
 858                 return -ENOMEM;
 859
 860         st = iio_priv(indio_dev);
 861         spi_set_drvdata(spi, indio_dev);
 862         st->spi = spi;
 863         mutex_init(&st->lock);
 864
 865         if (!pdata)
 866                 pdata = &ad7793_default_pdata;
 867
 868         crc8_populate_msb(st->crc_tab, POLYNOM);
 869
 870         st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;
 871         st->spi->mode = SPI_MODE_1;
 872         spi_setup(st->spi);
 873
 874         st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3);
 875         st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging
 876                         & 0x3) | (pdata->thermistor_term_en ?
 877                         AD7280A_CTRL_LB_THERMISTOR_EN : 0);
 878
 879         ret = ad7280_chain_setup(st);
 880         if (ret < 0)
 881                 return ret;
 882
 883         ret = devm_add_action_or_reset(&spi->dev, ad7280_sw_power_down, st);
 884         if (ret)
 885                 return ret;
 886
 887         st->slave_num = ret;
 888         st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
 889         st->cell_threshhigh = 0xFF;
 890         st->aux_threshhigh = 0xFF;
 891
 892         /*
 893          * Total Conversion Time = ((tACQ + tCONV) *
 894          *                         (Number of Conversions per Part)) −
 895          *                         tACQ + ((N - 1) * tDELAY)
 896          *
 897          * Readback Delay = Total Conversion Time + tWAIT
 898          */
 899
 900         st->readback_delay_us =
 901                 ((tACQ_ns[pdata->acquisition_time & 0x3] + 695) *
 902                 (AD7280A_NUM_CH * nAVG[pdata->conversion_averaging & 0x3]))
 903                 - tACQ_ns[pdata->acquisition_time & 0x3] +
 904                 st->slave_num * 250;
 905
 906         /* Convert to usecs */
 907         st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
 908         st->readback_delay_us += 5; /* Add tWAIT */
 909
 910         indio_dev->name = spi_get_device_id(spi)->name;
 911         indio_dev->dev.parent = &spi->dev;
 912         indio_dev->modes = INDIO_DIRECT_MODE;
 913
 914         ret = ad7280_channel_init(st);
 915         if (ret < 0)
 916                 return ret;
 917
 918         indio_dev->num_channels = ret;
 919         indio_dev->channels = st->channels;
 920         indio_dev->info = &ad7280_info;
 921
 922         ret = ad7280_attr_init(st);
 923         if (ret < 0)
 924                 return ret;
 925
 926         ret = devm_iio_device_register(&spi->dev, indio_dev);
 927         if (ret)
 928                 return ret;
 929
 930         if (spi->irq > 0) {
 931                 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
 932                                    AD7280A_ALERT, 1,
 933                                    AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
 934                 if (ret)
 935                         return ret;
 936
 937                 ret = ad7280_write(st, ad7280a_devaddr(st->slave_num),
 938                                    AD7280A_ALERT, 0,
 939                                    AD7280A_ALERT_GEN_STATIC_HIGH |
 940                                    (pdata->chain_last_alert_ignore & 0xF));
 941                 if (ret)
 942                         return ret;
 943
 944                 ret = devm_request_threaded_irq(&spi->dev, spi->irq,
 945                                                 NULL,
 946                                                 ad7280_event_handler,
 947                                                 IRQF_TRIGGER_FALLING |
 948                                                 IRQF_ONESHOT,
 949                                                 indio_dev->name,
 950                                                 indio_dev);
 951                 if (ret)
 952                         return ret;
 953         }
 954
 955         return 0;
 956 }
 957
 958 static const struct spi_device_id ad7280_id[] = {
 959         {"ad7280a", 0},
 960         {}
 961 };
 962 MODULE_DEVICE_TABLE(spi, ad7280_id);
 963
 964 static struct spi_driver ad7280_driver = {
 965         .driver = {
 966                 .name   = "ad7280",
 967         },
 968         .probe          = ad7280_probe,
 969         .id_table       = ad7280_id,
 970 };
 971 module_spi_driver(ad7280_driver);
 972
 973 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
 974 MODULE_DESCRIPTION("Analog Devices AD7280A");
 975 MODULE_LICENSE("GPL v2");