1 // SPDX-License-Identifier: GPL-2.0
3 * Hantro VPU codec driver
5 * Copyright (C) 2018 Collabora, Ltd.
6 * Copyright 2018 Google LLC.
7 * Tomasz Figa <tfiga@chromium.org>
9 * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
10 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
13 #include <linux/clk.h>
14 #include <linux/module.h>
16 #include <linux/platform_device.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/slab.h>
20 #include <linux/videodev2.h>
21 #include <linux/workqueue.h>
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/videobuf2-core.h>
25 #include <media/videobuf2-vmalloc.h>
27 #include "hantro_v4l2.h"
29 #include "hantro_hw.h"
31 #define DRIVER_NAME "hantro-vpu"
34 module_param_named(debug, hantro_debug, int, 0644);
35 MODULE_PARM_DESC(debug,
36 "Debug level - higher value produces more verbose messages");
38 void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id)
40 struct v4l2_ctrl *ctrl;
42 ctrl = v4l2_ctrl_find(&ctx->ctrl_handler, id);
43 return ctrl ? ctrl->p_cur.p : NULL;
46 dma_addr_t hantro_get_ref(struct hantro_ctx *ctx, u64 ts)
48 struct vb2_queue *q = v4l2_m2m_get_dst_vq(ctx->fh.m2m_ctx);
49 struct vb2_buffer *buf;
52 index = vb2_find_timestamp(q, ts, 0);
55 buf = vb2_get_buffer(q, index);
56 return hantro_get_dec_buf_addr(ctx, buf);
60 hantro_enc_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf,
61 unsigned int bytesused)
65 avail_size = vb2_plane_size(buf, 0) - ctx->vpu_dst_fmt->header_size;
66 if (bytesused > avail_size)
69 * The bounce buffer is only for the JPEG encoder.
70 * TODO: Rework the JPEG encoder to eliminate the need
71 * for a bounce buffer.
73 if (ctx->jpeg_enc.bounce_buffer.cpu) {
74 memcpy(vb2_plane_vaddr(buf, 0) +
75 ctx->vpu_dst_fmt->header_size,
76 ctx->jpeg_enc.bounce_buffer.cpu, bytesused);
78 buf->planes[0].bytesused =
79 ctx->vpu_dst_fmt->header_size + bytesused;
84 hantro_dec_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf,
85 unsigned int bytesused)
87 /* For decoders set bytesused as per the output picture. */
88 buf->planes[0].bytesused = ctx->dst_fmt.plane_fmt[0].sizeimage;
92 static void hantro_job_finish(struct hantro_dev *vpu,
93 struct hantro_ctx *ctx,
94 unsigned int bytesused,
95 enum vb2_buffer_state result)
97 struct vb2_v4l2_buffer *src, *dst;
100 pm_runtime_mark_last_busy(vpu->dev);
101 pm_runtime_put_autosuspend(vpu->dev);
102 clk_bulk_disable(vpu->variant->num_clocks, vpu->clocks);
104 src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
105 dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
112 src->sequence = ctx->sequence_out++;
113 dst->sequence = ctx->sequence_cap++;
115 ret = ctx->buf_finish(ctx, &dst->vb2_buf, bytesused);
117 result = VB2_BUF_STATE_ERROR;
119 v4l2_m2m_buf_done(src, result);
120 v4l2_m2m_buf_done(dst, result);
122 v4l2_m2m_job_finish(vpu->m2m_dev, ctx->fh.m2m_ctx);
125 void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused,
126 enum vb2_buffer_state result)
128 struct hantro_ctx *ctx =
129 v4l2_m2m_get_curr_priv(vpu->m2m_dev);
132 * If cancel_delayed_work returns false
133 * the timeout expired. The watchdog is running,
134 * and will take care of finishing the job.
136 if (cancel_delayed_work(&vpu->watchdog_work))
137 hantro_job_finish(vpu, ctx, bytesused, result);
140 void hantro_watchdog(struct work_struct *work)
142 struct hantro_dev *vpu;
143 struct hantro_ctx *ctx;
145 vpu = container_of(to_delayed_work(work),
146 struct hantro_dev, watchdog_work);
147 ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev);
149 vpu_err("frame processing timed out!\n");
150 ctx->codec_ops->reset(ctx);
151 hantro_job_finish(vpu, ctx, 0, VB2_BUF_STATE_ERROR);
155 void hantro_start_prepare_run(struct hantro_ctx *ctx)
157 struct vb2_v4l2_buffer *src_buf;
159 src_buf = hantro_get_src_buf(ctx);
160 v4l2_ctrl_request_setup(src_buf->vb2_buf.req_obj.req,
163 if (hantro_needs_postproc(ctx, ctx->vpu_dst_fmt))
164 hantro_postproc_enable(ctx);
166 hantro_postproc_disable(ctx);
169 void hantro_end_prepare_run(struct hantro_ctx *ctx)
171 struct vb2_v4l2_buffer *src_buf;
173 src_buf = hantro_get_src_buf(ctx);
174 v4l2_ctrl_request_complete(src_buf->vb2_buf.req_obj.req,
177 /* Kick the watchdog. */
178 schedule_delayed_work(&ctx->dev->watchdog_work,
179 msecs_to_jiffies(2000));
182 static void device_run(void *priv)
184 struct hantro_ctx *ctx = priv;
185 struct vb2_v4l2_buffer *src, *dst;
188 src = hantro_get_src_buf(ctx);
189 dst = hantro_get_dst_buf(ctx);
191 ret = clk_bulk_enable(ctx->dev->variant->num_clocks, ctx->dev->clocks);
194 ret = pm_runtime_get_sync(ctx->dev->dev);
198 v4l2_m2m_buf_copy_metadata(src, dst, true);
200 ctx->codec_ops->run(ctx);
204 hantro_job_finish(ctx->dev, ctx, 0, VB2_BUF_STATE_ERROR);
207 bool hantro_is_encoder_ctx(const struct hantro_ctx *ctx)
209 return ctx->buf_finish == hantro_enc_buf_finish;
212 static struct v4l2_m2m_ops vpu_m2m_ops = {
213 .device_run = device_run,
217 queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
219 struct hantro_ctx *ctx = priv;
222 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
223 src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
224 src_vq->drv_priv = ctx;
225 src_vq->ops = &hantro_queue_ops;
226 src_vq->mem_ops = &vb2_dma_contig_memops;
229 * Driver does mostly sequential access, so sacrifice TLB efficiency
230 * for faster allocation. Also, no CPU access on the source queue,
231 * so no kernel mapping needed.
233 src_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES |
234 DMA_ATTR_NO_KERNEL_MAPPING;
235 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
236 src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
237 src_vq->lock = &ctx->dev->vpu_mutex;
238 src_vq->dev = ctx->dev->v4l2_dev.dev;
239 src_vq->supports_requests = true;
241 ret = vb2_queue_init(src_vq);
246 * When encoding, the CAPTURE queue doesn't need dma memory,
247 * as the CPU needs to create the JPEG frames, from the
248 * hardware-produced JPEG payload.
250 * For the DMA destination buffer, we use a bounce buffer.
252 if (hantro_is_encoder_ctx(ctx)) {
253 dst_vq->mem_ops = &vb2_vmalloc_memops;
255 dst_vq->bidirectional = true;
256 dst_vq->mem_ops = &vb2_dma_contig_memops;
257 dst_vq->dma_attrs = DMA_ATTR_ALLOC_SINGLE_PAGES |
258 DMA_ATTR_NO_KERNEL_MAPPING;
261 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
262 dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
263 dst_vq->drv_priv = ctx;
264 dst_vq->ops = &hantro_queue_ops;
265 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
266 dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
267 dst_vq->lock = &ctx->dev->vpu_mutex;
268 dst_vq->dev = ctx->dev->v4l2_dev.dev;
270 return vb2_queue_init(dst_vq);
273 static int hantro_s_ctrl(struct v4l2_ctrl *ctrl)
275 struct hantro_ctx *ctx;
277 ctx = container_of(ctrl->handler,
278 struct hantro_ctx, ctrl_handler);
280 vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
283 case V4L2_CID_JPEG_COMPRESSION_QUALITY:
284 ctx->jpeg_quality = ctrl->val;
293 static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
294 .s_ctrl = hantro_s_ctrl,
297 static const struct hantro_ctrl controls[] = {
299 .codec = HANTRO_JPEG_ENCODER,
301 .id = V4L2_CID_JPEG_COMPRESSION_QUALITY,
306 .ops = &hantro_ctrl_ops,
309 .codec = HANTRO_MPEG2_DECODER,
311 .id = V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS,
314 .codec = HANTRO_MPEG2_DECODER,
316 .id = V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION,
319 .codec = HANTRO_VP8_DECODER,
321 .id = V4L2_CID_MPEG_VIDEO_VP8_FRAME_HEADER,
324 .codec = HANTRO_H264_DECODER,
326 .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS,
329 .codec = HANTRO_H264_DECODER,
331 .id = V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS,
334 .codec = HANTRO_H264_DECODER,
336 .id = V4L2_CID_MPEG_VIDEO_H264_SPS,
339 .codec = HANTRO_H264_DECODER,
341 .id = V4L2_CID_MPEG_VIDEO_H264_PPS,
344 .codec = HANTRO_H264_DECODER,
346 .id = V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX,
349 .codec = HANTRO_H264_DECODER,
351 .id = V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE,
352 .min = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
353 .def = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
354 .max = V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
357 .codec = HANTRO_H264_DECODER,
359 .id = V4L2_CID_MPEG_VIDEO_H264_START_CODE,
360 .min = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
361 .def = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
362 .max = V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
368 static int hantro_ctrls_setup(struct hantro_dev *vpu,
369 struct hantro_ctx *ctx,
372 int i, num_ctrls = ARRAY_SIZE(controls);
374 v4l2_ctrl_handler_init(&ctx->ctrl_handler, num_ctrls);
376 for (i = 0; i < num_ctrls; i++) {
377 if (!(allowed_codecs & controls[i].codec))
380 v4l2_ctrl_new_custom(&ctx->ctrl_handler,
381 &controls[i].cfg, NULL);
382 if (ctx->ctrl_handler.error) {
383 vpu_err("Adding control (%d) failed %d\n",
385 ctx->ctrl_handler.error);
386 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
387 return ctx->ctrl_handler.error;
390 return v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
394 * V4L2 file operations.
397 static int hantro_open(struct file *filp)
399 struct hantro_dev *vpu = video_drvdata(filp);
400 struct video_device *vdev = video_devdata(filp);
401 struct hantro_func *func = hantro_vdev_to_func(vdev);
402 struct hantro_ctx *ctx;
403 int allowed_codecs, ret;
406 * We do not need any extra locking here, because we operate only
407 * on local data here, except reading few fields from dev, which
408 * do not change through device's lifetime (which is guaranteed by
409 * reference on module from open()) and V4L2 internal objects (such
410 * as vdev and ctx->fh), which have proper locking done in respective
411 * helper functions used here.
414 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
419 if (func->id == MEDIA_ENT_F_PROC_VIDEO_ENCODER) {
420 allowed_codecs = vpu->variant->codec & HANTRO_ENCODERS;
421 ctx->buf_finish = hantro_enc_buf_finish;
422 } else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) {
423 allowed_codecs = vpu->variant->codec & HANTRO_DECODERS;
424 ctx->buf_finish = hantro_dec_buf_finish;
430 ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx, queue_init);
431 if (IS_ERR(ctx->fh.m2m_ctx)) {
432 ret = PTR_ERR(ctx->fh.m2m_ctx);
436 v4l2_fh_init(&ctx->fh, vdev);
437 filp->private_data = &ctx->fh;
438 v4l2_fh_add(&ctx->fh);
440 hantro_reset_fmts(ctx);
442 ret = hantro_ctrls_setup(vpu, ctx, allowed_codecs);
444 vpu_err("Failed to set up controls\n");
447 ctx->fh.ctrl_handler = &ctx->ctrl_handler;
452 v4l2_fh_del(&ctx->fh);
453 v4l2_fh_exit(&ctx->fh);
459 static int hantro_release(struct file *filp)
461 struct hantro_ctx *ctx =
462 container_of(filp->private_data, struct hantro_ctx, fh);
465 * No need for extra locking because this was the last reference
468 v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
469 v4l2_fh_del(&ctx->fh);
470 v4l2_fh_exit(&ctx->fh);
471 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
477 static const struct v4l2_file_operations hantro_fops = {
478 .owner = THIS_MODULE,
480 .release = hantro_release,
481 .poll = v4l2_m2m_fop_poll,
482 .unlocked_ioctl = video_ioctl2,
483 .mmap = v4l2_m2m_fop_mmap,
486 static const struct of_device_id of_hantro_match[] = {
487 #ifdef CONFIG_VIDEO_HANTRO_ROCKCHIP
488 { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
489 { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
490 { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
494 MODULE_DEVICE_TABLE(of, of_hantro_match);
496 static int hantro_register_entity(struct media_device *mdev,
497 struct media_entity *entity,
498 const char *entity_name,
499 struct media_pad *pads, int num_pads,
500 int function, struct video_device *vdev)
505 entity->obj_type = MEDIA_ENTITY_TYPE_BASE;
506 if (function == MEDIA_ENT_F_IO_V4L) {
507 entity->info.dev.major = VIDEO_MAJOR;
508 entity->info.dev.minor = vdev->minor;
511 name = devm_kasprintf(mdev->dev, GFP_KERNEL, "%s-%s", vdev->name,
517 entity->function = function;
519 ret = media_entity_pads_init(entity, num_pads, pads);
523 ret = media_device_register_entity(mdev, entity);
530 static int hantro_attach_func(struct hantro_dev *vpu,
531 struct hantro_func *func)
533 struct media_device *mdev = &vpu->mdev;
534 struct media_link *link;
537 /* Create the three encoder entities with their pads */
538 func->source_pad.flags = MEDIA_PAD_FL_SOURCE;
539 ret = hantro_register_entity(mdev, &func->vdev.entity, "source",
540 &func->source_pad, 1, MEDIA_ENT_F_IO_V4L,
545 func->proc_pads[0].flags = MEDIA_PAD_FL_SINK;
546 func->proc_pads[1].flags = MEDIA_PAD_FL_SOURCE;
547 ret = hantro_register_entity(mdev, &func->proc, "proc",
548 func->proc_pads, 2, func->id,
551 goto err_rel_entity0;
553 func->sink_pad.flags = MEDIA_PAD_FL_SINK;
554 ret = hantro_register_entity(mdev, &func->sink, "sink",
555 &func->sink_pad, 1, MEDIA_ENT_F_IO_V4L,
558 goto err_rel_entity1;
560 /* Connect the three entities */
561 ret = media_create_pad_link(&func->vdev.entity, 0, &func->proc, 1,
562 MEDIA_LNK_FL_IMMUTABLE |
563 MEDIA_LNK_FL_ENABLED);
565 goto err_rel_entity2;
567 ret = media_create_pad_link(&func->proc, 0, &func->sink, 0,
568 MEDIA_LNK_FL_IMMUTABLE |
569 MEDIA_LNK_FL_ENABLED);
573 /* Create video interface */
574 func->intf_devnode = media_devnode_create(mdev, MEDIA_INTF_T_V4L_VIDEO,
577 if (!func->intf_devnode) {
582 /* Connect the two DMA engines to the interface */
583 link = media_create_intf_link(&func->vdev.entity,
584 &func->intf_devnode->intf,
585 MEDIA_LNK_FL_IMMUTABLE |
586 MEDIA_LNK_FL_ENABLED);
592 link = media_create_intf_link(&func->sink, &func->intf_devnode->intf,
593 MEDIA_LNK_FL_IMMUTABLE |
594 MEDIA_LNK_FL_ENABLED);
602 media_devnode_remove(func->intf_devnode);
605 media_entity_remove_links(&func->sink);
608 media_entity_remove_links(&func->proc);
609 media_entity_remove_links(&func->vdev.entity);
612 media_device_unregister_entity(&func->sink);
615 media_device_unregister_entity(&func->proc);
618 media_device_unregister_entity(&func->vdev.entity);
622 static void hantro_detach_func(struct hantro_func *func)
624 media_devnode_remove(func->intf_devnode);
625 media_entity_remove_links(&func->sink);
626 media_entity_remove_links(&func->proc);
627 media_entity_remove_links(&func->vdev.entity);
628 media_device_unregister_entity(&func->sink);
629 media_device_unregister_entity(&func->proc);
630 media_device_unregister_entity(&func->vdev.entity);
633 static int hantro_add_func(struct hantro_dev *vpu, unsigned int funcid)
635 const struct of_device_id *match;
636 struct hantro_func *func;
637 struct video_device *vfd;
640 match = of_match_node(of_hantro_match, vpu->dev->of_node);
641 func = devm_kzalloc(vpu->dev, sizeof(*func), GFP_KERNEL);
643 v4l2_err(&vpu->v4l2_dev, "Failed to allocate video device\n");
650 vfd->fops = &hantro_fops;
651 vfd->release = video_device_release_empty;
652 vfd->lock = &vpu->vpu_mutex;
653 vfd->v4l2_dev = &vpu->v4l2_dev;
654 vfd->vfl_dir = VFL_DIR_M2M;
655 vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_M2M_MPLANE;
656 vfd->ioctl_ops = &hantro_ioctl_ops;
657 snprintf(vfd->name, sizeof(vfd->name), "%s-%s", match->compatible,
658 funcid == MEDIA_ENT_F_PROC_VIDEO_ENCODER ? "enc" : "dec");
660 if (funcid == MEDIA_ENT_F_PROC_VIDEO_ENCODER)
665 video_set_drvdata(vfd, vpu);
667 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
669 v4l2_err(&vpu->v4l2_dev, "Failed to register video device\n");
673 ret = hantro_attach_func(vpu, func);
675 v4l2_err(&vpu->v4l2_dev,
676 "Failed to attach functionality to the media device\n");
680 v4l2_info(&vpu->v4l2_dev, "registered %s as /dev/video%d\n", vfd->name,
686 video_unregister_device(vfd);
690 static int hantro_add_enc_func(struct hantro_dev *vpu)
692 if (!vpu->variant->enc_fmts)
695 return hantro_add_func(vpu, MEDIA_ENT_F_PROC_VIDEO_ENCODER);
698 static int hantro_add_dec_func(struct hantro_dev *vpu)
700 if (!vpu->variant->dec_fmts)
703 return hantro_add_func(vpu, MEDIA_ENT_F_PROC_VIDEO_DECODER);
706 static void hantro_remove_func(struct hantro_dev *vpu,
709 struct hantro_func *func;
711 if (funcid == MEDIA_ENT_F_PROC_VIDEO_ENCODER)
719 hantro_detach_func(func);
720 video_unregister_device(&func->vdev);
723 static void hantro_remove_enc_func(struct hantro_dev *vpu)
725 hantro_remove_func(vpu, MEDIA_ENT_F_PROC_VIDEO_ENCODER);
728 static void hantro_remove_dec_func(struct hantro_dev *vpu)
730 hantro_remove_func(vpu, MEDIA_ENT_F_PROC_VIDEO_DECODER);
733 static const struct media_device_ops hantro_m2m_media_ops = {
734 .req_validate = vb2_request_validate,
735 .req_queue = v4l2_m2m_request_queue,
738 static int hantro_probe(struct platform_device *pdev)
740 const struct of_device_id *match;
741 struct hantro_dev *vpu;
742 struct resource *res;
746 vpu = devm_kzalloc(&pdev->dev, sizeof(*vpu), GFP_KERNEL);
750 vpu->dev = &pdev->dev;
752 mutex_init(&vpu->vpu_mutex);
753 spin_lock_init(&vpu->irqlock);
755 match = of_match_node(of_hantro_match, pdev->dev.of_node);
756 vpu->variant = match->data;
758 INIT_DELAYED_WORK(&vpu->watchdog_work, hantro_watchdog);
760 vpu->clocks = devm_kcalloc(&pdev->dev, vpu->variant->num_clocks,
761 sizeof(*vpu->clocks), GFP_KERNEL);
765 for (i = 0; i < vpu->variant->num_clocks; i++)
766 vpu->clocks[i].id = vpu->variant->clk_names[i];
767 ret = devm_clk_bulk_get(&pdev->dev, vpu->variant->num_clocks,
772 num_bases = vpu->variant->num_regs ?: 1;
773 vpu->reg_bases = devm_kcalloc(&pdev->dev, num_bases,
774 sizeof(*vpu->reg_bases), GFP_KERNEL);
778 for (i = 0; i < num_bases; i++) {
779 res = vpu->variant->reg_names ?
780 platform_get_resource_byname(vpu->pdev, IORESOURCE_MEM,
781 vpu->variant->reg_names[i]) :
782 platform_get_resource(vpu->pdev, IORESOURCE_MEM, 0);
783 vpu->reg_bases[i] = devm_ioremap_resource(vpu->dev, res);
784 if (IS_ERR(vpu->reg_bases[i]))
785 return PTR_ERR(vpu->reg_bases[i]);
787 vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset;
788 vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset;
790 ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32));
792 dev_err(vpu->dev, "Could not set DMA coherent mask.\n");
795 vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
797 for (i = 0; i < vpu->variant->num_irqs; i++) {
798 const char *irq_name = vpu->variant->irqs[i].name;
801 if (!vpu->variant->irqs[i].handler)
804 irq = platform_get_irq_byname(vpu->pdev, irq_name);
808 ret = devm_request_irq(vpu->dev, irq,
809 vpu->variant->irqs[i].handler, 0,
810 dev_name(vpu->dev), vpu);
812 dev_err(vpu->dev, "Could not request %s IRQ.\n",
818 ret = vpu->variant->init(vpu);
820 dev_err(&pdev->dev, "Failed to init VPU hardware\n");
824 pm_runtime_set_autosuspend_delay(vpu->dev, 100);
825 pm_runtime_use_autosuspend(vpu->dev);
826 pm_runtime_enable(vpu->dev);
828 ret = clk_bulk_prepare(vpu->variant->num_clocks, vpu->clocks);
830 dev_err(&pdev->dev, "Failed to prepare clocks\n");
834 ret = v4l2_device_register(&pdev->dev, &vpu->v4l2_dev);
836 dev_err(&pdev->dev, "Failed to register v4l2 device\n");
837 goto err_clk_unprepare;
839 platform_set_drvdata(pdev, vpu);
841 vpu->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops);
842 if (IS_ERR(vpu->m2m_dev)) {
843 v4l2_err(&vpu->v4l2_dev, "Failed to init mem2mem device\n");
844 ret = PTR_ERR(vpu->m2m_dev);
848 vpu->mdev.dev = vpu->dev;
849 strscpy(vpu->mdev.model, DRIVER_NAME, sizeof(vpu->mdev.model));
850 strscpy(vpu->mdev.bus_info, "platform: " DRIVER_NAME,
851 sizeof(vpu->mdev.model));
852 media_device_init(&vpu->mdev);
853 vpu->mdev.ops = &hantro_m2m_media_ops;
854 vpu->v4l2_dev.mdev = &vpu->mdev;
856 ret = hantro_add_enc_func(vpu);
858 dev_err(&pdev->dev, "Failed to register encoder\n");
862 ret = hantro_add_dec_func(vpu);
864 dev_err(&pdev->dev, "Failed to register decoder\n");
865 goto err_rm_enc_func;
868 ret = media_device_register(&vpu->mdev);
870 v4l2_err(&vpu->v4l2_dev, "Failed to register mem2mem media device\n");
871 goto err_rm_dec_func;
877 hantro_remove_dec_func(vpu);
879 hantro_remove_enc_func(vpu);
881 media_device_cleanup(&vpu->mdev);
882 v4l2_m2m_release(vpu->m2m_dev);
884 v4l2_device_unregister(&vpu->v4l2_dev);
886 clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
887 pm_runtime_dont_use_autosuspend(vpu->dev);
888 pm_runtime_disable(vpu->dev);
892 static int hantro_remove(struct platform_device *pdev)
894 struct hantro_dev *vpu = platform_get_drvdata(pdev);
896 v4l2_info(&vpu->v4l2_dev, "Removing %s\n", pdev->name);
898 media_device_unregister(&vpu->mdev);
899 hantro_remove_dec_func(vpu);
900 hantro_remove_enc_func(vpu);
901 media_device_cleanup(&vpu->mdev);
902 v4l2_m2m_release(vpu->m2m_dev);
903 v4l2_device_unregister(&vpu->v4l2_dev);
904 clk_bulk_unprepare(vpu->variant->num_clocks, vpu->clocks);
905 pm_runtime_dont_use_autosuspend(vpu->dev);
906 pm_runtime_disable(vpu->dev);
911 static int hantro_runtime_resume(struct device *dev)
913 struct hantro_dev *vpu = dev_get_drvdata(dev);
915 if (vpu->variant->runtime_resume)
916 return vpu->variant->runtime_resume(vpu);
922 static const struct dev_pm_ops hantro_pm_ops = {
923 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
924 pm_runtime_force_resume)
925 SET_RUNTIME_PM_OPS(NULL, hantro_runtime_resume, NULL)
928 static struct platform_driver hantro_driver = {
929 .probe = hantro_probe,
930 .remove = hantro_remove,
933 .of_match_table = of_match_ptr(of_hantro_match),
934 .pm = &hantro_pm_ops,
937 module_platform_driver(hantro_driver);
939 MODULE_LICENSE("GPL v2");
940 MODULE_AUTHOR("Alpha Lin <Alpha.Lin@Rock-Chips.com>");
941 MODULE_AUTHOR("Tomasz Figa <tfiga@chromium.org>");
942 MODULE_AUTHOR("Ezequiel Garcia <ezequiel@collabora.com>");
943 MODULE_DESCRIPTION("Hantro VPU codec driver");