1 // SPDX-License-Identifier: GPL-2.0
3 * Atheros AR933X SoC built-in UART driver
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 #include <linux/module.h>
11 #include <linux/ioport.h>
12 #include <linux/init.h>
13 #include <linux/console.h>
14 #include <linux/sysrq.h>
15 #include <linux/delay.h>
16 #include <linux/platform_device.h>
18 #include <linux/of_platform.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
21 #include <linux/serial_core.h>
22 #include <linux/serial.h>
23 #include <linux/slab.h>
25 #include <linux/irq.h>
26 #include <linux/clk.h>
28 #include <asm/div64.h>
30 #include <asm/mach-ath79/ar933x_uart.h>
32 #define DRIVER_NAME "ar933x-uart"
34 #define AR933X_UART_MAX_SCALE 0xff
35 #define AR933X_UART_MAX_STEP 0xffff
37 #define AR933X_UART_MIN_BAUD 300
38 #define AR933X_UART_MAX_BAUD 3000000
40 #define AR933X_DUMMY_STATUS_RD 0x01
42 static struct uart_driver ar933x_uart_driver;
44 struct ar933x_uart_port {
45 struct uart_port port;
46 unsigned int ier; /* shadow Interrupt Enable Register */
47 unsigned int min_baud;
48 unsigned int max_baud;
52 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
55 return readl(up->port.membase + offset);
58 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
59 int offset, unsigned int value)
61 writel(value, up->port.membase + offset);
64 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
71 t = ar933x_uart_read(up, offset);
74 ar933x_uart_write(up, offset, t);
77 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
81 ar933x_uart_rmw(up, offset, 0, val);
84 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
88 ar933x_uart_rmw(up, offset, val, 0);
91 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
93 up->ier |= AR933X_UART_INT_TX_EMPTY;
94 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
97 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
99 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
100 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
103 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
107 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
108 rdata |= AR933X_UART_DATA_TX_CSR;
109 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
112 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
114 struct ar933x_uart_port *up =
115 container_of(port, struct ar933x_uart_port, port);
119 spin_lock_irqsave(&up->port.lock, flags);
120 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
121 spin_unlock_irqrestore(&up->port.lock, flags);
123 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
126 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
131 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
135 static void ar933x_uart_start_tx(struct uart_port *port)
137 struct ar933x_uart_port *up =
138 container_of(port, struct ar933x_uart_port, port);
140 ar933x_uart_start_tx_interrupt(up);
143 static void ar933x_uart_stop_tx(struct uart_port *port)
145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
148 ar933x_uart_stop_tx_interrupt(up);
151 static void ar933x_uart_stop_rx(struct uart_port *port)
153 struct ar933x_uart_port *up =
154 container_of(port, struct ar933x_uart_port, port);
156 up->ier &= ~AR933X_UART_INT_RX_VALID;
157 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
160 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
162 struct ar933x_uart_port *up =
163 container_of(port, struct ar933x_uart_port, port);
166 spin_lock_irqsave(&up->port.lock, flags);
167 if (break_state == -1)
168 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
169 AR933X_UART_CS_TX_BREAK);
171 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
172 AR933X_UART_CS_TX_BREAK);
173 spin_unlock_irqrestore(&up->port.lock, flags);
177 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
179 static unsigned long ar933x_uart_get_baud(unsigned int clk,
186 div = (2 << 16) * (scale + 1);
195 static void ar933x_uart_get_scale_step(unsigned int clk,
207 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
211 tstep = baud * (tscale + 1);
215 if (tstep > AR933X_UART_MAX_STEP)
218 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
219 if (diff < min_diff) {
227 static void ar933x_uart_set_termios(struct uart_port *port,
228 struct ktermios *new,
229 struct ktermios *old)
231 struct ar933x_uart_port *up =
232 container_of(port, struct ar933x_uart_port, port);
235 unsigned int baud, scale, step;
237 /* Only CS8 is supported */
238 new->c_cflag &= ~CSIZE;
241 /* Only one stop bit is supported */
242 new->c_cflag &= ~CSTOPB;
245 if (new->c_cflag & PARENB) {
246 if (!(new->c_cflag & PARODD))
247 cs |= AR933X_UART_CS_PARITY_EVEN;
249 cs |= AR933X_UART_CS_PARITY_ODD;
251 cs |= AR933X_UART_CS_PARITY_NONE;
254 /* Mark/space parity is not supported */
255 new->c_cflag &= ~CMSPAR;
257 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
258 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
261 * Ok, we're now changing the port state. Do it with
262 * interrupts disabled.
264 spin_lock_irqsave(&up->port.lock, flags);
266 /* disable the UART */
267 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
268 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
270 /* Update the per-port timeout. */
271 uart_update_timeout(port, new->c_cflag, baud);
273 up->port.ignore_status_mask = 0;
275 /* ignore all characters if CREAD is not set */
276 if ((new->c_cflag & CREAD) == 0)
277 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
279 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
280 scale << AR933X_UART_CLOCK_SCALE_S | step);
282 /* setup configuration register */
283 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
285 /* enable host interrupt */
286 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
287 AR933X_UART_CS_HOST_INT_EN);
289 /* reenable the UART */
290 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
291 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
292 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
294 spin_unlock_irqrestore(&up->port.lock, flags);
296 if (tty_termios_baud_rate(new))
297 tty_termios_encode_baud_rate(new, baud, baud);
300 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
302 struct tty_port *port = &up->port.state->port;
309 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
310 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
313 /* remove the character from the FIFO */
314 ar933x_uart_write(up, AR933X_UART_DATA_REG,
315 AR933X_UART_DATA_RX_CSR);
317 up->port.icount.rx++;
318 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
320 if (uart_handle_sysrq_char(&up->port, ch))
323 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
324 tty_insert_flip_char(port, ch, TTY_NORMAL);
325 } while (max_count-- > 0);
327 spin_unlock(&up->port.lock);
328 tty_flip_buffer_push(port);
329 spin_lock(&up->port.lock);
332 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
334 struct circ_buf *xmit = &up->port.state->xmit;
337 if (uart_tx_stopped(&up->port))
340 count = up->port.fifosize;
344 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
345 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
348 if (up->port.x_char) {
349 ar933x_uart_putc(up, up->port.x_char);
350 up->port.icount.tx++;
355 if (uart_circ_empty(xmit))
358 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
360 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
361 up->port.icount.tx++;
362 } while (--count > 0);
364 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
365 uart_write_wakeup(&up->port);
367 if (!uart_circ_empty(xmit))
368 ar933x_uart_start_tx_interrupt(up);
371 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
373 struct ar933x_uart_port *up = dev_id;
376 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
377 if ((status & AR933X_UART_CS_HOST_INT) == 0)
380 spin_lock(&up->port.lock);
382 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
383 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
385 if (status & AR933X_UART_INT_RX_VALID) {
386 ar933x_uart_write(up, AR933X_UART_INT_REG,
387 AR933X_UART_INT_RX_VALID);
388 ar933x_uart_rx_chars(up);
391 if (status & AR933X_UART_INT_TX_EMPTY) {
392 ar933x_uart_write(up, AR933X_UART_INT_REG,
393 AR933X_UART_INT_TX_EMPTY);
394 ar933x_uart_stop_tx_interrupt(up);
395 ar933x_uart_tx_chars(up);
398 spin_unlock(&up->port.lock);
403 static int ar933x_uart_startup(struct uart_port *port)
405 struct ar933x_uart_port *up =
406 container_of(port, struct ar933x_uart_port, port);
410 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
411 up->port.irqflags, dev_name(up->port.dev), up);
415 spin_lock_irqsave(&up->port.lock, flags);
417 /* Enable HOST interrupts */
418 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
419 AR933X_UART_CS_HOST_INT_EN);
421 /* Enable RX interrupts */
422 up->ier = AR933X_UART_INT_RX_VALID;
423 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
425 spin_unlock_irqrestore(&up->port.lock, flags);
430 static void ar933x_uart_shutdown(struct uart_port *port)
432 struct ar933x_uart_port *up =
433 container_of(port, struct ar933x_uart_port, port);
435 /* Disable all interrupts */
437 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
439 /* Disable break condition */
440 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
441 AR933X_UART_CS_TX_BREAK);
443 free_irq(up->port.irq, up);
446 static const char *ar933x_uart_type(struct uart_port *port)
448 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
451 static void ar933x_uart_release_port(struct uart_port *port)
453 /* Nothing to release ... */
456 static int ar933x_uart_request_port(struct uart_port *port)
458 /* UARTs always present */
462 static void ar933x_uart_config_port(struct uart_port *port, int flags)
464 if (flags & UART_CONFIG_TYPE)
465 port->type = PORT_AR933X;
468 static int ar933x_uart_verify_port(struct uart_port *port,
469 struct serial_struct *ser)
471 struct ar933x_uart_port *up =
472 container_of(port, struct ar933x_uart_port, port);
474 if (ser->type != PORT_UNKNOWN &&
475 ser->type != PORT_AR933X)
478 if (ser->irq < 0 || ser->irq >= NR_IRQS)
481 if (ser->baud_base < up->min_baud ||
482 ser->baud_base > up->max_baud)
488 static const struct uart_ops ar933x_uart_ops = {
489 .tx_empty = ar933x_uart_tx_empty,
490 .set_mctrl = ar933x_uart_set_mctrl,
491 .get_mctrl = ar933x_uart_get_mctrl,
492 .stop_tx = ar933x_uart_stop_tx,
493 .start_tx = ar933x_uart_start_tx,
494 .stop_rx = ar933x_uart_stop_rx,
495 .break_ctl = ar933x_uart_break_ctl,
496 .startup = ar933x_uart_startup,
497 .shutdown = ar933x_uart_shutdown,
498 .set_termios = ar933x_uart_set_termios,
499 .type = ar933x_uart_type,
500 .release_port = ar933x_uart_release_port,
501 .request_port = ar933x_uart_request_port,
502 .config_port = ar933x_uart_config_port,
503 .verify_port = ar933x_uart_verify_port,
506 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
507 static struct ar933x_uart_port *
508 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
510 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
513 unsigned int timeout = 60000;
515 /* Wait up to 60ms for the character(s) to be sent. */
517 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
521 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
524 static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
526 struct ar933x_uart_port *up =
527 container_of(port, struct ar933x_uart_port, port);
529 ar933x_uart_wait_xmitr(up);
530 ar933x_uart_putc(up, ch);
533 static void ar933x_uart_console_write(struct console *co, const char *s,
536 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
541 local_irq_save(flags);
545 else if (oops_in_progress)
546 locked = spin_trylock(&up->port.lock);
548 spin_lock(&up->port.lock);
551 * First save the IER then disable the interrupts
553 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
554 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
556 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
559 * Finally, wait for transmitter to become empty
560 * and restore the IER
562 ar933x_uart_wait_xmitr(up);
563 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
565 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
568 spin_unlock(&up->port.lock);
570 local_irq_restore(flags);
573 static int ar933x_uart_console_setup(struct console *co, char *options)
575 struct ar933x_uart_port *up;
581 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
584 up = ar933x_console_ports[co->index];
589 uart_parse_options(options, &baud, &parity, &bits, &flow);
591 return uart_set_options(&up->port, co, baud, parity, bits, flow);
594 static struct console ar933x_uart_console = {
596 .write = ar933x_uart_console_write,
597 .device = uart_console_device,
598 .setup = ar933x_uart_console_setup,
599 .flags = CON_PRINTBUFFER,
601 .data = &ar933x_uart_driver,
603 #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
605 static struct uart_driver ar933x_uart_driver = {
606 .owner = THIS_MODULE,
607 .driver_name = DRIVER_NAME,
608 .dev_name = "ttyATH",
609 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
610 .cons = NULL, /* filled in runtime */
613 static int ar933x_uart_probe(struct platform_device *pdev)
615 struct ar933x_uart_port *up;
616 struct uart_port *port;
617 struct resource *mem_res;
618 struct resource *irq_res;
619 struct device_node *np;
624 np = pdev->dev.of_node;
625 if (IS_ENABLED(CONFIG_OF) && np) {
626 id = of_alias_get_id(np, "serial");
628 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
638 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
641 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
643 dev_err(&pdev->dev, "no IRQ resource\n");
647 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
652 up->clk = devm_clk_get(&pdev->dev, "uart");
653 if (IS_ERR(up->clk)) {
654 dev_err(&pdev->dev, "unable to get UART clock\n");
655 return PTR_ERR(up->clk);
660 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
661 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
662 if (IS_ERR(port->membase))
663 return PTR_ERR(port->membase);
665 ret = clk_prepare_enable(up->clk);
669 port->uartclk = clk_get_rate(up->clk);
670 if (!port->uartclk) {
672 goto err_disable_clk;
675 port->mapbase = mem_res->start;
677 port->irq = irq_res->start;
678 port->dev = &pdev->dev;
679 port->type = PORT_AR933X;
680 port->iotype = UPIO_MEM32;
683 port->fifosize = AR933X_UART_FIFO_SIZE;
684 port->ops = &ar933x_uart_ops;
686 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
687 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
689 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
690 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
692 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
693 ar933x_console_ports[up->port.line] = up;
696 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
698 goto err_disable_clk;
700 platform_set_drvdata(pdev, up);
704 clk_disable_unprepare(up->clk);
708 static int ar933x_uart_remove(struct platform_device *pdev)
710 struct ar933x_uart_port *up;
712 up = platform_get_drvdata(pdev);
715 uart_remove_one_port(&ar933x_uart_driver, &up->port);
716 clk_disable_unprepare(up->clk);
723 static const struct of_device_id ar933x_uart_of_ids[] = {
724 { .compatible = "qca,ar9330-uart" },
727 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
730 static struct platform_driver ar933x_uart_platform_driver = {
731 .probe = ar933x_uart_probe,
732 .remove = ar933x_uart_remove,
735 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
739 static int __init ar933x_uart_init(void)
743 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
744 ar933x_uart_driver.cons = &ar933x_uart_console;
747 ret = uart_register_driver(&ar933x_uart_driver);
751 ret = platform_driver_register(&ar933x_uart_platform_driver);
753 goto err_unregister_uart_driver;
757 err_unregister_uart_driver:
758 uart_unregister_driver(&ar933x_uart_driver);
763 static void __exit ar933x_uart_exit(void)
765 platform_driver_unregister(&ar933x_uart_platform_driver);
766 uart_unregister_driver(&ar933x_uart_driver);
769 module_init(ar933x_uart_init);
770 module_exit(ar933x_uart_exit);
772 MODULE_DESCRIPTION("Atheros AR933X UART driver");
773 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
774 MODULE_LICENSE("GPL v2");
775 MODULE_ALIAS("platform:" DRIVER_NAME);