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xhci: Properly handle COMP_2ND_BW_ERR
[android-x86/kernel.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29
30 #include "xhci.h"
31
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
34
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
39
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
41 /*
42  * handshake - spin reading hc until handshake completes or fails
43  * @ptr: address of hc register to be read
44  * @mask: bits to look at in result of read
45  * @done: value of those bits when handshake succeeds
46  * @usec: timeout in microseconds
47  *
48  * Returns negative errno, or zero on success
49  *
50  * Success happens when the "mask" bits have the specified value (hardware
51  * handshake done).  There are two failure modes:  "usec" have passed (major
52  * hardware flakeout), or the register reads as all-ones (hardware removed).
53  */
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55                       u32 mask, u32 done, int usec)
56 {
57         u32     result;
58
59         do {
60                 result = xhci_readl(xhci, ptr);
61                 if (result == ~(u32)0)          /* card removed */
62                         return -ENODEV;
63                 result &= mask;
64                 if (result == done)
65                         return 0;
66                 udelay(1);
67                 usec--;
68         } while (usec > 0);
69         return -ETIMEDOUT;
70 }
71
72 /*
73  * Disable interrupts and begin the xHCI halting process.
74  */
75 void xhci_quiesce(struct xhci_hcd *xhci)
76 {
77         u32 halted;
78         u32 cmd;
79         u32 mask;
80
81         mask = ~(XHCI_IRQS);
82         halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83         if (!halted)
84                 mask &= ~CMD_RUN;
85
86         cmd = xhci_readl(xhci, &xhci->op_regs->command);
87         cmd &= mask;
88         xhci_writel(xhci, cmd, &xhci->op_regs->command);
89 }
90
91 /*
92  * Force HC into halt state.
93  *
94  * Disable any IRQs and clear the run/stop bit.
95  * HC will complete any current and actively pipelined transactions, and
96  * should halt within 16 ms of the run/stop bit being cleared.
97  * Read HC Halted bit in the status register to see when the HC is finished.
98  */
99 int xhci_halt(struct xhci_hcd *xhci)
100 {
101         int ret;
102         xhci_dbg(xhci, "// Halt the HC\n");
103         xhci_quiesce(xhci);
104
105         ret = handshake(xhci, &xhci->op_regs->status,
106                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107         if (!ret)
108                 xhci->xhc_state |= XHCI_STATE_HALTED;
109         return ret;
110 }
111
112 /*
113  * Set the run bit and wait for the host to be running.
114  */
115 static int xhci_start(struct xhci_hcd *xhci)
116 {
117         u32 temp;
118         int ret;
119
120         temp = xhci_readl(xhci, &xhci->op_regs->command);
121         temp |= (CMD_RUN);
122         xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123                         temp);
124         xhci_writel(xhci, temp, &xhci->op_regs->command);
125
126         /*
127          * Wait for the HCHalted Status bit to be 0 to indicate the host is
128          * running.
129          */
130         ret = handshake(xhci, &xhci->op_regs->status,
131                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
132         if (ret == -ETIMEDOUT)
133                 xhci_err(xhci, "Host took too long to start, "
134                                 "waited %u microseconds.\n",
135                                 XHCI_MAX_HALT_USEC);
136         if (!ret)
137                 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138         return ret;
139 }
140
141 /*
142  * Reset a halted HC.
143  *
144  * This resets pipelines, timers, counters, state machines, etc.
145  * Transactions will be terminated immediately, and operational registers
146  * will be set to their defaults.
147  */
148 int xhci_reset(struct xhci_hcd *xhci)
149 {
150         u32 command;
151         u32 state;
152         int ret;
153
154         state = xhci_readl(xhci, &xhci->op_regs->status);
155         if ((state & STS_HALT) == 0) {
156                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157                 return 0;
158         }
159
160         xhci_dbg(xhci, "// Reset the HC\n");
161         command = xhci_readl(xhci, &xhci->op_regs->command);
162         command |= CMD_RESET;
163         xhci_writel(xhci, command, &xhci->op_regs->command);
164
165         ret = handshake(xhci, &xhci->op_regs->command,
166                         CMD_RESET, 0, 250 * 1000);
167         if (ret)
168                 return ret;
169
170         xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
171         /*
172          * xHCI cannot write to any doorbells or operational registers other
173          * than status until the "Controller Not Ready" flag is cleared.
174          */
175         return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
176 }
177
178 /*
179  * Free IRQs
180  * free all IRQs request
181  */
182 static void xhci_free_irq(struct xhci_hcd *xhci)
183 {
184         int i;
185         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
186
187         /* return if using legacy interrupt */
188         if (xhci_to_hcd(xhci)->irq >= 0)
189                 return;
190
191         if (xhci->msix_entries) {
192                 for (i = 0; i < xhci->msix_count; i++)
193                         if (xhci->msix_entries[i].vector)
194                                 free_irq(xhci->msix_entries[i].vector,
195                                                 xhci_to_hcd(xhci));
196         } else if (pdev->irq >= 0)
197                 free_irq(pdev->irq, xhci_to_hcd(xhci));
198
199         return;
200 }
201
202 /*
203  * Set up MSI
204  */
205 static int xhci_setup_msi(struct xhci_hcd *xhci)
206 {
207         int ret;
208         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
209
210         ret = pci_enable_msi(pdev);
211         if (ret) {
212                 xhci_err(xhci, "failed to allocate MSI entry\n");
213                 return ret;
214         }
215
216         ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
217                                 0, "xhci_hcd", xhci_to_hcd(xhci));
218         if (ret) {
219                 xhci_err(xhci, "disable MSI interrupt\n");
220                 pci_disable_msi(pdev);
221         }
222
223         return ret;
224 }
225
226 /*
227  * Set up MSI-X
228  */
229 static int xhci_setup_msix(struct xhci_hcd *xhci)
230 {
231         int i, ret = 0;
232         struct usb_hcd *hcd = xhci_to_hcd(xhci);
233         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
234
235         /*
236          * calculate number of msi-x vectors supported.
237          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
238          *   with max number of interrupters based on the xhci HCSPARAMS1.
239          * - num_online_cpus: maximum msi-x vectors per CPUs core.
240          *   Add additional 1 vector to ensure always available interrupt.
241          */
242         xhci->msix_count = min(num_online_cpus() + 1,
243                                 HCS_MAX_INTRS(xhci->hcs_params1));
244
245         xhci->msix_entries =
246                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
247                                 GFP_KERNEL);
248         if (!xhci->msix_entries) {
249                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
250                 return -ENOMEM;
251         }
252
253         for (i = 0; i < xhci->msix_count; i++) {
254                 xhci->msix_entries[i].entry = i;
255                 xhci->msix_entries[i].vector = 0;
256         }
257
258         ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
259         if (ret) {
260                 xhci_err(xhci, "Failed to enable MSI-X\n");
261                 goto free_entries;
262         }
263
264         for (i = 0; i < xhci->msix_count; i++) {
265                 ret = request_irq(xhci->msix_entries[i].vector,
266                                 (irq_handler_t)xhci_msi_irq,
267                                 0, "xhci_hcd", xhci_to_hcd(xhci));
268                 if (ret)
269                         goto disable_msix;
270         }
271
272         hcd->msix_enabled = 1;
273         return ret;
274
275 disable_msix:
276         xhci_err(xhci, "disable MSI-X interrupt\n");
277         xhci_free_irq(xhci);
278         pci_disable_msix(pdev);
279 free_entries:
280         kfree(xhci->msix_entries);
281         xhci->msix_entries = NULL;
282         return ret;
283 }
284
285 /* Free any IRQs and disable MSI-X */
286 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
287 {
288         struct usb_hcd *hcd = xhci_to_hcd(xhci);
289         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
290
291         xhci_free_irq(xhci);
292
293         if (xhci->msix_entries) {
294                 pci_disable_msix(pdev);
295                 kfree(xhci->msix_entries);
296                 xhci->msix_entries = NULL;
297         } else {
298                 pci_disable_msi(pdev);
299         }
300
301         hcd->msix_enabled = 0;
302         return;
303 }
304
305 /*
306  * Initialize memory for HCD and xHC (one-time init).
307  *
308  * Program the PAGESIZE register, initialize the device context array, create
309  * device contexts (?), set up a command ring segment (or two?), create event
310  * ring (one for now).
311  */
312 int xhci_init(struct usb_hcd *hcd)
313 {
314         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
315         int retval = 0;
316
317         xhci_dbg(xhci, "xhci_init\n");
318         spin_lock_init(&xhci->lock);
319         if (link_quirk) {
320                 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
321                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
322         } else {
323                 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
324         }
325         retval = xhci_mem_init(xhci, GFP_KERNEL);
326         xhci_dbg(xhci, "Finished xhci_init\n");
327
328         return retval;
329 }
330
331 /*-------------------------------------------------------------------------*/
332
333
334 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
335 static void xhci_event_ring_work(unsigned long arg)
336 {
337         unsigned long flags;
338         int temp;
339         u64 temp_64;
340         struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
341         int i, j;
342
343         xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
344
345         spin_lock_irqsave(&xhci->lock, flags);
346         temp = xhci_readl(xhci, &xhci->op_regs->status);
347         xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
348         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
349                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
350                 xhci_dbg(xhci, "HW died, polling stopped.\n");
351                 spin_unlock_irqrestore(&xhci->lock, flags);
352                 return;
353         }
354
355         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
356         xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
357         xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
358         xhci->error_bitmask = 0;
359         xhci_dbg(xhci, "Event ring:\n");
360         xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
361         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
362         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
363         temp_64 &= ~ERST_PTR_MASK;
364         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
365         xhci_dbg(xhci, "Command ring:\n");
366         xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
367         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
368         xhci_dbg_cmd_ptrs(xhci);
369         for (i = 0; i < MAX_HC_SLOTS; ++i) {
370                 if (!xhci->devs[i])
371                         continue;
372                 for (j = 0; j < 31; ++j) {
373                         xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
374                 }
375         }
376         spin_unlock_irqrestore(&xhci->lock, flags);
377
378         if (!xhci->zombie)
379                 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
380         else
381                 xhci_dbg(xhci, "Quit polling the event ring.\n");
382 }
383 #endif
384
385 static int xhci_run_finished(struct xhci_hcd *xhci)
386 {
387         if (xhci_start(xhci)) {
388                 xhci_halt(xhci);
389                 return -ENODEV;
390         }
391         xhci->shared_hcd->state = HC_STATE_RUNNING;
392
393         if (xhci->quirks & XHCI_NEC_HOST)
394                 xhci_ring_cmd_db(xhci);
395
396         xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
397         return 0;
398 }
399
400 /*
401  * Start the HC after it was halted.
402  *
403  * This function is called by the USB core when the HC driver is added.
404  * Its opposite is xhci_stop().
405  *
406  * xhci_init() must be called once before this function can be called.
407  * Reset the HC, enable device slot contexts, program DCBAAP, and
408  * set command ring pointer and event ring pointer.
409  *
410  * Setup MSI-X vectors and enable interrupts.
411  */
412 int xhci_run(struct usb_hcd *hcd)
413 {
414         u32 temp;
415         u64 temp_64;
416         u32 ret;
417         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
418         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
419
420         /* Start the xHCI host controller running only after the USB 2.0 roothub
421          * is setup.
422          */
423
424         hcd->uses_new_polling = 1;
425         if (!usb_hcd_is_primary_hcd(hcd))
426                 return xhci_run_finished(xhci);
427
428         xhci_dbg(xhci, "xhci_run\n");
429         /* unregister the legacy interrupt */
430         if (hcd->irq)
431                 free_irq(hcd->irq, hcd);
432         hcd->irq = -1;
433
434         /* Some Fresco Logic host controllers advertise MSI, but fail to
435          * generate interrupts.  Don't even try to enable MSI.
436          */
437         if (xhci->quirks & XHCI_BROKEN_MSI)
438                 goto legacy_irq;
439
440         ret = xhci_setup_msix(xhci);
441         if (ret)
442                 /* fall back to msi*/
443                 ret = xhci_setup_msi(xhci);
444
445         if (ret) {
446 legacy_irq:
447                 /* fall back to legacy interrupt*/
448                 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
449                                         hcd->irq_descr, hcd);
450                 if (ret) {
451                         xhci_err(xhci, "request interrupt %d failed\n",
452                                         pdev->irq);
453                         return ret;
454                 }
455                 hcd->irq = pdev->irq;
456         }
457
458 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
459         init_timer(&xhci->event_ring_timer);
460         xhci->event_ring_timer.data = (unsigned long) xhci;
461         xhci->event_ring_timer.function = xhci_event_ring_work;
462         /* Poll the event ring */
463         xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
464         xhci->zombie = 0;
465         xhci_dbg(xhci, "Setting event ring polling timer\n");
466         add_timer(&xhci->event_ring_timer);
467 #endif
468
469         xhci_dbg(xhci, "Command ring memory map follows:\n");
470         xhci_debug_ring(xhci, xhci->cmd_ring);
471         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
472         xhci_dbg_cmd_ptrs(xhci);
473
474         xhci_dbg(xhci, "ERST memory map follows:\n");
475         xhci_dbg_erst(xhci, &xhci->erst);
476         xhci_dbg(xhci, "Event ring:\n");
477         xhci_debug_ring(xhci, xhci->event_ring);
478         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
479         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
480         temp_64 &= ~ERST_PTR_MASK;
481         xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
482
483         xhci_dbg(xhci, "// Set the interrupt modulation register\n");
484         temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
485         temp &= ~ER_IRQ_INTERVAL_MASK;
486         temp |= (u32) 160;
487         xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
488
489         /* Set the HCD state before we enable the irqs */
490         temp = xhci_readl(xhci, &xhci->op_regs->command);
491         temp |= (CMD_EIE);
492         xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
493                         temp);
494         xhci_writel(xhci, temp, &xhci->op_regs->command);
495
496         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
497         xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
498                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
499         xhci_writel(xhci, ER_IRQ_ENABLE(temp),
500                         &xhci->ir_set->irq_pending);
501         xhci_print_ir_set(xhci, 0);
502
503         if (xhci->quirks & XHCI_NEC_HOST)
504                 xhci_queue_vendor_command(xhci, 0, 0, 0,
505                                 TRB_TYPE(TRB_NEC_GET_FW));
506
507         xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
508         return 0;
509 }
510
511 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
512 {
513         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
514
515         spin_lock_irq(&xhci->lock);
516         xhci_halt(xhci);
517
518         /* The shared_hcd is going to be deallocated shortly (the USB core only
519          * calls this function when allocation fails in usb_add_hcd(), or
520          * usb_remove_hcd() is called).  So we need to unset xHCI's pointer.
521          */
522         xhci->shared_hcd = NULL;
523         spin_unlock_irq(&xhci->lock);
524 }
525
526 /*
527  * Stop xHCI driver.
528  *
529  * This function is called by the USB core when the HC driver is removed.
530  * Its opposite is xhci_run().
531  *
532  * Disable device contexts, disable IRQs, and quiesce the HC.
533  * Reset the HC, finish any completed transactions, and cleanup memory.
534  */
535 void xhci_stop(struct usb_hcd *hcd)
536 {
537         u32 temp;
538         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
539
540         if (!usb_hcd_is_primary_hcd(hcd)) {
541                 xhci_only_stop_hcd(xhci->shared_hcd);
542                 return;
543         }
544
545         spin_lock_irq(&xhci->lock);
546         /* Make sure the xHC is halted for a USB3 roothub
547          * (xhci_stop() could be called as part of failed init).
548          */
549         xhci_halt(xhci);
550         xhci_reset(xhci);
551         spin_unlock_irq(&xhci->lock);
552
553         xhci_cleanup_msix(xhci);
554
555 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
556         /* Tell the event ring poll function not to reschedule */
557         xhci->zombie = 1;
558         del_timer_sync(&xhci->event_ring_timer);
559 #endif
560
561         if (xhci->quirks & XHCI_AMD_PLL_FIX)
562                 usb_amd_dev_put();
563
564         xhci_dbg(xhci, "// Disabling event ring interrupts\n");
565         temp = xhci_readl(xhci, &xhci->op_regs->status);
566         xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
567         temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
568         xhci_writel(xhci, ER_IRQ_DISABLE(temp),
569                         &xhci->ir_set->irq_pending);
570         xhci_print_ir_set(xhci, 0);
571
572         xhci_dbg(xhci, "cleaning up memory\n");
573         xhci_mem_cleanup(xhci);
574         xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
575                     xhci_readl(xhci, &xhci->op_regs->status));
576 }
577
578 /*
579  * Shutdown HC (not bus-specific)
580  *
581  * This is called when the machine is rebooting or halting.  We assume that the
582  * machine will be powered off, and the HC's internal state will be reset.
583  * Don't bother to free memory.
584  *
585  * This will only ever be called with the main usb_hcd (the USB3 roothub).
586  */
587 void xhci_shutdown(struct usb_hcd *hcd)
588 {
589         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
590
591         spin_lock_irq(&xhci->lock);
592         xhci_halt(xhci);
593         spin_unlock_irq(&xhci->lock);
594
595         xhci_cleanup_msix(xhci);
596
597         xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
598                     xhci_readl(xhci, &xhci->op_regs->status));
599 }
600
601 #ifdef CONFIG_PM
602 static void xhci_save_registers(struct xhci_hcd *xhci)
603 {
604         xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
605         xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
606         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
607         xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
608         xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
609         xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
610         xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
611         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
612         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
613 }
614
615 static void xhci_restore_registers(struct xhci_hcd *xhci)
616 {
617         xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
618         xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
619         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
620         xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
621         xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
622         xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
623         xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
624         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
625 }
626
627 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
628 {
629         u64     val_64;
630
631         /* step 2: initialize command ring buffer */
632         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
633         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
634                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
635                                       xhci->cmd_ring->dequeue) &
636                  (u64) ~CMD_RING_RSVD_BITS) |
637                 xhci->cmd_ring->cycle_state;
638         xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
639                         (long unsigned long) val_64);
640         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
641 }
642
643 /*
644  * The whole command ring must be cleared to zero when we suspend the host.
645  *
646  * The host doesn't save the command ring pointer in the suspend well, so we
647  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
648  * aligned, because of the reserved bits in the command ring dequeue pointer
649  * register.  Therefore, we can't just set the dequeue pointer back in the
650  * middle of the ring (TRBs are 16-byte aligned).
651  */
652 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
653 {
654         struct xhci_ring *ring;
655         struct xhci_segment *seg;
656
657         ring = xhci->cmd_ring;
658         seg = ring->deq_seg;
659         do {
660                 memset(seg->trbs, 0,
661                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
662                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
663                         cpu_to_le32(~TRB_CYCLE);
664                 seg = seg->next;
665         } while (seg != ring->deq_seg);
666
667         /* Reset the software enqueue and dequeue pointers */
668         ring->deq_seg = ring->first_seg;
669         ring->dequeue = ring->first_seg->trbs;
670         ring->enq_seg = ring->deq_seg;
671         ring->enqueue = ring->dequeue;
672
673         /*
674          * Ring is now zeroed, so the HW should look for change of ownership
675          * when the cycle bit is set to 1.
676          */
677         ring->cycle_state = 1;
678
679         /*
680          * Reset the hardware dequeue pointer.
681          * Yes, this will need to be re-written after resume, but we're paranoid
682          * and want to make sure the hardware doesn't access bogus memory
683          * because, say, the BIOS or an SMI started the host without changing
684          * the command ring pointers.
685          */
686         xhci_set_cmd_ring_deq(xhci);
687 }
688
689 /*
690  * Stop HC (not bus-specific)
691  *
692  * This is called when the machine transition into S3/S4 mode.
693  *
694  */
695 int xhci_suspend(struct xhci_hcd *xhci)
696 {
697         int                     rc = 0;
698         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
699         u32                     command;
700         int                     i;
701
702         spin_lock_irq(&xhci->lock);
703         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
704         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
705         /* step 1: stop endpoint */
706         /* skipped assuming that port suspend has done */
707
708         /* step 2: clear Run/Stop bit */
709         command = xhci_readl(xhci, &xhci->op_regs->command);
710         command &= ~CMD_RUN;
711         xhci_writel(xhci, command, &xhci->op_regs->command);
712         if (handshake(xhci, &xhci->op_regs->status,
713                       STS_HALT, STS_HALT, 100*100)) {
714                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
715                 spin_unlock_irq(&xhci->lock);
716                 return -ETIMEDOUT;
717         }
718         xhci_clear_command_ring(xhci);
719
720         /* step 3: save registers */
721         xhci_save_registers(xhci);
722
723         /* step 4: set CSS flag */
724         command = xhci_readl(xhci, &xhci->op_regs->command);
725         command |= CMD_CSS;
726         xhci_writel(xhci, command, &xhci->op_regs->command);
727         if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
728                 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
729                 spin_unlock_irq(&xhci->lock);
730                 return -ETIMEDOUT;
731         }
732         spin_unlock_irq(&xhci->lock);
733
734         /* step 5: remove core well power */
735         /* synchronize irq when using MSI-X */
736         if (xhci->msix_entries) {
737                 for (i = 0; i < xhci->msix_count; i++)
738                         synchronize_irq(xhci->msix_entries[i].vector);
739         }
740
741         return rc;
742 }
743
744 /*
745  * start xHC (not bus-specific)
746  *
747  * This is called when the machine transition from S3/S4 mode.
748  *
749  */
750 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
751 {
752         u32                     command, temp = 0;
753         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
754         struct usb_hcd          *secondary_hcd;
755         int                     retval = 0;
756
757         /* Wait a bit if either of the roothubs need to settle from the
758          * transition into bus suspend.
759          */
760         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
761                         time_before(jiffies,
762                                 xhci->bus_state[1].next_statechange))
763                 msleep(100);
764
765         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
766         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
767
768         spin_lock_irq(&xhci->lock);
769         if (xhci->quirks & XHCI_RESET_ON_RESUME)
770                 hibernated = true;
771
772         if (!hibernated) {
773                 /* step 1: restore register */
774                 xhci_restore_registers(xhci);
775                 /* step 2: initialize command ring buffer */
776                 xhci_set_cmd_ring_deq(xhci);
777                 /* step 3: restore state and start state*/
778                 /* step 3: set CRS flag */
779                 command = xhci_readl(xhci, &xhci->op_regs->command);
780                 command |= CMD_CRS;
781                 xhci_writel(xhci, command, &xhci->op_regs->command);
782                 if (handshake(xhci, &xhci->op_regs->status,
783                               STS_RESTORE, 0, 10*100)) {
784                         xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
785                         spin_unlock_irq(&xhci->lock);
786                         return -ETIMEDOUT;
787                 }
788                 temp = xhci_readl(xhci, &xhci->op_regs->status);
789         }
790
791         /* If restore operation fails, re-initialize the HC during resume */
792         if ((temp & STS_SRE) || hibernated) {
793                 /* Let the USB core know _both_ roothubs lost power. */
794                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
795                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
796
797                 xhci_dbg(xhci, "Stop HCD\n");
798                 xhci_halt(xhci);
799                 xhci_reset(xhci);
800                 spin_unlock_irq(&xhci->lock);
801                 xhci_cleanup_msix(xhci);
802
803 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
804                 /* Tell the event ring poll function not to reschedule */
805                 xhci->zombie = 1;
806                 del_timer_sync(&xhci->event_ring_timer);
807 #endif
808
809                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
810                 temp = xhci_readl(xhci, &xhci->op_regs->status);
811                 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
812                 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
813                 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
814                                 &xhci->ir_set->irq_pending);
815                 xhci_print_ir_set(xhci, 0);
816
817                 xhci_dbg(xhci, "cleaning up memory\n");
818                 xhci_mem_cleanup(xhci);
819                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
820                             xhci_readl(xhci, &xhci->op_regs->status));
821
822                 /* USB core calls the PCI reinit and start functions twice:
823                  * first with the primary HCD, and then with the secondary HCD.
824                  * If we don't do the same, the host will never be started.
825                  */
826                 if (!usb_hcd_is_primary_hcd(hcd))
827                         secondary_hcd = hcd;
828                 else
829                         secondary_hcd = xhci->shared_hcd;
830
831                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
832                 retval = xhci_init(hcd->primary_hcd);
833                 if (retval)
834                         return retval;
835                 xhci_dbg(xhci, "Start the primary HCD\n");
836                 retval = xhci_run(hcd->primary_hcd);
837                 if (!retval) {
838                         xhci_dbg(xhci, "Start the secondary HCD\n");
839                         retval = xhci_run(secondary_hcd);
840                 }
841                 hcd->state = HC_STATE_SUSPENDED;
842                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
843                 goto done;
844         }
845
846         /* step 4: set Run/Stop bit */
847         command = xhci_readl(xhci, &xhci->op_regs->command);
848         command |= CMD_RUN;
849         xhci_writel(xhci, command, &xhci->op_regs->command);
850         handshake(xhci, &xhci->op_regs->status, STS_HALT,
851                   0, 250 * 1000);
852
853         /* step 5: walk topology and initialize portsc,
854          * portpmsc and portli
855          */
856         /* this is done in bus_resume */
857
858         /* step 6: restart each of the previously
859          * Running endpoints by ringing their doorbells
860          */
861
862         spin_unlock_irq(&xhci->lock);
863
864  done:
865         if (retval == 0) {
866                 usb_hcd_resume_root_hub(hcd);
867                 usb_hcd_resume_root_hub(xhci->shared_hcd);
868         }
869         return retval;
870 }
871 #endif  /* CONFIG_PM */
872
873 /*-------------------------------------------------------------------------*/
874
875 /**
876  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
877  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
878  * value to right shift 1 for the bitmask.
879  *
880  * Index  = (epnum * 2) + direction - 1,
881  * where direction = 0 for OUT, 1 for IN.
882  * For control endpoints, the IN index is used (OUT index is unused), so
883  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
884  */
885 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
886 {
887         unsigned int index;
888         if (usb_endpoint_xfer_control(desc))
889                 index = (unsigned int) (usb_endpoint_num(desc)*2);
890         else
891                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
892                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
893         return index;
894 }
895
896 /* Find the flag for this endpoint (for use in the control context).  Use the
897  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
898  * bit 1, etc.
899  */
900 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
901 {
902         return 1 << (xhci_get_endpoint_index(desc) + 1);
903 }
904
905 /* Find the flag for this endpoint (for use in the control context).  Use the
906  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
907  * bit 1, etc.
908  */
909 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
910 {
911         return 1 << (ep_index + 1);
912 }
913
914 /* Compute the last valid endpoint context index.  Basically, this is the
915  * endpoint index plus one.  For slot contexts with more than valid endpoint,
916  * we find the most significant bit set in the added contexts flags.
917  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
918  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
919  */
920 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
921 {
922         return fls(added_ctxs) - 1;
923 }
924
925 /* Returns 1 if the arguments are OK;
926  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
927  */
928 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
929                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
930                 const char *func) {
931         struct xhci_hcd *xhci;
932         struct xhci_virt_device *virt_dev;
933
934         if (!hcd || (check_ep && !ep) || !udev) {
935                 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
936                                 func);
937                 return -EINVAL;
938         }
939         if (!udev->parent) {
940                 printk(KERN_DEBUG "xHCI %s called for root hub\n",
941                                 func);
942                 return 0;
943         }
944
945         xhci = hcd_to_xhci(hcd);
946         if (xhci->xhc_state & XHCI_STATE_HALTED)
947                 return -ENODEV;
948
949         if (check_virt_dev) {
950                 if (!udev->slot_id || !xhci->devs
951                         || !xhci->devs[udev->slot_id]) {
952                         printk(KERN_DEBUG "xHCI %s called with unaddressed "
953                                                 "device\n", func);
954                         return -EINVAL;
955                 }
956
957                 virt_dev = xhci->devs[udev->slot_id];
958                 if (virt_dev->udev != udev) {
959                         printk(KERN_DEBUG "xHCI %s called with udev and "
960                                           "virt_dev does not match\n", func);
961                         return -EINVAL;
962                 }
963         }
964
965         return 1;
966 }
967
968 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
969                 struct usb_device *udev, struct xhci_command *command,
970                 bool ctx_change, bool must_succeed);
971
972 /*
973  * Full speed devices may have a max packet size greater than 8 bytes, but the
974  * USB core doesn't know that until it reads the first 8 bytes of the
975  * descriptor.  If the usb_device's max packet size changes after that point,
976  * we need to issue an evaluate context command and wait on it.
977  */
978 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
979                 unsigned int ep_index, struct urb *urb)
980 {
981         struct xhci_container_ctx *in_ctx;
982         struct xhci_container_ctx *out_ctx;
983         struct xhci_input_control_ctx *ctrl_ctx;
984         struct xhci_ep_ctx *ep_ctx;
985         int max_packet_size;
986         int hw_max_packet_size;
987         int ret = 0;
988
989         out_ctx = xhci->devs[slot_id]->out_ctx;
990         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
991         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
992         max_packet_size = le16_to_cpu(urb->dev->ep0.desc.wMaxPacketSize);
993         if (hw_max_packet_size != max_packet_size) {
994                 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
995                 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
996                                 max_packet_size);
997                 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
998                                 hw_max_packet_size);
999                 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1000
1001                 /* Set up the modified control endpoint 0 */
1002                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1003                                 xhci->devs[slot_id]->out_ctx, ep_index);
1004                 in_ctx = xhci->devs[slot_id]->in_ctx;
1005                 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1006                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1007                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1008
1009                 /* Set up the input context flags for the command */
1010                 /* FIXME: This won't work if a non-default control endpoint
1011                  * changes max packet sizes.
1012                  */
1013                 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1014                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1015                 ctrl_ctx->drop_flags = 0;
1016
1017                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1018                 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1019                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1020                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1021
1022                 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1023                                 true, false);
1024
1025                 /* Clean up the input context for later use by bandwidth
1026                  * functions.
1027                  */
1028                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1029         }
1030         return ret;
1031 }
1032
1033 /*
1034  * non-error returns are a promise to giveback() the urb later
1035  * we drop ownership so next owner (or urb unlink) can get it
1036  */
1037 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1038 {
1039         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1040         unsigned long flags;
1041         int ret = 0;
1042         unsigned int slot_id, ep_index;
1043         struct urb_priv *urb_priv;
1044         int size, i;
1045
1046         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1047                                         true, true, __func__) <= 0)
1048                 return -EINVAL;
1049
1050         slot_id = urb->dev->slot_id;
1051         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1052
1053         if (!HCD_HW_ACCESSIBLE(hcd)) {
1054                 if (!in_interrupt())
1055                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1056                 ret = -ESHUTDOWN;
1057                 goto exit;
1058         }
1059
1060         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1061                 size = urb->number_of_packets;
1062         else
1063                 size = 1;
1064
1065         urb_priv = kzalloc(sizeof(struct urb_priv) +
1066                                   size * sizeof(struct xhci_td *), mem_flags);
1067         if (!urb_priv)
1068                 return -ENOMEM;
1069
1070         for (i = 0; i < size; i++) {
1071                 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1072                 if (!urb_priv->td[i]) {
1073                         urb_priv->length = i;
1074                         xhci_urb_free_priv(xhci, urb_priv);
1075                         return -ENOMEM;
1076                 }
1077         }
1078
1079         urb_priv->length = size;
1080         urb_priv->td_cnt = 0;
1081         urb->hcpriv = urb_priv;
1082
1083         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1084                 /* Check to see if the max packet size for the default control
1085                  * endpoint changed during FS device enumeration
1086                  */
1087                 if (urb->dev->speed == USB_SPEED_FULL) {
1088                         ret = xhci_check_maxpacket(xhci, slot_id,
1089                                         ep_index, urb);
1090                         if (ret < 0) {
1091                                 xhci_urb_free_priv(xhci, urb_priv);
1092                                 urb->hcpriv = NULL;
1093                                 return ret;
1094                         }
1095                 }
1096
1097                 /* We have a spinlock and interrupts disabled, so we must pass
1098                  * atomic context to this function, which may allocate memory.
1099                  */
1100                 spin_lock_irqsave(&xhci->lock, flags);
1101                 if (xhci->xhc_state & XHCI_STATE_DYING)
1102                         goto dying;
1103                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1104                                 slot_id, ep_index);
1105                 if (ret)
1106                         goto free_priv;
1107                 spin_unlock_irqrestore(&xhci->lock, flags);
1108         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1109                 spin_lock_irqsave(&xhci->lock, flags);
1110                 if (xhci->xhc_state & XHCI_STATE_DYING)
1111                         goto dying;
1112                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1113                                 EP_GETTING_STREAMS) {
1114                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1115                                         "is transitioning to using streams.\n");
1116                         ret = -EINVAL;
1117                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1118                                 EP_GETTING_NO_STREAMS) {
1119                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1120                                         "is transitioning to "
1121                                         "not having streams.\n");
1122                         ret = -EINVAL;
1123                 } else {
1124                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1125                                         slot_id, ep_index);
1126                 }
1127                 if (ret)
1128                         goto free_priv;
1129                 spin_unlock_irqrestore(&xhci->lock, flags);
1130         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1131                 spin_lock_irqsave(&xhci->lock, flags);
1132                 if (xhci->xhc_state & XHCI_STATE_DYING)
1133                         goto dying;
1134                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1135                                 slot_id, ep_index);
1136                 if (ret)
1137                         goto free_priv;
1138                 spin_unlock_irqrestore(&xhci->lock, flags);
1139         } else {
1140                 spin_lock_irqsave(&xhci->lock, flags);
1141                 if (xhci->xhc_state & XHCI_STATE_DYING)
1142                         goto dying;
1143                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1144                                 slot_id, ep_index);
1145                 if (ret)
1146                         goto free_priv;
1147                 spin_unlock_irqrestore(&xhci->lock, flags);
1148         }
1149 exit:
1150         return ret;
1151 dying:
1152         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1153                         "non-responsive xHCI host.\n",
1154                         urb->ep->desc.bEndpointAddress, urb);
1155         ret = -ESHUTDOWN;
1156 free_priv:
1157         xhci_urb_free_priv(xhci, urb_priv);
1158         urb->hcpriv = NULL;
1159         spin_unlock_irqrestore(&xhci->lock, flags);
1160         return ret;
1161 }
1162
1163 /* Get the right ring for the given URB.
1164  * If the endpoint supports streams, boundary check the URB's stream ID.
1165  * If the endpoint doesn't support streams, return the singular endpoint ring.
1166  */
1167 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1168                 struct urb *urb)
1169 {
1170         unsigned int slot_id;
1171         unsigned int ep_index;
1172         unsigned int stream_id;
1173         struct xhci_virt_ep *ep;
1174
1175         slot_id = urb->dev->slot_id;
1176         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1177         stream_id = urb->stream_id;
1178         ep = &xhci->devs[slot_id]->eps[ep_index];
1179         /* Common case: no streams */
1180         if (!(ep->ep_state & EP_HAS_STREAMS))
1181                 return ep->ring;
1182
1183         if (stream_id == 0) {
1184                 xhci_warn(xhci,
1185                                 "WARN: Slot ID %u, ep index %u has streams, "
1186                                 "but URB has no stream ID.\n",
1187                                 slot_id, ep_index);
1188                 return NULL;
1189         }
1190
1191         if (stream_id < ep->stream_info->num_streams)
1192                 return ep->stream_info->stream_rings[stream_id];
1193
1194         xhci_warn(xhci,
1195                         "WARN: Slot ID %u, ep index %u has "
1196                         "stream IDs 1 to %u allocated, "
1197                         "but stream ID %u is requested.\n",
1198                         slot_id, ep_index,
1199                         ep->stream_info->num_streams - 1,
1200                         stream_id);
1201         return NULL;
1202 }
1203
1204 /*
1205  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1206  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1207  * should pick up where it left off in the TD, unless a Set Transfer Ring
1208  * Dequeue Pointer is issued.
1209  *
1210  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1211  * the ring.  Since the ring is a contiguous structure, they can't be physically
1212  * removed.  Instead, there are two options:
1213  *
1214  *  1) If the HC is in the middle of processing the URB to be canceled, we
1215  *     simply move the ring's dequeue pointer past those TRBs using the Set
1216  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1217  *     when drivers timeout on the last submitted URB and attempt to cancel.
1218  *
1219  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1220  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1221  *     HC will need to invalidate the any TRBs it has cached after the stop
1222  *     endpoint command, as noted in the xHCI 0.95 errata.
1223  *
1224  *  3) The TD may have completed by the time the Stop Endpoint Command
1225  *     completes, so software needs to handle that case too.
1226  *
1227  * This function should protect against the TD enqueueing code ringing the
1228  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1229  * It also needs to account for multiple cancellations on happening at the same
1230  * time for the same endpoint.
1231  *
1232  * Note that this function can be called in any context, or so says
1233  * usb_hcd_unlink_urb()
1234  */
1235 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1236 {
1237         unsigned long flags;
1238         int ret, i;
1239         u32 temp;
1240         struct xhci_hcd *xhci;
1241         struct urb_priv *urb_priv;
1242         struct xhci_td *td;
1243         unsigned int ep_index;
1244         struct xhci_ring *ep_ring;
1245         struct xhci_virt_ep *ep;
1246
1247         xhci = hcd_to_xhci(hcd);
1248         spin_lock_irqsave(&xhci->lock, flags);
1249         /* Make sure the URB hasn't completed or been unlinked already */
1250         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1251         if (ret || !urb->hcpriv)
1252                 goto done;
1253         temp = xhci_readl(xhci, &xhci->op_regs->status);
1254         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1255                 xhci_dbg(xhci, "HW died, freeing TD.\n");
1256                 urb_priv = urb->hcpriv;
1257                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1258                         td = urb_priv->td[i];
1259                         if (!list_empty(&td->td_list))
1260                                 list_del_init(&td->td_list);
1261                         if (!list_empty(&td->cancelled_td_list))
1262                                 list_del_init(&td->cancelled_td_list);
1263                 }
1264
1265                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1266                 spin_unlock_irqrestore(&xhci->lock, flags);
1267                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1268                 xhci_urb_free_priv(xhci, urb_priv);
1269                 return ret;
1270         }
1271         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1272                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1273                 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1274                                 "non-responsive xHCI host.\n",
1275                                 urb->ep->desc.bEndpointAddress, urb);
1276                 /* Let the stop endpoint command watchdog timer (which set this
1277                  * state) finish cleaning up the endpoint TD lists.  We must
1278                  * have caught it in the middle of dropping a lock and giving
1279                  * back an URB.
1280                  */
1281                 goto done;
1282         }
1283
1284         xhci_dbg(xhci, "Cancel URB %p\n", urb);
1285         xhci_dbg(xhci, "Event ring:\n");
1286         xhci_debug_ring(xhci, xhci->event_ring);
1287         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1288         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1289         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1290         if (!ep_ring) {
1291                 ret = -EINVAL;
1292                 goto done;
1293         }
1294
1295         xhci_dbg(xhci, "Endpoint ring:\n");
1296         xhci_debug_ring(xhci, ep_ring);
1297
1298         urb_priv = urb->hcpriv;
1299
1300         for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1301                 td = urb_priv->td[i];
1302                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1303         }
1304
1305         /* Queue a stop endpoint command, but only if this is
1306          * the first cancellation to be handled.
1307          */
1308         if (!(ep->ep_state & EP_HALT_PENDING)) {
1309                 ep->ep_state |= EP_HALT_PENDING;
1310                 ep->stop_cmds_pending++;
1311                 ep->stop_cmd_timer.expires = jiffies +
1312                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1313                 add_timer(&ep->stop_cmd_timer);
1314                 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1315                 xhci_ring_cmd_db(xhci);
1316         }
1317 done:
1318         spin_unlock_irqrestore(&xhci->lock, flags);
1319         return ret;
1320 }
1321
1322 /* Drop an endpoint from a new bandwidth configuration for this device.
1323  * Only one call to this function is allowed per endpoint before
1324  * check_bandwidth() or reset_bandwidth() must be called.
1325  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1326  * add the endpoint to the schedule with possibly new parameters denoted by a
1327  * different endpoint descriptor in usb_host_endpoint.
1328  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1329  * not allowed.
1330  *
1331  * The USB core will not allow URBs to be queued to an endpoint that is being
1332  * disabled, so there's no need for mutual exclusion to protect
1333  * the xhci->devs[slot_id] structure.
1334  */
1335 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1336                 struct usb_host_endpoint *ep)
1337 {
1338         struct xhci_hcd *xhci;
1339         struct xhci_container_ctx *in_ctx, *out_ctx;
1340         struct xhci_input_control_ctx *ctrl_ctx;
1341         struct xhci_slot_ctx *slot_ctx;
1342         unsigned int last_ctx;
1343         unsigned int ep_index;
1344         struct xhci_ep_ctx *ep_ctx;
1345         u32 drop_flag;
1346         u32 new_add_flags, new_drop_flags, new_slot_info;
1347         int ret;
1348
1349         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1350         if (ret <= 0)
1351                 return ret;
1352         xhci = hcd_to_xhci(hcd);
1353         if (xhci->xhc_state & XHCI_STATE_DYING)
1354                 return -ENODEV;
1355
1356         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1357         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1358         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1359                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1360                                 __func__, drop_flag);
1361                 return 0;
1362         }
1363
1364         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1365         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1366         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1367         ep_index = xhci_get_endpoint_index(&ep->desc);
1368         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1369         /* If the HC already knows the endpoint is disabled,
1370          * or the HCD has noted it is disabled, ignore this request
1371          */
1372         if ((le32_to_cpu(ep_ctx->ep_info) & EP_STATE_MASK) ==
1373             EP_STATE_DISABLED ||
1374             le32_to_cpu(ctrl_ctx->drop_flags) &
1375             xhci_get_endpoint_flag(&ep->desc)) {
1376                 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1377                                 __func__, ep);
1378                 return 0;
1379         }
1380
1381         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1382         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1383
1384         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1385         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1386
1387         last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1388         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1389         /* Update the last valid endpoint context, if we deleted the last one */
1390         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1391             LAST_CTX(last_ctx)) {
1392                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1393                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1394         }
1395         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1396
1397         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1398
1399         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1400                         (unsigned int) ep->desc.bEndpointAddress,
1401                         udev->slot_id,
1402                         (unsigned int) new_drop_flags,
1403                         (unsigned int) new_add_flags,
1404                         (unsigned int) new_slot_info);
1405         return 0;
1406 }
1407
1408 /* Add an endpoint to a new possible bandwidth configuration for this device.
1409  * Only one call to this function is allowed per endpoint before
1410  * check_bandwidth() or reset_bandwidth() must be called.
1411  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1412  * add the endpoint to the schedule with possibly new parameters denoted by a
1413  * different endpoint descriptor in usb_host_endpoint.
1414  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1415  * not allowed.
1416  *
1417  * The USB core will not allow URBs to be queued to an endpoint until the
1418  * configuration or alt setting is installed in the device, so there's no need
1419  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1420  */
1421 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1422                 struct usb_host_endpoint *ep)
1423 {
1424         struct xhci_hcd *xhci;
1425         struct xhci_container_ctx *in_ctx, *out_ctx;
1426         unsigned int ep_index;
1427         struct xhci_ep_ctx *ep_ctx;
1428         struct xhci_slot_ctx *slot_ctx;
1429         struct xhci_input_control_ctx *ctrl_ctx;
1430         u32 added_ctxs;
1431         unsigned int last_ctx;
1432         u32 new_add_flags, new_drop_flags, new_slot_info;
1433         struct xhci_virt_device *virt_dev;
1434         int ret = 0;
1435
1436         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1437         if (ret <= 0) {
1438                 /* So we won't queue a reset ep command for a root hub */
1439                 ep->hcpriv = NULL;
1440                 return ret;
1441         }
1442         xhci = hcd_to_xhci(hcd);
1443         if (xhci->xhc_state & XHCI_STATE_DYING)
1444                 return -ENODEV;
1445
1446         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1447         last_ctx = xhci_last_valid_endpoint(added_ctxs);
1448         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1449                 /* FIXME when we have to issue an evaluate endpoint command to
1450                  * deal with ep0 max packet size changing once we get the
1451                  * descriptors
1452                  */
1453                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1454                                 __func__, added_ctxs);
1455                 return 0;
1456         }
1457
1458         virt_dev = xhci->devs[udev->slot_id];
1459         in_ctx = virt_dev->in_ctx;
1460         out_ctx = virt_dev->out_ctx;
1461         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1462         ep_index = xhci_get_endpoint_index(&ep->desc);
1463         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1464
1465         /* If this endpoint is already in use, and the upper layers are trying
1466          * to add it again without dropping it, reject the addition.
1467          */
1468         if (virt_dev->eps[ep_index].ring &&
1469                         !(le32_to_cpu(ctrl_ctx->drop_flags) &
1470                                 xhci_get_endpoint_flag(&ep->desc))) {
1471                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1472                                 "without dropping it.\n",
1473                                 (unsigned int) ep->desc.bEndpointAddress);
1474                 return -EINVAL;
1475         }
1476
1477         /* If the HCD has already noted the endpoint is enabled,
1478          * ignore this request.
1479          */
1480         if (le32_to_cpu(ctrl_ctx->add_flags) &
1481             xhci_get_endpoint_flag(&ep->desc)) {
1482                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1483                                 __func__, ep);
1484                 return 0;
1485         }
1486
1487         /*
1488          * Configuration and alternate setting changes must be done in
1489          * process context, not interrupt context (or so documenation
1490          * for usb_set_interface() and usb_set_configuration() claim).
1491          */
1492         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1493                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1494                                 __func__, ep->desc.bEndpointAddress);
1495                 return -ENOMEM;
1496         }
1497
1498         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1499         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1500
1501         /* If xhci_endpoint_disable() was called for this endpoint, but the
1502          * xHC hasn't been notified yet through the check_bandwidth() call,
1503          * this re-adds a new state for the endpoint from the new endpoint
1504          * descriptors.  We must drop and re-add this endpoint, so we leave the
1505          * drop flags alone.
1506          */
1507         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1508
1509         slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1510         /* Update the last valid endpoint context, if we just added one past */
1511         if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1512             LAST_CTX(last_ctx)) {
1513                 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1514                 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1515         }
1516         new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1517
1518         /* Store the usb_device pointer for later use */
1519         ep->hcpriv = udev;
1520
1521         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1522                         (unsigned int) ep->desc.bEndpointAddress,
1523                         udev->slot_id,
1524                         (unsigned int) new_drop_flags,
1525                         (unsigned int) new_add_flags,
1526                         (unsigned int) new_slot_info);
1527         return 0;
1528 }
1529
1530 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1531 {
1532         struct xhci_input_control_ctx *ctrl_ctx;
1533         struct xhci_ep_ctx *ep_ctx;
1534         struct xhci_slot_ctx *slot_ctx;
1535         int i;
1536
1537         /* When a device's add flag and drop flag are zero, any subsequent
1538          * configure endpoint command will leave that endpoint's state
1539          * untouched.  Make sure we don't leave any old state in the input
1540          * endpoint contexts.
1541          */
1542         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1543         ctrl_ctx->drop_flags = 0;
1544         ctrl_ctx->add_flags = 0;
1545         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1546         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1547         /* Endpoint 0 is always valid */
1548         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1549         for (i = 1; i < 31; ++i) {
1550                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1551                 ep_ctx->ep_info = 0;
1552                 ep_ctx->ep_info2 = 0;
1553                 ep_ctx->deq = 0;
1554                 ep_ctx->tx_info = 0;
1555         }
1556 }
1557
1558 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1559                 struct usb_device *udev, u32 *cmd_status)
1560 {
1561         int ret;
1562
1563         switch (*cmd_status) {
1564         case COMP_ENOMEM:
1565                 dev_warn(&udev->dev, "Not enough host controller resources "
1566                                 "for new device state.\n");
1567                 ret = -ENOMEM;
1568                 /* FIXME: can we allocate more resources for the HC? */
1569                 break;
1570         case COMP_BW_ERR:
1571         case COMP_2ND_BW_ERR:
1572                 dev_warn(&udev->dev, "Not enough bandwidth "
1573                                 "for new device state.\n");
1574                 ret = -ENOSPC;
1575                 /* FIXME: can we go back to the old state? */
1576                 break;
1577         case COMP_TRB_ERR:
1578                 /* the HCD set up something wrong */
1579                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1580                                 "add flag = 1, "
1581                                 "and endpoint is not disabled.\n");
1582                 ret = -EINVAL;
1583                 break;
1584         case COMP_DEV_ERR:
1585                 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1586                                 "configure command.\n");
1587                 ret = -ENODEV;
1588                 break;
1589         case COMP_SUCCESS:
1590                 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1591                 ret = 0;
1592                 break;
1593         default:
1594                 xhci_err(xhci, "ERROR: unexpected command completion "
1595                                 "code 0x%x.\n", *cmd_status);
1596                 ret = -EINVAL;
1597                 break;
1598         }
1599         return ret;
1600 }
1601
1602 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1603                 struct usb_device *udev, u32 *cmd_status)
1604 {
1605         int ret;
1606         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1607
1608         switch (*cmd_status) {
1609         case COMP_EINVAL:
1610                 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1611                                 "context command.\n");
1612                 ret = -EINVAL;
1613                 break;
1614         case COMP_EBADSLT:
1615                 dev_warn(&udev->dev, "WARN: slot not enabled for"
1616                                 "evaluate context command.\n");
1617         case COMP_CTX_STATE:
1618                 dev_warn(&udev->dev, "WARN: invalid context state for "
1619                                 "evaluate context command.\n");
1620                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1621                 ret = -EINVAL;
1622                 break;
1623         case COMP_DEV_ERR:
1624                 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1625                                 "context command.\n");
1626                 ret = -ENODEV;
1627                 break;
1628         case COMP_MEL_ERR:
1629                 /* Max Exit Latency too large error */
1630                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1631                 ret = -EINVAL;
1632                 break;
1633         case COMP_SUCCESS:
1634                 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1635                 ret = 0;
1636                 break;
1637         default:
1638                 xhci_err(xhci, "ERROR: unexpected command completion "
1639                                 "code 0x%x.\n", *cmd_status);
1640                 ret = -EINVAL;
1641                 break;
1642         }
1643         return ret;
1644 }
1645
1646 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1647                 struct xhci_container_ctx *in_ctx)
1648 {
1649         struct xhci_input_control_ctx *ctrl_ctx;
1650         u32 valid_add_flags;
1651         u32 valid_drop_flags;
1652
1653         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1654         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1655          * (bit 1).  The default control endpoint is added during the Address
1656          * Device command and is never removed until the slot is disabled.
1657          */
1658         valid_add_flags = ctrl_ctx->add_flags >> 2;
1659         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1660
1661         /* Use hweight32 to count the number of ones in the add flags, or
1662          * number of endpoints added.  Don't count endpoints that are changed
1663          * (both added and dropped).
1664          */
1665         return hweight32(valid_add_flags) -
1666                 hweight32(valid_add_flags & valid_drop_flags);
1667 }
1668
1669 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1670                 struct xhci_container_ctx *in_ctx)
1671 {
1672         struct xhci_input_control_ctx *ctrl_ctx;
1673         u32 valid_add_flags;
1674         u32 valid_drop_flags;
1675
1676         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1677         valid_add_flags = ctrl_ctx->add_flags >> 2;
1678         valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1679
1680         return hweight32(valid_drop_flags) -
1681                 hweight32(valid_add_flags & valid_drop_flags);
1682 }
1683
1684 /*
1685  * We need to reserve the new number of endpoints before the configure endpoint
1686  * command completes.  We can't subtract the dropped endpoints from the number
1687  * of active endpoints until the command completes because we can oversubscribe
1688  * the host in this case:
1689  *
1690  *  - the first configure endpoint command drops more endpoints than it adds
1691  *  - a second configure endpoint command that adds more endpoints is queued
1692  *  - the first configure endpoint command fails, so the config is unchanged
1693  *  - the second command may succeed, even though there isn't enough resources
1694  *
1695  * Must be called with xhci->lock held.
1696  */
1697 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1698                 struct xhci_container_ctx *in_ctx)
1699 {
1700         u32 added_eps;
1701
1702         added_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1703         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1704                 xhci_dbg(xhci, "Not enough ep ctxs: "
1705                                 "%u active, need to add %u, limit is %u.\n",
1706                                 xhci->num_active_eps, added_eps,
1707                                 xhci->limit_active_eps);
1708                 return -ENOMEM;
1709         }
1710         xhci->num_active_eps += added_eps;
1711         xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1712                         xhci->num_active_eps);
1713         return 0;
1714 }
1715
1716 /*
1717  * The configure endpoint was failed by the xHC for some other reason, so we
1718  * need to revert the resources that failed configuration would have used.
1719  *
1720  * Must be called with xhci->lock held.
1721  */
1722 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1723                 struct xhci_container_ctx *in_ctx)
1724 {
1725         u32 num_failed_eps;
1726
1727         num_failed_eps = xhci_count_num_new_endpoints(xhci, in_ctx);
1728         xhci->num_active_eps -= num_failed_eps;
1729         xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1730                         num_failed_eps,
1731                         xhci->num_active_eps);
1732 }
1733
1734 /*
1735  * Now that the command has completed, clean up the active endpoint count by
1736  * subtracting out the endpoints that were dropped (but not changed).
1737  *
1738  * Must be called with xhci->lock held.
1739  */
1740 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1741                 struct xhci_container_ctx *in_ctx)
1742 {
1743         u32 num_dropped_eps;
1744
1745         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, in_ctx);
1746         xhci->num_active_eps -= num_dropped_eps;
1747         if (num_dropped_eps)
1748                 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
1749                                 num_dropped_eps,
1750                                 xhci->num_active_eps);
1751 }
1752
1753 /* Issue a configure endpoint command or evaluate context command
1754  * and wait for it to finish.
1755  */
1756 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1757                 struct usb_device *udev,
1758                 struct xhci_command *command,
1759                 bool ctx_change, bool must_succeed)
1760 {
1761         int ret;
1762         int timeleft;
1763         unsigned long flags;
1764         struct xhci_container_ctx *in_ctx;
1765         struct completion *cmd_completion;
1766         u32 *cmd_status;
1767         struct xhci_virt_device *virt_dev;
1768
1769         spin_lock_irqsave(&xhci->lock, flags);
1770         virt_dev = xhci->devs[udev->slot_id];
1771         if (command) {
1772                 in_ctx = command->in_ctx;
1773                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1774                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1775                         spin_unlock_irqrestore(&xhci->lock, flags);
1776                         xhci_warn(xhci, "Not enough host resources, "
1777                                         "active endpoint contexts = %u\n",
1778                                         xhci->num_active_eps);
1779                         return -ENOMEM;
1780                 }
1781
1782                 cmd_completion = command->completion;
1783                 cmd_status = &command->status;
1784                 command->command_trb = xhci->cmd_ring->enqueue;
1785
1786                 /* Enqueue pointer can be left pointing to the link TRB,
1787                  * we must handle that
1788                  */
1789                 if ((le32_to_cpu(command->command_trb->link.control)
1790                      & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
1791                         command->command_trb =
1792                                 xhci->cmd_ring->enq_seg->next->trbs;
1793
1794                 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1795         } else {
1796                 in_ctx = virt_dev->in_ctx;
1797                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
1798                                 xhci_reserve_host_resources(xhci, in_ctx)) {
1799                         spin_unlock_irqrestore(&xhci->lock, flags);
1800                         xhci_warn(xhci, "Not enough host resources, "
1801                                         "active endpoint contexts = %u\n",
1802                                         xhci->num_active_eps);
1803                         return -ENOMEM;
1804                 }
1805                 cmd_completion = &virt_dev->cmd_completion;
1806                 cmd_status = &virt_dev->cmd_status;
1807         }
1808         init_completion(cmd_completion);
1809
1810         if (!ctx_change)
1811                 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1812                                 udev->slot_id, must_succeed);
1813         else
1814                 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1815                                 udev->slot_id);
1816         if (ret < 0) {
1817                 if (command)
1818                         list_del(&command->cmd_list);
1819                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
1820                         xhci_free_host_resources(xhci, in_ctx);
1821                 spin_unlock_irqrestore(&xhci->lock, flags);
1822                 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1823                 return -ENOMEM;
1824         }
1825         xhci_ring_cmd_db(xhci);
1826         spin_unlock_irqrestore(&xhci->lock, flags);
1827
1828         /* Wait for the configure endpoint command to complete */
1829         timeleft = wait_for_completion_interruptible_timeout(
1830                         cmd_completion,
1831                         USB_CTRL_SET_TIMEOUT);
1832         if (timeleft <= 0) {
1833                 xhci_warn(xhci, "%s while waiting for %s command\n",
1834                                 timeleft == 0 ? "Timeout" : "Signal",
1835                                 ctx_change == 0 ?
1836                                         "configure endpoint" :
1837                                         "evaluate context");
1838                 /* FIXME cancel the configure endpoint command */
1839                 return -ETIME;
1840         }
1841
1842         if (!ctx_change)
1843                 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
1844         else
1845                 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
1846
1847         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
1848                 spin_lock_irqsave(&xhci->lock, flags);
1849                 /* If the command failed, remove the reserved resources.
1850                  * Otherwise, clean up the estimate to include dropped eps.
1851                  */
1852                 if (ret)
1853                         xhci_free_host_resources(xhci, in_ctx);
1854                 else
1855                         xhci_finish_resource_reservation(xhci, in_ctx);
1856                 spin_unlock_irqrestore(&xhci->lock, flags);
1857         }
1858         return ret;
1859 }
1860
1861 /* Called after one or more calls to xhci_add_endpoint() or
1862  * xhci_drop_endpoint().  If this call fails, the USB core is expected
1863  * to call xhci_reset_bandwidth().
1864  *
1865  * Since we are in the middle of changing either configuration or
1866  * installing a new alt setting, the USB core won't allow URBs to be
1867  * enqueued for any endpoint on the old config or interface.  Nothing
1868  * else should be touching the xhci->devs[slot_id] structure, so we
1869  * don't need to take the xhci->lock for manipulating that.
1870  */
1871 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1872 {
1873         int i;
1874         int ret = 0;
1875         struct xhci_hcd *xhci;
1876         struct xhci_virt_device *virt_dev;
1877         struct xhci_input_control_ctx *ctrl_ctx;
1878         struct xhci_slot_ctx *slot_ctx;
1879
1880         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1881         if (ret <= 0)
1882                 return ret;
1883         xhci = hcd_to_xhci(hcd);
1884         if (xhci->xhc_state & XHCI_STATE_DYING)
1885                 return -ENODEV;
1886
1887         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1888         virt_dev = xhci->devs[udev->slot_id];
1889
1890         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1891         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1892         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1893         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
1894         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
1895
1896         /* Don't issue the command if there's no endpoints to update. */
1897         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
1898                         ctrl_ctx->drop_flags == 0)
1899                 return 0;
1900
1901         xhci_dbg(xhci, "New Input Control Context:\n");
1902         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1903         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1904                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1905
1906         ret = xhci_configure_endpoint(xhci, udev, NULL,
1907                         false, false);
1908         if (ret) {
1909                 /* Callee should call reset_bandwidth() */
1910                 return ret;
1911         }
1912
1913         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1914         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1915                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
1916
1917         /* Free any rings that were dropped, but not changed. */
1918         for (i = 1; i < 31; ++i) {
1919                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
1920                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
1921                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1922         }
1923         xhci_zero_in_ctx(xhci, virt_dev);
1924         /*
1925          * Install any rings for completely new endpoints or changed endpoints,
1926          * and free or cache any old rings from changed endpoints.
1927          */
1928         for (i = 1; i < 31; ++i) {
1929                 if (!virt_dev->eps[i].new_ring)
1930                         continue;
1931                 /* Only cache or free the old ring if it exists.
1932                  * It may not if this is the first add of an endpoint.
1933                  */
1934                 if (virt_dev->eps[i].ring) {
1935                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1936                 }
1937                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1938                 virt_dev->eps[i].new_ring = NULL;
1939         }
1940
1941         return ret;
1942 }
1943
1944 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1945 {
1946         struct xhci_hcd *xhci;
1947         struct xhci_virt_device *virt_dev;
1948         int i, ret;
1949
1950         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1951         if (ret <= 0)
1952                 return;
1953         xhci = hcd_to_xhci(hcd);
1954
1955         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1956         virt_dev = xhci->devs[udev->slot_id];
1957         /* Free any rings allocated for added endpoints */
1958         for (i = 0; i < 31; ++i) {
1959                 if (virt_dev->eps[i].new_ring) {
1960                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1961                         virt_dev->eps[i].new_ring = NULL;
1962                 }
1963         }
1964         xhci_zero_in_ctx(xhci, virt_dev);
1965 }
1966
1967 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1968                 struct xhci_container_ctx *in_ctx,
1969                 struct xhci_container_ctx *out_ctx,
1970                 u32 add_flags, u32 drop_flags)
1971 {
1972         struct xhci_input_control_ctx *ctrl_ctx;
1973         ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1974         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
1975         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
1976         xhci_slot_copy(xhci, in_ctx, out_ctx);
1977         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1978
1979         xhci_dbg(xhci, "Input Context:\n");
1980         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1981 }
1982
1983 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1984                 unsigned int slot_id, unsigned int ep_index,
1985                 struct xhci_dequeue_state *deq_state)
1986 {
1987         struct xhci_container_ctx *in_ctx;
1988         struct xhci_ep_ctx *ep_ctx;
1989         u32 added_ctxs;
1990         dma_addr_t addr;
1991
1992         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1993                         xhci->devs[slot_id]->out_ctx, ep_index);
1994         in_ctx = xhci->devs[slot_id]->in_ctx;
1995         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1996         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1997                         deq_state->new_deq_ptr);
1998         if (addr == 0) {
1999                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2000                                 "reset ep command\n");
2001                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2002                                 deq_state->new_deq_seg,
2003                                 deq_state->new_deq_ptr);
2004                 return;
2005         }
2006         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2007
2008         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2009         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2010                         xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
2011 }
2012
2013 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2014                 struct usb_device *udev, unsigned int ep_index)
2015 {
2016         struct xhci_dequeue_state deq_state;
2017         struct xhci_virt_ep *ep;
2018
2019         xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2020         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2021         /* We need to move the HW's dequeue pointer past this TD,
2022          * or it will attempt to resend it on the next doorbell ring.
2023          */
2024         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2025                         ep_index, ep->stopped_stream, ep->stopped_td,
2026                         &deq_state);
2027
2028         /* HW with the reset endpoint quirk will use the saved dequeue state to
2029          * issue a configure endpoint command later.
2030          */
2031         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2032                 xhci_dbg(xhci, "Queueing new dequeue state\n");
2033                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2034                                 ep_index, ep->stopped_stream, &deq_state);
2035         } else {
2036                 /* Better hope no one uses the input context between now and the
2037                  * reset endpoint completion!
2038                  * XXX: No idea how this hardware will react when stream rings
2039                  * are enabled.
2040                  */
2041                 xhci_dbg(xhci, "Setting up input context for "
2042                                 "configure endpoint command\n");
2043                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2044                                 ep_index, &deq_state);
2045         }
2046 }
2047
2048 /* Deal with stalled endpoints.  The core should have sent the control message
2049  * to clear the halt condition.  However, we need to make the xHCI hardware
2050  * reset its sequence number, since a device will expect a sequence number of
2051  * zero after the halt condition is cleared.
2052  * Context: in_interrupt
2053  */
2054 void xhci_endpoint_reset(struct usb_hcd *hcd,
2055                 struct usb_host_endpoint *ep)
2056 {
2057         struct xhci_hcd *xhci;
2058         struct usb_device *udev;
2059         unsigned int ep_index;
2060         unsigned long flags;
2061         int ret;
2062         struct xhci_virt_ep *virt_ep;
2063
2064         xhci = hcd_to_xhci(hcd);
2065         udev = (struct usb_device *) ep->hcpriv;
2066         /* Called with a root hub endpoint (or an endpoint that wasn't added
2067          * with xhci_add_endpoint()
2068          */
2069         if (!ep->hcpriv)
2070                 return;
2071         ep_index = xhci_get_endpoint_index(&ep->desc);
2072         virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2073         if (!virt_ep->stopped_td) {
2074                 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2075                                 ep->desc.bEndpointAddress);
2076                 return;
2077         }
2078         if (usb_endpoint_xfer_control(&ep->desc)) {
2079                 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2080                 return;
2081         }
2082
2083         xhci_dbg(xhci, "Queueing reset endpoint command\n");
2084         spin_lock_irqsave(&xhci->lock, flags);
2085         ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2086         /*
2087          * Can't change the ring dequeue pointer until it's transitioned to the
2088          * stopped state, which is only upon a successful reset endpoint
2089          * command.  Better hope that last command worked!
2090          */
2091         if (!ret) {
2092                 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2093                 kfree(virt_ep->stopped_td);
2094                 xhci_ring_cmd_db(xhci);
2095         }
2096         virt_ep->stopped_td = NULL;
2097         virt_ep->stopped_trb = NULL;
2098         virt_ep->stopped_stream = 0;
2099         spin_unlock_irqrestore(&xhci->lock, flags);
2100
2101         if (ret)
2102                 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2103 }
2104
2105 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2106                 struct usb_device *udev, struct usb_host_endpoint *ep,
2107                 unsigned int slot_id)
2108 {
2109         int ret;
2110         unsigned int ep_index;
2111         unsigned int ep_state;
2112
2113         if (!ep)
2114                 return -EINVAL;
2115         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2116         if (ret <= 0)
2117                 return -EINVAL;
2118         if (ep->ss_ep_comp.bmAttributes == 0) {
2119                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2120                                 " descriptor for ep 0x%x does not support streams\n",
2121                                 ep->desc.bEndpointAddress);
2122                 return -EINVAL;
2123         }
2124
2125         ep_index = xhci_get_endpoint_index(&ep->desc);
2126         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2127         if (ep_state & EP_HAS_STREAMS ||
2128                         ep_state & EP_GETTING_STREAMS) {
2129                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2130                                 "already has streams set up.\n",
2131                                 ep->desc.bEndpointAddress);
2132                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2133                                 "dynamic stream context array reallocation.\n");
2134                 return -EINVAL;
2135         }
2136         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2137                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2138                                 "endpoint 0x%x; URBs are pending.\n",
2139                                 ep->desc.bEndpointAddress);
2140                 return -EINVAL;
2141         }
2142         return 0;
2143 }
2144
2145 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2146                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2147 {
2148         unsigned int max_streams;
2149
2150         /* The stream context array size must be a power of two */
2151         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2152         /*
2153          * Find out how many primary stream array entries the host controller
2154          * supports.  Later we may use secondary stream arrays (similar to 2nd
2155          * level page entries), but that's an optional feature for xHCI host
2156          * controllers. xHCs must support at least 4 stream IDs.
2157          */
2158         max_streams = HCC_MAX_PSA(xhci->hcc_params);
2159         if (*num_stream_ctxs > max_streams) {
2160                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
2161                                 max_streams);
2162                 *num_stream_ctxs = max_streams;
2163                 *num_streams = max_streams;
2164         }
2165 }
2166
2167 /* Returns an error code if one of the endpoint already has streams.
2168  * This does not change any data structures, it only checks and gathers
2169  * information.
2170  */
2171 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
2172                 struct usb_device *udev,
2173                 struct usb_host_endpoint **eps, unsigned int num_eps,
2174                 unsigned int *num_streams, u32 *changed_ep_bitmask)
2175 {
2176         unsigned int max_streams;
2177         unsigned int endpoint_flag;
2178         int i;
2179         int ret;
2180
2181         for (i = 0; i < num_eps; i++) {
2182                 ret = xhci_check_streams_endpoint(xhci, udev,
2183                                 eps[i], udev->slot_id);
2184                 if (ret < 0)
2185                         return ret;
2186
2187                 max_streams = USB_SS_MAX_STREAMS(
2188                                 eps[i]->ss_ep_comp.bmAttributes);
2189                 if (max_streams < (*num_streams - 1)) {
2190                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
2191                                         eps[i]->desc.bEndpointAddress,
2192                                         max_streams);
2193                         *num_streams = max_streams+1;
2194                 }
2195
2196                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
2197                 if (*changed_ep_bitmask & endpoint_flag)
2198                         return -EINVAL;
2199                 *changed_ep_bitmask |= endpoint_flag;
2200         }
2201         return 0;
2202 }
2203
2204 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
2205                 struct usb_device *udev,
2206                 struct usb_host_endpoint **eps, unsigned int num_eps)
2207 {
2208         u32 changed_ep_bitmask = 0;
2209         unsigned int slot_id;
2210         unsigned int ep_index;
2211         unsigned int ep_state;
2212         int i;
2213
2214         slot_id = udev->slot_id;
2215         if (!xhci->devs[slot_id])
2216                 return 0;
2217
2218         for (i = 0; i < num_eps; i++) {
2219                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2220                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2221                 /* Are streams already being freed for the endpoint? */
2222                 if (ep_state & EP_GETTING_NO_STREAMS) {
2223                         xhci_warn(xhci, "WARN Can't disable streams for "
2224                                         "endpoint 0x%x\n, "
2225                                         "streams are being disabled already.",
2226                                         eps[i]->desc.bEndpointAddress);
2227                         return 0;
2228                 }
2229                 /* Are there actually any streams to free? */
2230                 if (!(ep_state & EP_HAS_STREAMS) &&
2231                                 !(ep_state & EP_GETTING_STREAMS)) {
2232                         xhci_warn(xhci, "WARN Can't disable streams for "
2233                                         "endpoint 0x%x\n, "
2234                                         "streams are already disabled!",
2235                                         eps[i]->desc.bEndpointAddress);
2236                         xhci_warn(xhci, "WARN xhci_free_streams() called "
2237                                         "with non-streams endpoint\n");
2238                         return 0;
2239                 }
2240                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2241         }
2242         return changed_ep_bitmask;
2243 }
2244
2245 /*
2246  * The USB device drivers use this function (though the HCD interface in USB
2247  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
2248  * coordinate mass storage command queueing across multiple endpoints (basically
2249  * a stream ID == a task ID).
2250  *
2251  * Setting up streams involves allocating the same size stream context array
2252  * for each endpoint and issuing a configure endpoint command for all endpoints.
2253  *
2254  * Don't allow the call to succeed if one endpoint only supports one stream
2255  * (which means it doesn't support streams at all).
2256  *
2257  * Drivers may get less stream IDs than they asked for, if the host controller
2258  * hardware or endpoints claim they can't support the number of requested
2259  * stream IDs.
2260  */
2261 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2262                 struct usb_host_endpoint **eps, unsigned int num_eps,
2263                 unsigned int num_streams, gfp_t mem_flags)
2264 {
2265         int i, ret;
2266         struct xhci_hcd *xhci;
2267         struct xhci_virt_device *vdev;
2268         struct xhci_command *config_cmd;
2269         unsigned int ep_index;
2270         unsigned int num_stream_ctxs;
2271         unsigned long flags;
2272         u32 changed_ep_bitmask = 0;
2273
2274         if (!eps)
2275                 return -EINVAL;
2276
2277         /* Add one to the number of streams requested to account for
2278          * stream 0 that is reserved for xHCI usage.
2279          */
2280         num_streams += 1;
2281         xhci = hcd_to_xhci(hcd);
2282         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2283                         num_streams);
2284
2285         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2286         if (!config_cmd) {
2287                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2288                 return -ENOMEM;
2289         }
2290
2291         /* Check to make sure all endpoints are not already configured for
2292          * streams.  While we're at it, find the maximum number of streams that
2293          * all the endpoints will support and check for duplicate endpoints.
2294          */
2295         spin_lock_irqsave(&xhci->lock, flags);
2296         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2297                         num_eps, &num_streams, &changed_ep_bitmask);
2298         if (ret < 0) {
2299                 xhci_free_command(xhci, config_cmd);
2300                 spin_unlock_irqrestore(&xhci->lock, flags);
2301                 return ret;
2302         }
2303         if (num_streams <= 1) {
2304                 xhci_warn(xhci, "WARN: endpoints can't handle "
2305                                 "more than one stream.\n");
2306                 xhci_free_command(xhci, config_cmd);
2307                 spin_unlock_irqrestore(&xhci->lock, flags);
2308                 return -EINVAL;
2309         }
2310         vdev = xhci->devs[udev->slot_id];
2311         /* Mark each endpoint as being in transition, so
2312          * xhci_urb_enqueue() will reject all URBs.
2313          */
2314         for (i = 0; i < num_eps; i++) {
2315                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2316                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2317         }
2318         spin_unlock_irqrestore(&xhci->lock, flags);
2319
2320         /* Setup internal data structures and allocate HW data structures for
2321          * streams (but don't install the HW structures in the input context
2322          * until we're sure all memory allocation succeeded).
2323          */
2324         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2325         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2326                         num_stream_ctxs, num_streams);
2327
2328         for (i = 0; i < num_eps; i++) {
2329                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2330                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2331                                 num_stream_ctxs,
2332                                 num_streams, mem_flags);
2333                 if (!vdev->eps[ep_index].stream_info)
2334                         goto cleanup;
2335                 /* Set maxPstreams in endpoint context and update deq ptr to
2336                  * point to stream context array. FIXME
2337                  */
2338         }
2339
2340         /* Set up the input context for a configure endpoint command. */
2341         for (i = 0; i < num_eps; i++) {
2342                 struct xhci_ep_ctx *ep_ctx;
2343
2344                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2345                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2346
2347                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2348                                 vdev->out_ctx, ep_index);
2349                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2350                                 vdev->eps[ep_index].stream_info);
2351         }
2352         /* Tell the HW to drop its old copy of the endpoint context info
2353          * and add the updated copy from the input context.
2354          */
2355         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2356                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2357
2358         /* Issue and wait for the configure endpoint command */
2359         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2360                         false, false);
2361
2362         /* xHC rejected the configure endpoint command for some reason, so we
2363          * leave the old ring intact and free our internal streams data
2364          * structure.
2365          */
2366         if (ret < 0)
2367                 goto cleanup;
2368
2369         spin_lock_irqsave(&xhci->lock, flags);
2370         for (i = 0; i < num_eps; i++) {
2371                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2372                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2373                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2374                          udev->slot_id, ep_index);
2375                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2376         }
2377         xhci_free_command(xhci, config_cmd);
2378         spin_unlock_irqrestore(&xhci->lock, flags);
2379
2380         /* Subtract 1 for stream 0, which drivers can't use */
2381         return num_streams - 1;
2382
2383 cleanup:
2384         /* If it didn't work, free the streams! */
2385         for (i = 0; i < num_eps; i++) {
2386                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2387                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2388                 vdev->eps[ep_index].stream_info = NULL;
2389                 /* FIXME Unset maxPstreams in endpoint context and
2390                  * update deq ptr to point to normal string ring.
2391                  */
2392                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2393                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2394                 xhci_endpoint_zero(xhci, vdev, eps[i]);
2395         }
2396         xhci_free_command(xhci, config_cmd);
2397         return -ENOMEM;
2398 }
2399
2400 /* Transition the endpoint from using streams to being a "normal" endpoint
2401  * without streams.
2402  *
2403  * Modify the endpoint context state, submit a configure endpoint command,
2404  * and free all endpoint rings for streams if that completes successfully.
2405  */
2406 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2407                 struct usb_host_endpoint **eps, unsigned int num_eps,
2408                 gfp_t mem_flags)
2409 {
2410         int i, ret;
2411         struct xhci_hcd *xhci;
2412         struct xhci_virt_device *vdev;
2413         struct xhci_command *command;
2414         unsigned int ep_index;
2415         unsigned long flags;
2416         u32 changed_ep_bitmask;
2417
2418         xhci = hcd_to_xhci(hcd);
2419         vdev = xhci->devs[udev->slot_id];
2420
2421         /* Set up a configure endpoint command to remove the streams rings */
2422         spin_lock_irqsave(&xhci->lock, flags);
2423         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2424                         udev, eps, num_eps);
2425         if (changed_ep_bitmask == 0) {
2426                 spin_unlock_irqrestore(&xhci->lock, flags);
2427                 return -EINVAL;
2428         }
2429
2430         /* Use the xhci_command structure from the first endpoint.  We may have
2431          * allocated too many, but the driver may call xhci_free_streams() for
2432          * each endpoint it grouped into one call to xhci_alloc_streams().
2433          */
2434         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2435         command = vdev->eps[ep_index].stream_info->free_streams_command;
2436         for (i = 0; i < num_eps; i++) {
2437                 struct xhci_ep_ctx *ep_ctx;
2438
2439                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2440                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2441                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2442                         EP_GETTING_NO_STREAMS;
2443
2444                 xhci_endpoint_copy(xhci, command->in_ctx,
2445                                 vdev->out_ctx, ep_index);
2446                 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2447                                 &vdev->eps[ep_index]);
2448         }
2449         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2450                         vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2451         spin_unlock_irqrestore(&xhci->lock, flags);
2452
2453         /* Issue and wait for the configure endpoint command,
2454          * which must succeed.
2455          */
2456         ret = xhci_configure_endpoint(xhci, udev, command,
2457                         false, true);
2458
2459         /* xHC rejected the configure endpoint command for some reason, so we
2460          * leave the streams rings intact.
2461          */
2462         if (ret < 0)
2463                 return ret;
2464
2465         spin_lock_irqsave(&xhci->lock, flags);
2466         for (i = 0; i < num_eps; i++) {
2467                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2468                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2469                 vdev->eps[ep_index].stream_info = NULL;
2470                 /* FIXME Unset maxPstreams in endpoint context and
2471                  * update deq ptr to point to normal string ring.
2472                  */
2473                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2474                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2475         }
2476         spin_unlock_irqrestore(&xhci->lock, flags);
2477
2478         return 0;
2479 }
2480
2481 /*
2482  * Deletes endpoint resources for endpoints that were active before a Reset
2483  * Device command, or a Disable Slot command.  The Reset Device command leaves
2484  * the control endpoint intact, whereas the Disable Slot command deletes it.
2485  *
2486  * Must be called with xhci->lock held.
2487  */
2488 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
2489         struct xhci_virt_device *virt_dev, bool drop_control_ep)
2490 {
2491         int i;
2492         unsigned int num_dropped_eps = 0;
2493         unsigned int drop_flags = 0;
2494
2495         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
2496                 if (virt_dev->eps[i].ring) {
2497                         drop_flags |= 1 << i;
2498                         num_dropped_eps++;
2499                 }
2500         }
2501         xhci->num_active_eps -= num_dropped_eps;
2502         if (num_dropped_eps)
2503                 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
2504                                 "%u now active.\n",
2505                                 num_dropped_eps, drop_flags,
2506                                 xhci->num_active_eps);
2507 }
2508
2509 /*
2510  * This submits a Reset Device Command, which will set the device state to 0,
2511  * set the device address to 0, and disable all the endpoints except the default
2512  * control endpoint.  The USB core should come back and call
2513  * xhci_address_device(), and then re-set up the configuration.  If this is
2514  * called because of a usb_reset_and_verify_device(), then the old alternate
2515  * settings will be re-installed through the normal bandwidth allocation
2516  * functions.
2517  *
2518  * Wait for the Reset Device command to finish.  Remove all structures
2519  * associated with the endpoints that were disabled.  Clear the input device
2520  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
2521  *
2522  * If the virt_dev to be reset does not exist or does not match the udev,
2523  * it means the device is lost, possibly due to the xHC restore error and
2524  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2525  * re-allocate the device.
2526  */
2527 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2528 {
2529         int ret, i;
2530         unsigned long flags;
2531         struct xhci_hcd *xhci;
2532         unsigned int slot_id;
2533         struct xhci_virt_device *virt_dev;
2534         struct xhci_command *reset_device_cmd;
2535         int timeleft;
2536         int last_freed_endpoint;
2537         struct xhci_slot_ctx *slot_ctx;
2538
2539         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2540         if (ret <= 0)
2541                 return ret;
2542         xhci = hcd_to_xhci(hcd);
2543         slot_id = udev->slot_id;
2544         virt_dev = xhci->devs[slot_id];
2545         if (!virt_dev) {
2546                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2547                                 "not exist. Re-allocate the device\n", slot_id);
2548                 ret = xhci_alloc_dev(hcd, udev);
2549                 if (ret == 1)
2550                         return 0;
2551                 else
2552                         return -EINVAL;
2553         }
2554
2555         if (virt_dev->udev != udev) {
2556                 /* If the virt_dev and the udev does not match, this virt_dev
2557                  * may belong to another udev.
2558                  * Re-allocate the device.
2559                  */
2560                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2561                                 "not match the udev. Re-allocate the device\n",
2562                                 slot_id);
2563                 ret = xhci_alloc_dev(hcd, udev);
2564                 if (ret == 1)
2565                         return 0;
2566                 else
2567                         return -EINVAL;
2568         }
2569
2570         /* If device is not setup, there is no point in resetting it */
2571         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2572         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
2573                                                 SLOT_STATE_DISABLED)
2574                 return 0;
2575
2576         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2577         /* Allocate the command structure that holds the struct completion.
2578          * Assume we're in process context, since the normal device reset
2579          * process has to wait for the device anyway.  Storage devices are
2580          * reset as part of error handling, so use GFP_NOIO instead of
2581          * GFP_KERNEL.
2582          */
2583         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2584         if (!reset_device_cmd) {
2585                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2586                 return -ENOMEM;
2587         }
2588
2589         /* Attempt to submit the Reset Device command to the command ring */
2590         spin_lock_irqsave(&xhci->lock, flags);
2591         reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2592
2593         /* Enqueue pointer can be left pointing to the link TRB,
2594          * we must handle that
2595          */
2596         if ((le32_to_cpu(reset_device_cmd->command_trb->link.control)
2597              & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK))
2598                 reset_device_cmd->command_trb =
2599                         xhci->cmd_ring->enq_seg->next->trbs;
2600
2601         list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2602         ret = xhci_queue_reset_device(xhci, slot_id);
2603         if (ret) {
2604                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2605                 list_del(&reset_device_cmd->cmd_list);
2606                 spin_unlock_irqrestore(&xhci->lock, flags);
2607                 goto command_cleanup;
2608         }
2609         xhci_ring_cmd_db(xhci);
2610         spin_unlock_irqrestore(&xhci->lock, flags);
2611
2612         /* Wait for the Reset Device command to finish */
2613         timeleft = wait_for_completion_interruptible_timeout(
2614                         reset_device_cmd->completion,
2615                         USB_CTRL_SET_TIMEOUT);
2616         if (timeleft <= 0) {
2617                 xhci_warn(xhci, "%s while waiting for reset device command\n",
2618                                 timeleft == 0 ? "Timeout" : "Signal");
2619                 spin_lock_irqsave(&xhci->lock, flags);
2620                 /* The timeout might have raced with the event ring handler, so
2621                  * only delete from the list if the item isn't poisoned.
2622                  */
2623                 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2624                         list_del(&reset_device_cmd->cmd_list);
2625                 spin_unlock_irqrestore(&xhci->lock, flags);
2626                 ret = -ETIME;
2627                 goto command_cleanup;
2628         }
2629
2630         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2631          * unless we tried to reset a slot ID that wasn't enabled,
2632          * or the device wasn't in the addressed or configured state.
2633          */
2634         ret = reset_device_cmd->status;
2635         switch (ret) {
2636         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2637         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2638                 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2639                                 slot_id,
2640                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2641                 xhci_info(xhci, "Not freeing device rings.\n");
2642                 /* Don't treat this as an error.  May change my mind later. */
2643                 ret = 0;
2644                 goto command_cleanup;
2645         case COMP_SUCCESS:
2646                 xhci_dbg(xhci, "Successful reset device command.\n");
2647                 break;
2648         default:
2649                 if (xhci_is_vendor_info_code(xhci, ret))
2650                         break;
2651                 xhci_warn(xhci, "Unknown completion code %u for "
2652                                 "reset device command.\n", ret);
2653                 ret = -EINVAL;
2654                 goto command_cleanup;
2655         }
2656
2657         /* Free up host controller endpoint resources */
2658         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2659                 spin_lock_irqsave(&xhci->lock, flags);
2660                 /* Don't delete the default control endpoint resources */
2661                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
2662                 spin_unlock_irqrestore(&xhci->lock, flags);
2663         }
2664
2665         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2666         last_freed_endpoint = 1;
2667         for (i = 1; i < 31; ++i) {
2668                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
2669
2670                 if (ep->ep_state & EP_HAS_STREAMS) {
2671                         xhci_free_stream_info(xhci, ep->stream_info);
2672                         ep->stream_info = NULL;
2673                         ep->ep_state &= ~EP_HAS_STREAMS;
2674                 }
2675
2676                 if (ep->ring) {
2677                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2678                         last_freed_endpoint = i;
2679                 }
2680         }
2681         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2682         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2683         ret = 0;
2684
2685 command_cleanup:
2686         xhci_free_command(xhci, reset_device_cmd);
2687         return ret;
2688 }
2689
2690 /*
2691  * At this point, the struct usb_device is about to go away, the device has
2692  * disconnected, and all traffic has been stopped and the endpoints have been
2693  * disabled.  Free any HC data structures associated with that device.
2694  */
2695 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2696 {
2697         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2698         struct xhci_virt_device *virt_dev;
2699         unsigned long flags;
2700         u32 state;
2701         int i, ret;
2702
2703         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2704         /* If the host is halted due to driver unload, we still need to free the
2705          * device.
2706          */
2707         if (ret <= 0 && ret != -ENODEV)
2708                 return;
2709
2710         virt_dev = xhci->devs[udev->slot_id];
2711
2712         /* Stop any wayward timer functions (which may grab the lock) */
2713         for (i = 0; i < 31; ++i) {
2714                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2715                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2716         }
2717
2718         spin_lock_irqsave(&xhci->lock, flags);
2719         /* Don't disable the slot if the host controller is dead. */
2720         state = xhci_readl(xhci, &xhci->op_regs->status);
2721         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
2722                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
2723                 xhci_free_virt_device(xhci, udev->slot_id);
2724                 spin_unlock_irqrestore(&xhci->lock, flags);
2725                 return;
2726         }
2727
2728         if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2729                 spin_unlock_irqrestore(&xhci->lock, flags);
2730                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2731                 return;
2732         }
2733         xhci_ring_cmd_db(xhci);
2734         spin_unlock_irqrestore(&xhci->lock, flags);
2735         /*
2736          * Event command completion handler will free any data structures
2737          * associated with the slot.  XXX Can free sleep?
2738          */
2739 }
2740
2741 /*
2742  * Checks if we have enough host controller resources for the default control
2743  * endpoint.
2744  *
2745  * Must be called with xhci->lock held.
2746  */
2747 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
2748 {
2749         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
2750                 xhci_dbg(xhci, "Not enough ep ctxs: "
2751                                 "%u active, need to add 1, limit is %u.\n",
2752                                 xhci->num_active_eps, xhci->limit_active_eps);
2753                 return -ENOMEM;
2754         }
2755         xhci->num_active_eps += 1;
2756         xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
2757                         xhci->num_active_eps);
2758         return 0;
2759 }
2760
2761
2762 /*
2763  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2764  * timed out, or allocating memory failed.  Returns 1 on success.
2765  */
2766 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2767 {
2768         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2769         unsigned long flags;
2770         int timeleft;
2771         int ret;
2772
2773         spin_lock_irqsave(&xhci->lock, flags);
2774         ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2775         if (ret) {
2776                 spin_unlock_irqrestore(&xhci->lock, flags);
2777                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2778                 return 0;
2779         }
2780         xhci_ring_cmd_db(xhci);
2781         spin_unlock_irqrestore(&xhci->lock, flags);
2782
2783         /* XXX: how much time for xHC slot assignment? */
2784         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2785                         USB_CTRL_SET_TIMEOUT);
2786         if (timeleft <= 0) {
2787                 xhci_warn(xhci, "%s while waiting for a slot\n",
2788                                 timeleft == 0 ? "Timeout" : "Signal");
2789                 /* FIXME cancel the enable slot request */
2790                 return 0;
2791         }
2792
2793         if (!xhci->slot_id) {
2794                 xhci_err(xhci, "Error while assigning device slot ID\n");
2795                 return 0;
2796         }
2797
2798         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2799                 spin_lock_irqsave(&xhci->lock, flags);
2800                 ret = xhci_reserve_host_control_ep_resources(xhci);
2801                 if (ret) {
2802                         spin_unlock_irqrestore(&xhci->lock, flags);
2803                         xhci_warn(xhci, "Not enough host resources, "
2804                                         "active endpoint contexts = %u\n",
2805                                         xhci->num_active_eps);
2806                         goto disable_slot;
2807                 }
2808                 spin_unlock_irqrestore(&xhci->lock, flags);
2809         }
2810         /* Use GFP_NOIO, since this function can be called from
2811          * xhci_discover_or_reset_device(), which may be called as part of
2812          * mass storage driver error handling.
2813          */
2814         if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
2815                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2816                 goto disable_slot;
2817         }
2818         udev->slot_id = xhci->slot_id;
2819         /* Is this a LS or FS device under a HS hub? */
2820         /* Hub or peripherial? */
2821         return 1;
2822
2823 disable_slot:
2824         /* Disable slot, if we can do it without mem alloc */
2825         spin_lock_irqsave(&xhci->lock, flags);
2826         if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2827                 xhci_ring_cmd_db(xhci);
2828         spin_unlock_irqrestore(&xhci->lock, flags);
2829         return 0;
2830 }
2831
2832 /*
2833  * Issue an Address Device command (which will issue a SetAddress request to
2834  * the device).
2835  * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2836  * we should only issue and wait on one address command at the same time.
2837  *
2838  * We add one to the device address issued by the hardware because the USB core
2839  * uses address 1 for the root hubs (even though they're not really devices).
2840  */
2841 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2842 {
2843         unsigned long flags;
2844         int timeleft;
2845         struct xhci_virt_device *virt_dev;
2846         int ret = 0;
2847         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2848         struct xhci_slot_ctx *slot_ctx;
2849         struct xhci_input_control_ctx *ctrl_ctx;
2850         u64 temp_64;
2851
2852         if (!udev->slot_id) {
2853                 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2854                 return -EINVAL;
2855         }
2856
2857         virt_dev = xhci->devs[udev->slot_id];
2858
2859         if (WARN_ON(!virt_dev)) {
2860                 /*
2861                  * In plug/unplug torture test with an NEC controller,
2862                  * a zero-dereference was observed once due to virt_dev = 0.
2863                  * Print useful debug rather than crash if it is observed again!
2864                  */
2865                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
2866                         udev->slot_id);
2867                 return -EINVAL;
2868         }
2869
2870         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2871         /*
2872          * If this is the first Set Address since device plug-in or
2873          * virt_device realloaction after a resume with an xHCI power loss,
2874          * then set up the slot context.
2875          */
2876         if (!slot_ctx->dev_info)
2877                 xhci_setup_addressable_virt_dev(xhci, udev);
2878         /* Otherwise, update the control endpoint ring enqueue pointer. */
2879         else
2880                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2881         ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2882         ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
2883         ctrl_ctx->drop_flags = 0;
2884
2885         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2886         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2887
2888         spin_lock_irqsave(&xhci->lock, flags);
2889         ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2890                                         udev->slot_id);
2891         if (ret) {
2892                 spin_unlock_irqrestore(&xhci->lock, flags);
2893                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2894                 return ret;
2895         }
2896         xhci_ring_cmd_db(xhci);
2897         spin_unlock_irqrestore(&xhci->lock, flags);
2898
2899         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2900         timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2901                         USB_CTRL_SET_TIMEOUT);
2902         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2903          * the SetAddress() "recovery interval" required by USB and aborting the
2904          * command on a timeout.
2905          */
2906         if (timeleft <= 0) {
2907                 xhci_warn(xhci, "%s while waiting for a slot\n",
2908                                 timeleft == 0 ? "Timeout" : "Signal");
2909                 /* FIXME cancel the address device command */
2910                 return -ETIME;
2911         }
2912
2913         switch (virt_dev->cmd_status) {
2914         case COMP_CTX_STATE:
2915         case COMP_EBADSLT:
2916                 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2917                                 udev->slot_id);
2918                 ret = -EINVAL;
2919                 break;
2920         case COMP_TX_ERR:
2921                 dev_warn(&udev->dev, "Device not responding to set address.\n");
2922                 ret = -EPROTO;
2923                 break;
2924         case COMP_DEV_ERR:
2925                 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
2926                                 "device command.\n");
2927                 ret = -ENODEV;
2928                 break;
2929         case COMP_SUCCESS:
2930                 xhci_dbg(xhci, "Successful Address Device command\n");
2931                 break;
2932         default:
2933                 xhci_err(xhci, "ERROR: unexpected command completion "
2934                                 "code 0x%x.\n", virt_dev->cmd_status);
2935                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2936                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2937                 ret = -EINVAL;
2938                 break;
2939         }
2940         if (ret) {
2941                 return ret;
2942         }
2943         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2944         xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2945         xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2946                  udev->slot_id,
2947                  &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2948                  (unsigned long long)
2949                  le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
2950         xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2951                         (unsigned long long)virt_dev->out_ctx->dma);
2952         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2953         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2954         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2955         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2956         /*
2957          * USB core uses address 1 for the roothubs, so we add one to the
2958          * address given back to us by the HC.
2959          */
2960         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2961         /* Use kernel assigned address for devices; store xHC assigned
2962          * address locally. */
2963         virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
2964                 + 1;
2965         /* Zero the input context control for later use */
2966         ctrl_ctx->add_flags = 0;
2967         ctrl_ctx->drop_flags = 0;
2968
2969         xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2970
2971         return 0;
2972 }
2973
2974 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2975  * internal data structures for the device.
2976  */
2977 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2978                         struct usb_tt *tt, gfp_t mem_flags)
2979 {
2980         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2981         struct xhci_virt_device *vdev;
2982         struct xhci_command *config_cmd;
2983         struct xhci_input_control_ctx *ctrl_ctx;
2984         struct xhci_slot_ctx *slot_ctx;
2985         unsigned long flags;
2986         unsigned think_time;
2987         int ret;
2988
2989         /* Ignore root hubs */
2990         if (!hdev->parent)
2991                 return 0;
2992
2993         vdev = xhci->devs[hdev->slot_id];
2994         if (!vdev) {
2995                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2996                 return -EINVAL;
2997         }
2998         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2999         if (!config_cmd) {
3000                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3001                 return -ENOMEM;
3002         }
3003
3004         spin_lock_irqsave(&xhci->lock, flags);
3005         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
3006         ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3007         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3008         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
3009         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
3010         if (tt->multi)
3011                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
3012         if (xhci->hci_version > 0x95) {
3013                 xhci_dbg(xhci, "xHCI version %x needs hub "
3014                                 "TT think time and number of ports\n",
3015                                 (unsigned int) xhci->hci_version);
3016                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
3017                 /* Set TT think time - convert from ns to FS bit times.
3018                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
3019                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
3020                  *
3021                  * xHCI 1.0: this field shall be 0 if the device is not a
3022                  * High-spped hub.
3023                  */
3024                 think_time = tt->think_time;
3025                 if (think_time != 0)
3026                         think_time = (think_time / 666) - 1;
3027                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
3028                         slot_ctx->tt_info |=
3029                                 cpu_to_le32(TT_THINK_TIME(think_time));
3030         } else {
3031                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
3032                                 "TT think time or number of ports\n",
3033                                 (unsigned int) xhci->hci_version);
3034         }
3035         slot_ctx->dev_state = 0;
3036         spin_unlock_irqrestore(&xhci->lock, flags);
3037
3038         xhci_dbg(xhci, "Set up %s for hub device.\n",
3039                         (xhci->hci_version > 0x95) ?
3040                         "configure endpoint" : "evaluate context");
3041         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
3042         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
3043
3044         /* Issue and wait for the configure endpoint or
3045          * evaluate context command.
3046          */
3047         if (xhci->hci_version > 0x95)
3048                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3049                                 false, false);
3050         else
3051                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
3052                                 true, false);
3053
3054         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
3055         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
3056
3057         xhci_free_command(xhci, config_cmd);
3058         return ret;
3059 }
3060
3061 int xhci_get_frame(struct usb_hcd *hcd)
3062 {
3063         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3064         /* EHCI mods by the periodic size.  Why? */
3065         return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
3066 }
3067
3068 MODULE_DESCRIPTION(DRIVER_DESC);
3069 MODULE_AUTHOR(DRIVER_AUTHOR);
3070 MODULE_LICENSE("GPL");
3071
3072 static int __init xhci_hcd_init(void)
3073 {
3074 #ifdef CONFIG_PCI
3075         int retval = 0;
3076
3077         retval = xhci_register_pci();
3078
3079         if (retval < 0) {
3080                 printk(KERN_DEBUG "Problem registering PCI driver.");
3081                 return retval;
3082         }
3083 #endif
3084         /*
3085          * Check the compiler generated sizes of structures that must be laid
3086          * out in specific ways for hardware access.
3087          */
3088         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3089         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
3090         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
3091         /* xhci_device_control has eight fields, and also
3092          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
3093          */
3094         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
3095         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
3096         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
3097         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
3098         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
3099         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
3100         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
3101         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
3102         return 0;
3103 }
3104 module_init(xhci_hcd_init);
3105
3106 static void __exit xhci_hcd_cleanup(void)
3107 {
3108 #ifdef CONFIG_PCI
3109         xhci_unregister_pci();
3110 #endif
3111 }
3112 module_exit(xhci_hcd_cleanup);