2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55 u32 mask, u32 done, int usec)
60 result = xhci_readl(xhci, ptr);
61 if (result == ~(u32)0) /* card removed */
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd *xhci)
82 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
86 cmd = xhci_readl(xhci, &xhci->op_regs->command);
88 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 ms of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
99 int xhci_halt(struct xhci_hcd *xhci)
101 xhci_dbg(xhci, "// Halt the HC\n");
104 return handshake(xhci, &xhci->op_regs->status,
105 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
109 * Set the run bit and wait for the host to be running.
111 int xhci_start(struct xhci_hcd *xhci)
116 temp = xhci_readl(xhci, &xhci->op_regs->command);
118 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
120 xhci_writel(xhci, temp, &xhci->op_regs->command);
123 * Wait for the HCHalted Status bit to be 0 to indicate the host is
126 ret = handshake(xhci, &xhci->op_regs->status,
127 STS_HALT, 0, XHCI_MAX_HALT_USEC);
128 if (ret == -ETIMEDOUT)
129 xhci_err(xhci, "Host took too long to start, "
130 "waited %u microseconds.\n",
138 * This resets pipelines, timers, counters, state machines, etc.
139 * Transactions will be terminated immediately, and operational registers
140 * will be set to their defaults.
142 int xhci_reset(struct xhci_hcd *xhci)
148 state = xhci_readl(xhci, &xhci->op_regs->status);
149 if ((state & STS_HALT) == 0) {
150 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
154 xhci_dbg(xhci, "// Reset the HC\n");
155 command = xhci_readl(xhci, &xhci->op_regs->command);
156 command |= CMD_RESET;
157 xhci_writel(xhci, command, &xhci->op_regs->command);
159 ret = handshake(xhci, &xhci->op_regs->command,
160 CMD_RESET, 0, 250 * 1000);
164 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
166 * xHCI cannot write to any doorbells or operational registers other
167 * than status until the "Controller Not Ready" flag is cleared.
169 return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
174 * free all IRQs request
176 static void xhci_free_irq(struct xhci_hcd *xhci)
179 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
181 /* return if using legacy interrupt */
182 if (xhci_to_hcd(xhci)->irq >= 0)
185 if (xhci->msix_entries) {
186 for (i = 0; i < xhci->msix_count; i++)
187 if (xhci->msix_entries[i].vector)
188 free_irq(xhci->msix_entries[i].vector,
190 } else if (pdev->irq >= 0)
191 free_irq(pdev->irq, xhci_to_hcd(xhci));
199 static int xhci_setup_msi(struct xhci_hcd *xhci)
202 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
204 ret = pci_enable_msi(pdev);
206 xhci_err(xhci, "failed to allocate MSI entry\n");
210 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
211 0, "xhci_hcd", xhci_to_hcd(xhci));
213 xhci_err(xhci, "disable MSI interrupt\n");
214 pci_disable_msi(pdev);
223 static int xhci_setup_msix(struct xhci_hcd *xhci)
226 struct usb_hcd *hcd = xhci_to_hcd(xhci);
227 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
230 * calculate number of msi-x vectors supported.
231 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
232 * with max number of interrupters based on the xhci HCSPARAMS1.
233 * - num_online_cpus: maximum msi-x vectors per CPUs core.
234 * Add additional 1 vector to ensure always available interrupt.
236 xhci->msix_count = min(num_online_cpus() + 1,
237 HCS_MAX_INTRS(xhci->hcs_params1));
240 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
242 if (!xhci->msix_entries) {
243 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
247 for (i = 0; i < xhci->msix_count; i++) {
248 xhci->msix_entries[i].entry = i;
249 xhci->msix_entries[i].vector = 0;
252 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
254 xhci_err(xhci, "Failed to enable MSI-X\n");
258 for (i = 0; i < xhci->msix_count; i++) {
259 ret = request_irq(xhci->msix_entries[i].vector,
260 (irq_handler_t)xhci_msi_irq,
261 0, "xhci_hcd", xhci_to_hcd(xhci));
266 hcd->msix_enabled = 1;
270 xhci_err(xhci, "disable MSI-X interrupt\n");
272 pci_disable_msix(pdev);
274 kfree(xhci->msix_entries);
275 xhci->msix_entries = NULL;
279 /* Free any IRQs and disable MSI-X */
280 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
282 struct usb_hcd *hcd = xhci_to_hcd(xhci);
283 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
287 if (xhci->msix_entries) {
288 pci_disable_msix(pdev);
289 kfree(xhci->msix_entries);
290 xhci->msix_entries = NULL;
292 pci_disable_msi(pdev);
295 hcd->msix_enabled = 0;
300 * Initialize memory for HCD and xHC (one-time init).
302 * Program the PAGESIZE register, initialize the device context array, create
303 * device contexts (?), set up a command ring segment (or two?), create event
304 * ring (one for now).
306 int xhci_init(struct usb_hcd *hcd)
308 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
311 xhci_dbg(xhci, "xhci_init\n");
312 spin_lock_init(&xhci->lock);
314 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
315 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
317 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
319 retval = xhci_mem_init(xhci, GFP_KERNEL);
320 xhci_dbg(xhci, "Finished xhci_init\n");
325 /*-------------------------------------------------------------------------*/
328 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
329 void xhci_event_ring_work(unsigned long arg)
334 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
337 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
339 spin_lock_irqsave(&xhci->lock, flags);
340 temp = xhci_readl(xhci, &xhci->op_regs->status);
341 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
342 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
343 xhci_dbg(xhci, "HW died, polling stopped.\n");
344 spin_unlock_irqrestore(&xhci->lock, flags);
348 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
349 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
350 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
351 xhci->error_bitmask = 0;
352 xhci_dbg(xhci, "Event ring:\n");
353 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
354 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
355 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
356 temp_64 &= ~ERST_PTR_MASK;
357 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
358 xhci_dbg(xhci, "Command ring:\n");
359 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
360 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
361 xhci_dbg_cmd_ptrs(xhci);
362 for (i = 0; i < MAX_HC_SLOTS; ++i) {
365 for (j = 0; j < 31; ++j) {
366 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
369 spin_unlock_irqrestore(&xhci->lock, flags);
372 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
374 xhci_dbg(xhci, "Quit polling the event ring.\n");
378 static int xhci_run_finished(struct xhci_hcd *xhci)
380 if (xhci_start(xhci)) {
384 xhci->shared_hcd->state = HC_STATE_RUNNING;
386 if (xhci->quirks & XHCI_NEC_HOST)
387 xhci_ring_cmd_db(xhci);
389 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
394 * Start the HC after it was halted.
396 * This function is called by the USB core when the HC driver is added.
397 * Its opposite is xhci_stop().
399 * xhci_init() must be called once before this function can be called.
400 * Reset the HC, enable device slot contexts, program DCBAAP, and
401 * set command ring pointer and event ring pointer.
403 * Setup MSI-X vectors and enable interrupts.
405 int xhci_run(struct usb_hcd *hcd)
410 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
411 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
413 /* Start the xHCI host controller running only after the USB 2.0 roothub
417 hcd->uses_new_polling = 1;
418 if (!usb_hcd_is_primary_hcd(hcd))
419 return xhci_run_finished(xhci);
421 xhci_dbg(xhci, "xhci_run\n");
422 /* unregister the legacy interrupt */
424 free_irq(hcd->irq, hcd);
427 ret = xhci_setup_msix(xhci);
429 /* fall back to msi*/
430 ret = xhci_setup_msi(xhci);
433 /* fall back to legacy interrupt*/
434 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
435 hcd->irq_descr, hcd);
437 xhci_err(xhci, "request interrupt %d failed\n",
441 hcd->irq = pdev->irq;
444 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
445 init_timer(&xhci->event_ring_timer);
446 xhci->event_ring_timer.data = (unsigned long) xhci;
447 xhci->event_ring_timer.function = xhci_event_ring_work;
448 /* Poll the event ring */
449 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
451 xhci_dbg(xhci, "Setting event ring polling timer\n");
452 add_timer(&xhci->event_ring_timer);
455 xhci_dbg(xhci, "Command ring memory map follows:\n");
456 xhci_debug_ring(xhci, xhci->cmd_ring);
457 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
458 xhci_dbg_cmd_ptrs(xhci);
460 xhci_dbg(xhci, "ERST memory map follows:\n");
461 xhci_dbg_erst(xhci, &xhci->erst);
462 xhci_dbg(xhci, "Event ring:\n");
463 xhci_debug_ring(xhci, xhci->event_ring);
464 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
465 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
466 temp_64 &= ~ERST_PTR_MASK;
467 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
469 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
470 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
471 temp &= ~ER_IRQ_INTERVAL_MASK;
473 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
475 /* Set the HCD state before we enable the irqs */
476 temp = xhci_readl(xhci, &xhci->op_regs->command);
478 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
480 xhci_writel(xhci, temp, &xhci->op_regs->command);
482 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
483 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
484 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
485 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
486 &xhci->ir_set->irq_pending);
487 xhci_print_ir_set(xhci, xhci->ir_set, 0);
489 if (xhci->quirks & XHCI_NEC_HOST)
490 xhci_queue_vendor_command(xhci, 0, 0, 0,
491 TRB_TYPE(TRB_NEC_GET_FW));
493 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
497 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
499 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
501 spin_lock_irq(&xhci->lock);
504 /* The shared_hcd is going to be deallocated shortly (the USB core only
505 * calls this function when allocation fails in usb_add_hcd(), or
506 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
508 xhci->shared_hcd = NULL;
509 spin_unlock_irq(&xhci->lock);
515 * This function is called by the USB core when the HC driver is removed.
516 * Its opposite is xhci_run().
518 * Disable device contexts, disable IRQs, and quiesce the HC.
519 * Reset the HC, finish any completed transactions, and cleanup memory.
521 void xhci_stop(struct usb_hcd *hcd)
524 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
526 if (!usb_hcd_is_primary_hcd(hcd)) {
527 xhci_only_stop_hcd(xhci->shared_hcd);
531 spin_lock_irq(&xhci->lock);
532 /* Make sure the xHC is halted for a USB3 roothub
533 * (xhci_stop() could be called as part of failed init).
537 spin_unlock_irq(&xhci->lock);
539 xhci_cleanup_msix(xhci);
541 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
542 /* Tell the event ring poll function not to reschedule */
544 del_timer_sync(&xhci->event_ring_timer);
547 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
548 temp = xhci_readl(xhci, &xhci->op_regs->status);
549 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
550 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
551 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
552 &xhci->ir_set->irq_pending);
553 xhci_print_ir_set(xhci, xhci->ir_set, 0);
555 xhci_dbg(xhci, "cleaning up memory\n");
556 xhci_mem_cleanup(xhci);
557 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
558 xhci_readl(xhci, &xhci->op_regs->status));
562 * Shutdown HC (not bus-specific)
564 * This is called when the machine is rebooting or halting. We assume that the
565 * machine will be powered off, and the HC's internal state will be reset.
566 * Don't bother to free memory.
568 * This will only ever be called with the main usb_hcd (the USB3 roothub).
570 void xhci_shutdown(struct usb_hcd *hcd)
572 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
574 spin_lock_irq(&xhci->lock);
576 spin_unlock_irq(&xhci->lock);
578 xhci_cleanup_msix(xhci);
580 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
581 xhci_readl(xhci, &xhci->op_regs->status));
585 static void xhci_save_registers(struct xhci_hcd *xhci)
587 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
588 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
589 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
590 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
591 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
592 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
593 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
594 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
595 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
598 static void xhci_restore_registers(struct xhci_hcd *xhci)
600 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
601 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
602 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
603 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
604 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
605 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
606 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
607 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
610 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
614 /* step 2: initialize command ring buffer */
615 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
616 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
617 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
618 xhci->cmd_ring->dequeue) &
619 (u64) ~CMD_RING_RSVD_BITS) |
620 xhci->cmd_ring->cycle_state;
621 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
622 (long unsigned long) val_64);
623 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
627 * The whole command ring must be cleared to zero when we suspend the host.
629 * The host doesn't save the command ring pointer in the suspend well, so we
630 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
631 * aligned, because of the reserved bits in the command ring dequeue pointer
632 * register. Therefore, we can't just set the dequeue pointer back in the
633 * middle of the ring (TRBs are 16-byte aligned).
635 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
637 struct xhci_ring *ring;
638 struct xhci_segment *seg;
640 ring = xhci->cmd_ring;
643 memset(seg->trbs, 0, SEGMENT_SIZE);
645 } while (seg != ring->deq_seg);
647 /* Reset the software enqueue and dequeue pointers */
648 ring->deq_seg = ring->first_seg;
649 ring->dequeue = ring->first_seg->trbs;
650 ring->enq_seg = ring->deq_seg;
651 ring->enqueue = ring->dequeue;
654 * Ring is now zeroed, so the HW should look for change of ownership
655 * when the cycle bit is set to 1.
657 ring->cycle_state = 1;
660 * Reset the hardware dequeue pointer.
661 * Yes, this will need to be re-written after resume, but we're paranoid
662 * and want to make sure the hardware doesn't access bogus memory
663 * because, say, the BIOS or an SMI started the host without changing
664 * the command ring pointers.
666 xhci_set_cmd_ring_deq(xhci);
670 * Stop HC (not bus-specific)
672 * This is called when the machine transition into S3/S4 mode.
675 int xhci_suspend(struct xhci_hcd *xhci)
678 struct usb_hcd *hcd = xhci_to_hcd(xhci);
682 spin_lock_irq(&xhci->lock);
683 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
684 /* step 1: stop endpoint */
685 /* skipped assuming that port suspend has done */
687 /* step 2: clear Run/Stop bit */
688 command = xhci_readl(xhci, &xhci->op_regs->command);
690 xhci_writel(xhci, command, &xhci->op_regs->command);
691 if (handshake(xhci, &xhci->op_regs->status,
692 STS_HALT, STS_HALT, 100*100)) {
693 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
694 spin_unlock_irq(&xhci->lock);
697 xhci_clear_command_ring(xhci);
699 /* step 3: save registers */
700 xhci_save_registers(xhci);
702 /* step 4: set CSS flag */
703 command = xhci_readl(xhci, &xhci->op_regs->command);
705 xhci_writel(xhci, command, &xhci->op_regs->command);
706 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
707 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
708 spin_unlock_irq(&xhci->lock);
711 spin_unlock_irq(&xhci->lock);
713 /* step 5: remove core well power */
714 /* synchronize irq when using MSI-X */
715 if (xhci->msix_entries) {
716 for (i = 0; i < xhci->msix_count; i++)
717 synchronize_irq(xhci->msix_entries[i].vector);
724 * start xHC (not bus-specific)
726 * This is called when the machine transition from S3/S4 mode.
729 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
731 u32 command, temp = 0;
732 struct usb_hcd *hcd = xhci_to_hcd(xhci);
733 struct usb_hcd *secondary_hcd;
736 /* Wait a bit if either of the roothubs need to settle from the
737 * transistion into bus suspend.
739 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
741 xhci->bus_state[1].next_statechange))
744 spin_lock_irq(&xhci->lock);
747 /* step 1: restore register */
748 xhci_restore_registers(xhci);
749 /* step 2: initialize command ring buffer */
750 xhci_set_cmd_ring_deq(xhci);
751 /* step 3: restore state and start state*/
752 /* step 3: set CRS flag */
753 command = xhci_readl(xhci, &xhci->op_regs->command);
755 xhci_writel(xhci, command, &xhci->op_regs->command);
756 if (handshake(xhci, &xhci->op_regs->status,
757 STS_RESTORE, 0, 10*100)) {
758 xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
759 spin_unlock_irq(&xhci->lock);
762 temp = xhci_readl(xhci, &xhci->op_regs->status);
765 /* If restore operation fails, re-initialize the HC during resume */
766 if ((temp & STS_SRE) || hibernated) {
767 usb_root_hub_lost_power(hcd->self.root_hub);
769 xhci_dbg(xhci, "Stop HCD\n");
772 spin_unlock_irq(&xhci->lock);
773 xhci_cleanup_msix(xhci);
775 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
776 /* Tell the event ring poll function not to reschedule */
778 del_timer_sync(&xhci->event_ring_timer);
781 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
782 temp = xhci_readl(xhci, &xhci->op_regs->status);
783 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
784 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
785 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
786 &xhci->ir_set->irq_pending);
787 xhci_print_ir_set(xhci, xhci->ir_set, 0);
789 xhci_dbg(xhci, "cleaning up memory\n");
790 xhci_mem_cleanup(xhci);
791 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
792 xhci_readl(xhci, &xhci->op_regs->status));
794 /* USB core calls the PCI reinit and start functions twice:
795 * first with the primary HCD, and then with the secondary HCD.
796 * If we don't do the same, the host will never be started.
798 if (!usb_hcd_is_primary_hcd(hcd))
801 secondary_hcd = xhci->shared_hcd;
803 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
804 retval = xhci_init(hcd->primary_hcd);
807 xhci_dbg(xhci, "Start the primary HCD\n");
808 retval = xhci_run(hcd->primary_hcd);
812 xhci_dbg(xhci, "Start the secondary HCD\n");
813 retval = xhci_run(secondary_hcd);
815 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
817 hcd->state = HC_STATE_SUSPENDED;
821 /* step 4: set Run/Stop bit */
822 command = xhci_readl(xhci, &xhci->op_regs->command);
824 xhci_writel(xhci, command, &xhci->op_regs->command);
825 handshake(xhci, &xhci->op_regs->status, STS_HALT,
828 /* step 5: walk topology and initialize portsc,
829 * portpmsc and portli
831 /* this is done in bus_resume */
833 /* step 6: restart each of the previously
834 * Running endpoints by ringing their doorbells
837 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
839 spin_unlock_irq(&xhci->lock);
842 #endif /* CONFIG_PM */
844 /*-------------------------------------------------------------------------*/
847 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
848 * HCDs. Find the index for an endpoint given its descriptor. Use the return
849 * value to right shift 1 for the bitmask.
851 * Index = (epnum * 2) + direction - 1,
852 * where direction = 0 for OUT, 1 for IN.
853 * For control endpoints, the IN index is used (OUT index is unused), so
854 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
856 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
859 if (usb_endpoint_xfer_control(desc))
860 index = (unsigned int) (usb_endpoint_num(desc)*2);
862 index = (unsigned int) (usb_endpoint_num(desc)*2) +
863 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
867 /* Find the flag for this endpoint (for use in the control context). Use the
868 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
871 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
873 return 1 << (xhci_get_endpoint_index(desc) + 1);
876 /* Find the flag for this endpoint (for use in the control context). Use the
877 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
880 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
882 return 1 << (ep_index + 1);
885 /* Compute the last valid endpoint context index. Basically, this is the
886 * endpoint index plus one. For slot contexts with more than valid endpoint,
887 * we find the most significant bit set in the added contexts flags.
888 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
889 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
891 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
893 return fls(added_ctxs) - 1;
896 /* Returns 1 if the arguments are OK;
897 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
899 int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
900 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
902 struct xhci_hcd *xhci;
903 struct xhci_virt_device *virt_dev;
905 if (!hcd || (check_ep && !ep) || !udev) {
906 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
911 printk(KERN_DEBUG "xHCI %s called for root hub\n",
916 if (check_virt_dev) {
917 xhci = hcd_to_xhci(hcd);
918 if (!udev->slot_id || !xhci->devs
919 || !xhci->devs[udev->slot_id]) {
920 printk(KERN_DEBUG "xHCI %s called with unaddressed "
925 virt_dev = xhci->devs[udev->slot_id];
926 if (virt_dev->udev != udev) {
927 printk(KERN_DEBUG "xHCI %s called with udev and "
928 "virt_dev does not match\n", func);
936 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
937 struct usb_device *udev, struct xhci_command *command,
938 bool ctx_change, bool must_succeed);
941 * Full speed devices may have a max packet size greater than 8 bytes, but the
942 * USB core doesn't know that until it reads the first 8 bytes of the
943 * descriptor. If the usb_device's max packet size changes after that point,
944 * we need to issue an evaluate context command and wait on it.
946 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
947 unsigned int ep_index, struct urb *urb)
949 struct xhci_container_ctx *in_ctx;
950 struct xhci_container_ctx *out_ctx;
951 struct xhci_input_control_ctx *ctrl_ctx;
952 struct xhci_ep_ctx *ep_ctx;
954 int hw_max_packet_size;
957 out_ctx = xhci->devs[slot_id]->out_ctx;
958 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
959 hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2);
960 max_packet_size = urb->dev->ep0.desc.wMaxPacketSize;
961 if (hw_max_packet_size != max_packet_size) {
962 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
963 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
965 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
967 xhci_dbg(xhci, "Issuing evaluate context command.\n");
969 /* Set up the modified control endpoint 0 */
970 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
971 xhci->devs[slot_id]->out_ctx, ep_index);
972 in_ctx = xhci->devs[slot_id]->in_ctx;
973 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
974 ep_ctx->ep_info2 &= ~MAX_PACKET_MASK;
975 ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size);
977 /* Set up the input context flags for the command */
978 /* FIXME: This won't work if a non-default control endpoint
979 * changes max packet sizes.
981 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
982 ctrl_ctx->add_flags = EP0_FLAG;
983 ctrl_ctx->drop_flags = 0;
985 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
986 xhci_dbg_ctx(xhci, in_ctx, ep_index);
987 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
988 xhci_dbg_ctx(xhci, out_ctx, ep_index);
990 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
993 /* Clean up the input context for later use by bandwidth
996 ctrl_ctx->add_flags = SLOT_FLAG;
1002 * non-error returns are a promise to giveback() the urb later
1003 * we drop ownership so next owner (or urb unlink) can get it
1005 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1007 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1008 unsigned long flags;
1010 unsigned int slot_id, ep_index;
1011 struct urb_priv *urb_priv;
1014 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1015 true, true, __func__) <= 0)
1018 slot_id = urb->dev->slot_id;
1019 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1021 if (!HCD_HW_ACCESSIBLE(hcd)) {
1022 if (!in_interrupt())
1023 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1028 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1029 size = urb->number_of_packets;
1033 urb_priv = kzalloc(sizeof(struct urb_priv) +
1034 size * sizeof(struct xhci_td *), mem_flags);
1038 for (i = 0; i < size; i++) {
1039 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1040 if (!urb_priv->td[i]) {
1041 urb_priv->length = i;
1042 xhci_urb_free_priv(xhci, urb_priv);
1047 urb_priv->length = size;
1048 urb_priv->td_cnt = 0;
1049 urb->hcpriv = urb_priv;
1051 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1052 /* Check to see if the max packet size for the default control
1053 * endpoint changed during FS device enumeration
1055 if (urb->dev->speed == USB_SPEED_FULL) {
1056 ret = xhci_check_maxpacket(xhci, slot_id,
1062 /* We have a spinlock and interrupts disabled, so we must pass
1063 * atomic context to this function, which may allocate memory.
1065 spin_lock_irqsave(&xhci->lock, flags);
1066 if (xhci->xhc_state & XHCI_STATE_DYING)
1068 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1070 spin_unlock_irqrestore(&xhci->lock, flags);
1071 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1072 spin_lock_irqsave(&xhci->lock, flags);
1073 if (xhci->xhc_state & XHCI_STATE_DYING)
1075 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1076 EP_GETTING_STREAMS) {
1077 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1078 "is transitioning to using streams.\n");
1080 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1081 EP_GETTING_NO_STREAMS) {
1082 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1083 "is transitioning to "
1084 "not having streams.\n");
1087 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1090 spin_unlock_irqrestore(&xhci->lock, flags);
1091 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1092 spin_lock_irqsave(&xhci->lock, flags);
1093 if (xhci->xhc_state & XHCI_STATE_DYING)
1095 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1097 spin_unlock_irqrestore(&xhci->lock, flags);
1099 spin_lock_irqsave(&xhci->lock, flags);
1100 if (xhci->xhc_state & XHCI_STATE_DYING)
1102 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1104 spin_unlock_irqrestore(&xhci->lock, flags);
1109 xhci_urb_free_priv(xhci, urb_priv);
1111 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1112 "non-responsive xHCI host.\n",
1113 urb->ep->desc.bEndpointAddress, urb);
1114 spin_unlock_irqrestore(&xhci->lock, flags);
1118 /* Get the right ring for the given URB.
1119 * If the endpoint supports streams, boundary check the URB's stream ID.
1120 * If the endpoint doesn't support streams, return the singular endpoint ring.
1122 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1125 unsigned int slot_id;
1126 unsigned int ep_index;
1127 unsigned int stream_id;
1128 struct xhci_virt_ep *ep;
1130 slot_id = urb->dev->slot_id;
1131 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1132 stream_id = urb->stream_id;
1133 ep = &xhci->devs[slot_id]->eps[ep_index];
1134 /* Common case: no streams */
1135 if (!(ep->ep_state & EP_HAS_STREAMS))
1138 if (stream_id == 0) {
1140 "WARN: Slot ID %u, ep index %u has streams, "
1141 "but URB has no stream ID.\n",
1146 if (stream_id < ep->stream_info->num_streams)
1147 return ep->stream_info->stream_rings[stream_id];
1150 "WARN: Slot ID %u, ep index %u has "
1151 "stream IDs 1 to %u allocated, "
1152 "but stream ID %u is requested.\n",
1154 ep->stream_info->num_streams - 1,
1160 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1161 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1162 * should pick up where it left off in the TD, unless a Set Transfer Ring
1163 * Dequeue Pointer is issued.
1165 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1166 * the ring. Since the ring is a contiguous structure, they can't be physically
1167 * removed. Instead, there are two options:
1169 * 1) If the HC is in the middle of processing the URB to be canceled, we
1170 * simply move the ring's dequeue pointer past those TRBs using the Set
1171 * Transfer Ring Dequeue Pointer command. This will be the common case,
1172 * when drivers timeout on the last submitted URB and attempt to cancel.
1174 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1175 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1176 * HC will need to invalidate the any TRBs it has cached after the stop
1177 * endpoint command, as noted in the xHCI 0.95 errata.
1179 * 3) The TD may have completed by the time the Stop Endpoint Command
1180 * completes, so software needs to handle that case too.
1182 * This function should protect against the TD enqueueing code ringing the
1183 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1184 * It also needs to account for multiple cancellations on happening at the same
1185 * time for the same endpoint.
1187 * Note that this function can be called in any context, or so says
1188 * usb_hcd_unlink_urb()
1190 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1192 unsigned long flags;
1195 struct xhci_hcd *xhci;
1196 struct urb_priv *urb_priv;
1198 unsigned int ep_index;
1199 struct xhci_ring *ep_ring;
1200 struct xhci_virt_ep *ep;
1202 xhci = hcd_to_xhci(hcd);
1203 spin_lock_irqsave(&xhci->lock, flags);
1204 /* Make sure the URB hasn't completed or been unlinked already */
1205 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1206 if (ret || !urb->hcpriv)
1208 temp = xhci_readl(xhci, &xhci->op_regs->status);
1209 if (temp == 0xffffffff) {
1210 xhci_dbg(xhci, "HW died, freeing TD.\n");
1211 urb_priv = urb->hcpriv;
1213 usb_hcd_unlink_urb_from_ep(hcd, urb);
1214 spin_unlock_irqrestore(&xhci->lock, flags);
1215 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1216 xhci_urb_free_priv(xhci, urb_priv);
1219 if (xhci->xhc_state & XHCI_STATE_DYING) {
1220 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1221 "non-responsive xHCI host.\n",
1222 urb->ep->desc.bEndpointAddress, urb);
1223 /* Let the stop endpoint command watchdog timer (which set this
1224 * state) finish cleaning up the endpoint TD lists. We must
1225 * have caught it in the middle of dropping a lock and giving
1231 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1232 xhci_dbg(xhci, "Event ring:\n");
1233 xhci_debug_ring(xhci, xhci->event_ring);
1234 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1235 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1236 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1242 xhci_dbg(xhci, "Endpoint ring:\n");
1243 xhci_debug_ring(xhci, ep_ring);
1245 urb_priv = urb->hcpriv;
1247 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1248 td = urb_priv->td[i];
1249 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1252 /* Queue a stop endpoint command, but only if this is
1253 * the first cancellation to be handled.
1255 if (!(ep->ep_state & EP_HALT_PENDING)) {
1256 ep->ep_state |= EP_HALT_PENDING;
1257 ep->stop_cmds_pending++;
1258 ep->stop_cmd_timer.expires = jiffies +
1259 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1260 add_timer(&ep->stop_cmd_timer);
1261 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1262 xhci_ring_cmd_db(xhci);
1265 spin_unlock_irqrestore(&xhci->lock, flags);
1269 /* Drop an endpoint from a new bandwidth configuration for this device.
1270 * Only one call to this function is allowed per endpoint before
1271 * check_bandwidth() or reset_bandwidth() must be called.
1272 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1273 * add the endpoint to the schedule with possibly new parameters denoted by a
1274 * different endpoint descriptor in usb_host_endpoint.
1275 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1278 * The USB core will not allow URBs to be queued to an endpoint that is being
1279 * disabled, so there's no need for mutual exclusion to protect
1280 * the xhci->devs[slot_id] structure.
1282 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1283 struct usb_host_endpoint *ep)
1285 struct xhci_hcd *xhci;
1286 struct xhci_container_ctx *in_ctx, *out_ctx;
1287 struct xhci_input_control_ctx *ctrl_ctx;
1288 struct xhci_slot_ctx *slot_ctx;
1289 unsigned int last_ctx;
1290 unsigned int ep_index;
1291 struct xhci_ep_ctx *ep_ctx;
1293 u32 new_add_flags, new_drop_flags, new_slot_info;
1296 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1299 xhci = hcd_to_xhci(hcd);
1300 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1302 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1303 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1304 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1305 __func__, drop_flag);
1309 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1310 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1311 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1312 ep_index = xhci_get_endpoint_index(&ep->desc);
1313 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1314 /* If the HC already knows the endpoint is disabled,
1315 * or the HCD has noted it is disabled, ignore this request
1317 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
1318 ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
1319 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1324 ctrl_ctx->drop_flags |= drop_flag;
1325 new_drop_flags = ctrl_ctx->drop_flags;
1327 ctrl_ctx->add_flags &= ~drop_flag;
1328 new_add_flags = ctrl_ctx->add_flags;
1330 last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
1331 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1332 /* Update the last valid endpoint context, if we deleted the last one */
1333 if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
1334 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1335 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1337 new_slot_info = slot_ctx->dev_info;
1339 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1341 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1342 (unsigned int) ep->desc.bEndpointAddress,
1344 (unsigned int) new_drop_flags,
1345 (unsigned int) new_add_flags,
1346 (unsigned int) new_slot_info);
1350 /* Add an endpoint to a new possible bandwidth configuration for this device.
1351 * Only one call to this function is allowed per endpoint before
1352 * check_bandwidth() or reset_bandwidth() must be called.
1353 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1354 * add the endpoint to the schedule with possibly new parameters denoted by a
1355 * different endpoint descriptor in usb_host_endpoint.
1356 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1359 * The USB core will not allow URBs to be queued to an endpoint until the
1360 * configuration or alt setting is installed in the device, so there's no need
1361 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1363 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1364 struct usb_host_endpoint *ep)
1366 struct xhci_hcd *xhci;
1367 struct xhci_container_ctx *in_ctx, *out_ctx;
1368 unsigned int ep_index;
1369 struct xhci_ep_ctx *ep_ctx;
1370 struct xhci_slot_ctx *slot_ctx;
1371 struct xhci_input_control_ctx *ctrl_ctx;
1373 unsigned int last_ctx;
1374 u32 new_add_flags, new_drop_flags, new_slot_info;
1377 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1379 /* So we won't queue a reset ep command for a root hub */
1383 xhci = hcd_to_xhci(hcd);
1385 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1386 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1387 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1388 /* FIXME when we have to issue an evaluate endpoint command to
1389 * deal with ep0 max packet size changing once we get the
1392 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1393 __func__, added_ctxs);
1397 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1398 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1399 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1400 ep_index = xhci_get_endpoint_index(&ep->desc);
1401 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1402 /* If the HCD has already noted the endpoint is enabled,
1403 * ignore this request.
1405 if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
1406 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1412 * Configuration and alternate setting changes must be done in
1413 * process context, not interrupt context (or so documenation
1414 * for usb_set_interface() and usb_set_configuration() claim).
1416 if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
1417 udev, ep, GFP_NOIO) < 0) {
1418 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1419 __func__, ep->desc.bEndpointAddress);
1423 ctrl_ctx->add_flags |= added_ctxs;
1424 new_add_flags = ctrl_ctx->add_flags;
1426 /* If xhci_endpoint_disable() was called for this endpoint, but the
1427 * xHC hasn't been notified yet through the check_bandwidth() call,
1428 * this re-adds a new state for the endpoint from the new endpoint
1429 * descriptors. We must drop and re-add this endpoint, so we leave the
1432 new_drop_flags = ctrl_ctx->drop_flags;
1434 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1435 /* Update the last valid endpoint context, if we just added one past */
1436 if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
1437 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1438 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1440 new_slot_info = slot_ctx->dev_info;
1442 /* Store the usb_device pointer for later use */
1445 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1446 (unsigned int) ep->desc.bEndpointAddress,
1448 (unsigned int) new_drop_flags,
1449 (unsigned int) new_add_flags,
1450 (unsigned int) new_slot_info);
1454 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1456 struct xhci_input_control_ctx *ctrl_ctx;
1457 struct xhci_ep_ctx *ep_ctx;
1458 struct xhci_slot_ctx *slot_ctx;
1461 /* When a device's add flag and drop flag are zero, any subsequent
1462 * configure endpoint command will leave that endpoint's state
1463 * untouched. Make sure we don't leave any old state in the input
1464 * endpoint contexts.
1466 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1467 ctrl_ctx->drop_flags = 0;
1468 ctrl_ctx->add_flags = 0;
1469 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1470 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1471 /* Endpoint 0 is always valid */
1472 slot_ctx->dev_info |= LAST_CTX(1);
1473 for (i = 1; i < 31; ++i) {
1474 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1475 ep_ctx->ep_info = 0;
1476 ep_ctx->ep_info2 = 0;
1478 ep_ctx->tx_info = 0;
1482 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1483 struct usb_device *udev, int *cmd_status)
1487 switch (*cmd_status) {
1489 dev_warn(&udev->dev, "Not enough host controller resources "
1490 "for new device state.\n");
1492 /* FIXME: can we allocate more resources for the HC? */
1495 dev_warn(&udev->dev, "Not enough bandwidth "
1496 "for new device state.\n");
1498 /* FIXME: can we go back to the old state? */
1501 /* the HCD set up something wrong */
1502 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1504 "and endpoint is not disabled.\n");
1508 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1512 xhci_err(xhci, "ERROR: unexpected command completion "
1513 "code 0x%x.\n", *cmd_status);
1520 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1521 struct usb_device *udev, int *cmd_status)
1524 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1526 switch (*cmd_status) {
1528 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1529 "context command.\n");
1533 dev_warn(&udev->dev, "WARN: slot not enabled for"
1534 "evaluate context command.\n");
1535 case COMP_CTX_STATE:
1536 dev_warn(&udev->dev, "WARN: invalid context state for "
1537 "evaluate context command.\n");
1538 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1542 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1546 xhci_err(xhci, "ERROR: unexpected command completion "
1547 "code 0x%x.\n", *cmd_status);
1554 /* Issue a configure endpoint command or evaluate context command
1555 * and wait for it to finish.
1557 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1558 struct usb_device *udev,
1559 struct xhci_command *command,
1560 bool ctx_change, bool must_succeed)
1564 unsigned long flags;
1565 struct xhci_container_ctx *in_ctx;
1566 struct completion *cmd_completion;
1568 struct xhci_virt_device *virt_dev;
1570 spin_lock_irqsave(&xhci->lock, flags);
1571 virt_dev = xhci->devs[udev->slot_id];
1573 in_ctx = command->in_ctx;
1574 cmd_completion = command->completion;
1575 cmd_status = &command->status;
1576 command->command_trb = xhci->cmd_ring->enqueue;
1578 /* Enqueue pointer can be left pointing to the link TRB,
1579 * we must handle that
1581 if ((command->command_trb->link.control & TRB_TYPE_BITMASK)
1582 == TRB_TYPE(TRB_LINK))
1583 command->command_trb =
1584 xhci->cmd_ring->enq_seg->next->trbs;
1586 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1588 in_ctx = virt_dev->in_ctx;
1589 cmd_completion = &virt_dev->cmd_completion;
1590 cmd_status = &virt_dev->cmd_status;
1592 init_completion(cmd_completion);
1595 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1596 udev->slot_id, must_succeed);
1598 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1602 list_del(&command->cmd_list);
1603 spin_unlock_irqrestore(&xhci->lock, flags);
1604 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1607 xhci_ring_cmd_db(xhci);
1608 spin_unlock_irqrestore(&xhci->lock, flags);
1610 /* Wait for the configure endpoint command to complete */
1611 timeleft = wait_for_completion_interruptible_timeout(
1613 USB_CTRL_SET_TIMEOUT);
1614 if (timeleft <= 0) {
1615 xhci_warn(xhci, "%s while waiting for %s command\n",
1616 timeleft == 0 ? "Timeout" : "Signal",
1618 "configure endpoint" :
1619 "evaluate context");
1620 /* FIXME cancel the configure endpoint command */
1625 return xhci_configure_endpoint_result(xhci, udev, cmd_status);
1626 return xhci_evaluate_context_result(xhci, udev, cmd_status);
1629 /* Called after one or more calls to xhci_add_endpoint() or
1630 * xhci_drop_endpoint(). If this call fails, the USB core is expected
1631 * to call xhci_reset_bandwidth().
1633 * Since we are in the middle of changing either configuration or
1634 * installing a new alt setting, the USB core won't allow URBs to be
1635 * enqueued for any endpoint on the old config or interface. Nothing
1636 * else should be touching the xhci->devs[slot_id] structure, so we
1637 * don't need to take the xhci->lock for manipulating that.
1639 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1643 struct xhci_hcd *xhci;
1644 struct xhci_virt_device *virt_dev;
1645 struct xhci_input_control_ctx *ctrl_ctx;
1646 struct xhci_slot_ctx *slot_ctx;
1648 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1651 xhci = hcd_to_xhci(hcd);
1653 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1654 virt_dev = xhci->devs[udev->slot_id];
1656 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1657 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1658 ctrl_ctx->add_flags |= SLOT_FLAG;
1659 ctrl_ctx->add_flags &= ~EP0_FLAG;
1660 ctrl_ctx->drop_flags &= ~SLOT_FLAG;
1661 ctrl_ctx->drop_flags &= ~EP0_FLAG;
1662 xhci_dbg(xhci, "New Input Control Context:\n");
1663 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1664 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1665 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1667 ret = xhci_configure_endpoint(xhci, udev, NULL,
1670 /* Callee should call reset_bandwidth() */
1674 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1675 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1676 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1678 xhci_zero_in_ctx(xhci, virt_dev);
1679 /* Install new rings and free or cache any old rings */
1680 for (i = 1; i < 31; ++i) {
1681 if (!virt_dev->eps[i].new_ring)
1683 /* Only cache or free the old ring if it exists.
1684 * It may not if this is the first add of an endpoint.
1686 if (virt_dev->eps[i].ring) {
1687 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1689 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1690 virt_dev->eps[i].new_ring = NULL;
1696 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1698 struct xhci_hcd *xhci;
1699 struct xhci_virt_device *virt_dev;
1702 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1705 xhci = hcd_to_xhci(hcd);
1707 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1708 virt_dev = xhci->devs[udev->slot_id];
1709 /* Free any rings allocated for added endpoints */
1710 for (i = 0; i < 31; ++i) {
1711 if (virt_dev->eps[i].new_ring) {
1712 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1713 virt_dev->eps[i].new_ring = NULL;
1716 xhci_zero_in_ctx(xhci, virt_dev);
1719 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1720 struct xhci_container_ctx *in_ctx,
1721 struct xhci_container_ctx *out_ctx,
1722 u32 add_flags, u32 drop_flags)
1724 struct xhci_input_control_ctx *ctrl_ctx;
1725 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1726 ctrl_ctx->add_flags = add_flags;
1727 ctrl_ctx->drop_flags = drop_flags;
1728 xhci_slot_copy(xhci, in_ctx, out_ctx);
1729 ctrl_ctx->add_flags |= SLOT_FLAG;
1731 xhci_dbg(xhci, "Input Context:\n");
1732 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1735 void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1736 unsigned int slot_id, unsigned int ep_index,
1737 struct xhci_dequeue_state *deq_state)
1739 struct xhci_container_ctx *in_ctx;
1740 struct xhci_ep_ctx *ep_ctx;
1744 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1745 xhci->devs[slot_id]->out_ctx, ep_index);
1746 in_ctx = xhci->devs[slot_id]->in_ctx;
1747 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1748 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1749 deq_state->new_deq_ptr);
1751 xhci_warn(xhci, "WARN Cannot submit config ep after "
1752 "reset ep command\n");
1753 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1754 deq_state->new_deq_seg,
1755 deq_state->new_deq_ptr);
1758 ep_ctx->deq = addr | deq_state->new_cycle_state;
1760 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1761 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1762 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1765 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1766 struct usb_device *udev, unsigned int ep_index)
1768 struct xhci_dequeue_state deq_state;
1769 struct xhci_virt_ep *ep;
1771 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1772 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1773 /* We need to move the HW's dequeue pointer past this TD,
1774 * or it will attempt to resend it on the next doorbell ring.
1776 xhci_find_new_dequeue_state(xhci, udev->slot_id,
1777 ep_index, ep->stopped_stream, ep->stopped_td,
1780 /* HW with the reset endpoint quirk will use the saved dequeue state to
1781 * issue a configure endpoint command later.
1783 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
1784 xhci_dbg(xhci, "Queueing new dequeue state\n");
1785 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
1786 ep_index, ep->stopped_stream, &deq_state);
1788 /* Better hope no one uses the input context between now and the
1789 * reset endpoint completion!
1790 * XXX: No idea how this hardware will react when stream rings
1793 xhci_dbg(xhci, "Setting up input context for "
1794 "configure endpoint command\n");
1795 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
1796 ep_index, &deq_state);
1800 /* Deal with stalled endpoints. The core should have sent the control message
1801 * to clear the halt condition. However, we need to make the xHCI hardware
1802 * reset its sequence number, since a device will expect a sequence number of
1803 * zero after the halt condition is cleared.
1804 * Context: in_interrupt
1806 void xhci_endpoint_reset(struct usb_hcd *hcd,
1807 struct usb_host_endpoint *ep)
1809 struct xhci_hcd *xhci;
1810 struct usb_device *udev;
1811 unsigned int ep_index;
1812 unsigned long flags;
1814 struct xhci_virt_ep *virt_ep;
1816 xhci = hcd_to_xhci(hcd);
1817 udev = (struct usb_device *) ep->hcpriv;
1818 /* Called with a root hub endpoint (or an endpoint that wasn't added
1819 * with xhci_add_endpoint()
1823 ep_index = xhci_get_endpoint_index(&ep->desc);
1824 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1825 if (!virt_ep->stopped_td) {
1826 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
1827 ep->desc.bEndpointAddress);
1830 if (usb_endpoint_xfer_control(&ep->desc)) {
1831 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
1835 xhci_dbg(xhci, "Queueing reset endpoint command\n");
1836 spin_lock_irqsave(&xhci->lock, flags);
1837 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
1839 * Can't change the ring dequeue pointer until it's transitioned to the
1840 * stopped state, which is only upon a successful reset endpoint
1841 * command. Better hope that last command worked!
1844 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
1845 kfree(virt_ep->stopped_td);
1846 xhci_ring_cmd_db(xhci);
1848 virt_ep->stopped_td = NULL;
1849 virt_ep->stopped_trb = NULL;
1850 virt_ep->stopped_stream = 0;
1851 spin_unlock_irqrestore(&xhci->lock, flags);
1854 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
1857 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
1858 struct usb_device *udev, struct usb_host_endpoint *ep,
1859 unsigned int slot_id)
1862 unsigned int ep_index;
1863 unsigned int ep_state;
1867 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
1870 if (ep->ss_ep_comp.bmAttributes == 0) {
1871 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
1872 " descriptor for ep 0x%x does not support streams\n",
1873 ep->desc.bEndpointAddress);
1877 ep_index = xhci_get_endpoint_index(&ep->desc);
1878 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1879 if (ep_state & EP_HAS_STREAMS ||
1880 ep_state & EP_GETTING_STREAMS) {
1881 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
1882 "already has streams set up.\n",
1883 ep->desc.bEndpointAddress);
1884 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
1885 "dynamic stream context array reallocation.\n");
1888 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
1889 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
1890 "endpoint 0x%x; URBs are pending.\n",
1891 ep->desc.bEndpointAddress);
1897 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
1898 unsigned int *num_streams, unsigned int *num_stream_ctxs)
1900 unsigned int max_streams;
1902 /* The stream context array size must be a power of two */
1903 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
1905 * Find out how many primary stream array entries the host controller
1906 * supports. Later we may use secondary stream arrays (similar to 2nd
1907 * level page entries), but that's an optional feature for xHCI host
1908 * controllers. xHCs must support at least 4 stream IDs.
1910 max_streams = HCC_MAX_PSA(xhci->hcc_params);
1911 if (*num_stream_ctxs > max_streams) {
1912 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
1914 *num_stream_ctxs = max_streams;
1915 *num_streams = max_streams;
1919 /* Returns an error code if one of the endpoint already has streams.
1920 * This does not change any data structures, it only checks and gathers
1923 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
1924 struct usb_device *udev,
1925 struct usb_host_endpoint **eps, unsigned int num_eps,
1926 unsigned int *num_streams, u32 *changed_ep_bitmask)
1928 unsigned int max_streams;
1929 unsigned int endpoint_flag;
1933 for (i = 0; i < num_eps; i++) {
1934 ret = xhci_check_streams_endpoint(xhci, udev,
1935 eps[i], udev->slot_id);
1939 max_streams = USB_SS_MAX_STREAMS(
1940 eps[i]->ss_ep_comp.bmAttributes);
1941 if (max_streams < (*num_streams - 1)) {
1942 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
1943 eps[i]->desc.bEndpointAddress,
1945 *num_streams = max_streams+1;
1948 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
1949 if (*changed_ep_bitmask & endpoint_flag)
1951 *changed_ep_bitmask |= endpoint_flag;
1956 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
1957 struct usb_device *udev,
1958 struct usb_host_endpoint **eps, unsigned int num_eps)
1960 u32 changed_ep_bitmask = 0;
1961 unsigned int slot_id;
1962 unsigned int ep_index;
1963 unsigned int ep_state;
1966 slot_id = udev->slot_id;
1967 if (!xhci->devs[slot_id])
1970 for (i = 0; i < num_eps; i++) {
1971 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1972 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1973 /* Are streams already being freed for the endpoint? */
1974 if (ep_state & EP_GETTING_NO_STREAMS) {
1975 xhci_warn(xhci, "WARN Can't disable streams for "
1977 "streams are being disabled already.",
1978 eps[i]->desc.bEndpointAddress);
1981 /* Are there actually any streams to free? */
1982 if (!(ep_state & EP_HAS_STREAMS) &&
1983 !(ep_state & EP_GETTING_STREAMS)) {
1984 xhci_warn(xhci, "WARN Can't disable streams for "
1986 "streams are already disabled!",
1987 eps[i]->desc.bEndpointAddress);
1988 xhci_warn(xhci, "WARN xhci_free_streams() called "
1989 "with non-streams endpoint\n");
1992 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
1994 return changed_ep_bitmask;
1998 * The USB device drivers use this function (though the HCD interface in USB
1999 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
2000 * coordinate mass storage command queueing across multiple endpoints (basically
2001 * a stream ID == a task ID).
2003 * Setting up streams involves allocating the same size stream context array
2004 * for each endpoint and issuing a configure endpoint command for all endpoints.
2006 * Don't allow the call to succeed if one endpoint only supports one stream
2007 * (which means it doesn't support streams at all).
2009 * Drivers may get less stream IDs than they asked for, if the host controller
2010 * hardware or endpoints claim they can't support the number of requested
2013 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2014 struct usb_host_endpoint **eps, unsigned int num_eps,
2015 unsigned int num_streams, gfp_t mem_flags)
2018 struct xhci_hcd *xhci;
2019 struct xhci_virt_device *vdev;
2020 struct xhci_command *config_cmd;
2021 unsigned int ep_index;
2022 unsigned int num_stream_ctxs;
2023 unsigned long flags;
2024 u32 changed_ep_bitmask = 0;
2029 /* Add one to the number of streams requested to account for
2030 * stream 0 that is reserved for xHCI usage.
2033 xhci = hcd_to_xhci(hcd);
2034 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2037 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2039 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2043 /* Check to make sure all endpoints are not already configured for
2044 * streams. While we're at it, find the maximum number of streams that
2045 * all the endpoints will support and check for duplicate endpoints.
2047 spin_lock_irqsave(&xhci->lock, flags);
2048 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2049 num_eps, &num_streams, &changed_ep_bitmask);
2051 xhci_free_command(xhci, config_cmd);
2052 spin_unlock_irqrestore(&xhci->lock, flags);
2055 if (num_streams <= 1) {
2056 xhci_warn(xhci, "WARN: endpoints can't handle "
2057 "more than one stream.\n");
2058 xhci_free_command(xhci, config_cmd);
2059 spin_unlock_irqrestore(&xhci->lock, flags);
2062 vdev = xhci->devs[udev->slot_id];
2063 /* Mark each endpoint as being in transistion, so
2064 * xhci_urb_enqueue() will reject all URBs.
2066 for (i = 0; i < num_eps; i++) {
2067 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2068 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2070 spin_unlock_irqrestore(&xhci->lock, flags);
2072 /* Setup internal data structures and allocate HW data structures for
2073 * streams (but don't install the HW structures in the input context
2074 * until we're sure all memory allocation succeeded).
2076 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2077 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2078 num_stream_ctxs, num_streams);
2080 for (i = 0; i < num_eps; i++) {
2081 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2082 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2084 num_streams, mem_flags);
2085 if (!vdev->eps[ep_index].stream_info)
2087 /* Set maxPstreams in endpoint context and update deq ptr to
2088 * point to stream context array. FIXME
2092 /* Set up the input context for a configure endpoint command. */
2093 for (i = 0; i < num_eps; i++) {
2094 struct xhci_ep_ctx *ep_ctx;
2096 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2097 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2099 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2100 vdev->out_ctx, ep_index);
2101 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2102 vdev->eps[ep_index].stream_info);
2104 /* Tell the HW to drop its old copy of the endpoint context info
2105 * and add the updated copy from the input context.
2107 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2108 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2110 /* Issue and wait for the configure endpoint command */
2111 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2114 /* xHC rejected the configure endpoint command for some reason, so we
2115 * leave the old ring intact and free our internal streams data
2121 spin_lock_irqsave(&xhci->lock, flags);
2122 for (i = 0; i < num_eps; i++) {
2123 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2124 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2125 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2126 udev->slot_id, ep_index);
2127 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2129 xhci_free_command(xhci, config_cmd);
2130 spin_unlock_irqrestore(&xhci->lock, flags);
2132 /* Subtract 1 for stream 0, which drivers can't use */
2133 return num_streams - 1;
2136 /* If it didn't work, free the streams! */
2137 for (i = 0; i < num_eps; i++) {
2138 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2139 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2140 vdev->eps[ep_index].stream_info = NULL;
2141 /* FIXME Unset maxPstreams in endpoint context and
2142 * update deq ptr to point to normal string ring.
2144 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2145 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2146 xhci_endpoint_zero(xhci, vdev, eps[i]);
2148 xhci_free_command(xhci, config_cmd);
2152 /* Transition the endpoint from using streams to being a "normal" endpoint
2155 * Modify the endpoint context state, submit a configure endpoint command,
2156 * and free all endpoint rings for streams if that completes successfully.
2158 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2159 struct usb_host_endpoint **eps, unsigned int num_eps,
2163 struct xhci_hcd *xhci;
2164 struct xhci_virt_device *vdev;
2165 struct xhci_command *command;
2166 unsigned int ep_index;
2167 unsigned long flags;
2168 u32 changed_ep_bitmask;
2170 xhci = hcd_to_xhci(hcd);
2171 vdev = xhci->devs[udev->slot_id];
2173 /* Set up a configure endpoint command to remove the streams rings */
2174 spin_lock_irqsave(&xhci->lock, flags);
2175 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2176 udev, eps, num_eps);
2177 if (changed_ep_bitmask == 0) {
2178 spin_unlock_irqrestore(&xhci->lock, flags);
2182 /* Use the xhci_command structure from the first endpoint. We may have
2183 * allocated too many, but the driver may call xhci_free_streams() for
2184 * each endpoint it grouped into one call to xhci_alloc_streams().
2186 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2187 command = vdev->eps[ep_index].stream_info->free_streams_command;
2188 for (i = 0; i < num_eps; i++) {
2189 struct xhci_ep_ctx *ep_ctx;
2191 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2192 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2193 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2194 EP_GETTING_NO_STREAMS;
2196 xhci_endpoint_copy(xhci, command->in_ctx,
2197 vdev->out_ctx, ep_index);
2198 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2199 &vdev->eps[ep_index]);
2201 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2202 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2203 spin_unlock_irqrestore(&xhci->lock, flags);
2205 /* Issue and wait for the configure endpoint command,
2206 * which must succeed.
2208 ret = xhci_configure_endpoint(xhci, udev, command,
2211 /* xHC rejected the configure endpoint command for some reason, so we
2212 * leave the streams rings intact.
2217 spin_lock_irqsave(&xhci->lock, flags);
2218 for (i = 0; i < num_eps; i++) {
2219 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2220 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2221 vdev->eps[ep_index].stream_info = NULL;
2222 /* FIXME Unset maxPstreams in endpoint context and
2223 * update deq ptr to point to normal string ring.
2225 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2226 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2228 spin_unlock_irqrestore(&xhci->lock, flags);
2234 * This submits a Reset Device Command, which will set the device state to 0,
2235 * set the device address to 0, and disable all the endpoints except the default
2236 * control endpoint. The USB core should come back and call
2237 * xhci_address_device(), and then re-set up the configuration. If this is
2238 * called because of a usb_reset_and_verify_device(), then the old alternate
2239 * settings will be re-installed through the normal bandwidth allocation
2242 * Wait for the Reset Device command to finish. Remove all structures
2243 * associated with the endpoints that were disabled. Clear the input device
2244 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
2246 * If the virt_dev to be reset does not exist or does not match the udev,
2247 * it means the device is lost, possibly due to the xHC restore error and
2248 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2249 * re-allocate the device.
2251 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2254 unsigned long flags;
2255 struct xhci_hcd *xhci;
2256 unsigned int slot_id;
2257 struct xhci_virt_device *virt_dev;
2258 struct xhci_command *reset_device_cmd;
2260 int last_freed_endpoint;
2262 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2265 xhci = hcd_to_xhci(hcd);
2266 slot_id = udev->slot_id;
2267 virt_dev = xhci->devs[slot_id];
2269 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2270 "not exist. Re-allocate the device\n", slot_id);
2271 ret = xhci_alloc_dev(hcd, udev);
2278 if (virt_dev->udev != udev) {
2279 /* If the virt_dev and the udev does not match, this virt_dev
2280 * may belong to another udev.
2281 * Re-allocate the device.
2283 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2284 "not match the udev. Re-allocate the device\n",
2286 ret = xhci_alloc_dev(hcd, udev);
2293 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2294 /* Allocate the command structure that holds the struct completion.
2295 * Assume we're in process context, since the normal device reset
2296 * process has to wait for the device anyway. Storage devices are
2297 * reset as part of error handling, so use GFP_NOIO instead of
2300 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2301 if (!reset_device_cmd) {
2302 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2306 /* Attempt to submit the Reset Device command to the command ring */
2307 spin_lock_irqsave(&xhci->lock, flags);
2308 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2310 /* Enqueue pointer can be left pointing to the link TRB,
2311 * we must handle that
2313 if ((reset_device_cmd->command_trb->link.control & TRB_TYPE_BITMASK)
2314 == TRB_TYPE(TRB_LINK))
2315 reset_device_cmd->command_trb =
2316 xhci->cmd_ring->enq_seg->next->trbs;
2318 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2319 ret = xhci_queue_reset_device(xhci, slot_id);
2321 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2322 list_del(&reset_device_cmd->cmd_list);
2323 spin_unlock_irqrestore(&xhci->lock, flags);
2324 goto command_cleanup;
2326 xhci_ring_cmd_db(xhci);
2327 spin_unlock_irqrestore(&xhci->lock, flags);
2329 /* Wait for the Reset Device command to finish */
2330 timeleft = wait_for_completion_interruptible_timeout(
2331 reset_device_cmd->completion,
2332 USB_CTRL_SET_TIMEOUT);
2333 if (timeleft <= 0) {
2334 xhci_warn(xhci, "%s while waiting for reset device command\n",
2335 timeleft == 0 ? "Timeout" : "Signal");
2336 spin_lock_irqsave(&xhci->lock, flags);
2337 /* The timeout might have raced with the event ring handler, so
2338 * only delete from the list if the item isn't poisoned.
2340 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2341 list_del(&reset_device_cmd->cmd_list);
2342 spin_unlock_irqrestore(&xhci->lock, flags);
2344 goto command_cleanup;
2347 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2348 * unless we tried to reset a slot ID that wasn't enabled,
2349 * or the device wasn't in the addressed or configured state.
2351 ret = reset_device_cmd->status;
2353 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2354 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2355 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2357 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2358 xhci_info(xhci, "Not freeing device rings.\n");
2359 /* Don't treat this as an error. May change my mind later. */
2361 goto command_cleanup;
2363 xhci_dbg(xhci, "Successful reset device command.\n");
2366 if (xhci_is_vendor_info_code(xhci, ret))
2368 xhci_warn(xhci, "Unknown completion code %u for "
2369 "reset device command.\n", ret);
2371 goto command_cleanup;
2374 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2375 last_freed_endpoint = 1;
2376 for (i = 1; i < 31; ++i) {
2377 if (!virt_dev->eps[i].ring)
2379 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2380 last_freed_endpoint = i;
2382 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2383 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2387 xhci_free_command(xhci, reset_device_cmd);
2392 * At this point, the struct usb_device is about to go away, the device has
2393 * disconnected, and all traffic has been stopped and the endpoints have been
2394 * disabled. Free any HC data structures associated with that device.
2396 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2398 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2399 struct xhci_virt_device *virt_dev;
2400 unsigned long flags;
2404 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2408 virt_dev = xhci->devs[udev->slot_id];
2410 /* Stop any wayward timer functions (which may grab the lock) */
2411 for (i = 0; i < 31; ++i) {
2412 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2413 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2416 spin_lock_irqsave(&xhci->lock, flags);
2417 /* Don't disable the slot if the host controller is dead. */
2418 state = xhci_readl(xhci, &xhci->op_regs->status);
2419 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
2420 xhci_free_virt_device(xhci, udev->slot_id);
2421 spin_unlock_irqrestore(&xhci->lock, flags);
2425 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2426 spin_unlock_irqrestore(&xhci->lock, flags);
2427 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2430 xhci_ring_cmd_db(xhci);
2431 spin_unlock_irqrestore(&xhci->lock, flags);
2433 * Event command completion handler will free any data structures
2434 * associated with the slot. XXX Can free sleep?
2439 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2440 * timed out, or allocating memory failed. Returns 1 on success.
2442 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2444 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2445 unsigned long flags;
2449 spin_lock_irqsave(&xhci->lock, flags);
2450 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2452 spin_unlock_irqrestore(&xhci->lock, flags);
2453 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2456 xhci_ring_cmd_db(xhci);
2457 spin_unlock_irqrestore(&xhci->lock, flags);
2459 /* XXX: how much time for xHC slot assignment? */
2460 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2461 USB_CTRL_SET_TIMEOUT);
2462 if (timeleft <= 0) {
2463 xhci_warn(xhci, "%s while waiting for a slot\n",
2464 timeleft == 0 ? "Timeout" : "Signal");
2465 /* FIXME cancel the enable slot request */
2469 if (!xhci->slot_id) {
2470 xhci_err(xhci, "Error while assigning device slot ID\n");
2473 /* xhci_alloc_virt_device() does not touch rings; no need to lock.
2474 * Use GFP_NOIO, since this function can be called from
2475 * xhci_discover_or_reset_device(), which may be called as part of
2476 * mass storage driver error handling.
2478 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
2479 /* Disable slot, if we can do it without mem alloc */
2480 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2481 spin_lock_irqsave(&xhci->lock, flags);
2482 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2483 xhci_ring_cmd_db(xhci);
2484 spin_unlock_irqrestore(&xhci->lock, flags);
2487 udev->slot_id = xhci->slot_id;
2488 /* Is this a LS or FS device under a HS hub? */
2489 /* Hub or peripherial? */
2494 * Issue an Address Device command (which will issue a SetAddress request to
2496 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2497 * we should only issue and wait on one address command at the same time.
2499 * We add one to the device address issued by the hardware because the USB core
2500 * uses address 1 for the root hubs (even though they're not really devices).
2502 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2504 unsigned long flags;
2506 struct xhci_virt_device *virt_dev;
2508 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2509 struct xhci_slot_ctx *slot_ctx;
2510 struct xhci_input_control_ctx *ctrl_ctx;
2513 if (!udev->slot_id) {
2514 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2518 virt_dev = xhci->devs[udev->slot_id];
2520 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2522 * If this is the first Set Address since device plug-in or
2523 * virt_device realloaction after a resume with an xHCI power loss,
2524 * then set up the slot context.
2526 if (!slot_ctx->dev_info)
2527 xhci_setup_addressable_virt_dev(xhci, udev);
2528 /* Otherwise, update the control endpoint ring enqueue pointer. */
2530 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2531 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2532 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2534 spin_lock_irqsave(&xhci->lock, flags);
2535 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2538 spin_unlock_irqrestore(&xhci->lock, flags);
2539 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2542 xhci_ring_cmd_db(xhci);
2543 spin_unlock_irqrestore(&xhci->lock, flags);
2545 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2546 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2547 USB_CTRL_SET_TIMEOUT);
2548 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2549 * the SetAddress() "recovery interval" required by USB and aborting the
2550 * command on a timeout.
2552 if (timeleft <= 0) {
2553 xhci_warn(xhci, "%s while waiting for a slot\n",
2554 timeleft == 0 ? "Timeout" : "Signal");
2555 /* FIXME cancel the address device command */
2559 switch (virt_dev->cmd_status) {
2560 case COMP_CTX_STATE:
2562 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2567 dev_warn(&udev->dev, "Device not responding to set address.\n");
2571 xhci_dbg(xhci, "Successful Address Device command\n");
2574 xhci_err(xhci, "ERROR: unexpected command completion "
2575 "code 0x%x.\n", virt_dev->cmd_status);
2576 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2577 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2584 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2585 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2586 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2588 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2589 (unsigned long long)
2590 xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
2591 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2592 (unsigned long long)virt_dev->out_ctx->dma);
2593 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2594 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2595 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2596 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2598 * USB core uses address 1 for the roothubs, so we add one to the
2599 * address given back to us by the HC.
2601 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2602 /* Use kernel assigned address for devices; store xHC assigned
2603 * address locally. */
2604 virt_dev->address = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
2605 /* Zero the input context control for later use */
2606 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2607 ctrl_ctx->add_flags = 0;
2608 ctrl_ctx->drop_flags = 0;
2610 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2615 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2616 * internal data structures for the device.
2618 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2619 struct usb_tt *tt, gfp_t mem_flags)
2621 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2622 struct xhci_virt_device *vdev;
2623 struct xhci_command *config_cmd;
2624 struct xhci_input_control_ctx *ctrl_ctx;
2625 struct xhci_slot_ctx *slot_ctx;
2626 unsigned long flags;
2627 unsigned think_time;
2630 /* Ignore root hubs */
2634 vdev = xhci->devs[hdev->slot_id];
2636 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2639 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2641 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2645 spin_lock_irqsave(&xhci->lock, flags);
2646 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2647 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2648 ctrl_ctx->add_flags |= SLOT_FLAG;
2649 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2650 slot_ctx->dev_info |= DEV_HUB;
2652 slot_ctx->dev_info |= DEV_MTT;
2653 if (xhci->hci_version > 0x95) {
2654 xhci_dbg(xhci, "xHCI version %x needs hub "
2655 "TT think time and number of ports\n",
2656 (unsigned int) xhci->hci_version);
2657 slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild);
2658 /* Set TT think time - convert from ns to FS bit times.
2659 * 0 = 8 FS bit times, 1 = 16 FS bit times,
2660 * 2 = 24 FS bit times, 3 = 32 FS bit times.
2662 think_time = tt->think_time;
2663 if (think_time != 0)
2664 think_time = (think_time / 666) - 1;
2665 slot_ctx->tt_info |= TT_THINK_TIME(think_time);
2667 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2668 "TT think time or number of ports\n",
2669 (unsigned int) xhci->hci_version);
2671 slot_ctx->dev_state = 0;
2672 spin_unlock_irqrestore(&xhci->lock, flags);
2674 xhci_dbg(xhci, "Set up %s for hub device.\n",
2675 (xhci->hci_version > 0x95) ?
2676 "configure endpoint" : "evaluate context");
2677 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
2678 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
2680 /* Issue and wait for the configure endpoint or
2681 * evaluate context command.
2683 if (xhci->hci_version > 0x95)
2684 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2687 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2690 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
2691 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
2693 xhci_free_command(xhci, config_cmd);
2697 int xhci_get_frame(struct usb_hcd *hcd)
2699 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2700 /* EHCI mods by the periodic size. Why? */
2701 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
2704 MODULE_DESCRIPTION(DRIVER_DESC);
2705 MODULE_AUTHOR(DRIVER_AUTHOR);
2706 MODULE_LICENSE("GPL");
2708 static int __init xhci_hcd_init(void)
2713 retval = xhci_register_pci();
2716 printk(KERN_DEBUG "Problem registering PCI driver.");
2721 * Check the compiler generated sizes of structures that must be laid
2722 * out in specific ways for hardware access.
2724 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2725 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
2726 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
2727 /* xhci_device_control has eight fields, and also
2728 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
2730 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
2731 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
2732 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
2733 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
2734 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
2735 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
2736 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
2737 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2740 module_init(xhci_hcd_init);
2742 static void __exit xhci_hcd_cleanup(void)
2745 xhci_unregister_pci();
2748 module_exit(xhci_hcd_cleanup);