1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2016-2017 Google, Inc
5 * Fairchild FUSB302 Type-C Chip Driver
8 #include <linux/debugfs.h>
9 #include <linux/delay.h>
10 #include <linux/errno.h>
11 #include <linux/extcon.h>
12 #include <linux/gpio.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/of_device.h>
19 #include <linux/of_gpio.h>
20 #include <linux/pinctrl/consumer.h>
21 #include <linux/proc_fs.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/sched/clock.h>
24 #include <linux/seq_file.h>
25 #include <linux/slab.h>
26 #include <linux/string.h>
27 #include <linux/types.h>
28 #include <linux/usb/typec.h>
29 #include <linux/usb/tcpm.h>
30 #include <linux/usb/pd.h>
31 #include <linux/workqueue.h>
33 #include "fusb302_reg.h"
36 * When the device is SNK, BC_LVL interrupt is used to monitor cc pins
37 * for the current capability offered by the SRC. As FUSB302 chip fires
38 * the BC_LVL interrupt on PD signalings, cc lvl should be handled after
39 * a delay to avoid measuring on PD activities. The delay is slightly
40 * longer than PD_T_PD_DEBPUNCE (10-20ms).
42 #define T_BC_LVL_DEBOUNCE_DELAY_MS 30
51 enum src_current_status {
57 static const u8 ra_mda_value[] = {
58 [SRC_CURRENT_DEFAULT] = 4, /* 210mV */
59 [SRC_CURRENT_MEDIUM] = 9, /* 420mV */
60 [SRC_CURRENT_HIGH] = 18, /* 798mV */
63 static const u8 rd_mda_value[] = {
64 [SRC_CURRENT_DEFAULT] = 38, /* 1638mV */
65 [SRC_CURRENT_MEDIUM] = 38, /* 1638mV */
66 [SRC_CURRENT_HIGH] = 61, /* 2604mV */
69 #define LOG_BUFFER_ENTRIES 1024
70 #define LOG_BUFFER_ENTRY_SIZE 128
74 struct i2c_client *i2c_client;
75 struct tcpm_port *tcpm_port;
76 struct tcpc_dev tcpc_dev;
77 struct tcpc_config tcpc_config;
79 struct regulator *vbus;
83 struct extcon_dev *extcon;
85 struct workqueue_struct *wq;
86 struct delayed_work bc_lvl_handler;
91 /* lock for sharing chip states */
95 enum toggling_mode toggling_mode;
96 enum src_current_status src_current_status;
107 enum typec_cc_polarity cc_polarity;
108 enum typec_cc_status cc1;
109 enum typec_cc_status cc2;
110 u32 snk_pdo[PDO_MAX_OBJECTS];
112 #ifdef CONFIG_DEBUG_FS
113 struct dentry *dentry;
114 /* lock for log buffer access */
115 struct mutex logbuffer_lock;
118 u8 *logbuffer[LOG_BUFFER_ENTRIES];
126 #ifdef CONFIG_DEBUG_FS
128 static bool fusb302_log_full(struct fusb302_chip *chip)
130 return chip->logbuffer_tail ==
131 (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES;
134 static void _fusb302_log(struct fusb302_chip *chip, const char *fmt,
137 char tmpbuffer[LOG_BUFFER_ENTRY_SIZE];
138 u64 ts_nsec = local_clock();
139 unsigned long rem_nsec;
141 if (!chip->logbuffer[chip->logbuffer_head]) {
142 chip->logbuffer[chip->logbuffer_head] =
143 kzalloc(LOG_BUFFER_ENTRY_SIZE, GFP_KERNEL);
144 if (!chip->logbuffer[chip->logbuffer_head])
148 vsnprintf(tmpbuffer, sizeof(tmpbuffer), fmt, args);
150 mutex_lock(&chip->logbuffer_lock);
152 if (fusb302_log_full(chip)) {
153 chip->logbuffer_head = max(chip->logbuffer_head - 1, 0);
154 strlcpy(tmpbuffer, "overflow", sizeof(tmpbuffer));
157 if (chip->logbuffer_head < 0 ||
158 chip->logbuffer_head >= LOG_BUFFER_ENTRIES) {
160 "Bad log buffer index %d\n", chip->logbuffer_head);
164 if (!chip->logbuffer[chip->logbuffer_head]) {
166 "Log buffer index %d is NULL\n", chip->logbuffer_head);
170 rem_nsec = do_div(ts_nsec, 1000000000);
171 scnprintf(chip->logbuffer[chip->logbuffer_head],
172 LOG_BUFFER_ENTRY_SIZE, "[%5lu.%06lu] %s",
173 (unsigned long)ts_nsec, rem_nsec / 1000,
175 chip->logbuffer_head = (chip->logbuffer_head + 1) % LOG_BUFFER_ENTRIES;
178 mutex_unlock(&chip->logbuffer_lock);
181 static void fusb302_log(struct fusb302_chip *chip, const char *fmt, ...)
186 _fusb302_log(chip, fmt, args);
190 static int fusb302_debug_show(struct seq_file *s, void *v)
192 struct fusb302_chip *chip = (struct fusb302_chip *)s->private;
195 mutex_lock(&chip->logbuffer_lock);
196 tail = chip->logbuffer_tail;
197 while (tail != chip->logbuffer_head) {
198 seq_printf(s, "%s\n", chip->logbuffer[tail]);
199 tail = (tail + 1) % LOG_BUFFER_ENTRIES;
201 if (!seq_has_overflowed(s))
202 chip->logbuffer_tail = tail;
203 mutex_unlock(&chip->logbuffer_lock);
207 DEFINE_SHOW_ATTRIBUTE(fusb302_debug);
209 static struct dentry *rootdir;
211 static void fusb302_debugfs_init(struct fusb302_chip *chip)
213 mutex_init(&chip->logbuffer_lock);
215 rootdir = debugfs_create_dir("fusb302", NULL);
217 chip->dentry = debugfs_create_file(dev_name(chip->dev),
218 S_IFREG | 0444, rootdir,
219 chip, &fusb302_debug_fops);
222 static void fusb302_debugfs_exit(struct fusb302_chip *chip)
224 debugfs_remove(chip->dentry);
225 debugfs_remove(rootdir);
230 static void fusb302_log(const struct fusb302_chip *chip,
231 const char *fmt, ...) { }
232 static void fusb302_debugfs_init(const struct fusb302_chip *chip) { }
233 static void fusb302_debugfs_exit(const struct fusb302_chip *chip) { }
237 #define FUSB302_RESUME_RETRY 10
238 #define FUSB302_RESUME_RETRY_SLEEP 50
240 static bool fusb302_is_suspended(struct fusb302_chip *chip)
244 for (retry_cnt = 0; retry_cnt < FUSB302_RESUME_RETRY; retry_cnt++) {
245 if (atomic_read(&chip->pm_suspend)) {
246 dev_err(chip->dev, "i2c: pm suspend, retry %d/%d\n",
247 retry_cnt + 1, FUSB302_RESUME_RETRY);
248 msleep(FUSB302_RESUME_RETRY_SLEEP);
257 static int fusb302_i2c_write(struct fusb302_chip *chip,
262 atomic_set(&chip->i2c_busy, 1);
264 if (fusb302_is_suspended(chip)) {
265 atomic_set(&chip->i2c_busy, 0);
269 ret = i2c_smbus_write_byte_data(chip->i2c_client, address, data);
271 fusb302_log(chip, "cannot write 0x%02x to 0x%02x, ret=%d",
273 atomic_set(&chip->i2c_busy, 0);
278 static int fusb302_i2c_block_write(struct fusb302_chip *chip, u8 address,
279 u8 length, const u8 *data)
285 atomic_set(&chip->i2c_busy, 1);
287 if (fusb302_is_suspended(chip)) {
288 atomic_set(&chip->i2c_busy, 0);
292 ret = i2c_smbus_write_i2c_block_data(chip->i2c_client, address,
295 fusb302_log(chip, "cannot block write 0x%02x, len=%d, ret=%d",
296 address, length, ret);
297 atomic_set(&chip->i2c_busy, 0);
302 static int fusb302_i2c_read(struct fusb302_chip *chip,
303 u8 address, u8 *data)
307 atomic_set(&chip->i2c_busy, 1);
309 if (fusb302_is_suspended(chip)) {
310 atomic_set(&chip->i2c_busy, 0);
314 ret = i2c_smbus_read_byte_data(chip->i2c_client, address);
317 fusb302_log(chip, "cannot read %02x, ret=%d", address, ret);
318 atomic_set(&chip->i2c_busy, 0);
323 static int fusb302_i2c_block_read(struct fusb302_chip *chip, u8 address,
330 atomic_set(&chip->i2c_busy, 1);
332 if (fusb302_is_suspended(chip)) {
333 atomic_set(&chip->i2c_busy, 0);
337 ret = i2c_smbus_read_i2c_block_data(chip->i2c_client, address,
340 fusb302_log(chip, "cannot block read 0x%02x, len=%d, ret=%d",
341 address, length, ret);
345 fusb302_log(chip, "only read %d/%d bytes from 0x%02x",
346 ret, length, address);
351 atomic_set(&chip->i2c_busy, 0);
356 static int fusb302_i2c_mask_write(struct fusb302_chip *chip, u8 address,
362 ret = fusb302_i2c_read(chip, address, &data);
367 ret = fusb302_i2c_write(chip, address, data);
374 static int fusb302_i2c_set_bits(struct fusb302_chip *chip, u8 address,
377 return fusb302_i2c_mask_write(chip, address, 0x00, set_bits);
380 static int fusb302_i2c_clear_bits(struct fusb302_chip *chip, u8 address,
383 return fusb302_i2c_mask_write(chip, address, clear_bits, 0x00);
386 static int fusb302_sw_reset(struct fusb302_chip *chip)
390 ret = fusb302_i2c_write(chip, FUSB_REG_RESET,
391 FUSB_REG_RESET_SW_RESET);
393 fusb302_log(chip, "cannot sw reset the chip, ret=%d", ret);
395 fusb302_log(chip, "sw reset");
400 static int fusb302_enable_tx_auto_retries(struct fusb302_chip *chip)
404 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
405 FUSB_REG_CONTROL3_N_RETRIES_3 |
406 FUSB_REG_CONTROL3_AUTO_RETRY);
412 * initialize interrupt on the chip
413 * - unmasked interrupt: VBUS_OK
415 static int fusb302_init_interrupt(struct fusb302_chip *chip)
419 ret = fusb302_i2c_write(chip, FUSB_REG_MASK,
420 0xFF & ~FUSB_REG_MASK_VBUSOK);
423 ret = fusb302_i2c_write(chip, FUSB_REG_MASKA, 0xFF);
426 ret = fusb302_i2c_write(chip, FUSB_REG_MASKB, 0xFF);
429 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL0,
430 FUSB_REG_CONTROL0_INT_MASK);
437 static int fusb302_set_power_mode(struct fusb302_chip *chip, u8 power_mode)
441 ret = fusb302_i2c_write(chip, FUSB_REG_POWER, power_mode);
446 static int tcpm_init(struct tcpc_dev *dev)
448 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
453 ret = fusb302_sw_reset(chip);
456 ret = fusb302_enable_tx_auto_retries(chip);
459 ret = fusb302_init_interrupt(chip);
462 ret = fusb302_set_power_mode(chip, FUSB_REG_POWER_PWR_ALL);
465 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &data);
468 chip->vbus_present = !!(data & FUSB_REG_STATUS0_VBUSOK);
469 ret = fusb302_i2c_read(chip, FUSB_REG_DEVICE_ID, &data);
472 fusb302_log(chip, "fusb302 device ID: 0x%02x", data);
477 static int tcpm_get_vbus(struct tcpc_dev *dev)
479 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
483 mutex_lock(&chip->lock);
484 ret = chip->vbus_present ? 1 : 0;
485 mutex_unlock(&chip->lock);
490 static int tcpm_get_current_limit(struct tcpc_dev *dev)
492 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
494 int current_limit = 0;
495 unsigned long timeout;
501 * USB2 Charger detection may still be in progress when we get here,
502 * this can take upto 600ms, wait 800ms max.
504 timeout = jiffies + msecs_to_jiffies(800);
506 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_SDP) == 1)
509 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_CDP) == 1 ||
510 extcon_get_state(chip->extcon, EXTCON_CHG_USB_ACA) == 1)
511 current_limit = 1500;
513 if (extcon_get_state(chip->extcon, EXTCON_CHG_USB_DCP) == 1)
514 current_limit = 2000;
517 } while (current_limit == 0 && time_before(jiffies, timeout));
519 return current_limit;
522 static int fusb302_set_cc_pull(struct fusb302_chip *chip,
523 bool pull_up, bool pull_down)
527 u8 mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
528 FUSB_REG_SWITCHES0_CC2_PU_EN |
529 FUSB_REG_SWITCHES0_CC1_PD_EN |
530 FUSB_REG_SWITCHES0_CC2_PD_EN;
533 data |= (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
534 FUSB_REG_SWITCHES0_CC1_PU_EN :
535 FUSB_REG_SWITCHES0_CC2_PU_EN;
537 data |= FUSB_REG_SWITCHES0_CC1_PD_EN |
538 FUSB_REG_SWITCHES0_CC2_PD_EN;
539 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
543 chip->pull_up = pull_up;
548 static int fusb302_set_src_current(struct fusb302_chip *chip,
549 enum src_current_status status)
553 chip->src_current_status = status;
555 case SRC_CURRENT_DEFAULT:
556 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
557 FUSB_REG_CONTROL0_HOST_CUR_MASK,
558 FUSB_REG_CONTROL0_HOST_CUR_DEF);
560 case SRC_CURRENT_MEDIUM:
561 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
562 FUSB_REG_CONTROL0_HOST_CUR_MASK,
563 FUSB_REG_CONTROL0_HOST_CUR_MED);
565 case SRC_CURRENT_HIGH:
566 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL0,
567 FUSB_REG_CONTROL0_HOST_CUR_MASK,
568 FUSB_REG_CONTROL0_HOST_CUR_HIGH);
577 static int fusb302_set_toggling(struct fusb302_chip *chip,
578 enum toggling_mode mode)
582 /* first disable toggling */
583 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_CONTROL2,
584 FUSB_REG_CONTROL2_TOGGLE);
587 /* mask interrupts for SRC or SNK */
588 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASK,
589 FUSB_REG_MASK_BC_LVL |
590 FUSB_REG_MASK_COMP_CHNG);
593 chip->intr_bc_lvl = false;
594 chip->intr_comp_chng = false;
595 /* configure toggling mode: none/snk/src/drp */
597 case TOGGLING_MODE_OFF:
598 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
599 FUSB_REG_CONTROL2_MODE_MASK,
600 FUSB_REG_CONTROL2_MODE_NONE);
604 case TOGGLING_MODE_SNK:
605 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
606 FUSB_REG_CONTROL2_MODE_MASK,
607 FUSB_REG_CONTROL2_MODE_UFP);
611 case TOGGLING_MODE_SRC:
612 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
613 FUSB_REG_CONTROL2_MODE_MASK,
614 FUSB_REG_CONTROL2_MODE_DFP);
618 case TOGGLING_MODE_DRP:
619 ret = fusb302_i2c_mask_write(chip, FUSB_REG_CONTROL2,
620 FUSB_REG_CONTROL2_MODE_MASK,
621 FUSB_REG_CONTROL2_MODE_DRP);
629 if (mode == TOGGLING_MODE_OFF) {
630 /* mask TOGDONE interrupt */
631 ret = fusb302_i2c_set_bits(chip, FUSB_REG_MASKA,
632 FUSB_REG_MASKA_TOGDONE);
635 chip->intr_togdone = false;
637 /* unmask TOGDONE interrupt */
638 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA,
639 FUSB_REG_MASKA_TOGDONE);
642 chip->intr_togdone = true;
644 ret = fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL2,
645 FUSB_REG_CONTROL2_TOGGLE);
648 /* during toggling, consider cc as Open */
649 chip->cc1 = TYPEC_CC_OPEN;
650 chip->cc2 = TYPEC_CC_OPEN;
652 chip->toggling_mode = mode;
657 static const char * const typec_cc_status_name[] = {
658 [TYPEC_CC_OPEN] = "Open",
659 [TYPEC_CC_RA] = "Ra",
660 [TYPEC_CC_RD] = "Rd",
661 [TYPEC_CC_RP_DEF] = "Rp-def",
662 [TYPEC_CC_RP_1_5] = "Rp-1.5",
663 [TYPEC_CC_RP_3_0] = "Rp-3.0",
666 static const enum src_current_status cc_src_current[] = {
667 [TYPEC_CC_OPEN] = SRC_CURRENT_DEFAULT,
668 [TYPEC_CC_RA] = SRC_CURRENT_DEFAULT,
669 [TYPEC_CC_RD] = SRC_CURRENT_DEFAULT,
670 [TYPEC_CC_RP_DEF] = SRC_CURRENT_DEFAULT,
671 [TYPEC_CC_RP_1_5] = SRC_CURRENT_MEDIUM,
672 [TYPEC_CC_RP_3_0] = SRC_CURRENT_HIGH,
675 static int tcpm_set_cc(struct tcpc_dev *dev, enum typec_cc_status cc)
677 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
680 bool pull_up, pull_down;
682 enum toggling_mode mode;
684 mutex_lock(&chip->lock);
694 case TYPEC_CC_RP_DEF:
695 case TYPEC_CC_RP_1_5:
696 case TYPEC_CC_RP_3_0:
701 fusb302_log(chip, "unsupported cc value %s",
702 typec_cc_status_name[cc]);
706 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
708 fusb302_log(chip, "cannot stop toggling, ret=%d", ret);
711 ret = fusb302_set_cc_pull(chip, pull_up, pull_down);
714 "cannot set cc pulling up %s, down %s, ret = %d",
715 pull_up ? "True" : "False",
716 pull_down ? "True" : "False",
720 /* reset the cc status */
721 chip->cc1 = TYPEC_CC_OPEN;
722 chip->cc2 = TYPEC_CC_OPEN;
723 /* adjust current for SRC */
725 ret = fusb302_set_src_current(chip, cc_src_current[cc]);
727 fusb302_log(chip, "cannot set src current %s, ret=%d",
728 typec_cc_status_name[cc], ret);
732 /* enable/disable interrupts, BC_LVL for SNK and COMP_CHNG for SRC */
734 rd_mda = rd_mda_value[cc_src_current[cc]];
735 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
738 "cannot set SRC measure value, ret=%d",
742 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
743 FUSB_REG_MASK_BC_LVL |
744 FUSB_REG_MASK_COMP_CHNG,
745 FUSB_REG_MASK_COMP_CHNG);
747 fusb302_log(chip, "cannot set SRC interrupt, ret=%d",
751 chip->intr_bc_lvl = false;
752 chip->intr_comp_chng = true;
755 ret = fusb302_i2c_mask_write(chip, FUSB_REG_MASK,
756 FUSB_REG_MASK_BC_LVL |
757 FUSB_REG_MASK_COMP_CHNG,
758 FUSB_REG_MASK_BC_LVL);
760 fusb302_log(chip, "cannot set SRC interrupt, ret=%d",
764 chip->intr_bc_lvl = true;
765 chip->intr_comp_chng = false;
767 fusb302_log(chip, "cc := %s", typec_cc_status_name[cc]);
769 /* Enable detection for fixed SNK or SRC only roles */
772 mode = TOGGLING_MODE_SNK;
774 case TYPEC_CC_RP_DEF:
775 case TYPEC_CC_RP_1_5:
776 case TYPEC_CC_RP_3_0:
777 mode = TOGGLING_MODE_SRC;
780 mode = TOGGLING_MODE_OFF;
784 if (mode != TOGGLING_MODE_OFF) {
785 ret = fusb302_set_toggling(chip, mode);
788 "cannot set fixed role toggling mode, ret=%d",
792 mutex_unlock(&chip->lock);
797 static int tcpm_get_cc(struct tcpc_dev *dev, enum typec_cc_status *cc1,
798 enum typec_cc_status *cc2)
800 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
803 mutex_lock(&chip->lock);
806 fusb302_log(chip, "cc1=%s, cc2=%s", typec_cc_status_name[*cc1],
807 typec_cc_status_name[*cc2]);
808 mutex_unlock(&chip->lock);
813 static int tcpm_set_polarity(struct tcpc_dev *dev,
814 enum typec_cc_polarity polarity)
819 static int tcpm_set_vconn(struct tcpc_dev *dev, bool on)
821 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
824 u8 switches0_data = 0x00;
825 u8 switches0_mask = FUSB_REG_SWITCHES0_VCONN_CC1 |
826 FUSB_REG_SWITCHES0_VCONN_CC2;
828 mutex_lock(&chip->lock);
829 if (chip->vconn_on == on) {
830 fusb302_log(chip, "vconn is already %s", on ? "On" : "Off");
834 switches0_data = (chip->cc_polarity == TYPEC_POLARITY_CC1) ?
835 FUSB_REG_SWITCHES0_VCONN_CC2 :
836 FUSB_REG_SWITCHES0_VCONN_CC1;
838 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
839 switches0_mask, switches0_data);
843 fusb302_log(chip, "vconn := %s", on ? "On" : "Off");
845 mutex_unlock(&chip->lock);
850 static int tcpm_set_vbus(struct tcpc_dev *dev, bool on, bool charge)
852 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
856 mutex_lock(&chip->lock);
857 if (chip->vbus_on == on) {
858 fusb302_log(chip, "vbus is already %s", on ? "On" : "Off");
861 ret = regulator_enable(chip->vbus);
863 ret = regulator_disable(chip->vbus);
865 fusb302_log(chip, "cannot %s vbus regulator, ret=%d",
866 on ? "enable" : "disable", ret);
870 fusb302_log(chip, "vbus := %s", on ? "On" : "Off");
872 if (chip->charge_on == charge)
873 fusb302_log(chip, "charge is already %s",
874 charge ? "On" : "Off");
876 chip->charge_on = charge;
879 mutex_unlock(&chip->lock);
884 static int fusb302_pd_tx_flush(struct fusb302_chip *chip)
886 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL0,
887 FUSB_REG_CONTROL0_TX_FLUSH);
890 static int fusb302_pd_rx_flush(struct fusb302_chip *chip)
892 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL1,
893 FUSB_REG_CONTROL1_RX_FLUSH);
896 static int fusb302_pd_set_auto_goodcrc(struct fusb302_chip *chip, bool on)
899 return fusb302_i2c_set_bits(chip, FUSB_REG_SWITCHES1,
900 FUSB_REG_SWITCHES1_AUTO_GCRC);
901 return fusb302_i2c_clear_bits(chip, FUSB_REG_SWITCHES1,
902 FUSB_REG_SWITCHES1_AUTO_GCRC);
905 static int fusb302_pd_set_interrupts(struct fusb302_chip *chip, bool on)
908 u8 mask_interrupts = FUSB_REG_MASK_COLLISION;
909 u8 maska_interrupts = FUSB_REG_MASKA_RETRYFAIL |
910 FUSB_REG_MASKA_HARDSENT |
911 FUSB_REG_MASKA_TX_SUCCESS |
912 FUSB_REG_MASKA_HARDRESET;
913 u8 maskb_interrupts = FUSB_REG_MASKB_GCRCSENT;
916 fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, mask_interrupts) :
917 fusb302_i2c_set_bits(chip, FUSB_REG_MASK, mask_interrupts);
921 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKA, maska_interrupts) :
922 fusb302_i2c_set_bits(chip, FUSB_REG_MASKA, maska_interrupts);
926 fusb302_i2c_clear_bits(chip, FUSB_REG_MASKB, maskb_interrupts) :
927 fusb302_i2c_set_bits(chip, FUSB_REG_MASKB, maskb_interrupts);
931 static int tcpm_set_pd_rx(struct tcpc_dev *dev, bool on)
933 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
937 mutex_lock(&chip->lock);
938 ret = fusb302_pd_rx_flush(chip);
940 fusb302_log(chip, "cannot flush pd rx buffer, ret=%d", ret);
943 ret = fusb302_pd_tx_flush(chip);
945 fusb302_log(chip, "cannot flush pd tx buffer, ret=%d", ret);
948 ret = fusb302_pd_set_auto_goodcrc(chip, on);
950 fusb302_log(chip, "cannot turn %s auto GCRC, ret=%d",
951 on ? "on" : "off", ret);
954 ret = fusb302_pd_set_interrupts(chip, on);
956 fusb302_log(chip, "cannot turn %s pd interrupts, ret=%d",
957 on ? "on" : "off", ret);
960 fusb302_log(chip, "pd := %s", on ? "on" : "off");
962 mutex_unlock(&chip->lock);
967 static const char * const typec_role_name[] = {
968 [TYPEC_SINK] = "Sink",
969 [TYPEC_SOURCE] = "Source",
972 static const char * const typec_data_role_name[] = {
973 [TYPEC_DEVICE] = "Device",
974 [TYPEC_HOST] = "Host",
977 static int tcpm_set_roles(struct tcpc_dev *dev, bool attached,
978 enum typec_role pwr, enum typec_data_role data)
980 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
983 u8 switches1_mask = FUSB_REG_SWITCHES1_POWERROLE |
984 FUSB_REG_SWITCHES1_DATAROLE;
985 u8 switches1_data = 0x00;
987 mutex_lock(&chip->lock);
988 if (pwr == TYPEC_SOURCE)
989 switches1_data |= FUSB_REG_SWITCHES1_POWERROLE;
990 if (data == TYPEC_HOST)
991 switches1_data |= FUSB_REG_SWITCHES1_DATAROLE;
992 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
993 switches1_mask, switches1_data);
995 fusb302_log(chip, "unable to set pd header %s, %s, ret=%d",
996 typec_role_name[pwr], typec_data_role_name[data],
1000 fusb302_log(chip, "pd header := %s, %s", typec_role_name[pwr],
1001 typec_data_role_name[data]);
1003 mutex_unlock(&chip->lock);
1008 static int tcpm_start_drp_toggling(struct tcpc_dev *dev,
1009 enum typec_cc_status cc)
1011 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
1015 mutex_lock(&chip->lock);
1016 ret = fusb302_set_src_current(chip, cc_src_current[cc]);
1018 fusb302_log(chip, "unable to set src current %s, ret=%d",
1019 typec_cc_status_name[cc], ret);
1022 ret = fusb302_set_toggling(chip, TOGGLING_MODE_DRP);
1025 "unable to start drp toggling, ret=%d", ret);
1028 fusb302_log(chip, "start drp toggling");
1030 mutex_unlock(&chip->lock);
1035 static int fusb302_pd_send_message(struct fusb302_chip *chip,
1036 const struct pd_message *msg)
1044 buf[pos++] = FUSB302_TKN_SYNC1;
1045 buf[pos++] = FUSB302_TKN_SYNC1;
1046 buf[pos++] = FUSB302_TKN_SYNC1;
1047 buf[pos++] = FUSB302_TKN_SYNC2;
1049 len = pd_header_cnt_le(msg->header) * 4;
1050 /* plug 2 for header */
1054 "PD message too long %d (incl. header)", len);
1057 /* packsym tells the FUSB302 chip that the next X bytes are payload */
1058 buf[pos++] = FUSB302_TKN_PACKSYM | (len & 0x1F);
1059 memcpy(&buf[pos], &msg->header, sizeof(msg->header));
1060 pos += sizeof(msg->header);
1063 memcpy(&buf[pos], msg->payload, len);
1067 buf[pos++] = FUSB302_TKN_JAMCRC;
1069 buf[pos++] = FUSB302_TKN_EOP;
1070 /* turn tx off after sending message */
1071 buf[pos++] = FUSB302_TKN_TXOFF;
1072 /* start transmission */
1073 buf[pos++] = FUSB302_TKN_TXON;
1075 ret = fusb302_i2c_block_write(chip, FUSB_REG_FIFOS, pos, buf);
1078 fusb302_log(chip, "sending PD message header: %x", msg->header);
1079 fusb302_log(chip, "sending PD message len: %d", len);
1084 static int fusb302_pd_send_hardreset(struct fusb302_chip *chip)
1086 return fusb302_i2c_set_bits(chip, FUSB_REG_CONTROL3,
1087 FUSB_REG_CONTROL3_SEND_HARDRESET);
1090 static const char * const transmit_type_name[] = {
1091 [TCPC_TX_SOP] = "SOP",
1092 [TCPC_TX_SOP_PRIME] = "SOP'",
1093 [TCPC_TX_SOP_PRIME_PRIME] = "SOP''",
1094 [TCPC_TX_SOP_DEBUG_PRIME] = "DEBUG'",
1095 [TCPC_TX_SOP_DEBUG_PRIME_PRIME] = "DEBUG''",
1096 [TCPC_TX_HARD_RESET] = "HARD_RESET",
1097 [TCPC_TX_CABLE_RESET] = "CABLE_RESET",
1098 [TCPC_TX_BIST_MODE_2] = "BIST_MODE_2",
1101 static int tcpm_pd_transmit(struct tcpc_dev *dev, enum tcpm_transmit_type type,
1102 const struct pd_message *msg)
1104 struct fusb302_chip *chip = container_of(dev, struct fusb302_chip,
1108 mutex_lock(&chip->lock);
1111 ret = fusb302_pd_send_message(chip, msg);
1114 "cannot send PD message, ret=%d", ret);
1116 case TCPC_TX_HARD_RESET:
1117 ret = fusb302_pd_send_hardreset(chip);
1120 "cannot send hardreset, ret=%d", ret);
1123 fusb302_log(chip, "type %s not supported",
1124 transmit_type_name[type]);
1127 mutex_unlock(&chip->lock);
1132 static enum typec_cc_status fusb302_bc_lvl_to_cc(u8 bc_lvl)
1134 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_1230_MAX)
1135 return TYPEC_CC_RP_3_0;
1136 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_600_1230)
1137 return TYPEC_CC_RP_1_5;
1138 if (bc_lvl == FUSB_REG_STATUS0_BC_LVL_200_600)
1139 return TYPEC_CC_RP_DEF;
1140 return TYPEC_CC_OPEN;
1143 static void fusb302_bc_lvl_handler_work(struct work_struct *work)
1145 struct fusb302_chip *chip = container_of(work, struct fusb302_chip,
1146 bc_lvl_handler.work);
1150 enum typec_cc_status cc_status;
1152 mutex_lock(&chip->lock);
1153 if (!chip->intr_bc_lvl) {
1154 fusb302_log(chip, "BC_LVL interrupt is turned off, abort");
1157 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1160 fusb302_log(chip, "BC_LVL handler, status0=0x%02x", status0);
1161 if (status0 & FUSB_REG_STATUS0_ACTIVITY) {
1162 fusb302_log(chip, "CC activities detected, delay handling");
1163 mod_delayed_work(chip->wq, &chip->bc_lvl_handler,
1164 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS));
1167 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1168 cc_status = fusb302_bc_lvl_to_cc(bc_lvl);
1169 if (chip->cc_polarity == TYPEC_POLARITY_CC1) {
1170 if (chip->cc1 != cc_status) {
1171 fusb302_log(chip, "cc1: %s -> %s",
1172 typec_cc_status_name[chip->cc1],
1173 typec_cc_status_name[cc_status]);
1174 chip->cc1 = cc_status;
1175 tcpm_cc_change(chip->tcpm_port);
1178 if (chip->cc2 != cc_status) {
1179 fusb302_log(chip, "cc2: %s -> %s",
1180 typec_cc_status_name[chip->cc2],
1181 typec_cc_status_name[cc_status]);
1182 chip->cc2 = cc_status;
1183 tcpm_cc_change(chip->tcpm_port);
1188 mutex_unlock(&chip->lock);
1191 #define PDO_FIXED_FLAGS \
1192 (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)
1194 static const u32 src_pdo[] = {
1195 PDO_FIXED(5000, 400, PDO_FIXED_FLAGS),
1198 static const struct tcpc_config fusb302_tcpc_config = {
1200 .nr_src_pdo = ARRAY_SIZE(src_pdo),
1201 .operating_snk_mw = 2500,
1202 .type = TYPEC_PORT_DRP,
1203 .data = TYPEC_PORT_DRD,
1204 .default_role = TYPEC_SINK,
1208 static void init_tcpc_dev(struct tcpc_dev *fusb302_tcpc_dev)
1210 fusb302_tcpc_dev->init = tcpm_init;
1211 fusb302_tcpc_dev->get_vbus = tcpm_get_vbus;
1212 fusb302_tcpc_dev->get_current_limit = tcpm_get_current_limit;
1213 fusb302_tcpc_dev->set_cc = tcpm_set_cc;
1214 fusb302_tcpc_dev->get_cc = tcpm_get_cc;
1215 fusb302_tcpc_dev->set_polarity = tcpm_set_polarity;
1216 fusb302_tcpc_dev->set_vconn = tcpm_set_vconn;
1217 fusb302_tcpc_dev->set_vbus = tcpm_set_vbus;
1218 fusb302_tcpc_dev->set_pd_rx = tcpm_set_pd_rx;
1219 fusb302_tcpc_dev->set_roles = tcpm_set_roles;
1220 fusb302_tcpc_dev->start_drp_toggling = tcpm_start_drp_toggling;
1221 fusb302_tcpc_dev->pd_transmit = tcpm_pd_transmit;
1224 static const char * const cc_polarity_name[] = {
1225 [TYPEC_POLARITY_CC1] = "Polarity_CC1",
1226 [TYPEC_POLARITY_CC2] = "Polarity_CC2",
1229 static int fusb302_set_cc_polarity(struct fusb302_chip *chip,
1230 enum typec_cc_polarity cc_polarity)
1233 u8 switches0_mask = FUSB_REG_SWITCHES0_CC1_PU_EN |
1234 FUSB_REG_SWITCHES0_CC2_PU_EN |
1235 FUSB_REG_SWITCHES0_VCONN_CC1 |
1236 FUSB_REG_SWITCHES0_VCONN_CC2 |
1237 FUSB_REG_SWITCHES0_MEAS_CC1 |
1238 FUSB_REG_SWITCHES0_MEAS_CC2;
1239 u8 switches0_data = 0x00;
1240 u8 switches1_mask = FUSB_REG_SWITCHES1_TXCC1_EN |
1241 FUSB_REG_SWITCHES1_TXCC2_EN;
1242 u8 switches1_data = 0x00;
1244 if (cc_polarity == TYPEC_POLARITY_CC1) {
1245 switches0_data = FUSB_REG_SWITCHES0_MEAS_CC1;
1247 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC2;
1249 switches0_data |= FUSB_REG_SWITCHES0_CC1_PU_EN;
1250 switches1_data = FUSB_REG_SWITCHES1_TXCC1_EN;
1252 switches0_data = FUSB_REG_SWITCHES0_MEAS_CC2;
1254 switches0_data |= FUSB_REG_SWITCHES0_VCONN_CC1;
1256 switches0_data |= FUSB_REG_SWITCHES0_CC2_PU_EN;
1257 switches1_data = FUSB_REG_SWITCHES1_TXCC2_EN;
1259 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES0,
1260 switches0_mask, switches0_data);
1263 ret = fusb302_i2c_mask_write(chip, FUSB_REG_SWITCHES1,
1264 switches1_mask, switches1_data);
1267 chip->cc_polarity = cc_polarity;
1272 static int fusb302_handle_togdone_snk(struct fusb302_chip *chip,
1278 enum typec_cc_polarity cc_polarity;
1279 enum typec_cc_status cc_status_active, cc1, cc2;
1281 /* set pull_up, pull_down */
1282 ret = fusb302_set_cc_pull(chip, false, true);
1284 fusb302_log(chip, "cannot set cc to pull down, ret=%d", ret);
1288 cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SNK1) ?
1289 TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
1290 ret = fusb302_set_cc_polarity(chip, cc_polarity);
1292 fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
1293 cc_polarity_name[cc_polarity], ret);
1296 /* fusb302_set_cc_polarity() has set the correct measure block */
1297 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1300 bc_lvl = status0 & FUSB_REG_STATUS0_BC_LVL_MASK;
1301 cc_status_active = fusb302_bc_lvl_to_cc(bc_lvl);
1302 /* restart toggling if the cc status on the active line is OPEN */
1303 if (cc_status_active == TYPEC_CC_OPEN) {
1304 fusb302_log(chip, "restart toggling as CC_OPEN detected");
1305 ret = fusb302_set_toggling(chip, chip->toggling_mode);
1308 /* update tcpm with the new cc value */
1309 cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
1310 cc_status_active : TYPEC_CC_OPEN;
1311 cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
1312 cc_status_active : TYPEC_CC_OPEN;
1313 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1316 tcpm_cc_change(chip->tcpm_port);
1318 /* turn off toggling */
1319 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
1322 "cannot set toggling mode off, ret=%d", ret);
1325 /* unmask bc_lvl interrupt */
1326 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK, FUSB_REG_MASK_BC_LVL);
1329 "cannot unmask bc_lcl interrupt, ret=%d", ret);
1332 chip->intr_bc_lvl = true;
1333 fusb302_log(chip, "detected cc1=%s, cc2=%s",
1334 typec_cc_status_name[cc1],
1335 typec_cc_status_name[cc2]);
1340 static int fusb302_handle_togdone_src(struct fusb302_chip *chip,
1344 * - set polarity (measure cc, vconn, tx)
1345 * - set pull_up, pull_down
1346 * - set cc1, cc2, and update to tcpm_port
1347 * - set I_COMP interrupt on
1351 u8 ra_mda = ra_mda_value[chip->src_current_status];
1352 u8 rd_mda = rd_mda_value[chip->src_current_status];
1353 bool ra_comp, rd_comp;
1354 enum typec_cc_polarity cc_polarity;
1355 enum typec_cc_status cc_status_active, cc1, cc2;
1357 /* set pull_up, pull_down */
1358 ret = fusb302_set_cc_pull(chip, true, false);
1360 fusb302_log(chip, "cannot set cc to pull up, ret=%d", ret);
1364 cc_polarity = (togdone_result == FUSB_REG_STATUS1A_TOGSS_SRC1) ?
1365 TYPEC_POLARITY_CC1 : TYPEC_POLARITY_CC2;
1366 ret = fusb302_set_cc_polarity(chip, cc_polarity);
1368 fusb302_log(chip, "cannot set cc polarity %s, ret=%d",
1369 cc_polarity_name[cc_polarity], ret);
1372 /* fusb302_set_cc_polarity() has set the correct measure block */
1373 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1376 usleep_range(50, 100);
1377 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1380 rd_comp = !!(status0 & FUSB_REG_STATUS0_COMP);
1382 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, ra_mda);
1385 usleep_range(50, 100);
1386 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1389 ra_comp = !!(status0 & FUSB_REG_STATUS0_COMP);
1392 cc_status_active = TYPEC_CC_OPEN;
1394 cc_status_active = TYPEC_CC_RD;
1396 /* Ra is not supported, report as Open */
1397 cc_status_active = TYPEC_CC_OPEN;
1398 /* restart toggling if the cc status on the active line is OPEN */
1399 if (cc_status_active == TYPEC_CC_OPEN) {
1400 fusb302_log(chip, "restart toggling as CC_OPEN detected");
1401 ret = fusb302_set_toggling(chip, chip->toggling_mode);
1404 /* update tcpm with the new cc value */
1405 cc1 = (cc_polarity == TYPEC_POLARITY_CC1) ?
1406 cc_status_active : TYPEC_CC_OPEN;
1407 cc2 = (cc_polarity == TYPEC_POLARITY_CC2) ?
1408 cc_status_active : TYPEC_CC_OPEN;
1409 if ((chip->cc1 != cc1) || (chip->cc2 != cc2)) {
1412 tcpm_cc_change(chip->tcpm_port);
1414 /* turn off toggling */
1415 ret = fusb302_set_toggling(chip, TOGGLING_MODE_OFF);
1418 "cannot set toggling mode off, ret=%d", ret);
1421 /* set MDAC to Rd threshold, and unmask I_COMP for unplug detection */
1422 ret = fusb302_i2c_write(chip, FUSB_REG_MEASURE, rd_mda);
1425 /* unmask comp_chng interrupt */
1426 ret = fusb302_i2c_clear_bits(chip, FUSB_REG_MASK,
1427 FUSB_REG_MASK_COMP_CHNG);
1430 "cannot unmask bc_lcl interrupt, ret=%d", ret);
1433 chip->intr_comp_chng = true;
1434 fusb302_log(chip, "detected cc1=%s, cc2=%s",
1435 typec_cc_status_name[cc1],
1436 typec_cc_status_name[cc2]);
1441 static int fusb302_handle_togdone(struct fusb302_chip *chip)
1447 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS1A, &status1a);
1450 togdone_result = (status1a >> FUSB_REG_STATUS1A_TOGSS_POS) &
1451 FUSB_REG_STATUS1A_TOGSS_MASK;
1452 switch (togdone_result) {
1453 case FUSB_REG_STATUS1A_TOGSS_SNK1:
1454 case FUSB_REG_STATUS1A_TOGSS_SNK2:
1455 return fusb302_handle_togdone_snk(chip, togdone_result);
1456 case FUSB_REG_STATUS1A_TOGSS_SRC1:
1457 case FUSB_REG_STATUS1A_TOGSS_SRC2:
1458 return fusb302_handle_togdone_src(chip, togdone_result);
1459 case FUSB_REG_STATUS1A_TOGSS_AA:
1460 /* doesn't support */
1461 fusb302_log(chip, "AudioAccessory not supported");
1462 fusb302_set_toggling(chip, chip->toggling_mode);
1465 fusb302_log(chip, "TOGDONE with an invalid state: %d",
1467 fusb302_set_toggling(chip, chip->toggling_mode);
1473 static int fusb302_pd_reset(struct fusb302_chip *chip)
1475 return fusb302_i2c_set_bits(chip, FUSB_REG_RESET,
1476 FUSB_REG_RESET_PD_RESET);
1479 static int fusb302_pd_read_message(struct fusb302_chip *chip,
1480 struct pd_message *msg)
1487 /* first SOP token */
1488 ret = fusb302_i2c_read(chip, FUSB_REG_FIFOS, &token);
1491 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 2,
1492 (u8 *)&msg->header);
1495 len = pd_header_cnt_le(msg->header) * 4;
1496 /* add 4 to length to include the CRC */
1497 if (len > PD_MAX_PAYLOAD * 4) {
1498 fusb302_log(chip, "PD message too long %d", len);
1502 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, len,
1503 (u8 *)msg->payload);
1507 /* another 4 bytes to read CRC out */
1508 ret = fusb302_i2c_block_read(chip, FUSB_REG_FIFOS, 4, crc);
1511 fusb302_log(chip, "PD message header: %x", msg->header);
1512 fusb302_log(chip, "PD message len: %d", len);
1515 * Check if we've read off a GoodCRC message. If so then indicate to
1516 * TCPM that the previous transmission has completed. Otherwise we pass
1517 * the received message over to TCPM for processing.
1519 * We make this check here instead of basing the reporting decision on
1520 * the IRQ event type, as it's possible for the chip to report the
1521 * TX_SUCCESS and GCRCSENT events out of order on occasion, so we need
1522 * to check the message type to ensure correct reporting to TCPM.
1524 if ((!len) && (pd_header_type_le(msg->header) == PD_CTRL_GOOD_CRC))
1525 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1527 tcpm_pd_receive(chip->tcpm_port, msg);
1532 static irqreturn_t fusb302_irq_intn(int irq, void *dev_id)
1534 struct fusb302_chip *chip = dev_id;
1544 bool intr_comp_chng;
1545 struct pd_message pd_msg;
1547 mutex_lock(&chip->lock);
1548 /* grab a snapshot of intr flags */
1549 intr_togdone = chip->intr_togdone;
1550 intr_bc_lvl = chip->intr_bc_lvl;
1551 intr_comp_chng = chip->intr_comp_chng;
1553 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPT, &interrupt);
1556 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTA, &interrupta);
1559 ret = fusb302_i2c_read(chip, FUSB_REG_INTERRUPTB, &interruptb);
1562 ret = fusb302_i2c_read(chip, FUSB_REG_STATUS0, &status0);
1566 "IRQ: 0x%02x, a: 0x%02x, b: 0x%02x, status0: 0x%02x",
1567 interrupt, interrupta, interruptb, status0);
1569 if (interrupt & FUSB_REG_INTERRUPT_VBUSOK) {
1570 vbus_present = !!(status0 & FUSB_REG_STATUS0_VBUSOK);
1571 fusb302_log(chip, "IRQ: VBUS_OK, vbus=%s",
1572 vbus_present ? "On" : "Off");
1573 if (vbus_present != chip->vbus_present) {
1574 chip->vbus_present = vbus_present;
1575 tcpm_vbus_change(chip->tcpm_port);
1579 if ((interrupta & FUSB_REG_INTERRUPTA_TOGDONE) && intr_togdone) {
1580 fusb302_log(chip, "IRQ: TOGDONE");
1581 ret = fusb302_handle_togdone(chip);
1584 "handle togdone error, ret=%d", ret);
1589 if ((interrupt & FUSB_REG_INTERRUPT_BC_LVL) && intr_bc_lvl) {
1590 fusb302_log(chip, "IRQ: BC_LVL, handler pending");
1592 * as BC_LVL interrupt can be affected by PD activity,
1593 * apply delay to for the handler to wait for the PD
1594 * signaling to finish.
1596 mod_delayed_work(chip->wq, &chip->bc_lvl_handler,
1597 msecs_to_jiffies(T_BC_LVL_DEBOUNCE_DELAY_MS));
1600 if ((interrupt & FUSB_REG_INTERRUPT_COMP_CHNG) && intr_comp_chng) {
1601 comp_result = !!(status0 & FUSB_REG_STATUS0_COMP);
1602 fusb302_log(chip, "IRQ: COMP_CHNG, comp=%s",
1603 comp_result ? "true" : "false");
1605 /* cc level > Rd_threashold, detach */
1606 if (chip->cc_polarity == TYPEC_POLARITY_CC1)
1607 chip->cc1 = TYPEC_CC_OPEN;
1609 chip->cc2 = TYPEC_CC_OPEN;
1610 tcpm_cc_change(chip->tcpm_port);
1614 if (interrupt & FUSB_REG_INTERRUPT_COLLISION) {
1615 fusb302_log(chip, "IRQ: PD collision");
1616 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1619 if (interrupta & FUSB_REG_INTERRUPTA_RETRYFAIL) {
1620 fusb302_log(chip, "IRQ: PD retry failed");
1621 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_FAILED);
1624 if (interrupta & FUSB_REG_INTERRUPTA_HARDSENT) {
1625 fusb302_log(chip, "IRQ: PD hardreset sent");
1626 ret = fusb302_pd_reset(chip);
1628 fusb302_log(chip, "cannot PD reset, ret=%d", ret);
1631 tcpm_pd_transmit_complete(chip->tcpm_port, TCPC_TX_SUCCESS);
1634 if (interrupta & FUSB_REG_INTERRUPTA_TX_SUCCESS) {
1635 fusb302_log(chip, "IRQ: PD tx success");
1636 ret = fusb302_pd_read_message(chip, &pd_msg);
1639 "cannot read in PD message, ret=%d", ret);
1644 if (interrupta & FUSB_REG_INTERRUPTA_HARDRESET) {
1645 fusb302_log(chip, "IRQ: PD received hardreset");
1646 ret = fusb302_pd_reset(chip);
1648 fusb302_log(chip, "cannot PD reset, ret=%d", ret);
1651 tcpm_pd_hard_reset(chip->tcpm_port);
1654 if (interruptb & FUSB_REG_INTERRUPTB_GCRCSENT) {
1655 fusb302_log(chip, "IRQ: PD sent good CRC");
1656 ret = fusb302_pd_read_message(chip, &pd_msg);
1659 "cannot read in PD message, ret=%d", ret);
1664 mutex_unlock(&chip->lock);
1669 static int init_gpio(struct fusb302_chip *chip)
1671 struct device_node *node;
1674 node = chip->dev->of_node;
1675 chip->gpio_int_n = of_get_named_gpio(node, "fcs,int_n", 0);
1676 if (!gpio_is_valid(chip->gpio_int_n)) {
1677 ret = chip->gpio_int_n;
1678 dev_err(chip->dev, "cannot get named GPIO Int_N, ret=%d", ret);
1681 ret = devm_gpio_request(chip->dev, chip->gpio_int_n, "fcs,int_n");
1683 dev_err(chip->dev, "cannot request GPIO Int_N, ret=%d", ret);
1686 ret = gpio_direction_input(chip->gpio_int_n);
1689 "cannot set GPIO Int_N to input, ret=%d", ret);
1692 ret = gpio_to_irq(chip->gpio_int_n);
1695 "cannot request IRQ for GPIO Int_N, ret=%d", ret);
1698 chip->gpio_int_n_irq = ret;
1702 static int fusb302_composite_snk_pdo_array(struct fusb302_chip *chip)
1704 struct device *dev = chip->dev;
1707 chip->snk_pdo[0] = PDO_FIXED(5000, 400, PDO_FIXED_FLAGS);
1710 * As max_snk_ma/mv/mw is not needed for tcpc_config,
1711 * those settings should be passed in via sink PDO, so
1712 * "fcs, max-sink-*" properties will be deprecated, to
1713 * perserve compatibility with existing users of them,
1714 * we read those properties to convert them to be a var
1717 if (device_property_read_u32(dev, "fcs,max-sink-microvolt", &max_uv) ||
1718 device_property_read_u32(dev, "fcs,max-sink-microamp", &max_ua))
1721 chip->snk_pdo[1] = PDO_VAR(5000, max_uv / 1000, max_ua / 1000);
1725 static int fusb302_probe(struct i2c_client *client,
1726 const struct i2c_device_id *id)
1728 struct fusb302_chip *chip;
1729 struct i2c_adapter *adapter;
1730 struct device *dev = &client->dev;
1735 adapter = to_i2c_adapter(client->dev.parent);
1736 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1737 dev_err(&client->dev,
1738 "I2C/SMBus block functionality not supported!\n");
1741 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
1745 chip->i2c_client = client;
1746 chip->dev = &client->dev;
1747 chip->tcpc_config = fusb302_tcpc_config;
1748 chip->tcpc_dev.config = &chip->tcpc_config;
1749 mutex_init(&chip->lock);
1751 chip->tcpc_dev.fwnode =
1752 device_get_named_child_node(dev, "connector");
1754 if (!device_property_read_u32(dev, "fcs,operating-sink-microwatt", &v))
1755 chip->tcpc_config.operating_snk_mw = v / 1000;
1757 /* Composite sink PDO */
1758 chip->tcpc_config.nr_snk_pdo = fusb302_composite_snk_pdo_array(chip);
1759 chip->tcpc_config.snk_pdo = chip->snk_pdo;
1762 * Devicetree platforms should get extcon via phandle (not yet
1763 * supported). On ACPI platforms, we get the name from a device prop.
1764 * This device prop is for kernel internal use only and is expected
1765 * to be set by the platform code which also registers the i2c client
1768 if (device_property_read_string(dev, "linux,extcon-name", &name) == 0) {
1769 chip->extcon = extcon_get_extcon_dev(name);
1771 return -EPROBE_DEFER;
1774 chip->vbus = devm_regulator_get(chip->dev, "vbus");
1775 if (IS_ERR(chip->vbus))
1776 return PTR_ERR(chip->vbus);
1778 chip->wq = create_singlethread_workqueue(dev_name(chip->dev));
1782 INIT_DELAYED_WORK(&chip->bc_lvl_handler, fusb302_bc_lvl_handler_work);
1783 init_tcpc_dev(&chip->tcpc_dev);
1786 chip->gpio_int_n_irq = client->irq;
1788 ret = init_gpio(chip);
1790 goto destroy_workqueue;
1793 chip->tcpm_port = tcpm_register_port(&client->dev, &chip->tcpc_dev);
1794 if (IS_ERR(chip->tcpm_port)) {
1795 ret = PTR_ERR(chip->tcpm_port);
1796 if (ret != -EPROBE_DEFER)
1797 dev_err(dev, "cannot register tcpm port, ret=%d", ret);
1798 goto destroy_workqueue;
1801 ret = devm_request_threaded_irq(chip->dev, chip->gpio_int_n_irq,
1802 NULL, fusb302_irq_intn,
1803 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
1804 "fsc_interrupt_int_n", chip);
1806 dev_err(dev, "cannot request IRQ for GPIO Int_N, ret=%d", ret);
1807 goto tcpm_unregister_port;
1809 enable_irq_wake(chip->gpio_int_n_irq);
1810 fusb302_debugfs_init(chip);
1811 i2c_set_clientdata(client, chip);
1815 tcpm_unregister_port:
1816 tcpm_unregister_port(chip->tcpm_port);
1818 destroy_workqueue(chip->wq);
1823 static int fusb302_remove(struct i2c_client *client)
1825 struct fusb302_chip *chip = i2c_get_clientdata(client);
1827 tcpm_unregister_port(chip->tcpm_port);
1828 destroy_workqueue(chip->wq);
1829 fusb302_debugfs_exit(chip);
1834 static int fusb302_pm_suspend(struct device *dev)
1836 struct fusb302_chip *chip = dev->driver_data;
1838 if (atomic_read(&chip->i2c_busy))
1840 atomic_set(&chip->pm_suspend, 1);
1845 static int fusb302_pm_resume(struct device *dev)
1847 struct fusb302_chip *chip = dev->driver_data;
1849 atomic_set(&chip->pm_suspend, 0);
1854 static const struct of_device_id fusb302_dt_match[] = {
1855 {.compatible = "fcs,fusb302"},
1858 MODULE_DEVICE_TABLE(of, fusb302_dt_match);
1860 static const struct i2c_device_id fusb302_i2c_device_id[] = {
1861 {"typec_fusb302", 0},
1864 MODULE_DEVICE_TABLE(i2c, fusb302_i2c_device_id);
1866 static const struct dev_pm_ops fusb302_pm_ops = {
1867 .suspend = fusb302_pm_suspend,
1868 .resume = fusb302_pm_resume,
1871 static struct i2c_driver fusb302_driver = {
1873 .name = "typec_fusb302",
1874 .pm = &fusb302_pm_ops,
1875 .of_match_table = of_match_ptr(fusb302_dt_match),
1877 .probe = fusb302_probe,
1878 .remove = fusb302_remove,
1879 .id_table = fusb302_i2c_device_id,
1881 module_i2c_driver(fusb302_driver);
1883 MODULE_AUTHOR("Yueyao Zhu <yueyao.zhu@gmail.com>");
1884 MODULE_DESCRIPTION("Fairchild FUSB302 Type-C Chip Driver");
1885 MODULE_LICENSE("GPL");