1 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
2 * Copyright (C) 2018 XiaoMi, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
17 #include <linux/of_gpio.h>
18 #include <linux/gpio.h>
19 #include <linux/qpnp/pin.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <linux/leds.h>
23 #include <linux/qpnp/pwm.h>
24 #include <linux/err.h>
25 #include <linux/string.h>
26 #include <linux/hwinfo.h>
27 #include <linux/mdss_io_util.h>
30 #include "mdss_dba_utils.h"
31 #include "mdss_debug.h"
34 #define DEFAULT_MDP_TRANSFER_TIME 14000
36 #define VSYNC_DELAY msecs_to_jiffies(17)
38 #define PANEL_READ_CNT 32
39 #define XY_COORDINATE_NUM 3
41 #define HWCOMPONENT_NAME "display"
42 #define HWCOMPONENT_KEY_LCD "LCD"
43 #define DISPLAY_SKINCE_MODE 0x400000
45 #define HWMON_CONPONENT_NAME "display"
46 #define HWMON_KEY_ACTIVE "panel_active"
47 #define HWMON_KEY_REFRESH "panel_refresh"
48 #define HWMON_KEY_BOOTTIME "kernel_boottime"
49 #define HWMON_KEY_DAYS "kernel_days"
50 #define HWMON_KEY_BL_AVG "bl_level_avg"
51 #define HWMON_KEY_BL_HIGH "bl_level_high"
52 #define HWMON_KEY_BL_LOW "bl_level_low"
53 #define DAY_SECS (60*60*24)
56 #define DISPLAY_OFF_MODE 0x60000
57 #define DISPLAY_ON_MODE 0x70000
59 #define PANEL_DIMMING_ON_CMD 0x500
61 DEFINE_LED_TRIGGER(bl_led_trigger);
63 static bool mdss_panel_reset_skip;
64 static struct mdss_panel_info *mdss_pinfo;
66 bool mdss_prim_panel_is_dead(void)
69 return mdss_pinfo->panel_dead;
73 void mdss_panel_reset_skip_enable(bool enable)
75 mdss_panel_reset_skip = enable;
78 void mdss_dsi_ulps_enable(bool enable)
81 mdss_pinfo->ulps_feature_enabled = enable;
84 void mdss_dsi_ulps_suspend_enable(bool enable)
87 mdss_pinfo->ulps_suspend_enabled = enable;
90 void mdss_dsi_panel_pwm_cfg(struct mdss_dsi_ctrl_pdata *ctrl)
95 ctrl->pwm_bl = pwm_request(ctrl->pwm_lpg_chan, "lcd-bklt");
96 if (ctrl->pwm_bl == NULL || IS_ERR(ctrl->pwm_bl)) {
97 pr_err("%s: Error: lpg_chan=%d pwm request failed",
98 __func__, ctrl->pwm_lpg_chan);
100 ctrl->pwm_enabled = 0;
103 bool mdss_dsi_panel_pwm_enable(struct mdss_dsi_ctrl_pdata *ctrl)
106 if (!ctrl->pwm_enabled)
109 if (pwm_enable(ctrl->pwm_bl)) {
110 pr_err("%s: pwm_enable() failed\n", __func__);
114 ctrl->pwm_enabled = 1;
120 static void mdss_dsi_panel_bklt_pwm(struct mdss_dsi_ctrl_pdata *ctrl, int level)
126 if (ctrl->pwm_bl == NULL) {
127 pr_err("%s: no PWM\n", __func__);
132 if (ctrl->pwm_enabled) {
133 ret = pwm_config_us(ctrl->pwm_bl, level,
136 pr_err("%s: pwm_config_us() failed err=%d.\n",
138 pwm_disable(ctrl->pwm_bl);
140 ctrl->pwm_enabled = 0;
144 duty = level * ctrl->pwm_period;
145 duty /= ctrl->bklt_max;
147 pr_debug("%s: bklt_ctrl=%d pwm_period=%d pwm_gpio=%d pwm_lpg_chan=%d\n",
148 __func__, ctrl->bklt_ctrl, ctrl->pwm_period,
149 ctrl->pwm_pmic_gpio, ctrl->pwm_lpg_chan);
151 pr_debug("%s: ndx=%d level=%d duty=%d\n", __func__,
152 ctrl->ndx, level, duty);
154 if (ctrl->pwm_period >= USEC_PER_SEC) {
155 ret = pwm_config_us(ctrl->pwm_bl, duty, ctrl->pwm_period);
157 pr_err("%s: pwm_config_us() failed err=%d.\n",
162 period_ns = ctrl->pwm_period * NSEC_PER_USEC;
163 ret = pwm_config(ctrl->pwm_bl,
164 level * period_ns / ctrl->bklt_max,
167 pr_err("%s: pwm_config() failed err=%d.\n",
173 if (!ctrl->pwm_enabled) {
174 ret = pwm_enable(ctrl->pwm_bl);
176 pr_err("%s: pwm_enable() failed err=%d\n", __func__,
178 ctrl->pwm_enabled = 1;
182 static char rbuf[PANEL_READ_CNT];
183 static void mdss_dsi_dcs_read_cb(u32 cb_result)
187 pr_info("%s: 0x%x. \n", __func__, cb_result);
188 for (i = 0; i < cb_result; i++)
189 pr_debug("0x%x ", rbuf[i]);
193 static char dcs_cmd[2] = {0x54, 0x00}; /* DTYPE_DCS_READ */
194 static struct dsi_cmd_desc dcs_read_cmd = {
195 {DTYPE_DCS_READ, 1, 0, 1, 5, sizeof(dcs_cmd)},
199 int mdss_dsi_panel_cmd_read(struct mdss_dsi_ctrl_pdata *ctrl, char cmd0,
200 char cmd1, void (*fxn)(int), char *rbuf, int len)
202 struct dcs_cmd_req cmdreq;
203 struct mdss_panel_info *pinfo;
205 pinfo = &(ctrl->panel_data.panel_info);
206 if (pinfo->dcs_cmd_by_left) {
207 if (ctrl->ndx != DSI_CTRL_LEFT)
213 memset(&cmdreq, 0, sizeof(cmdreq));
214 cmdreq.cmds = &dcs_read_cmd;
216 cmdreq.flags = CMD_REQ_RX | CMD_REQ_COMMIT;
219 cmdreq.cb = fxn; /* call back */
221 * blocked here, until call back called
224 return mdss_dsi_cmdlist_put(ctrl, &cmdreq);
227 static void mdss_dsi_panel_apply_settings(struct mdss_dsi_ctrl_pdata *ctrl,
228 struct dsi_panel_cmds *pcmds)
230 struct dcs_cmd_req cmdreq;
231 struct mdss_panel_info *pinfo;
233 pinfo = &(ctrl->panel_data.panel_info);
234 if ((pinfo->dcs_cmd_by_left) && (ctrl->ndx != DSI_CTRL_LEFT))
237 memset(&cmdreq, 0, sizeof(cmdreq));
238 cmdreq.cmds = pcmds->cmds;
239 cmdreq.cmds_cnt = pcmds->cmd_cnt;
240 cmdreq.flags = CMD_REQ_COMMIT;
244 mdss_dsi_cmdlist_put(ctrl, &cmdreq);
248 static void mdss_dsi_panel_cmds_send(struct mdss_dsi_ctrl_pdata *ctrl,
249 struct dsi_panel_cmds *pcmds, u32 flags)
251 struct dcs_cmd_req cmdreq;
252 struct mdss_panel_info *pinfo;
254 pinfo = &(ctrl->panel_data.panel_info);
255 if (pinfo->dcs_cmd_by_left) {
256 if (ctrl->ndx != DSI_CTRL_LEFT)
260 memset(&cmdreq, 0, sizeof(cmdreq));
261 cmdreq.cmds = pcmds->cmds;
262 cmdreq.cmds_cnt = pcmds->cmd_cnt;
263 cmdreq.flags = flags;
265 /*Panel ON/Off commands should be sent in DSI Low Power Mode*/
266 if (pcmds->link_state == DSI_LP_MODE)
267 cmdreq.flags |= CMD_REQ_LP_MODE;
268 else if (pcmds->link_state == DSI_HS_MODE)
269 cmdreq.flags |= CMD_REQ_HS_MODE;
270 if (pinfo->esd_panel_onoff_tpg && ctrl->panel_data.panel_info.panel_dead)
271 cmdreq.flags |= CMD_REQ_DMA_TPG;
276 mdss_dsi_cmdlist_put(ctrl, &cmdreq);
279 static char led_pwm1[2] = {0x51, 0x0}; /* DTYPE_DCS_WRITE1 */
280 static struct dsi_cmd_desc backlight_cmd = {
281 {DTYPE_DCS_WRITE1, 1, 0, 0, 1, sizeof(led_pwm1)},
285 static void mdss_dsi_panel_bklt_dcs(struct mdss_dsi_ctrl_pdata *ctrl, int level)
287 struct dcs_cmd_req cmdreq;
288 struct mdss_panel_info *pinfo;
290 pinfo = &(ctrl->panel_data.panel_info);
291 if (pinfo->dcs_cmd_by_left) {
292 if (ctrl->ndx != DSI_CTRL_LEFT)
296 pr_debug("%s: level=%d\n", __func__, level);
298 led_pwm1[1] = (unsigned char)level;
300 memset(&cmdreq, 0, sizeof(cmdreq));
301 cmdreq.cmds = &backlight_cmd;
303 cmdreq.flags = CMD_REQ_COMMIT | CMD_CLK_CTRL;
307 if (ctrl->bklt_dcs_op_mode == DSI_HS_MODE)
308 cmdreq.flags |= CMD_REQ_HS_MODE;
310 cmdreq.flags |= CMD_REQ_LP_MODE;
312 mdss_dsi_cmdlist_put(ctrl, &cmdreq);
315 static int mdss_dsi_request_gpios(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
319 if (gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
320 rc = gpio_request(ctrl_pdata->disp_en_gpio,
323 pr_err("request disp_en gpio failed, rc=%d\n",
325 goto disp_en_gpio_err;
328 rc = gpio_request(ctrl_pdata->rst_gpio, "disp_rst_n");
330 pr_err("request reset gpio failed, rc=%d\n",
334 if (gpio_is_valid(ctrl_pdata->avdd_en_gpio)) {
335 rc = gpio_request(ctrl_pdata->avdd_en_gpio,
338 pr_err("request avdd_en gpio failed, rc=%d\n",
340 goto avdd_en_gpio_err;
343 if (gpio_is_valid(ctrl_pdata->lcd_mode_sel_gpio)) {
344 rc = gpio_request(ctrl_pdata->lcd_mode_sel_gpio, "mode_sel");
346 pr_err("request dsc/dual mode gpio failed,rc=%d\n",
348 goto lcd_mode_sel_gpio_err;
354 lcd_mode_sel_gpio_err:
355 if (gpio_is_valid(ctrl_pdata->avdd_en_gpio))
356 gpio_free(ctrl_pdata->avdd_en_gpio);
358 gpio_free(ctrl_pdata->rst_gpio);
360 if (gpio_is_valid(ctrl_pdata->disp_en_gpio))
361 gpio_free(ctrl_pdata->disp_en_gpio);
366 int mdss_dsi_bl_gpio_ctrl(struct mdss_panel_data *pdata, int enable)
368 struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
372 pr_err("%s: Invalid input data\n", __func__);
376 ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
378 if (ctrl_pdata == NULL) {
379 pr_err("%s: Invalid ctrl data\n", __func__);
383 /* if gpio is not valid */
384 if (!gpio_is_valid(ctrl_pdata->bklt_en_gpio))
387 pr_debug("%s: enable = %d\n", __func__, enable);
390 * if gpio state is false and enable (bl level) is
391 * non zero then toggle the gpio
393 if (!ctrl_pdata->bklt_en_gpio_state && enable) {
394 rc = gpio_request(ctrl_pdata->bklt_en_gpio, "bklt_enable");
396 pr_err("request bklt gpio failed, rc=%d\n", rc);
400 if (ctrl_pdata->bklt_en_gpio_invert)
405 rc = gpio_direction_output(ctrl_pdata->bklt_en_gpio, val);
407 pr_err("%s: unable to set dir for bklt gpio val %d\n",
411 ctrl_pdata->bklt_en_gpio_state = true;
413 } else if (ctrl_pdata->bklt_en_gpio_state && !enable) {
415 * if gpio state is true and enable (bl level) is
416 * zero then toggle the gpio
418 if (ctrl_pdata->bklt_en_gpio_invert)
423 rc = gpio_direction_output(ctrl_pdata->bklt_en_gpio, val);
425 pr_err("%s: unable to set dir for bklt gpio val %d\n",
430 /* gpio state is true and bl level is non zero */
434 pr_debug("%s: free bklt gpio\n", __func__);
435 ctrl_pdata->bklt_en_gpio_state = false;
436 gpio_free(ctrl_pdata->bklt_en_gpio);
441 static void mdss_dsi_panel_count(struct mdss_panel_data *pdata, int enable)
443 static u64 timestamp_panelon;
447 /* get panel on timestamp */
448 timestamp_panelon = get_jiffies_64();
451 struct timespec rtctime;
453 /* caculate panel active duration */
454 getnstimeofday(&rtctime);
455 if (pdata->panel_info.bootRTCtime != 0) {
456 if (rtctime.tv_sec > pdata->panel_info.bootRTCtime) {
457 if (rtctime.tv_sec - pdata->panel_info.bootRTCtime > 10 * 365 * DAY_SECS) {
458 pdata->panel_info.bootRTCtime = rtctime.tv_sec;
460 if (rtctime.tv_sec - pdata->panel_info.bootRTCtime > DAY_SECS) {
461 delta_days = (rtctime.tv_sec - pdata->panel_info.bootRTCtime) / DAY_SECS;
462 pdata->panel_info.bootdays += delta_days;
463 pdata->panel_info.bootRTCtime = rtctime.tv_sec -
464 ((rtctime.tv_sec - pdata->panel_info.bootRTCtime) % DAY_SECS);
468 pr_err("RTC time rollback!\n");
469 pdata->panel_info.bootRTCtime = rtctime.tv_sec;
472 pr_info("panel_info.bootRTCtime init!\n");
473 pdata->panel_info.bootRTCtime = rtctime.tv_sec;
475 memset(ch, 0, sizeof(ch));
476 snprintf(ch, sizeof(ch), "%llu", pdata->panel_info.bootdays);
482 int mdss_dsi_panel_reset(struct mdss_panel_data *pdata, int enable)
484 struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
485 struct mdss_panel_info *pinfo = NULL;
489 pr_err("%s: Invalid input data\n", __func__);
493 ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
496 pinfo = &(ctrl_pdata->panel_data.panel_info);
498 mdss_dsi_panel_count(pdata, enable);
500 /* For TDDI ddic panel, LCD shares reset pin with touch.
501 * If gesture wakeup feature is enabled, the reset pin
502 * should be controlled by touch. In this case, reset pin
503 * would keep high state when panel is off. Meanwhile,
504 * reset action would be done by touch when panel is on.
506 if (mdss_panel_reset_skip && !pinfo->panel_dead) {
507 pr_info("%s: panel reset skip\n", __func__);
511 if ((mdss_dsi_is_right_ctrl(ctrl_pdata) &&
512 mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data)) ||
513 pinfo->is_dba_panel) {
514 pr_debug("%s:%d, right ctrl gpio configuration not needed\n",
519 if (!gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
520 pr_debug("%s:%d, reset line not configured\n",
524 if (!gpio_is_valid(ctrl_pdata->rst_gpio)) {
525 pr_debug("%s:%d, reset line not configured\n",
530 pr_debug("%s: enable = %d\n", __func__, enable);
533 rc = mdss_dsi_request_gpios(ctrl_pdata);
535 pr_err("gpio request failed\n");
538 if (!pinfo->cont_splash_enabled) {
539 if (gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
540 rc = gpio_direction_output(
541 ctrl_pdata->disp_en_gpio, 1);
543 pr_err("%s: unable to set dir for en gpio\n",
549 if (pdata->panel_info.rst_seq_len) {
550 rc = gpio_direction_output(ctrl_pdata->rst_gpio,
551 pdata->panel_info.rst_seq[0]);
553 pr_err("%s: unable to set dir for rst gpio\n",
559 for (i = 0; i < pdata->panel_info.rst_seq_len; ++i) {
560 gpio_set_value((ctrl_pdata->rst_gpio),
561 pdata->panel_info.rst_seq[i]);
562 if (pdata->panel_info.rst_seq[++i])
563 usleep_range(pinfo->rst_seq[i] * 1000, pinfo->rst_seq[i] * 1000);
566 if (gpio_is_valid(ctrl_pdata->avdd_en_gpio)) {
567 if (ctrl_pdata->avdd_en_gpio_invert) {
568 rc = gpio_direction_output(
569 ctrl_pdata->avdd_en_gpio, 0);
571 rc = gpio_direction_output(
572 ctrl_pdata->avdd_en_gpio, 1);
575 pr_err("%s: unable to set dir for avdd_en gpio\n",
582 if (gpio_is_valid(ctrl_pdata->lcd_mode_sel_gpio)) {
585 if ((pinfo->mode_sel_state == MODE_SEL_SINGLE_PORT) ||
586 (pinfo->mode_sel_state == MODE_GPIO_HIGH))
588 else if ((pinfo->mode_sel_state == MODE_SEL_DUAL_PORT)
589 || (pinfo->mode_sel_state == MODE_GPIO_LOW))
592 rc = gpio_direction_output(
593 ctrl_pdata->lcd_mode_sel_gpio, out);
595 pr_err("%s: unable to set dir for mode gpio\n",
601 if (ctrl_pdata->ctrl_state & CTRL_STATE_PANEL_INIT) {
602 pr_debug("%s: Panel Not properly turned OFF\n",
604 ctrl_pdata->ctrl_state &= ~CTRL_STATE_PANEL_INIT;
605 pr_debug("%s: Reset panel done\n", __func__);
608 if (gpio_is_valid(ctrl_pdata->avdd_en_gpio)) {
609 if (ctrl_pdata->avdd_en_gpio_invert)
610 gpio_set_value((ctrl_pdata->avdd_en_gpio), 1);
612 gpio_set_value((ctrl_pdata->avdd_en_gpio), 0);
614 gpio_free(ctrl_pdata->avdd_en_gpio);
616 if (gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
617 gpio_set_value((ctrl_pdata->disp_en_gpio), 0);
618 gpio_free(ctrl_pdata->disp_en_gpio);
620 gpio_set_value((ctrl_pdata->rst_gpio), 0);
621 gpio_free(ctrl_pdata->rst_gpio);
622 if (gpio_is_valid(ctrl_pdata->lcd_mode_sel_gpio)) {
623 gpio_set_value(ctrl_pdata->lcd_mode_sel_gpio, 0);
624 gpio_free(ctrl_pdata->lcd_mode_sel_gpio);
633 * mdss_dsi_roi_merge() - merge two roi into single roi
635 * Function used by partial update with only one dsi intf take 2A/2B
636 * (column/page) dcs commands.
638 static int mdss_dsi_roi_merge(struct mdss_dsi_ctrl_pdata *ctrl,
639 struct mdss_rect *roi)
641 struct mdss_panel_info *l_pinfo;
642 struct mdss_rect *l_roi;
643 struct mdss_rect *r_roi;
644 struct mdss_dsi_ctrl_pdata *other = NULL;
647 if (ctrl->ndx == DSI_CTRL_LEFT) {
648 other = mdss_dsi_get_ctrl_by_index(DSI_CTRL_RIGHT);
651 l_pinfo = &(ctrl->panel_data.panel_info);
652 l_roi = &(ctrl->panel_data.panel_info.roi);
653 r_roi = &(other->panel_data.panel_info.roi);
655 other = mdss_dsi_get_ctrl_by_index(DSI_CTRL_LEFT);
658 l_pinfo = &(other->panel_data.panel_info);
659 l_roi = &(other->panel_data.panel_info.roi);
660 r_roi = &(ctrl->panel_data.panel_info.roi);
663 if (l_roi->w == 0 && l_roi->h == 0) {
666 roi->x += l_pinfo->xres;/* add left full width to x-offset */
668 /* left only and left+righ */
670 roi->w += r_roi->w; /* add right width */
677 static char caset[] = {0x2a, 0x00, 0x00, 0x03, 0x00}; /* DTYPE_DCS_LWRITE */
678 static char paset[] = {0x2b, 0x00, 0x00, 0x05, 0x00}; /* DTYPE_DCS_LWRITE */
681 * Some panels can support multiple ROIs as part of the below commands
683 static char caset_dual[] = {0x2a, 0x00, 0x00, 0x03, 0x00, 0x03,
684 0x00, 0x00, 0x00, 0x00};/* DTYPE_DCS_LWRITE */
685 static char paset_dual[] = {0x2b, 0x00, 0x00, 0x05, 0x00, 0x03,
686 0x00, 0x00, 0x00, 0x00};/* DTYPE_DCS_LWRITE */
688 /* pack into one frame before sent */
689 static struct dsi_cmd_desc set_col_page_addr_cmd[] = {
690 {{DTYPE_DCS_LWRITE, 0, 0, 0, 1, sizeof(caset)}, caset}, /* packed */
691 {{DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(paset)}, paset},
694 /* pack into one frame before sent */
695 static struct dsi_cmd_desc set_dual_col_page_addr_cmd[] = { /*packed*/
696 {{DTYPE_DCS_LWRITE, 0, 0, 0, 1, sizeof(caset_dual)}, caset_dual},
697 {{DTYPE_DCS_LWRITE, 1, 0, 0, 1, sizeof(paset_dual)}, paset_dual},
701 static void __mdss_dsi_send_col_page_addr(struct mdss_dsi_ctrl_pdata *ctrl,
702 struct mdss_rect *roi, bool dual_roi)
705 struct mdss_rect *first, *second;
707 first = &ctrl->panel_data.panel_info.dual_roi.first_roi;
708 second = &ctrl->panel_data.panel_info.dual_roi.second_roi;
710 caset_dual[1] = (((first->x) & 0xFF00) >> 8);
711 caset_dual[2] = (((first->x) & 0xFF));
712 caset_dual[3] = (((first->x - 1 + first->w) & 0xFF00) >> 8);
713 caset_dual[4] = (((first->x - 1 + first->w) & 0xFF));
714 /* skip the MPU setting byte*/
715 caset_dual[6] = (((second->x) & 0xFF00) >> 8);
716 caset_dual[7] = (((second->x) & 0xFF));
717 caset_dual[8] = (((second->x - 1 + second->w) & 0xFF00) >> 8);
718 caset_dual[9] = (((second->x - 1 + second->w) & 0xFF));
719 set_dual_col_page_addr_cmd[0].payload = caset_dual;
721 paset_dual[1] = (((first->y) & 0xFF00) >> 8);
722 paset_dual[2] = (((first->y) & 0xFF));
723 paset_dual[3] = (((first->y - 1 + first->h) & 0xFF00) >> 8);
724 paset_dual[4] = (((first->y - 1 + first->h) & 0xFF));
725 /* skip the MPU setting byte */
726 paset_dual[6] = (((second->y) & 0xFF00) >> 8);
727 paset_dual[7] = (((second->y) & 0xFF));
728 paset_dual[8] = (((second->y - 1 + second->h) & 0xFF00) >> 8);
729 paset_dual[9] = (((second->y - 1 + second->h) & 0xFF));
730 set_dual_col_page_addr_cmd[1].payload = paset_dual;
732 caset[1] = (((roi->x) & 0xFF00) >> 8);
733 caset[2] = (((roi->x) & 0xFF));
734 caset[3] = (((roi->x - 1 + roi->w) & 0xFF00) >> 8);
735 caset[4] = (((roi->x - 1 + roi->w) & 0xFF));
736 set_col_page_addr_cmd[0].payload = caset;
738 paset[1] = (((roi->y) & 0xFF00) >> 8);
739 paset[2] = (((roi->y) & 0xFF));
740 paset[3] = (((roi->y - 1 + roi->h) & 0xFF00) >> 8);
741 paset[4] = (((roi->y - 1 + roi->h) & 0xFF));
742 set_col_page_addr_cmd[1].payload = paset;
744 pr_debug("%s Sending 2A 2B cmnd with dual_roi=%d\n", __func__,
748 static void mdss_dsi_send_col_page_addr(struct mdss_dsi_ctrl_pdata *ctrl,
749 struct mdss_rect *roi, int unicast)
751 struct dcs_cmd_req cmdreq;
752 struct mdss_panel_info *pinfo = &ctrl->panel_data.panel_info;
753 bool dual_roi = pinfo->dual_roi.enabled;
755 __mdss_dsi_send_col_page_addr(ctrl, roi, dual_roi);
757 memset(&cmdreq, 0, sizeof(cmdreq));
759 cmdreq.flags = CMD_REQ_COMMIT | CMD_CLK_CTRL;
761 cmdreq.flags |= CMD_REQ_UNICAST;
765 /* Send default or dual roi 2A/2B cmd */
766 cmdreq.cmds = dual_roi ? set_dual_col_page_addr_cmd :
767 set_col_page_addr_cmd;
768 mdss_dsi_cmdlist_put(ctrl, &cmdreq);
771 static int mdss_dsi_set_col_page_addr(struct mdss_panel_data *pdata,
774 struct mdss_panel_info *pinfo;
775 struct mdss_rect roi = {0};
776 struct mdss_rect *p_roi;
777 struct mdss_rect *c_roi;
778 struct mdss_dsi_ctrl_pdata *ctrl = NULL;
779 struct mdss_dsi_ctrl_pdata *other = NULL;
780 int left_or_both = 0;
783 pr_err("%s: Invalid input data\n", __func__);
787 ctrl = container_of(pdata, struct mdss_dsi_ctrl_pdata,
790 pinfo = &pdata->panel_info;
794 * to avoid keep sending same col_page info to panel,
795 * if roi_merge enabled, the roi of left ctrl is used
796 * to compare against new merged roi and saved new
797 * merged roi to it after comparing.
798 * if roi_merge disabled, then the calling ctrl's roi
799 * and pinfo's roi are used to compare.
801 if (pinfo->partial_update_roi_merge) {
802 left_or_both = mdss_dsi_roi_merge(ctrl, &roi);
803 other = mdss_dsi_get_ctrl_by_index(DSI_CTRL_LEFT);
810 /* roi had changed, do col_page update */
811 if (force_send || !mdss_rect_cmp(c_roi, &roi)) {
812 pr_debug("%s: ndx=%d x=%d y=%d w=%d h=%d\n",
813 __func__, ctrl->ndx, p_roi->x,
814 p_roi->y, p_roi->w, p_roi->h);
816 *c_roi = roi; /* keep to ctrl */
817 if (c_roi->w == 0 || c_roi->h == 0) {
818 /* no new frame update */
819 pr_debug("%s: ctrl=%d, no partial roi set\n",
820 __func__, ctrl->ndx);
824 if (pinfo->dcs_cmd_by_left) {
825 if (left_or_both && ctrl->ndx == DSI_CTRL_RIGHT) {
826 /* 2A/2B sent by left already */
831 if (!mdss_dsi_sync_wait_enable(ctrl)) {
832 if (pinfo->dcs_cmd_by_left)
833 ctrl = mdss_dsi_get_ctrl_by_index(
835 mdss_dsi_send_col_page_addr(ctrl, &roi, 0);
838 * when sync_wait_broadcast enabled,
839 * need trigger at right ctrl to
840 * start both dcs cmd transmission
842 other = mdss_dsi_get_other_ctrl(ctrl);
846 if (mdss_dsi_is_left_ctrl(ctrl)) {
847 if (pinfo->partial_update_roi_merge) {
849 * roi is the one after merged
852 mdss_dsi_send_col_page_addr(other,
855 mdss_dsi_send_col_page_addr(ctrl,
857 mdss_dsi_send_col_page_addr(other,
861 if (pinfo->partial_update_roi_merge) {
863 * roi is the one after merged
866 mdss_dsi_send_col_page_addr(ctrl,
869 mdss_dsi_send_col_page_addr(other,
871 mdss_dsi_send_col_page_addr(ctrl,
882 static int mdss_dsi_panel_apply_display_setting(struct mdss_panel_data *pdata,
885 struct mdss_dsi_ctrl_pdata *ctrl = NULL;
886 struct dsi_panel_cmds *lp_on_cmds;
887 struct dsi_panel_cmds *lp_off_cmds;
890 pr_err("%s: Invalid input data\n", __func__);
894 ctrl = container_of(pdata, struct mdss_dsi_ctrl_pdata,
897 lp_on_cmds = &ctrl->lp_on_cmds;
898 lp_off_cmds = &ctrl->lp_off_cmds;
900 /* Apply display settings for low-persistence mode */
901 if ((mode == MDSS_PANEL_LOW_PERSIST_MODE_ON) &&
902 (lp_on_cmds->cmd_cnt))
903 mdss_dsi_panel_apply_settings(ctrl, lp_on_cmds);
904 else if ((mode == MDSS_PANEL_LOW_PERSIST_MODE_OFF) &&
905 (lp_on_cmds->cmd_cnt))
906 mdss_dsi_panel_apply_settings(ctrl, lp_off_cmds);
910 pr_debug("%s: Persistence mode %d applied\n", __func__, mode);
914 static void value2str(char *pbuf, char read_cnt, int bit_valide)
921 /* pbuf - buffer size must >= 256 */
922 for (i = 0; i < read_cnt; i++) {
923 if (bit_valide & 0x1 && ((pTemp + 8) < (pbuf + BUF_LEN_MAX))) {
924 write_len = scnprintf(pTemp, 8, "p%d=%d", param_nb, rbuf[i]);
928 bit_valide = bit_valide >> 1;
930 pr_info("read %s from panel\n", pbuf);
933 static inline void mdss_panel_disparam_set(struct mdss_dsi_ctrl_pdata *ctrl, uint32_t param)
938 temp = param & 0x0000000F;
941 if (ctrl->dispparam_warm_cmds.cmd_cnt) {
943 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_warm_cmds, CMD_REQ_COMMIT);
947 if (ctrl->dispparam_default_cmds.cmd_cnt) {
949 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_default_cmds, CMD_REQ_COMMIT);
953 if (ctrl->dispparam_cold_cmds.cmd_cnt) {
955 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_cold_cmds, CMD_REQ_COMMIT);
958 case 0x4: /*gamma reload*/
959 if (ctrl->dispparam_gammareload_cmds.cmd_cnt) {
960 pr_info("gammare load\n");
961 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_gammareload_cmds, CMD_REQ_COMMIT);
965 if (ctrl->dispparam_papermode_cmds.cmd_cnt) {
966 pr_info("paper mode\n");
967 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_papermode_cmds, CMD_REQ_COMMIT);
971 if (ctrl->dispparam_papermode1_cmds.cmd_cnt) {
972 pr_info("paper mode 1\n");
973 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_papermode1_cmds, CMD_REQ_COMMIT);
977 if (ctrl->dispparam_papermode2_cmds.cmd_cnt) {
978 pr_info("paper mode 2\n");
979 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_papermode2_cmds, CMD_REQ_COMMIT);
983 if (ctrl->dispparam_papermode3_cmds.cmd_cnt) {
984 pr_info("paper mode 3\n");
985 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_papermode3_cmds, CMD_REQ_COMMIT);
989 if (ctrl->dispparam_papermode4_cmds.cmd_cnt) {
990 pr_info("paper mode 4\n");
991 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_papermode4_cmds, CMD_REQ_COMMIT);
995 if (ctrl->dispparam_papermode5_cmds.cmd_cnt) {
996 pr_info("paper mode 5\n");
997 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_papermode5_cmds, CMD_REQ_COMMIT);
1001 if (ctrl->dispparam_papermode6_cmds.cmd_cnt) {
1002 pr_info("paper mode 6\n");
1003 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_papermode6_cmds, CMD_REQ_COMMIT);
1007 if (ctrl->dispparam_papermode7_cmds.cmd_cnt) {
1008 pr_info("paper mode 7\n");
1009 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_papermode7_cmds, CMD_REQ_COMMIT);
1013 if (ctrl->xy_coordinate_cmds.cmd && ctrl->xy_coordinate_cmds.param_num < PANEL_READ_CNT) {
1014 ret = mdss_dsi_panel_cmd_read(ctrl, ctrl->xy_coordinate_cmds.cmd, 0x00,
1015 (void *)mdss_dsi_dcs_read_cb, rbuf, ctrl->xy_coordinate_cmds.param_num);
1016 if (ret > 0 && ret < PANEL_READ_CNT) {
1017 pr_info("read %d bytes from panel, read_cnt:%d\n", ret, ctrl->xy_coordinate_cmds.param_num);
1018 value2str(ctrl->panel_read_data, ret, ctrl->xy_coordinate_cmds.params_bit);
1021 pr_info("read panel command:0x%x, count:%d\n", ctrl->xy_coordinate_cmds.cmd, ctrl->xy_coordinate_cmds.param_num);
1028 temp = param & 0x0000F000;
1030 case 0xF000: /*level 0*/
1031 if (ctrl->dispparam_level0_cmds.cmd_cnt) {
1032 pr_info("level 0\n");
1033 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_level0_cmds, CMD_REQ_COMMIT);
1036 case 0x1000: /*level 1*/
1037 if (ctrl->dispparam_level1_cmds.cmd_cnt) {
1038 pr_info("level 1\n");
1039 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_level1_cmds, CMD_REQ_COMMIT);
1042 case 0x2000: /*level 2*/
1043 if (ctrl->dispparam_level2_cmds.cmd_cnt) {
1044 pr_info("level 2\n");
1045 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_level2_cmds, CMD_REQ_COMMIT);
1048 case 0x3000: /*level 3*/
1049 if (ctrl->dispparam_level3_cmds.cmd_cnt) {
1050 pr_info("level 3\n");
1051 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_level3_cmds, CMD_REQ_COMMIT);
1054 case 0x4000: /*level 4*/
1055 if (ctrl->dispparam_level4_cmds.cmd_cnt) {
1056 pr_info("level4\n");
1057 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_level4_cmds, CMD_REQ_COMMIT);
1060 case 0x5000: /*level 5*/
1061 if (ctrl->dispparam_level5_cmds.cmd_cnt) {
1062 pr_info("level 5\n");
1063 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_level5_cmds, CMD_REQ_COMMIT);
1066 case 0x6000: /*level 6*/
1067 if (ctrl->dispparam_level6_cmds.cmd_cnt) {
1068 pr_info("level6\n");
1069 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_level6_cmds, CMD_REQ_COMMIT);
1072 case 0xA000: /*night mode 1*/
1073 if (ctrl->dispparam_nightmode1_cmds.cmd_cnt) {
1074 pr_info("night mode 1\n");
1075 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_nightmode1_cmds, CMD_REQ_COMMIT);
1078 case 0xB000: /*night mode 2*/
1079 if (ctrl->dispparam_nightmode2_cmds.cmd_cnt) {
1080 pr_info("night mode 2\n");
1081 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_nightmode2_cmds, CMD_REQ_COMMIT);
1084 case 0xC000: /*night mode 3*/
1085 if (ctrl->dispparam_nightmode3_cmds.cmd_cnt) {
1086 pr_info("night mode 3\n");
1087 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_nightmode3_cmds, CMD_REQ_COMMIT);
1090 case 0xD000: /*night mode 4*/
1091 if (ctrl->dispparam_nightmode4_cmds.cmd_cnt) {
1092 pr_info("night mode 4\n");
1093 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_nightmode4_cmds, CMD_REQ_COMMIT);
1096 case 0xE000: /*night mode 5*/
1097 if (ctrl->dispparam_nightmode5_cmds.cmd_cnt) {
1098 pr_info("night mode5\n");
1099 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_nightmode5_cmds, CMD_REQ_COMMIT);
1104 temp = param & 0x000F0000;
1107 mdss_dsi_panel_cmd_read(ctrl, 0xAB, 0x00, (void *)mdss_dsi_dcs_read_cb, rbuf, 8);
1110 if (ctrl->dispparam_test_cmds.cmd_cnt) {
1112 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_test_cmds, CMD_REQ_COMMIT);
1114 pr_info("NT 1-cut2 3-cut4: %d\n",
1115 mdss_dsi_panel_cmd_read(ctrl, 0x3A, 0x00, (void *)mdss_dsi_dcs_read_cb, rbuf, 8));
1118 case DISPLAY_OFF_MODE:
1119 if (ctrl->displayoff_cmds.cmd_cnt) {
1120 pr_info("display off mode\n");
1121 mdss_dsi_panel_cmds_send(ctrl, &ctrl->displayoff_cmds, CMD_REQ_COMMIT);
1124 case DISPLAY_ON_MODE:
1125 if (ctrl->displayon_cmds.cmd_cnt) {
1126 pr_info("display on mode\n");
1127 mdss_dsi_panel_cmds_send(ctrl, &ctrl->displayon_cmds, CMD_REQ_COMMIT);
1131 if (ctrl->dispparam_idleon_cmds.cmd_cnt) {
1132 pr_info("idleon\n");
1133 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_idleon_cmds, CMD_REQ_COMMIT);
1137 if (ctrl->dispparam_idleoff_cmds.cmd_cnt) {
1138 pr_info("idleoff\n");
1139 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_idleoff_cmds, CMD_REQ_COMMIT);
1146 temp = param & 0x00F00000;
1149 if (ctrl->dispparam_normal1_cmds.cmd_cnt) {
1150 pr_info("normal mode1\n");
1151 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_normal1_cmds, CMD_REQ_COMMIT);
1155 if (ctrl->dispparam_normal2_cmds.cmd_cnt) {
1156 pr_info("normal mode2\n");
1157 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_normal2_cmds, CMD_REQ_COMMIT);
1161 if (ctrl->dispparam_srgb_cmds.cmd_cnt) {
1163 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_srgb_cmds, CMD_REQ_COMMIT);
1166 case DISPLAY_SKINCE_MODE:
1167 if (ctrl->dispparam_skin_ce_cmds.cmd_cnt) {
1168 pr_info("skin ce\n");
1169 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_skin_ce_cmds, CMD_REQ_COMMIT);
1176 temp = param & 0x000000F0;
1178 case 0x10: /*ce on default*/
1179 if (ctrl->dispparam_ceon_cmds.cmd_cnt) {
1181 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_ceon_cmds, CMD_REQ_COMMIT);
1184 case 0xA0: /*vivid weak*/
1185 if (ctrl->dispparam_vividweak_cmds.cmd_cnt) {
1186 pr_info("vividweak\n");
1187 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_vividweak_cmds, CMD_REQ_COMMIT);
1190 case 0xB0: /*vidid strong*/
1191 if (ctrl->dispparam_vividstrong_cmds.cmd_cnt) {
1192 pr_info("vividstrong\n");
1193 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_vividstrong_cmds, CMD_REQ_COMMIT);
1196 case 0xC0: /*smart weak*/
1197 if (ctrl->dispparam_smartweak_cmds.cmd_cnt) {
1198 pr_info("smartweak\n");
1199 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_smartweak_cmds, CMD_REQ_COMMIT);
1202 case 0xD0: /*smart strong*/
1203 if (ctrl->dispparam_smartstrong_cmds.cmd_cnt) {
1204 pr_info("smartstrong\n");
1205 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_smartstrong_cmds, CMD_REQ_COMMIT);
1208 case 0xE0: /*vidid off and smart off*/
1209 if (ctrl->dispparam_vividoff_cmds.cmd_cnt) {
1210 pr_info("vivid off\n");
1211 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_vividoff_cmds, CMD_REQ_COMMIT);
1213 if (ctrl->dispparam_smartoff_cmds.cmd_cnt) {
1214 pr_info("smart off\n");
1215 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_smartoff_cmds, CMD_REQ_COMMIT);
1218 case 0xF0: /*ce off*/
1219 if (ctrl->dispparam_ceoff_cmds.cmd_cnt) {
1221 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_ceoff_cmds, CMD_REQ_COMMIT);
1228 temp = param & 0x00000F00;
1230 case 0x100: /*cabc on*/
1231 if (ctrl->dispparam_cabcon_cmds.cmd_cnt) {
1232 pr_info("cabcon\n");
1233 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_cabcon_cmds, CMD_REQ_COMMIT);
1236 case 0x200: /*cabc gui on*/
1237 if (ctrl->dispparam_cabcguion_cmds.cmd_cnt) {
1238 pr_info("cabcguion\n");
1239 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_cabcguion_cmds, CMD_REQ_COMMIT);
1242 case 0x300: /*cabc still on*/
1243 if (ctrl->dispparam_cabcstillon_cmds.cmd_cnt) {
1244 pr_info("cabcstillon\n");
1245 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_cabcstillon_cmds, CMD_REQ_COMMIT);
1248 case 0x400: /*cabc movie on*/
1249 if (ctrl->dispparam_cabcmovieon_cmds.cmd_cnt) {
1250 pr_info("cabcmovieon\n");
1251 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_cabcmovieon_cmds, CMD_REQ_COMMIT);
1255 if (ctrl->dispparam_dimmingon_cmds.cmd_cnt) {
1256 pr_info("dimmingon\n");
1257 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_dimmingon_cmds, CMD_REQ_COMMIT);
1260 case 0xA00: /*smart contrast on*/
1261 if (ctrl->dispparam_scon_cmds.cmd_cnt) {
1262 pr_info("smart contrast\n");
1263 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_scon_cmds, CMD_REQ_COMMIT);
1266 case 0xB00: /*sre on*/
1267 if (ctrl->dispparam_sreon_cmds.cmd_cnt) {
1269 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_sreon_cmds, CMD_REQ_COMMIT);
1272 case 0xC00: /*sre off*/
1273 if (ctrl->dispparam_sreoff_cmds.cmd_cnt) {
1274 pr_info("sreoff\n");
1275 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_sreoff_cmds, CMD_REQ_COMMIT);
1278 case 0xF00: /*cabc off*/
1279 if (ctrl->dispparam_cabcoff_cmds.cmd_cnt) {
1280 pr_info("cabcoff\n");
1281 mdss_dsi_panel_cmds_send(ctrl, &ctrl->dispparam_cabcoff_cmds, CMD_REQ_COMMIT);
1289 static int mdss_dsi_panel_dispparam(struct mdss_panel_data *pdata)
1291 #define PANEL_ON_DISPARAM_MASK 0xF0000000
1293 struct mdss_dsi_ctrl_pdata *ctrl = NULL;
1297 if (pdata == NULL) {
1298 pr_err("%s: Invalid input data\n", __func__);
1302 if ((pdata->panel_info.panel_paramstatus & PANEL_ON_DISPARAM_MASK)
1303 == PANEL_ON_DISPARAM_MASK) {
1304 pdata->panel_info.panel_on_param =
1305 pdata->panel_info.panel_paramstatus & (~PANEL_ON_DISPARAM_MASK);
1306 pr_info("Panel on param updated 0x%x\n", pdata->panel_info.panel_on_param);
1310 if (pdata->panel_info.panel_power_state == MDSS_PANEL_POWER_OFF) {
1311 pr_err("Opreration not permitted because panel is power-off\n");
1315 ctrl = container_of(pdata, struct mdss_dsi_ctrl_pdata,
1318 pr_debug("%s: ctrl=%p ndx=%d\n", __func__, ctrl, ctrl->ndx);
1320 param = pdata->panel_info.panel_paramstatus;
1321 pr_info("param 0x%x\n", param);
1322 /* support oled hbm mode */
1325 pdata->panel_info.is_oled_hbm_mode = false;
1328 pdata->panel_info.is_oled_hbm_mode = true;
1331 if (!ctrl->dsi_pipe_ready) {
1332 pr_err("%s: index=%d pid=%d, mipi dsi pipe are not ready !!!\n", __func__,
1333 ctrl->ndx, current->pid);
1337 mdss_panel_disparam_set(ctrl, param);
1343 static void mdss_dsi_panel_switch_mode(struct mdss_panel_data *pdata,
1346 struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
1347 struct mipi_panel_info *mipi;
1348 struct dsi_panel_cmds *pcmds;
1351 if (pdata == NULL) {
1352 pr_err("%s: Invalid input data\n", __func__);
1356 mipi = &pdata->panel_info.mipi;
1358 if (!mipi->dms_mode)
1361 ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
1364 if (mipi->dms_mode != DYNAMIC_MODE_RESOLUTION_SWITCH_IMMEDIATE) {
1365 flags |= CMD_REQ_COMMIT;
1366 if (mode == SWITCH_TO_CMD_MODE)
1367 pcmds = &ctrl_pdata->video2cmd;
1369 pcmds = &ctrl_pdata->cmd2video;
1370 } else if ((mipi->dms_mode ==
1371 DYNAMIC_MODE_RESOLUTION_SWITCH_IMMEDIATE)
1372 && pdata->current_timing
1373 && !list_empty(&pdata->timings_list)) {
1374 struct dsi_panel_timing *pt;
1376 pt = container_of(pdata->current_timing,
1377 struct dsi_panel_timing, timing);
1379 pr_debug("%s: sending switch commands\n", __func__);
1380 pcmds = &pt->switch_cmds;
1381 flags |= CMD_REQ_DMA_TPG;
1382 flags |= CMD_REQ_COMMIT;
1384 pr_warn("%s: Invalid mode switch attempted\n", __func__);
1388 if ((pdata->panel_info.compression_mode == COMPRESSION_DSC) &&
1389 (pdata->panel_info.send_pps_before_switch))
1390 mdss_dsi_panel_dsc_pps_send(ctrl_pdata, &pdata->panel_info);
1392 mdss_dsi_panel_cmds_send(ctrl_pdata, pcmds, flags);
1394 if ((pdata->panel_info.compression_mode == COMPRESSION_DSC) &&
1395 (!pdata->panel_info.send_pps_before_switch))
1396 mdss_dsi_panel_dsc_pps_send(ctrl_pdata, &pdata->panel_info);
1399 static void mdss_dsi_panel_wled_cabc_ctrl(struct led_trigger *trig,
1402 struct led_classdev *led_cdev;
1407 list_for_each_entry(led_cdev, &trig->led_cdevs, trig_list)
1408 qpnp_wled_cabc(led_cdev, enable);
1411 static void mdss_dsi_panel_bl_count(struct mdss_panel_data *pdata,
1414 static u32 last_bl_level;
1415 static u64 last_bl_start;
1416 u64 bl_level_end = 0;
1419 bl_level_end = get_jiffies_64();
1420 if (last_bl_level > 0) {
1421 pdata->panel_info.bl_level_integral += last_bl_level * (bl_level_end - last_bl_start);
1422 pdata->panel_info.bl_duration += (bl_level_end - last_bl_start);
1426 if (last_bl_level > 3071) {
1427 pdata->panel_info.bl_highlevel_duration += (bl_level_end - last_bl_start);
1428 } else if (last_bl_level > 0) {
1429 pdata->panel_info.bl_lowlevel_duration += (bl_level_end - last_bl_start);
1432 last_bl_level = bl_level;
1433 last_bl_start = bl_level_end;
1435 if (bl_level == 0) {
1436 memset(ch, 0, sizeof(ch));
1442 static void mdss_dsi_panel_bl_ctrl(struct mdss_panel_data *pdata,
1445 struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
1446 struct mdss_dsi_ctrl_pdata *sctrl = NULL;
1449 if (pdata == NULL) {
1450 pr_err("%s: Invalid input data\n", __func__);
1454 ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
1458 * Some backlight controllers specify a minimum duty cycle
1459 * for the backlight brightness. If the brightness is less
1460 * than it, the controller can malfunction.
1462 pr_debug("%s: bl_level:%d\n", __func__, bl_level);
1464 /* do not allow backlight to change when panel in disable mode */
1465 if (pdata->panel_disable_mode && (bl_level != 0))
1468 if ((bl_level < pdata->panel_info.bl_min) && (bl_level != 0))
1469 bl_level = pdata->panel_info.bl_min;
1471 if (bl_level == 0) {
1472 pr_debug("%s: set display off when bl_level=0\n", __func__);
1473 if (ctrl_pdata->panel_data.panel_info.disable_cabc) {
1474 ret = mdss_dsi_panel_cmd_read(ctrl_pdata, 0x52, 0x00,
1475 (void *)mdss_dsi_dcs_read_cb, rbuf, 1);
1476 if (ret > 0 && ctrl_pdata->bklt_level * rbuf[0] >= 255)
1477 led_trigger_event(bl_led_trigger, ctrl_pdata->bklt_level * rbuf[0] / 255);
1478 mdss_dsi_panel_wled_cabc_ctrl(bl_led_trigger, 0);
1480 disable_esd_thread_sync();
1481 mdss_panel_disparam_set(ctrl_pdata, DISPLAY_OFF_MODE);
1482 ctrl_pdata->dsi_panel_off_mode = true;
1483 if (ctrl_pdata->panel_data.panel_info.disable_cabc)
1484 mdss_dsi_panel_wled_cabc_ctrl(bl_led_trigger, 1);
1486 if (ctrl_pdata->bklt_level == 0 && ctrl_pdata->dsi_panel_off_mode == true) {
1487 pr_debug("%s: set display on when bklt_level=0\n", __func__);
1488 mdss_panel_disparam_set(ctrl_pdata, DISPLAY_ON_MODE);
1489 enable_esd_thread();
1493 mdss_dsi_panel_bl_count(pdata, bl_level);
1495 /* enable the backlight gpio if present */
1496 mdss_dsi_bl_gpio_ctrl(pdata, bl_level);
1498 switch (ctrl_pdata->bklt_ctrl) {
1500 led_trigger_event(bl_led_trigger, bl_level);
1503 mdss_dsi_panel_bklt_pwm(ctrl_pdata, bl_level);
1506 if (!mdss_dsi_sync_wait_enable(ctrl_pdata)) {
1507 mdss_dsi_panel_bklt_dcs(ctrl_pdata, bl_level);
1511 * DCS commands to update backlight are usually sent at
1512 * the same time to both the controllers. However, if
1513 * sync_wait is enabled, we need to ensure that the
1514 * dcs commands are first sent to the non-trigger
1515 * controller so that when the commands are triggered,
1516 * both controllers receive it at the same time.
1518 sctrl = mdss_dsi_get_other_ctrl(ctrl_pdata);
1519 if (mdss_dsi_sync_wait_trigger(ctrl_pdata)) {
1521 mdss_dsi_panel_bklt_dcs(sctrl, bl_level);
1522 mdss_dsi_panel_bklt_dcs(ctrl_pdata, bl_level);
1524 mdss_dsi_panel_bklt_dcs(ctrl_pdata, bl_level);
1526 mdss_dsi_panel_bklt_dcs(sctrl, bl_level);
1530 pr_err("%s: Unknown bl_ctrl configuration\n",
1535 if (ctrl_pdata->bklt_level == 0 && bl_level) {
1536 if (pdata->panel_info.panel_on_dimming_delay)
1537 schedule_delayed_work(&ctrl_pdata->cmds_work,
1538 msecs_to_jiffies(pdata->panel_info.panel_on_dimming_delay));
1540 ctrl_pdata->bklt_level = bl_level;
1543 static void panelon_dimming_enable_delayed_work(struct work_struct *work)
1545 struct mdss_dsi_ctrl_pdata *ctrl = container_of(work,
1546 struct mdss_dsi_ctrl_pdata, cmds_work.work);
1547 mdss_panel_disparam_set(ctrl, PANEL_DIMMING_ON_CMD);
1550 static int mdss_dsi_panel_on(struct mdss_panel_data *pdata)
1552 struct mdss_dsi_ctrl_pdata *ctrl = NULL;
1553 struct mdss_panel_info *pinfo;
1554 struct dsi_panel_cmds *on_cmds;
1557 if (pdata == NULL) {
1558 pr_err("%s: Invalid input data\n", __func__);
1562 pinfo = &pdata->panel_info;
1563 ctrl = container_of(pdata, struct mdss_dsi_ctrl_pdata,
1566 pr_info("%s: ndx=%d\n", __func__, ctrl->ndx);
1568 if (pinfo->dcs_cmd_by_left) {
1569 if (ctrl->ndx != DSI_CTRL_LEFT)
1573 on_cmds = &ctrl->on_cmds;
1575 if ((pinfo->mipi.dms_mode == DYNAMIC_MODE_SWITCH_IMMEDIATE) &&
1576 (pinfo->mipi.boot_mode != pinfo->mipi.mode))
1577 on_cmds = &ctrl->post_dms_on_cmds;
1579 pr_debug("%s: ndx=%d cmd_cnt=%d\n", __func__,
1580 ctrl->ndx, on_cmds->cmd_cnt);
1582 if (on_cmds->cmd_cnt)
1583 mdss_dsi_panel_cmds_send(ctrl, on_cmds, CMD_REQ_COMMIT);
1585 if (!pinfo->panel_on_dimming_delay)
1586 mdss_panel_disparam_set(ctrl, PANEL_DIMMING_ON_CMD);
1588 if (pinfo->compression_mode == COMPRESSION_DSC)
1589 mdss_dsi_panel_dsc_pps_send(ctrl, pinfo);
1591 if (ctrl->ds_registered)
1592 mdss_dba_utils_video_on(pinfo->dba_data, pinfo);
1594 /* Ensure low persistence mode is set as before */
1595 mdss_dsi_panel_apply_display_setting(pdata, pinfo->persist_mode);
1597 ctrl->dsi_panel_off_mode = false;
1600 pr_info("%s:-\n", __func__);
1604 static int mdss_dsi_post_panel_on(struct mdss_panel_data *pdata)
1606 struct mdss_dsi_ctrl_pdata *ctrl = NULL;
1607 struct mdss_panel_info *pinfo;
1608 struct dsi_panel_cmds *cmds;
1609 u32 vsync_period = 0;
1611 if (pdata == NULL) {
1612 pr_err("%s: Invalid input data\n", __func__);
1616 ctrl = container_of(pdata, struct mdss_dsi_ctrl_pdata,
1619 pr_debug("%s: ctrl=%pK ndx=%d\n", __func__, ctrl, ctrl->ndx);
1621 pinfo = &pdata->panel_info;
1622 if (pinfo->dcs_cmd_by_left && ctrl->ndx != DSI_CTRL_LEFT)
1625 cmds = &ctrl->post_panel_on_cmds;
1626 if (cmds->cmd_cnt) {
1627 msleep(VSYNC_DELAY); /* wait for a vsync passed */
1628 mdss_dsi_panel_cmds_send(ctrl, cmds, CMD_REQ_COMMIT);
1631 if (pinfo->is_dba_panel && pinfo->is_pluggable) {
1632 /* ensure at least 1 frame transfers to down stream device */
1633 vsync_period = (MSEC_PER_SEC / pinfo->mipi.frame_rate) + 1;
1634 msleep(vsync_period);
1635 mdss_dba_utils_hdcp_enable(pinfo->dba_data, true);
1639 pr_info("%s:-\n", __func__);
1643 static int mdss_dsi_panel_off(struct mdss_panel_data *pdata)
1645 struct mdss_dsi_ctrl_pdata *ctrl = NULL;
1646 struct mdss_panel_info *pinfo;
1648 if (pdata == NULL) {
1649 pr_err("%s: Invalid input data\n", __func__);
1653 pinfo = &pdata->panel_info;
1654 ctrl = container_of(pdata, struct mdss_dsi_ctrl_pdata,
1657 pr_info("%s: ctrl=%pK ndx=%d\n", __func__, ctrl, ctrl->ndx);
1659 cancel_delayed_work_sync(&ctrl->cmds_work);
1661 if (pinfo->dcs_cmd_by_left) {
1662 if (ctrl->ndx != DSI_CTRL_LEFT)
1666 if (ctrl->off_cmds.cmd_cnt)
1667 mdss_dsi_panel_cmds_send(ctrl, &ctrl->off_cmds, CMD_REQ_COMMIT);
1669 if (ctrl->ds_registered && pinfo->is_pluggable) {
1670 mdss_dba_utils_video_off(pinfo->dba_data);
1671 mdss_dba_utils_hdcp_enable(pinfo->dba_data, false);
1675 pr_debug("%s:-\n", __func__);
1679 static int mdss_dsi_panel_low_power_config(struct mdss_panel_data *pdata,
1682 struct mdss_dsi_ctrl_pdata *ctrl = NULL;
1683 struct mdss_panel_info *pinfo;
1685 if (pdata == NULL) {
1686 pr_err("%s: Invalid input data\n", __func__);
1690 pinfo = &pdata->panel_info;
1691 ctrl = container_of(pdata, struct mdss_dsi_ctrl_pdata,
1694 pr_debug("%s: ctrl=%pK ndx=%d enable=%d\n", __func__, ctrl, ctrl->ndx,
1697 /* Any panel specific low power commands/config */
1699 pr_debug("%s:-\n", __func__);
1703 static void mdss_dsi_parse_mdp_kickoff_threshold(struct device_node *np,
1704 struct mdss_panel_info *pinfo)
1711 pinfo->mdp_koff_thshold = false;
1712 src = of_get_property(np, "qcom,mdss-mdp-kickoff-threshold", &len);
1713 if (!src || (len == 0))
1716 rc = of_property_read_u32(np, "qcom,mdss-mdp-kickoff-delay", &tmp);
1718 pinfo->mdp_koff_delay = tmp;
1722 if (pinfo->mipi.frame_rate == 0) {
1723 pr_err("cannot enable guard window, unexpected panel fps\n");
1727 pinfo->mdp_koff_thshold_low = be32_to_cpu(src[0]);
1728 pinfo->mdp_koff_thshold_high = be32_to_cpu(src[1]);
1729 max_delay_us = 1000000 / pinfo->mipi.frame_rate;
1731 /* enable the feature if threshold is valid */
1732 if ((pinfo->mdp_koff_thshold_low < pinfo->mdp_koff_thshold_high) &&
1733 ((pinfo->mdp_koff_delay > 0) ||
1734 (pinfo->mdp_koff_delay < max_delay_us)))
1735 pinfo->mdp_koff_thshold = true;
1737 pr_debug("panel kickoff thshold:[%d, %d] delay:%d (max:%d) enable:%d\n",
1738 pinfo->mdp_koff_thshold_low,
1739 pinfo->mdp_koff_thshold_high,
1740 pinfo->mdp_koff_delay,
1742 pinfo->mdp_koff_thshold);
1745 static void mdss_dsi_parse_trigger(struct device_node *np, char *trigger,
1750 *trigger = DSI_CMD_TRIGGER_SW;
1751 data = of_get_property(np, trigger_key, NULL);
1753 if (!strcmp(data, "none"))
1754 *trigger = DSI_CMD_TRIGGER_NONE;
1755 else if (!strcmp(data, "trigger_te"))
1756 *trigger = DSI_CMD_TRIGGER_TE;
1757 else if (!strcmp(data, "trigger_sw_seof"))
1758 *trigger = DSI_CMD_TRIGGER_SW_SEOF;
1759 else if (!strcmp(data, "trigger_sw_te"))
1760 *trigger = DSI_CMD_TRIGGER_SW_TE;
1765 static int mdss_dsi_parse_dcs_cmds(struct device_node *np,
1766 struct dsi_panel_cmds *pcmds, char *cmd_key, char *link_key)
1771 struct dsi_ctrl_hdr *dchdr;
1774 data = of_get_property(np, cmd_key, &blen);
1776 pr_err("%s: failed, key=%s\n", __func__, cmd_key);
1780 buf = kzalloc(sizeof(char) * blen, GFP_KERNEL);
1784 memcpy(buf, data, blen);
1786 /* scan dcs commands */
1790 while (len >= sizeof(*dchdr)) {
1791 dchdr = (struct dsi_ctrl_hdr *)bp;
1792 dchdr->dlen = ntohs(dchdr->dlen);
1793 if (dchdr->dlen > len) {
1794 pr_err("%s: dtsi cmd=%x error, len=%d",
1795 __func__, dchdr->dtype, dchdr->dlen);
1798 bp += sizeof(*dchdr);
1799 len -= sizeof(*dchdr);
1806 pr_err("%s: dcs_cmd=%x len=%d error!",
1807 __func__, buf[0], blen);
1811 pcmds->cmds = kzalloc(cnt * sizeof(struct dsi_cmd_desc),
1816 pcmds->cmd_cnt = cnt;
1822 for (i = 0; i < cnt; i++) {
1823 dchdr = (struct dsi_ctrl_hdr *)bp;
1824 len -= sizeof(*dchdr);
1825 bp += sizeof(*dchdr);
1826 pcmds->cmds[i].dchdr = *dchdr;
1827 pcmds->cmds[i].payload = bp;
1832 /*Set default link state to LP Mode*/
1833 pcmds->link_state = DSI_LP_MODE;
1836 data = of_get_property(np, link_key, NULL);
1837 if (data && !strcmp(data, "dsi_hs_mode"))
1838 pcmds->link_state = DSI_HS_MODE;
1840 pcmds->link_state = DSI_LP_MODE;
1843 pr_debug("%s: dcs_cmd=%x len=%d, cmd_cnt=%d link_state=%d\n", __func__,
1844 pcmds->buf[0], pcmds->blen, pcmds->cmd_cnt, pcmds->link_state);
1854 int mdss_panel_get_dst_fmt(u32 bpp, char mipi_mode, u32 pixel_packing,
1860 *dst_format = DSI_CMD_DST_FORMAT_RGB111;
1863 *dst_format = DSI_CMD_DST_FORMAT_RGB332;
1866 *dst_format = DSI_CMD_DST_FORMAT_RGB444;
1869 switch (mipi_mode) {
1870 case DSI_VIDEO_MODE:
1871 *dst_format = DSI_VIDEO_DST_FORMAT_RGB565;
1874 *dst_format = DSI_CMD_DST_FORMAT_RGB565;
1877 *dst_format = DSI_VIDEO_DST_FORMAT_RGB565;
1882 switch (mipi_mode) {
1883 case DSI_VIDEO_MODE:
1884 if (pixel_packing == 0)
1885 *dst_format = DSI_VIDEO_DST_FORMAT_RGB666;
1887 *dst_format = DSI_VIDEO_DST_FORMAT_RGB666_LOOSE;
1890 *dst_format = DSI_CMD_DST_FORMAT_RGB666;
1893 if (pixel_packing == 0)
1894 *dst_format = DSI_VIDEO_DST_FORMAT_RGB666;
1896 *dst_format = DSI_VIDEO_DST_FORMAT_RGB666_LOOSE;
1901 switch (mipi_mode) {
1902 case DSI_VIDEO_MODE:
1903 *dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
1906 *dst_format = DSI_CMD_DST_FORMAT_RGB888;
1909 *dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
1920 static int mdss_dsi_parse_fbc_params(struct device_node *np,
1921 struct mdss_panel_timing *timing)
1923 int rc, fbc_enabled = 0;
1925 struct fbc_panel_info *fbc = &timing->fbc;
1927 fbc_enabled = of_property_read_bool(np, "qcom,mdss-dsi-fbc-enable");
1929 pr_debug("%s:%d FBC panel enabled.\n", __func__, __LINE__);
1931 rc = of_property_read_u32(np, "qcom,mdss-dsi-fbc-bpp", &tmp);
1932 fbc->target_bpp = (!rc ? tmp : 24);
1933 rc = of_property_read_u32(np, "qcom,mdss-dsi-fbc-packing",
1935 fbc->comp_mode = (!rc ? tmp : 0);
1936 fbc->qerr_enable = of_property_read_bool(np,
1937 "qcom,mdss-dsi-fbc-quant-error");
1938 rc = of_property_read_u32(np, "qcom,mdss-dsi-fbc-bias", &tmp);
1939 fbc->cd_bias = (!rc ? tmp : 0);
1940 fbc->pat_enable = of_property_read_bool(np,
1941 "qcom,mdss-dsi-fbc-pat-mode");
1942 fbc->vlc_enable = of_property_read_bool(np,
1943 "qcom,mdss-dsi-fbc-vlc-mode");
1944 fbc->bflc_enable = of_property_read_bool(np,
1945 "qcom,mdss-dsi-fbc-bflc-mode");
1946 rc = of_property_read_u32(np, "qcom,mdss-dsi-fbc-h-line-budget",
1948 fbc->line_x_budget = (!rc ? tmp : 0);
1949 rc = of_property_read_u32(np, "qcom,mdss-dsi-fbc-budget-ctrl",
1951 fbc->block_x_budget = (!rc ? tmp : 0);
1952 rc = of_property_read_u32(np, "qcom,mdss-dsi-fbc-block-budget",
1954 fbc->block_budget = (!rc ? tmp : 0);
1955 rc = of_property_read_u32(np,
1956 "qcom,mdss-dsi-fbc-lossless-threshold", &tmp);
1957 fbc->lossless_mode_thd = (!rc ? tmp : 0);
1958 rc = of_property_read_u32(np,
1959 "qcom,mdss-dsi-fbc-lossy-threshold", &tmp);
1960 fbc->lossy_mode_thd = (!rc ? tmp : 0);
1961 rc = of_property_read_u32(np, "qcom,mdss-dsi-fbc-rgb-threshold",
1963 fbc->lossy_rgb_thd = (!rc ? tmp : 0);
1964 rc = of_property_read_u32(np,
1965 "qcom,mdss-dsi-fbc-lossy-mode-idx", &tmp);
1966 fbc->lossy_mode_idx = (!rc ? tmp : 0);
1967 rc = of_property_read_u32(np,
1968 "qcom,mdss-dsi-fbc-slice-height", &tmp);
1969 fbc->slice_height = (!rc ? tmp : 0);
1970 fbc->pred_mode = of_property_read_bool(np,
1971 "qcom,mdss-dsi-fbc-2d-pred-mode");
1972 fbc->enc_mode = of_property_read_bool(np,
1973 "qcom,mdss-dsi-fbc-ver2-mode");
1974 rc = of_property_read_u32(np,
1975 "qcom,mdss-dsi-fbc-max-pred-err", &tmp);
1976 fbc->max_pred_err = (!rc ? tmp : 0);
1978 timing->compression_mode = COMPRESSION_FBC;
1980 pr_debug("%s:%d Panel does not support FBC.\n",
1981 __func__, __LINE__);
1983 fbc->target_bpp = 24;
1988 void mdss_dsi_panel_dsc_pps_send(struct mdss_dsi_ctrl_pdata *ctrl,
1989 struct mdss_panel_info *pinfo)
1991 struct dsi_panel_cmds pcmds;
1992 struct dsi_cmd_desc cmd;
1994 if (!pinfo || (pinfo->compression_mode != COMPRESSION_DSC))
1997 memset(&pcmds, 0, sizeof(pcmds));
1998 memset(&cmd, 0, sizeof(cmd));
2000 cmd.dchdr.dlen = mdss_panel_dsc_prepare_pps_buf(&pinfo->dsc,
2002 cmd.dchdr.dtype = DTYPE_PPS;
2004 cmd.dchdr.wait = 10;
2007 cmd.payload = ctrl->pps_buf;
2011 pcmds.link_state = DSI_LP_MODE;
2013 mdss_dsi_panel_cmds_send(ctrl, &pcmds, CMD_REQ_COMMIT);
2016 static int mdss_dsi_parse_hdr_settings(struct device_node *np,
2017 struct mdss_panel_info *pinfo)
2020 struct mdss_panel_hdr_properties *hdr_prop;
2023 pr_err("%s: device node pointer is NULL\n", __func__);
2028 pr_err("%s: panel info is NULL\n", __func__);
2032 hdr_prop = &pinfo->hdr_properties;
2033 hdr_prop->hdr_enabled = of_property_read_bool(np,
2034 "qcom,mdss-dsi-panel-hdr-enabled");
2036 if (hdr_prop->hdr_enabled) {
2037 rc = of_property_read_u32_array(np,
2038 "qcom,mdss-dsi-panel-hdr-color-primaries",
2039 hdr_prop->display_primaries,
2040 DISPLAY_PRIMARIES_COUNT);
2042 pr_info("%s:%d, Unable to read color primaries,rc:%u",
2044 hdr_prop->hdr_enabled = false);
2047 rc = of_property_read_u32(np,
2048 "qcom,mdss-dsi-panel-peak-brightness",
2049 &(hdr_prop->peak_brightness));
2051 pr_info("%s:%d, Unable to read hdr brightness, rc:%u",
2052 __func__, __LINE__, rc);
2053 hdr_prop->hdr_enabled = false;
2056 rc = of_property_read_u32(np,
2057 "qcom,mdss-dsi-panel-blackness-level",
2058 &(hdr_prop->blackness_level));
2060 pr_info("%s:%d, Unable to read hdr brightness, rc:%u",
2061 __func__, __LINE__, rc);
2062 hdr_prop->hdr_enabled = false;
2068 static int mdss_dsi_parse_split_link_settings(struct device_node *np,
2069 struct mdss_panel_info *pinfo)
2075 pr_err("%s: device node pointer is NULL\n", __func__);
2080 pr_err("%s: panel info is NULL\n", __func__);
2084 pinfo->split_link_enabled = of_property_read_bool(np,
2085 "qcom,split-link-enabled");
2087 if (pinfo->split_link_enabled) {
2088 rc = of_property_read_u32(np,
2089 "qcom,sublinks-count", &tmp);
2090 /* default num of sublink is 1*/
2091 pinfo->mipi.num_of_sublinks = (!rc ? tmp : 1);
2093 rc = of_property_read_u32(np,
2094 "qcom,lanes-per-sublink", &tmp);
2095 /* default num of lanes per sublink is 1 */
2096 pinfo->mipi.lanes_per_sublink = (!rc ? tmp : 1);
2099 pr_info("%s: enable %d sublinks-count %d lanes per sublink %d\n",
2100 __func__, pinfo->split_link_enabled,
2101 pinfo->mipi.num_of_sublinks,
2102 pinfo->mipi.lanes_per_sublink);
2106 static int mdss_dsi_parse_dsc_version(struct device_node *np,
2107 struct mdss_panel_timing *timing)
2111 struct dsc_desc *dsc = &timing->dsc;
2113 rc = of_property_read_u32(np, "qcom,mdss-dsc-version", &data);
2115 dsc->version = 0x11;
2118 dsc->version = data & 0xff;
2119 /* only support DSC 1.1 rev */
2120 if (dsc->version != 0x11) {
2121 pr_err("%s: DSC version:%d not supported\n", __func__,
2128 rc = of_property_read_u32(np, "qcom,mdss-dsc-scr-version", &data);
2133 dsc->scr_rev = data & 0xff;
2134 /* only one scr rev supported */
2135 if (dsc->scr_rev > 0x1) {
2136 pr_err("%s: DSC scr version:%d not supported\n",
2137 __func__, dsc->scr_rev);
2147 static int mdss_dsi_parse_dsc_params(struct device_node *np,
2148 struct mdss_panel_timing *timing, bool is_split_display)
2150 u32 data, intf_width;
2152 struct dsc_desc *dsc = &timing->dsc;
2155 pr_err("%s: device node pointer is NULL\n", __func__);
2159 rc = of_property_read_u32(np, "qcom,mdss-dsc-encoders", &data);
2161 if (!of_find_property(np, "qcom,mdss-dsc-encoders", NULL)) {
2162 /* property is not defined, default to 1 */
2165 pr_err("%s: Error parsing qcom,mdss-dsc-encoders\n",
2171 timing->dsc_enc_total = data;
2173 if (is_split_display && (timing->dsc_enc_total > 1)) {
2174 pr_err("%s: Error: for split displays, more than 1 dsc encoder per panel is not allowed.\n",
2179 rc = of_property_read_u32(np, "qcom,mdss-dsc-slice-height", &data);
2182 dsc->slice_height = data;
2184 rc = of_property_read_u32(np, "qcom,mdss-dsc-slice-width", &data);
2187 dsc->slice_width = data;
2188 intf_width = timing->xres;
2190 if (intf_width % dsc->slice_width) {
2191 pr_err("%s: Error: multiple of slice-width:%d should match panel-width:%d\n",
2192 __func__, dsc->slice_width, intf_width);
2196 data = intf_width / dsc->slice_width;
2197 if (((timing->dsc_enc_total > 1) && ((data != 2) && (data != 4))) ||
2198 ((timing->dsc_enc_total == 1) && (data > 2))) {
2199 pr_err("%s: Error: max 2 slice per encoder. slice-width:%d should match panel-width:%d dsc_enc_total:%d\n",
2200 __func__, dsc->slice_width,
2201 intf_width, timing->dsc_enc_total);
2205 rc = of_property_read_u32(np, "qcom,mdss-dsc-slice-per-pkt", &data);
2208 dsc->slice_per_pkt = data;
2211 * slice_per_pkt can be either 1 or all slices_per_intf
2213 if ((dsc->slice_per_pkt > 1) && (dsc->slice_per_pkt !=
2214 DIV_ROUND_UP(intf_width, dsc->slice_width))) {
2215 pr_err("Error: slice_per_pkt can be either 1 or all slices_per_intf\n");
2216 pr_err("%s: slice_per_pkt=%d, slice_width=%d intf_width=%d\n",
2218 dsc->slice_per_pkt, dsc->slice_width, intf_width);
2223 pr_debug("%s: num_enc:%d :slice h=%d w=%d s_pkt=%d\n", __func__,
2224 timing->dsc_enc_total, dsc->slice_height,
2225 dsc->slice_width, dsc->slice_per_pkt);
2227 rc = of_property_read_u32(np, "qcom,mdss-dsc-bit-per-component", &data);
2232 rc = of_property_read_u32(np, "qcom,mdss-dsc-bit-per-pixel", &data);
2237 pr_debug("%s: bpc=%d bpp=%d\n", __func__,
2238 dsc->bpc, dsc->bpp);
2240 dsc->block_pred_enable = of_property_read_bool(np,
2241 "qcom,mdss-dsc-block-prediction-enable");
2243 dsc->enable_422 = 0;
2244 dsc->convert_rgb = 1;
2245 dsc->vbr_enable = 0;
2247 dsc->config_by_manufacture_cmd = of_property_read_bool(np,
2248 "qcom,mdss-dsc-config-by-manufacture-cmd");
2250 mdss_panel_dsc_parameters_calc(&timing->dsc);
2251 mdss_panel_dsc_pclk_param_calc(&timing->dsc, intf_width);
2253 timing->dsc.full_frame_slices =
2254 DIV_ROUND_UP(intf_width, timing->dsc.slice_width);
2256 timing->compression_mode = COMPRESSION_DSC;
2262 static struct device_node *mdss_dsi_panel_get_dsc_cfg_np(
2263 struct device_node *np, struct mdss_panel_data *panel_data,
2264 bool default_timing)
2266 struct device_node *dsc_cfg_np = NULL;
2269 /* Read the dsc config node specified by command line */
2270 if (default_timing) {
2271 dsc_cfg_np = of_get_child_by_name(np,
2272 panel_data->dsc_cfg_np_name);
2274 pr_warn_once("%s: cannot find dsc config node:%s\n",
2275 __func__, panel_data->dsc_cfg_np_name);
2279 * Fall back to default from DT as nothing is specified
2282 if (!dsc_cfg_np && of_find_property(np, "qcom,config-select", NULL)) {
2283 dsc_cfg_np = of_parse_phandle(np, "qcom,config-select", 0);
2285 pr_warn_once("%s:err parsing qcom,config-select\n",
2292 static int mdss_dsi_parse_topology_config(struct device_node *np,
2293 struct dsi_panel_timing *pt, struct mdss_panel_data *panel_data,
2294 bool default_timing)
2297 bool is_split_display = panel_data->panel_info.is_split_display;
2299 struct mdss_panel_timing *timing = &pt->timing;
2300 struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
2301 struct mdss_panel_info *pinfo;
2302 struct device_node *cfg_np = NULL;
2304 ctrl_pdata = container_of(panel_data, struct mdss_dsi_ctrl_pdata,
2306 pinfo = &ctrl_pdata->panel_data.panel_info;
2308 cfg_np = mdss_dsi_panel_get_dsc_cfg_np(np,
2309 &ctrl_pdata->panel_data, default_timing);
2312 if (!of_property_read_u32_array(cfg_np, "qcom,lm-split",
2313 timing->lm_widths, 2)) {
2314 if (mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data)
2315 && (timing->lm_widths[1] != 0)) {
2316 pr_err("%s: lm-split not allowed with split display\n",
2323 if (!of_property_read_string(cfg_np, "qcom,split-mode",
2324 &data) && !strcmp(data, "pingpong-split"))
2325 pinfo->use_pingpong_split = true;
2327 if (((timing->lm_widths[0]) || (timing->lm_widths[1])) &&
2328 pinfo->use_pingpong_split) {
2329 pr_err("%s: pingpong_split cannot be used when lm-split[%d,%d] is specified\n",
2331 timing->lm_widths[0], timing->lm_widths[1]);
2335 pr_info("%s: cfg_node name %s lm_split:%dx%d pp_split:%s\n",
2336 __func__, cfg_np->name,
2337 timing->lm_widths[0], timing->lm_widths[1],
2338 pinfo->use_pingpong_split ? "yes" : "no");
2341 if (!pinfo->use_pingpong_split &&
2342 (timing->lm_widths[0] == 0) && (timing->lm_widths[1] == 0))
2343 timing->lm_widths[0] = pt->timing.xres;
2345 data = of_get_property(np, "qcom,compression-mode", NULL);
2347 if (cfg_np && !strcmp(data, "dsc")) {
2348 rc = mdss_dsi_parse_dsc_version(np, &pt->timing);
2352 pinfo->send_pps_before_switch =
2353 of_property_read_bool(np,
2354 "qcom,mdss-dsi-send-pps-before-switch");
2356 rc = mdss_dsi_parse_dsc_params(cfg_np, &pt->timing,
2358 } else if (!strcmp(data, "fbc")) {
2359 rc = mdss_dsi_parse_fbc_params(np, &pt->timing);
2364 of_node_put(cfg_np);
2368 static void mdss_panel_parse_te_params(struct device_node *np,
2369 struct mdss_panel_timing *timing)
2371 struct mdss_mdp_pp_tear_check *te = &timing->te;
2375 * TE default: dsi byte clock calculated base on 70 fps;
2376 * around 14 ms to complete a kickoff cycle if te disabled;
2377 * vclk_line base on 60 fps; write is faster than read;
2378 * init == start == rdptr;
2381 !of_property_read_bool(np, "qcom,mdss-tear-check-disable");
2382 rc = of_property_read_u32
2383 (np, "qcom,mdss-tear-check-sync-cfg-height", &tmp);
2384 te->sync_cfg_height = (!rc ? tmp : 0xfff0);
2385 rc = of_property_read_u32
2386 (np, "qcom,mdss-tear-check-sync-init-val", &tmp);
2387 te->vsync_init_val = (!rc ? tmp : timing->yres);
2388 rc = of_property_read_u32
2389 (np, "qcom,mdss-tear-check-sync-threshold-start", &tmp);
2390 te->sync_threshold_start = (!rc ? tmp : 4);
2391 rc = of_property_read_u32
2392 (np, "qcom,mdss-tear-check-sync-threshold-continue", &tmp);
2393 te->sync_threshold_continue = (!rc ? tmp : 4);
2394 rc = of_property_read_u32(np, "qcom,mdss-tear-check-frame-rate", &tmp);
2395 te->refx100 = (!rc ? tmp : 6000);
2396 rc = of_property_read_u32
2397 (np, "qcom,mdss-tear-check-start-pos", &tmp);
2398 te->start_pos = (!rc ? tmp : timing->yres);
2399 rc = of_property_read_u32
2400 (np, "qcom,mdss-tear-check-rd-ptr-trigger-intr", &tmp);
2401 te->rd_ptr_irq = (!rc ? tmp : timing->yres + 1);
2406 static int mdss_dsi_parse_reset_seq(struct device_node *np,
2407 u32 rst_seq[MDSS_DSI_RST_SEQ_LEN], u32 *rst_len,
2412 struct property *data;
2413 u32 tmp[MDSS_DSI_RST_SEQ_LEN];
2415 data = of_find_property(np, name, &num);
2417 if (!data || !num || num > MDSS_DSI_RST_SEQ_LEN || num % 2) {
2418 pr_debug("%s:%d, error reading %s, length found = %d\n",
2419 __func__, __LINE__, name, num);
2421 rc = of_property_read_u32_array(np, name, tmp, num);
2423 pr_debug("%s:%d, error reading %s, rc = %d\n",
2424 __func__, __LINE__, name, rc);
2426 for (i = 0; i < num; ++i)
2427 rst_seq[i] = tmp[i];
2434 static bool mdss_dsi_cmp_panel_reg_v2(struct mdss_dsi_ctrl_pdata *ctrl)
2440 lenp = ctrl->status_valid_params ?: ctrl->status_cmds_rlen;
2442 for (i = 0; i < ctrl->status_cmds.cmd_cnt; i++)
2445 for (j = 0; j < ctrl->groups; ++j) {
2446 for (i = 0; i < len; ++i) {
2447 pr_debug("[%i] return:0x%x status:0x%x\n",
2448 i, ctrl->return_buf[i],
2449 (unsigned int)ctrl->status_value[group + i]);
2450 MDSS_XLOG(ctrl->ndx, ctrl->return_buf[i],
2451 ctrl->status_value[group + i]);
2452 if (ctrl->return_buf[i] !=
2453 ctrl->status_value[group + i])
2465 static int mdss_dsi_gen_read_status(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
2467 if (!mdss_dsi_cmp_panel_reg_v2(ctrl_pdata)) {
2468 pr_err("%s: Read back value from panel is incorrect\n",
2476 static int mdss_dsi_nt35596_read_status(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
2478 if (!mdss_dsi_cmp_panel_reg(ctrl_pdata->status_buf,
2479 ctrl_pdata->status_value, 0)) {
2480 ctrl_pdata->status_error_count = 0;
2481 pr_err("%s: Read back value from panel is incorrect\n",
2485 if (!mdss_dsi_cmp_panel_reg(ctrl_pdata->status_buf,
2486 ctrl_pdata->status_value, 3)) {
2487 ctrl_pdata->status_error_count = 0;
2489 if (mdss_dsi_cmp_panel_reg(ctrl_pdata->status_buf,
2490 ctrl_pdata->status_value, 4) ||
2491 mdss_dsi_cmp_panel_reg(ctrl_pdata->status_buf,
2492 ctrl_pdata->status_value, 5))
2493 ctrl_pdata->status_error_count = 0;
2495 ctrl_pdata->status_error_count++;
2496 if (ctrl_pdata->status_error_count >=
2497 ctrl_pdata->max_status_error_count) {
2498 ctrl_pdata->status_error_count = 0;
2499 pr_err("%s: Read value bad. Error_cnt = %i\n",
2501 ctrl_pdata->status_error_count);
2509 static void mdss_dsi_parse_roi_alignment(struct device_node *np,
2510 struct dsi_panel_timing *pt)
2514 struct property *data;
2515 struct mdss_panel_timing *timing = &pt->timing;
2517 data = of_find_property(np, "qcom,panel-roi-alignment", &len);
2519 if (!data || (len != 6)) {
2520 pr_debug("%s: Panel roi alignment not found", __func__);
2522 int rc = of_property_read_u32_array(np,
2523 "qcom,panel-roi-alignment", value, len);
2525 pr_debug("%s: Error reading panel roi alignment values",
2528 timing->roi_alignment.xstart_pix_align = value[0];
2529 timing->roi_alignment.ystart_pix_align = value[1];
2530 timing->roi_alignment.width_pix_align = value[2];
2531 timing->roi_alignment.height_pix_align = value[3];
2532 timing->roi_alignment.min_width = value[4];
2533 timing->roi_alignment.min_height = value[5];
2536 pr_debug("%s: ROI alignment: [%d, %d, %d, %d, %d, %d]",
2537 __func__, timing->roi_alignment.xstart_pix_align,
2538 timing->roi_alignment.width_pix_align,
2539 timing->roi_alignment.ystart_pix_align,
2540 timing->roi_alignment.height_pix_align,
2541 timing->roi_alignment.min_width,
2542 timing->roi_alignment.min_height);
2546 static void mdss_dsi_parse_dms_config(struct device_node *np,
2547 struct mdss_dsi_ctrl_pdata *ctrl)
2549 struct mdss_panel_info *pinfo = &ctrl->panel_data.panel_info;
2553 dms_enabled = of_property_read_bool(np,
2554 "qcom,dynamic-mode-switch-enabled");
2557 pinfo->mipi.dms_mode = DYNAMIC_MODE_SWITCH_DISABLED;
2561 /* default mode is suspend_resume */
2562 pinfo->mipi.dms_mode = DYNAMIC_MODE_SWITCH_SUSPEND_RESUME;
2563 data = of_get_property(np, "qcom,dynamic-mode-switch-type", NULL);
2564 if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
2565 if (!list_empty(&ctrl->panel_data.timings_list))
2566 pinfo->mipi.dms_mode =
2567 DYNAMIC_MODE_RESOLUTION_SWITCH_IMMEDIATE;
2569 pinfo->mipi.dms_mode =
2570 DYNAMIC_MODE_SWITCH_DISABLED;
2574 if (data && !strcmp(data, "dynamic-switch-immediate"))
2575 pinfo->mipi.dms_mode = DYNAMIC_MODE_SWITCH_IMMEDIATE;
2577 pr_debug("%s: default dms suspend/resume\n", __func__);
2579 mdss_dsi_parse_dcs_cmds(np, &ctrl->video2cmd,
2580 "qcom,video-to-cmd-mode-switch-commands",
2581 "qcom,mode-switch-commands-state");
2583 mdss_dsi_parse_dcs_cmds(np, &ctrl->cmd2video,
2584 "qcom,cmd-to-video-mode-switch-commands",
2585 "qcom,mode-switch-commands-state");
2587 mdss_dsi_parse_dcs_cmds(np, &ctrl->post_dms_on_cmds,
2588 "qcom,mdss-dsi-post-mode-switch-on-command",
2589 "qcom,mdss-dsi-post-mode-switch-on-command-state");
2591 if (pinfo->mipi.dms_mode == DYNAMIC_MODE_SWITCH_IMMEDIATE &&
2592 !ctrl->post_dms_on_cmds.cmd_cnt) {
2593 pr_warn("%s: No post dms on cmd specified\n", __func__);
2594 pinfo->mipi.dms_mode = DYNAMIC_MODE_SWITCH_DISABLED;
2597 if (!ctrl->video2cmd.cmd_cnt || !ctrl->cmd2video.cmd_cnt) {
2598 pr_warn("%s: No commands specified for dynamic switch\n",
2600 pinfo->mipi.dms_mode = DYNAMIC_MODE_SWITCH_DISABLED;
2603 pr_info("%s: dynamic switch feature enabled: %d\n", __func__,
2604 pinfo->mipi.dms_mode);
2608 /* the length of all the valid values to be checked should not be great
2609 * than the length of returned data from read command.
2612 mdss_dsi_parse_esd_check_valid_params(struct mdss_dsi_ctrl_pdata *ctrl)
2616 for (i = 0; i < ctrl->status_cmds.cmd_cnt; ++i) {
2617 if (ctrl->status_valid_params[i] > ctrl->status_cmds_rlen[i]) {
2618 pr_debug("%s: ignore valid params!\n", __func__);
2626 static bool mdss_dsi_parse_esd_status_len(struct device_node *np,
2627 char *prop_key, u32 **target, u32 cmd_cnt)
2631 if (!of_find_property(np, prop_key, &tmp))
2635 if (tmp != cmd_cnt) {
2636 pr_err("%s: request property number(%d) not match command count(%d)\n",
2637 __func__, tmp, cmd_cnt);
2641 *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
2642 if (IS_ERR_OR_NULL(*target)) {
2643 pr_err("%s: Error allocating memory for property\n",
2648 if (of_property_read_u32_array(np, prop_key, *target, tmp)) {
2649 pr_err("%s: cannot get values from dts\n", __func__);
2658 static void mdss_dsi_parse_esd_params(struct device_node *np,
2659 struct mdss_dsi_ctrl_pdata *ctrl)
2662 u32 i, status_len, *lenp;
2664 struct property *data;
2666 struct mdss_panel_info *pinfo = &ctrl->panel_data.panel_info;
2668 pinfo->esd_err_irq = 0;
2669 pinfo->esd_err_irq_gpio = of_get_named_gpio_flags(np,
2670 "qcom,esd-err-irq-gpio", 0, NULL);
2672 if (gpio_is_valid(pinfo->esd_err_irq_gpio)) {
2673 pinfo->esd_err_irq = gpio_to_irq(pinfo->esd_err_irq_gpio);
2674 rc = gpio_request(pinfo->esd_err_irq_gpio, "esd_err_irq_gpio");
2676 pr_err("%s: Failed to get gpio %d (code: %d)",
2677 __func__, pinfo->esd_err_irq_gpio, rc);
2679 gpio_direction_input(pinfo->esd_err_irq_gpio);
2683 pinfo->esd_panel_onoff_tpg = of_property_read_bool(np,
2684 "qcom,esd-panel-onoff-tpg");
2686 pinfo->esd_check_enabled = of_property_read_bool(np,
2687 "qcom,esd-check-enabled");
2689 if (!pinfo->esd_check_enabled)
2692 ctrl->status_mode = ESD_MAX;
2693 rc = of_property_read_string(np,
2694 "qcom,mdss-dsi-panel-status-check-mode", &string);
2696 if (!strcmp(string, "bta_check")) {
2697 ctrl->status_mode = ESD_BTA;
2698 } else if (!strcmp(string, "reg_read")) {
2699 ctrl->status_mode = ESD_REG;
2700 ctrl->check_read_status =
2701 mdss_dsi_gen_read_status;
2702 } else if (!strcmp(string, "reg_read_nt35596")) {
2703 ctrl->status_mode = ESD_REG_NT35596;
2704 ctrl->status_error_count = 0;
2705 ctrl->check_read_status =
2706 mdss_dsi_nt35596_read_status;
2707 } else if (!strcmp(string, "reg_multi_read")) {
2708 ctrl->status_mode = ESD_REG_MULTI;
2709 } else if (!strcmp(string, "te_signal_check")) {
2710 if (pinfo->mipi.mode == DSI_CMD_MODE) {
2711 ctrl->status_mode = ESD_TE;
2713 pr_err("TE-ESD not valid for video mode\n");
2717 pr_err("No valid panel-status-check-mode string\n");
2722 if ((ctrl->status_mode == ESD_BTA) || (ctrl->status_mode == ESD_TE) ||
2723 (ctrl->status_mode == ESD_MAX))
2726 mdss_dsi_parse_dcs_cmds(np, &ctrl->status_cmds,
2727 "qcom,mdss-dsi-panel-status-command",
2728 "qcom,mdss-dsi-panel-status-command-state");
2730 if ((ctrl->status_mode == ESD_REG_MULTI))
2733 rc = of_property_read_u32(np, "qcom,mdss-dsi-panel-max-error-count",
2735 ctrl->max_status_error_count = (!rc ? tmp : 0);
2737 if (!mdss_dsi_parse_esd_status_len(np,
2738 "qcom,mdss-dsi-panel-status-read-length",
2739 &ctrl->status_cmds_rlen, ctrl->status_cmds.cmd_cnt)) {
2740 pinfo->esd_check_enabled = false;
2744 if (mdss_dsi_parse_esd_status_len(np,
2745 "qcom,mdss-dsi-panel-status-valid-params",
2746 &ctrl->status_valid_params, ctrl->status_cmds.cmd_cnt)) {
2747 if (!mdss_dsi_parse_esd_check_valid_params(ctrl))
2752 lenp = ctrl->status_valid_params ?: ctrl->status_cmds_rlen;
2753 for (i = 0; i < ctrl->status_cmds.cmd_cnt; ++i)
2754 status_len += lenp[i];
2756 data = of_find_property(np, "qcom,mdss-dsi-panel-status-value", &tmp);
2758 if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
2759 ctrl->groups = tmp / status_len;
2761 pr_err("%s: Error parse panel-status-value\n", __func__);
2765 ctrl->status_value = kzalloc(sizeof(u32) * status_len * ctrl->groups,
2767 if (!ctrl->status_value)
2770 ctrl->return_buf = kcalloc(status_len * ctrl->groups,
2771 sizeof(unsigned char), GFP_KERNEL);
2772 if (!ctrl->return_buf)
2775 rc = of_property_read_u32_array(np,
2776 "qcom,mdss-dsi-panel-status-value",
2777 ctrl->status_value, ctrl->groups * status_len);
2779 pr_debug("%s: Error reading panel status values\n",
2781 memset(ctrl->status_value, 0, ctrl->groups * status_len);
2787 kfree(ctrl->status_value);
2789 kfree(ctrl->status_valid_params);
2790 kfree(ctrl->status_cmds_rlen);
2792 pinfo->esd_check_enabled = false;
2795 static void mdss_dsi_parse_partial_update_caps(struct device_node *np,
2796 struct mdss_dsi_ctrl_pdata *ctrl)
2798 struct mdss_panel_info *pinfo;
2801 pinfo = &ctrl->panel_data.panel_info;
2803 data = of_get_property(np, "qcom,partial-update-enabled", NULL);
2804 if (data && !strcmp(data, "single_roi"))
2805 pinfo->partial_update_supported =
2807 else if (data && !strcmp(data, "dual_roi"))
2808 pinfo->partial_update_supported =
2810 else if (data && !strcmp(data, "none"))
2811 pinfo->partial_update_supported =
2814 pinfo->partial_update_supported =
2817 if (pinfo->mipi.mode == DSI_CMD_MODE) {
2818 pinfo->partial_update_enabled = pinfo->partial_update_supported;
2819 pr_info("%s: partial_update_enabled=%d\n", __func__,
2820 pinfo->partial_update_enabled);
2821 ctrl->set_col_page_addr = mdss_dsi_set_col_page_addr;
2822 if (pinfo->partial_update_enabled) {
2823 pinfo->partial_update_roi_merge =
2824 of_property_read_bool(np,
2825 "qcom,partial-update-roi-merge");
2830 static int mdss_dsi_parse_panel_features(struct device_node *np,
2831 struct mdss_dsi_ctrl_pdata *ctrl)
2833 struct mdss_panel_info *pinfo;
2836 pr_err("%s: Invalid arguments\n", __func__);
2840 pinfo = &ctrl->panel_data.panel_info;
2842 mdss_dsi_parse_partial_update_caps(np, ctrl);
2844 pinfo->dcs_cmd_by_left = of_property_read_bool(np,
2845 "qcom,dcs-cmd-by-left");
2847 pinfo->ulps_feature_enabled = of_property_read_bool(np,
2848 "qcom,ulps-enabled");
2849 pr_info("%s: ulps feature %s\n", __func__,
2850 (pinfo->ulps_feature_enabled ? "enabled" : "disabled"));
2852 pinfo->ulps_suspend_enabled = of_property_read_bool(np,
2853 "qcom,suspend-ulps-enabled");
2854 pr_info("%s: ulps during suspend feature %s", __func__,
2855 (pinfo->ulps_suspend_enabled ? "enabled" : "disabled"));
2857 mdss_dsi_parse_dms_config(np, ctrl);
2859 pinfo->panel_ack_disabled = pinfo->sim_panel_mode ?
2860 1 : of_property_read_bool(np, "qcom,panel-ack-disabled");
2862 pinfo->allow_phy_power_off = of_property_read_bool(np,
2863 "qcom,panel-allow-phy-poweroff");
2865 mdss_dsi_parse_esd_params(np, ctrl);
2867 if (pinfo->panel_ack_disabled && pinfo->esd_check_enabled) {
2868 pr_warn("ESD should not be enabled if panel ACK is disabled\n");
2869 pinfo->esd_check_enabled = false;
2872 if (ctrl->disp_en_gpio <= 0) {
2873 ctrl->disp_en_gpio = of_get_named_gpio(
2875 "qcom,5v-boost-gpio", 0);
2877 if (!gpio_is_valid(ctrl->disp_en_gpio))
2878 pr_debug("%s:%d, Disp_en gpio not specified\n",
2879 __func__, __LINE__);
2882 mdss_dsi_parse_dcs_cmds(np, &ctrl->lp_on_cmds,
2883 "qcom,mdss-dsi-lp-mode-on", NULL);
2885 mdss_dsi_parse_dcs_cmds(np, &ctrl->lp_off_cmds,
2886 "qcom,mdss-dsi-lp-mode-off", NULL);
2891 static void mdss_dsi_parse_panel_horizintal_line_idle(struct device_node *np,
2892 struct mdss_dsi_ctrl_pdata *ctrl)
2896 struct panel_horizontal_idle *kp;
2899 pr_err("%s: Invalid arguments\n", __func__);
2903 src = of_get_property(np, "qcom,mdss-dsi-hor-line-idle", &len);
2904 if (!src || len == 0)
2907 cnt = len % 3; /* 3 fields per entry */
2909 pr_err("%s: invalid horizontal idle len=%d\n", __func__, len);
2913 cnt = len / sizeof(u32);
2915 kp = kzalloc(sizeof(*kp) * (cnt / 3), GFP_KERNEL);
2917 pr_err("%s: No memory\n", __func__);
2921 ctrl->line_idle = kp;
2922 for (i = 0; i < cnt; i += 3) {
2923 kp->min = be32_to_cpu(src[i]);
2924 kp->max = be32_to_cpu(src[i+1]);
2925 kp->idle = be32_to_cpu(src[i+2]);
2927 ctrl->horizontal_idle_cnt++;
2931 * idle is enabled for this controller, this will be used to
2932 * enable/disable burst mode since both features are mutually
2935 ctrl->idle_enabled = true;
2937 pr_debug("%s: horizontal_idle_cnt=%d\n", __func__,
2938 ctrl->horizontal_idle_cnt);
2941 static int mdss_dsi_set_refresh_rate_range(struct device_node *pan_node,
2942 struct mdss_panel_info *pinfo)
2945 rc = of_property_read_u32(pan_node,
2946 "qcom,mdss-dsi-min-refresh-rate",
2949 pr_warn("%s:%d, Unable to read min refresh rate\n",
2950 __func__, __LINE__);
2953 * If min refresh rate is not specified, set it to the
2954 * default panel refresh rate.
2956 pinfo->min_fps = pinfo->mipi.frame_rate;
2960 rc = of_property_read_u32(pan_node,
2961 "qcom,mdss-dsi-max-refresh-rate",
2964 pr_warn("%s:%d, Unable to read max refresh rate\n",
2965 __func__, __LINE__);
2968 * Since max refresh rate was not specified when dynamic
2969 * fps is enabled, using the default panel refresh rate
2970 * as max refresh rate supported.
2972 pinfo->max_fps = pinfo->mipi.frame_rate;
2976 pr_info("dyn_fps: min = %d, max = %d\n",
2977 pinfo->min_fps, pinfo->max_fps);
2981 static void mdss_dsi_parse_dfps_config(struct device_node *pan_node,
2982 struct mdss_dsi_ctrl_pdata *ctrl_pdata)
2985 bool dynamic_fps, dynamic_bitclk;
2986 struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info);
2989 dynamic_fps = of_property_read_bool(pan_node,
2990 "qcom,mdss-dsi-pan-enable-dynamic-fps");
2993 goto dynamic_bitclk;
2995 pinfo->dynamic_fps = true;
2996 data = of_get_property(pan_node, "qcom,mdss-dsi-pan-fps-update", NULL);
2998 if (!strcmp(data, "dfps_suspend_resume_mode")) {
2999 pinfo->dfps_update = DFPS_SUSPEND_RESUME_MODE;
3000 pr_debug("dfps mode: suspend/resume\n");
3001 } else if (!strcmp(data, "dfps_immediate_clk_mode")) {
3002 pinfo->dfps_update = DFPS_IMMEDIATE_CLK_UPDATE_MODE;
3003 pr_debug("dfps mode: Immediate clk\n");
3004 } else if (!strcmp(data, "dfps_immediate_porch_mode_hfp")) {
3005 pinfo->dfps_update =
3006 DFPS_IMMEDIATE_PORCH_UPDATE_MODE_HFP;
3007 pr_debug("dfps mode: Immediate porch HFP\n");
3008 } else if (!strcmp(data, "dfps_immediate_porch_mode_vfp")) {
3009 pinfo->dfps_update =
3010 DFPS_IMMEDIATE_PORCH_UPDATE_MODE_VFP;
3011 pr_debug("dfps mode: Immediate porch VFP\n");
3013 pinfo->dfps_update = DFPS_SUSPEND_RESUME_MODE;
3014 pr_debug("default dfps mode: suspend/resume\n");
3017 pinfo->dynamic_fps = false;
3018 pr_debug("dfps update mode not configured: disable\n");
3020 pinfo->new_fps = pinfo->mipi.frame_rate;
3021 pinfo->current_fps = pinfo->mipi.frame_rate;
3024 dynamic_bitclk = of_property_read_bool(pan_node,
3025 "qcom,mdss-dsi-pan-enable-dynamic-bitclk");
3026 if (!dynamic_bitclk)
3029 of_find_property(pan_node, "qcom,mdss-dsi-dynamic-bitclk_freq",
3030 &pinfo->supp_bitclk_len);
3031 pinfo->supp_bitclk_len = pinfo->supp_bitclk_len/sizeof(u32);
3032 if (pinfo->supp_bitclk_len < 1)
3035 pinfo->supp_bitclks = kzalloc((sizeof(u32) * pinfo->supp_bitclk_len),
3037 if (!pinfo->supp_bitclks)
3040 rc = of_property_read_u32_array(pan_node,
3041 "qcom,mdss-dsi-dynamic-bitclk_freq", pinfo->supp_bitclks,
3042 pinfo->supp_bitclk_len);
3044 pr_err("Error from dynamic bitclk freq u64 array read\n");
3047 pinfo->dynamic_bitclk = true;
3051 int mdss_panel_parse_bl_settings(struct device_node *np,
3052 struct mdss_dsi_ctrl_pdata *ctrl_pdata)
3058 ctrl_pdata->bklt_ctrl = UNKNOWN_CTRL;
3059 data = of_get_property(np, "qcom,mdss-dsi-bl-pmic-control-type", NULL);
3061 if (!strcmp(data, "bl_ctrl_wled")) {
3062 led_trigger_register_simple("bkl-trigger",
3064 pr_debug("%s: SUCCESS-> WLED TRIGGER register\n",
3066 ctrl_pdata->bklt_ctrl = BL_WLED;
3067 } else if (!strcmp(data, "bl_ctrl_pwm")) {
3068 ctrl_pdata->bklt_ctrl = BL_PWM;
3069 ctrl_pdata->pwm_pmi = of_property_read_bool(np,
3070 "qcom,mdss-dsi-bl-pwm-pmi");
3071 rc = of_property_read_u32(np,
3072 "qcom,mdss-dsi-bl-pmic-pwm-frequency", &tmp);
3074 pr_err("%s:%d, Error, panel pwm_period\n",
3075 __func__, __LINE__);
3078 ctrl_pdata->pwm_period = tmp;
3079 if (ctrl_pdata->pwm_pmi) {
3080 ctrl_pdata->pwm_bl = of_pwm_get(np, NULL);
3081 if (IS_ERR(ctrl_pdata->pwm_bl)) {
3082 pr_err("%s: Error, pwm device\n",
3084 ctrl_pdata->pwm_bl = NULL;
3088 rc = of_property_read_u32(np,
3089 "qcom,mdss-dsi-bl-pmic-bank-select",
3092 pr_err("%s:%d, Error, lpg channel\n",
3093 __func__, __LINE__);
3096 ctrl_pdata->pwm_lpg_chan = tmp;
3097 tmp = of_get_named_gpio(np,
3098 "qcom,mdss-dsi-pwm-gpio", 0);
3099 ctrl_pdata->pwm_pmic_gpio = tmp;
3100 pr_debug("%s: Configured PWM bklt ctrl\n",
3103 } else if (!strcmp(data, "bl_ctrl_dcs")) {
3104 ctrl_pdata->bklt_ctrl = BL_DCS_CMD;
3105 data = of_get_property(np,
3106 "qcom,mdss-dsi-bl-dcs-command-state", NULL);
3107 if (data && !strcmp(data, "dsi_hs_mode"))
3108 ctrl_pdata->bklt_dcs_op_mode = DSI_HS_MODE;
3110 ctrl_pdata->bklt_dcs_op_mode = DSI_LP_MODE;
3112 pr_debug("%s: Configured DCS_CMD bklt ctrl\n",
3119 int mdss_dsi_panel_timing_switch(struct mdss_dsi_ctrl_pdata *ctrl,
3120 struct mdss_panel_timing *timing)
3122 struct dsi_panel_timing *pt;
3123 struct mdss_panel_info *pinfo = &ctrl->panel_data.panel_info;
3129 if (timing == ctrl->panel_data.current_timing) {
3130 pr_warn("%s: panel timing \"%s\" already set\n", __func__,
3132 return 0; /* nothing to do */
3135 pr_debug("%s: ndx=%d switching to panel timing \"%s\"\n", __func__,
3136 ctrl->ndx, timing->name);
3138 mdss_panel_info_from_timing(timing, pinfo);
3140 pt = container_of(timing, struct dsi_panel_timing, timing);
3141 pinfo->mipi.t_clk_pre = pt->t_clk_pre;
3142 pinfo->mipi.t_clk_post = pt->t_clk_post;
3144 for (i = 0; i < ARRAY_SIZE(pt->phy_timing); i++)
3145 pinfo->mipi.dsi_phy_db.timing[i] = pt->phy_timing[i];
3147 for (i = 0; i < ARRAY_SIZE(pt->phy_timing_8996); i++)
3148 pinfo->mipi.dsi_phy_db.timing_8996[i] = pt->phy_timing_8996[i];
3150 ctrl->on_cmds = pt->on_cmds;
3151 ctrl->post_panel_on_cmds = pt->post_panel_on_cmds;
3153 ctrl->panel_data.current_timing = timing;
3154 if (!timing->clk_rate)
3155 ctrl->refresh_clk_rate = true;
3156 mdss_dsi_clk_refresh(&ctrl->panel_data, ctrl->update_phy_timing);
3161 void mdss_dsi_unregister_bl_settings(struct mdss_dsi_ctrl_pdata *ctrl_pdata)
3163 if (ctrl_pdata->bklt_ctrl == BL_WLED)
3164 led_trigger_unregister_simple(bl_led_trigger);
3167 static int mdss_dsi_panel_timing_from_dt(struct device_node *np,
3168 struct dsi_panel_timing *pt,
3169 struct mdss_panel_data *panel_data)
3175 struct mdss_dsi_ctrl_pdata *ctrl_pdata;
3176 struct mdss_panel_info *pinfo;
3177 bool phy_timings_present = false;
3179 pinfo = &panel_data->panel_info;
3181 ctrl_pdata = container_of(panel_data, struct mdss_dsi_ctrl_pdata,
3184 rc = of_property_read_u32(np, "qcom,mdss-dsi-panel-width", &tmp);
3186 pr_err("%s:%d, panel width not specified\n",
3187 __func__, __LINE__);
3190 pt->timing.xres = tmp;
3192 rc = of_property_read_u32(np, "qcom,mdss-dsi-panel-height", &tmp);
3194 pr_err("%s:%d, panel height not specified\n",
3195 __func__, __LINE__);
3198 pt->timing.yres = tmp;
3200 rc = of_property_read_u32(np, "qcom,mdss-dsi-h-front-porch", &tmp);
3201 pt->timing.h_front_porch = (!rc ? tmp : 6);
3202 rc = of_property_read_u32(np, "qcom,mdss-dsi-h-back-porch", &tmp);
3203 pt->timing.h_back_porch = (!rc ? tmp : 6);
3204 rc = of_property_read_u32(np, "qcom,mdss-dsi-h-pulse-width", &tmp);
3205 pt->timing.h_pulse_width = (!rc ? tmp : 2);
3206 rc = of_property_read_u32(np, "qcom,mdss-dsi-h-sync-skew", &tmp);
3207 pt->timing.hsync_skew = (!rc ? tmp : 0);
3208 rc = of_property_read_u32(np, "qcom,mdss-dsi-v-back-porch", &tmp);
3209 pt->timing.v_back_porch = (!rc ? tmp : 6);
3210 rc = of_property_read_u32(np, "qcom,mdss-dsi-v-front-porch", &tmp);
3211 pt->timing.v_front_porch = (!rc ? tmp : 6);
3212 rc = of_property_read_u32(np, "qcom,mdss-dsi-v-pulse-width", &tmp);
3213 pt->timing.v_pulse_width = (!rc ? tmp : 2);
3215 rc = of_property_read_u32(np, "qcom,mdss-dsi-h-left-border", &tmp);
3216 pt->timing.border_left = !rc ? tmp : 0;
3217 rc = of_property_read_u32(np, "qcom,mdss-dsi-h-right-border", &tmp);
3218 pt->timing.border_right = !rc ? tmp : 0;
3220 /* overriding left/right borders for split display cases */
3221 if (mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data)) {
3222 if (panel_data->next)
3223 pt->timing.border_right = 0;
3225 pt->timing.border_left = 0;
3228 rc = of_property_read_u32(np, "qcom,mdss-dsi-v-top-border", &tmp);
3229 pt->timing.border_top = !rc ? tmp : 0;
3230 rc = of_property_read_u32(np, "qcom,mdss-dsi-v-bottom-border", &tmp);
3231 pt->timing.border_bottom = !rc ? tmp : 0;
3233 rc = of_property_read_u32(np, "qcom,mdss-dsi-panel-framerate", &tmp);
3234 pt->timing.frame_rate = !rc ? tmp : DEFAULT_FRAME_RATE;
3235 rc = of_property_read_u64(np, "qcom,mdss-dsi-panel-clockrate", &tmp64);
3236 if (rc == -EOVERFLOW) {
3238 rc = of_property_read_u32(np,
3239 "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
3241 pt->timing.clk_rate = !rc ? tmp64 : 0;
3243 data = of_get_property(np, "qcom,mdss-dsi-panel-timings", &len);
3244 if ((!data) || (len != 12)) {
3245 pr_debug("%s:%d, Unable to read Phy timing settings",
3246 __func__, __LINE__);
3248 for (i = 0; i < len; i++)
3249 pt->phy_timing[i] = data[i];
3250 phy_timings_present = true;
3253 data = of_get_property(np, "qcom,mdss-dsi-panel-timings-phy-v2", &len);
3254 if ((!data) || (len != 40)) {
3255 pr_debug("%s:%d, Unable to read phy-v2 lane timing settings",
3256 __func__, __LINE__);
3258 for (i = 0; i < len; i++)
3259 pt->phy_timing_8996[i] = data[i];
3260 phy_timings_present = true;
3262 if (!phy_timings_present) {
3263 pr_err("%s: phy timing settings not present\n", __func__);
3267 rc = of_property_read_u32(np, "qcom,mdss-dsi-t-clk-pre", &tmp);
3268 pt->t_clk_pre = (!rc ? tmp : 0x24);
3269 rc = of_property_read_u32(np, "qcom,mdss-dsi-t-clk-post", &tmp);
3270 pt->t_clk_post = (!rc ? tmp : 0x03);
3273 pt->timing.name = kstrdup(np->name, GFP_KERNEL);
3274 pr_info("%s: found new timing \"%s\" (%pK)\n", __func__,
3275 np->name, &pt->timing);
3281 static int mdss_dsi_panel_config_res_properties(struct device_node *np,
3282 struct dsi_panel_timing *pt,
3283 struct mdss_panel_data *panel_data,
3284 bool default_timing)
3288 mdss_dsi_parse_roi_alignment(np, pt);
3290 mdss_dsi_parse_dcs_cmds(np, &pt->on_cmds,
3291 "qcom,mdss-dsi-on-command",
3292 "qcom,mdss-dsi-on-command-state");
3294 mdss_dsi_parse_dcs_cmds(np, &pt->post_panel_on_cmds,
3295 "qcom,mdss-dsi-post-panel-on-command", NULL);
3297 mdss_dsi_parse_dcs_cmds(np, &pt->switch_cmds,
3298 "qcom,mdss-dsi-timing-switch-command",
3299 "qcom,mdss-dsi-timing-switch-command-state");
3301 rc = mdss_dsi_parse_topology_config(np, pt, panel_data, default_timing);
3303 pr_err("%s: parsing compression params failed. rc:%d\n",
3308 mdss_panel_parse_te_params(np, &pt->timing);
3312 static int mdss_panel_parse_display_timings(struct device_node *np,
3313 struct mdss_panel_data *panel_data)
3315 struct mdss_dsi_ctrl_pdata *ctrl;
3316 struct dsi_panel_timing *modedb;
3317 struct device_node *timings_np;
3318 struct device_node *entry;
3319 int num_timings, rc;
3320 int i = 0, active_ndx = 0;
3321 bool default_timing = false;
3323 ctrl = container_of(panel_data, struct mdss_dsi_ctrl_pdata, panel_data);
3325 INIT_LIST_HEAD(&panel_data->timings_list);
3327 timings_np = of_get_child_by_name(np, "qcom,mdss-dsi-display-timings");
3329 struct dsi_panel_timing pt;
3330 memset(&pt, 0, sizeof(struct dsi_panel_timing));
3333 * display timings node is not available, fallback to reading
3334 * timings directly from root node instead
3336 pr_debug("reading display-timings from panel node\n");
3337 rc = mdss_dsi_panel_timing_from_dt(np, &pt, panel_data);
3339 mdss_dsi_panel_config_res_properties(np, &pt,
3341 rc = mdss_dsi_panel_timing_switch(ctrl, &pt.timing);
3346 num_timings = of_get_child_count(timings_np);
3347 if (num_timings == 0) {
3348 pr_err("no timings found within display-timings\n");
3353 modedb = kcalloc(num_timings, sizeof(*modedb), GFP_KERNEL);
3359 for_each_child_of_node(timings_np, entry) {
3360 rc = mdss_dsi_panel_timing_from_dt(entry, (modedb + i),
3367 default_timing = of_property_read_bool(entry,
3368 "qcom,mdss-dsi-timing-default");
3372 mdss_dsi_panel_config_res_properties(entry, (modedb + i),
3373 panel_data, default_timing);
3375 list_add(&modedb[i].timing.list,
3376 &panel_data->timings_list);
3380 /* Configure default timing settings */
3381 rc = mdss_dsi_panel_timing_switch(ctrl, &modedb[active_ndx].timing);
3383 pr_err("unable to configure default timing settings\n");
3386 of_node_put(timings_np);
3391 static int mdss_panel_parse_dt(struct device_node *np,
3392 struct mdss_dsi_ctrl_pdata *ctrl_pdata)
3395 int xy_coordinate[XY_COORDINATE_NUM], rc, len = 0;
3397 static const char *pdest;
3398 const char *bridge_chip_name;
3399 struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info);
3401 if (mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data))
3402 pinfo->is_split_display = true;
3404 rc = of_property_read_u32(np,
3405 "qcom,mdss-pan-physical-width-dimension", &tmp);
3406 pinfo->physical_width = (!rc ? tmp : 0);
3407 rc = of_property_read_u32(np,
3408 "qcom,mdss-pan-physical-height-dimension", &tmp);
3409 pinfo->physical_height = (!rc ? tmp : 0);
3411 rc = of_property_read_u32(np, "qcom,mdss-dsi-bpp", &tmp);
3413 pr_err("%s:%d, bpp not specified\n", __func__, __LINE__);
3416 pinfo->bpp = (!rc ? tmp : 24);
3417 pinfo->mipi.mode = DSI_VIDEO_MODE;
3418 data = of_get_property(np, "qcom,mdss-dsi-panel-type", NULL);
3419 if (data && !strncmp(data, "dsi_cmd_mode", 12))
3420 pinfo->mipi.mode = DSI_CMD_MODE;
3421 pinfo->mipi.boot_mode = pinfo->mipi.mode;
3423 data = of_get_property(np, "qcom,mdss-dsi-pixel-packing", NULL);
3424 if (data && !strcmp(data, "loose"))
3425 pinfo->mipi.pixel_packing = 1;
3427 pinfo->mipi.pixel_packing = 0;
3428 rc = mdss_panel_get_dst_fmt(pinfo->bpp,
3429 pinfo->mipi.mode, pinfo->mipi.pixel_packing,
3430 &(pinfo->mipi.dst_format));
3432 pr_debug("%s: problem determining dst format. Set Default\n",
3434 pinfo->mipi.dst_format =
3435 DSI_VIDEO_DST_FORMAT_RGB888;
3437 pdest = of_get_property(np,
3438 "qcom,mdss-dsi-panel-destination", NULL);
3440 rc = of_property_read_u32(np,
3441 "qcom,mdss-dsi-underflow-color", &tmp);
3442 pinfo->lcdc.underflow_clr = (!rc ? tmp : 0xff);
3443 rc = of_property_read_u32(np,
3444 "qcom,mdss-dsi-border-color", &tmp);
3445 pinfo->lcdc.border_clr = (!rc ? tmp : 0);
3446 data = of_get_property(np, "qcom,mdss-dsi-panel-orientation", NULL);
3448 pr_debug("panel orientation is %s\n", data);
3449 if (!strcmp(data, "180"))
3450 pinfo->panel_orientation = MDP_ROT_180;
3451 else if (!strcmp(data, "hflip"))
3452 pinfo->panel_orientation = MDP_FLIP_LR;
3453 else if (!strcmp(data, "vflip"))
3454 pinfo->panel_orientation = MDP_FLIP_UD;
3457 rc = of_property_read_u32(np, "qcom,mdss-brightness-max-level", &tmp);
3458 pinfo->brightness_max = (!rc ? tmp : MDSS_MAX_BL_BRIGHTNESS);
3459 rc = of_property_read_u32(np, "qcom,mdss-dsi-bl-min-level", &tmp);
3460 pinfo->bl_min = (!rc ? tmp : 0);
3461 rc = of_property_read_u32(np, "qcom,mdss-dsi-bl-max-level", &tmp);
3462 pinfo->bl_max = (!rc ? tmp : 255);
3463 ctrl_pdata->bklt_max = pinfo->bl_max;
3465 rc = of_property_read_u32(np, "qcom,mdss-dsi-interleave-mode", &tmp);
3466 pinfo->mipi.interleave_mode = (!rc ? tmp : 0);
3468 pinfo->mipi.vsync_enable = of_property_read_bool(np,
3469 "qcom,mdss-dsi-te-check-enable");
3471 if (pinfo->sim_panel_mode == SIM_SW_TE_MODE)
3472 pinfo->mipi.hw_vsync_mode = false;
3474 pinfo->mipi.hw_vsync_mode = of_property_read_bool(np,
3475 "qcom,mdss-dsi-te-using-te-pin");
3477 rc = of_property_read_u32(np,
3478 "qcom,mdss-dsi-h-sync-pulse", &tmp);
3479 pinfo->mipi.pulse_mode_hsa_he = (!rc ? tmp : false);
3481 pinfo->mipi.hfp_power_stop = of_property_read_bool(np,
3482 "qcom,mdss-dsi-hfp-power-mode");
3483 pinfo->mipi.hsa_power_stop = of_property_read_bool(np,
3484 "qcom,mdss-dsi-hsa-power-mode");
3485 pinfo->mipi.hbp_power_stop = of_property_read_bool(np,
3486 "qcom,mdss-dsi-hbp-power-mode");
3487 pinfo->mipi.last_line_interleave_en = of_property_read_bool(np,
3488 "qcom,mdss-dsi-last-line-interleave");
3489 pinfo->mipi.bllp_power_stop = of_property_read_bool(np,
3490 "qcom,mdss-dsi-bllp-power-mode");
3491 pinfo->mipi.eof_bllp_power_stop = of_property_read_bool(
3492 np, "qcom,mdss-dsi-bllp-eof-power-mode");
3493 pinfo->mipi.traffic_mode = DSI_NON_BURST_SYNCH_PULSE;
3494 data = of_get_property(np, "qcom,mdss-dsi-traffic-mode", NULL);
3496 if (!strcmp(data, "non_burst_sync_event"))
3497 pinfo->mipi.traffic_mode = DSI_NON_BURST_SYNCH_EVENT;
3498 else if (!strcmp(data, "burst_mode"))
3499 pinfo->mipi.traffic_mode = DSI_BURST_MODE;
3501 rc = of_property_read_u32(np,
3502 "qcom,mdss-dsi-te-dcs-command", &tmp);
3503 pinfo->mipi.insert_dcs_cmd =
3505 rc = of_property_read_u32(np,
3506 "qcom,mdss-dsi-wr-mem-continue", &tmp);
3507 pinfo->mipi.wr_mem_continue =
3509 rc = of_property_read_u32(np,
3510 "qcom,mdss-dsi-wr-mem-start", &tmp);
3511 pinfo->mipi.wr_mem_start =
3513 rc = of_property_read_u32(np,
3514 "qcom,mdss-dsi-te-pin-select", &tmp);
3515 pinfo->mipi.te_sel =
3517 rc = of_property_read_u32(np, "qcom,mdss-dsi-virtual-channel-id", &tmp);
3518 pinfo->mipi.vc = (!rc ? tmp : 0);
3519 pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RGB;
3520 data = of_get_property(np, "qcom,mdss-dsi-color-order", NULL);
3522 if (!strcmp(data, "rgb_swap_rbg"))
3523 pinfo->mipi.rgb_swap = DSI_RGB_SWAP_RBG;
3524 else if (!strcmp(data, "rgb_swap_bgr"))
3525 pinfo->mipi.rgb_swap = DSI_RGB_SWAP_BGR;
3526 else if (!strcmp(data, "rgb_swap_brg"))
3527 pinfo->mipi.rgb_swap = DSI_RGB_SWAP_BRG;
3528 else if (!strcmp(data, "rgb_swap_grb"))
3529 pinfo->mipi.rgb_swap = DSI_RGB_SWAP_GRB;
3530 else if (!strcmp(data, "rgb_swap_gbr"))
3531 pinfo->mipi.rgb_swap = DSI_RGB_SWAP_GBR;
3533 pinfo->mipi.data_lane0 = of_property_read_bool(np,
3534 "qcom,mdss-dsi-lane-0-state");
3535 pinfo->mipi.data_lane1 = of_property_read_bool(np,
3536 "qcom,mdss-dsi-lane-1-state");
3537 pinfo->mipi.data_lane2 = of_property_read_bool(np,
3538 "qcom,mdss-dsi-lane-2-state");
3539 pinfo->mipi.data_lane3 = of_property_read_bool(np,
3540 "qcom,mdss-dsi-lane-3-state");
3542 /* parse split link properties */
3543 rc = mdss_dsi_parse_split_link_settings(np, pinfo);
3547 rc = mdss_panel_parse_display_timings(np, &ctrl_pdata->panel_data);
3551 rc = mdss_dsi_parse_hdr_settings(np, pinfo);
3555 pinfo->mipi.rx_eot_ignore = of_property_read_bool(np,
3556 "qcom,mdss-dsi-rx-eot-ignore");
3557 pinfo->mipi.tx_eot_append = of_property_read_bool(np,
3558 "qcom,mdss-dsi-tx-eot-append");
3560 rc = of_property_read_u32(np, "qcom,mdss-dsi-stream", &tmp);
3561 pinfo->mipi.stream = (!rc ? tmp : 0);
3563 data = of_get_property(np, "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
3565 if (!strcmp(data, "single_port"))
3566 pinfo->mode_sel_state = MODE_SEL_SINGLE_PORT;
3567 else if (!strcmp(data, "dual_port"))
3568 pinfo->mode_sel_state = MODE_SEL_DUAL_PORT;
3569 else if (!strcmp(data, "high"))
3570 pinfo->mode_sel_state = MODE_GPIO_HIGH;
3571 else if (!strcmp(data, "low"))
3572 pinfo->mode_sel_state = MODE_GPIO_LOW;
3574 /* Set default mode as SPLIT mode */
3575 pinfo->mode_sel_state = MODE_SEL_DUAL_PORT;
3578 rc = of_property_read_u32(np, "qcom,mdss-mdp-transfer-time-us", &tmp);
3579 pinfo->mdp_transfer_time_us = (!rc ? tmp : DEFAULT_MDP_TRANSFER_TIME);
3581 mdss_dsi_parse_mdp_kickoff_threshold(np, pinfo);
3583 pinfo->mipi.lp11_init = of_property_read_bool(np,
3584 "qcom,mdss-dsi-lp11-init");
3585 rc = of_property_read_u32(np, "qcom,mdss-dsi-init-delay-us", &tmp);
3586 pinfo->mipi.init_delay = (!rc ? tmp : 0);
3588 rc = of_property_read_u32(np, "qcom,mdss-dsi-post-init-delay", &tmp);
3589 pinfo->mipi.post_init_delay = (!rc ? tmp : 0);
3591 mdss_dsi_parse_trigger(np, &(pinfo->mipi.mdp_trigger),
3592 "qcom,mdss-dsi-mdp-trigger");
3594 mdss_dsi_parse_trigger(np, &(pinfo->mipi.dma_trigger),
3595 "qcom,mdss-dsi-dma-trigger");
3597 mdss_dsi_parse_reset_seq(np, pinfo->rst_seq, &(pinfo->rst_seq_len),
3598 "qcom,mdss-dsi-reset-sequence");
3600 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->off_cmds,
3601 "qcom,mdss-dsi-off-command", "qcom,mdss-dsi-off-command-state");
3603 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->mcap_on_cmds,
3604 "qcom,mdss-dsi-panel-mcap-on-cmds", "qcom,mdss-dsi-panel-mcap-on-cmds-state");
3605 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->mcap_off_cmds,
3606 "qcom,mdss-dsi-panel-mcap-off-cmds", "qcom,mdss-dsi-panel-mcap-off-cmds-state");
3608 rc = of_property_read_u32(np, "qcom,adjust-timer-wakeup-ms", &tmp);
3609 pinfo->adjust_timer_delay_ms = (!rc ? tmp : 0);
3611 pinfo->mipi.force_clk_lane_hs = of_property_read_bool(np,
3612 "qcom,mdss-dsi-force-clock-lane-hs");
3614 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_cmds,
3615 "qcom,mdss-dsi-dispparam-command", "qcom,mdss-dsi-dispparam-command-state");
3617 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_ceon_cmds,
3618 "qcom,mdss-dsi-dispparam-ceon-command", "qcom,mdss-dsi-dispparam-ceon-command-state");
3619 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_ceoff_cmds,
3620 "qcom,mdss-dsi-dispparam-ceoff-command", "qcom,mdss-dsi-dispparam-ceoff-command-state");
3622 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_cabcon_cmds,
3623 "qcom,mdss-dsi-dispparam-cabcon-command", "qcom,mdss-dsi-dispparam-cabcon-command-state");
3624 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_cabcguion_cmds,
3625 "qcom,mdss-dsi-dispparam-cabcguion-command", "qcom,mdss-dsi-dispparam-cabcguion-command-state");
3626 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_cabcstillon_cmds,
3627 "qcom,mdss-dsi-dispparam-cabcstillon-command", "qcom,mdss-dsi-dispparam-cabcstillon-command-state");
3628 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_cabcmovieon_cmds,
3629 "qcom,mdss-dsi-dispparam-cabcmovieon-command", "qcom,mdss-dsi-dispparam-cabcmovieon-command-state");
3630 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_dimmingon_cmds,
3631 "qcom,mdss-dsi-dispparam-dimmingon-command", "qcom,mdss-dsi-dispparam-dimmingon-command-state");
3632 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_cabcoff_cmds,
3633 "qcom,mdss-dsi-dispparam-cabcoff-command", "qcom,mdss-dsi-dispparam-cabcoff-command-state");
3635 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_gammareload_cmds,
3636 "qcom,mdss-dsi-dispparam-gammareload-command", "qcom,mdss-dsi-dispparam-gammareload-command-state");
3637 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_warm_cmds,
3638 "qcom,mdss-dsi-dispparam-warm-command", "qcom,mdss-dsi-dispparam-warm-command-state");
3639 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_default_cmds,
3640 "qcom,mdss-dsi-dispparam-default-command", "qcom,mdss-dsi-dispparam-default-command-state");
3641 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_cold_cmds,
3642 "qcom,mdss-dsi-dispparam-cold-command", "qcom,mdss-dsi-dispparam-cold-command-state");
3643 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_papermode_cmds,
3644 "qcom,mdss-dsi-dispparam-papermode-command", "qcom,mdss-dsi-dispparam-papermode-command-state");
3645 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_papermode1_cmds,
3646 "qcom,mdss-dsi-dispparam-papermode1-command", "qcom,mdss-dsi-dispparam-papermode1-command-state");
3647 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_papermode2_cmds,
3648 "qcom,mdss-dsi-dispparam-papermode2-command", "qcom,mdss-dsi-dispparam-papermode2-command-state");
3649 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_papermode3_cmds,
3650 "qcom,mdss-dsi-dispparam-papermode3-command", "qcom,mdss-dsi-dispparam-papermode3-command-state");
3651 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_papermode4_cmds,
3652 "qcom,mdss-dsi-dispparam-papermode4-command", "qcom,mdss-dsi-dispparam-papermode4-command-state");
3653 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_papermode5_cmds,
3654 "qcom,mdss-dsi-dispparam-papermode5-command", "qcom,mdss-dsi-dispparam-papermode5-command-state");
3655 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_papermode6_cmds,
3656 "qcom,mdss-dsi-dispparam-papermode6-command", "qcom,mdss-dsi-dispparam-papermode6-command-state");
3657 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_papermode7_cmds,
3658 "qcom,mdss-dsi-dispparam-papermode7-command", "qcom,mdss-dsi-dispparam-papermode7-command-state");
3660 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_vividweak_cmds,
3661 "qcom,mdss-dsi-dispparam-vividweak-command", "qcom,mdss-dsi-dispparam-vividweak-command-state");
3662 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_vividstrong_cmds,
3663 "qcom,mdss-dsi-dispparam-vividstrong-command", "qcom,mdss-dsi-dispparam-vividstrong-command-state");
3664 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_vividoff_cmds,
3665 "qcom,mdss-dsi-dispparam-vividoff-command", "qcom,mdss-dsi-dispparam-vividoff-command-state");
3666 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_smartweak_cmds,
3667 "qcom,mdss-dsi-dispparam-smartweak-command", "qcom,mdss-dsi-dispparam-smartweak-command-state");
3668 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_smartstrong_cmds,
3669 "qcom,mdss-dsi-dispparam-smartstrong-command", "qcom,mdss-dsi-dispparam-smartstrong-command-state");
3670 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_smartoff_cmds,
3671 "qcom,mdss-dsi-dispparam-smartoff-command", "qcom,mdss-dsi-dispparam-smartoff-command-state");
3672 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_scon_cmds,
3673 "qcom,mdss-dsi-dispparam-scon-command", "qcom,mdss-dsi-dispparam-scon-command-state");
3674 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_sreon_cmds,
3675 "qcom,mdss-dsi-dispparam-sreon-command", "qcom,mdss-dsi-dispparam-sreon-command-state");
3676 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_sreoff_cmds,
3677 "qcom,mdss-dsi-dispparam-sreoff-command", "qcom,mdss-dsi-dispparam-sreoff-command-state");
3679 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_level0_cmds,
3680 "qcom,mdss-dsi-dispparam-level0-command", "qcom,mdss-dsi-dispparam-level0-command-state");
3681 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_level1_cmds,
3682 "qcom,mdss-dsi-dispparam-level1-command", "qcom,mdss-dsi-dispparam-level1-command-state");
3683 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_level2_cmds,
3684 "qcom,mdss-dsi-dispparam-level2-command", "qcom,mdss-dsi-dispparam-level2-command-state");
3685 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_level3_cmds,
3686 "qcom,mdss-dsi-dispparam-level3-command", "qcom,mdss-dsi-dispparam-level3-command-state");
3687 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_level4_cmds,
3688 "qcom,mdss-dsi-dispparam-level4-command", "qcom,mdss-dsi-dispparam-level4-command-state");
3689 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_level5_cmds,
3690 "qcom,mdss-dsi-dispparam-level5-command", "qcom,mdss-dsi-dispparam-level5-command-state");
3691 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_level6_cmds,
3692 "qcom,mdss-dsi-dispparam-level6-command", "qcom,mdss-dsi-dispparam-level6-command-state");
3694 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_nightmode1_cmds,
3695 "qcom,mdss-dsi-dispparam-nightmode1-command", "qcom,mdss-dsi-dispparam-nightmode1-command-state");
3696 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_nightmode2_cmds,
3697 "qcom,mdss-dsi-dispparam-nightmode2-command", "qcom,mdss-dsi-dispparam-nightmode2-command-state");
3698 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_nightmode3_cmds,
3699 "qcom,mdss-dsi-dispparam-nightmode3-command", "qcom,mdss-dsi-dispparam-nightmode3-command-state");
3700 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_nightmode4_cmds,
3701 "qcom,mdss-dsi-dispparam-nightmode4-command", "qcom,mdss-dsi-dispparam-nightmode4-command-state");
3702 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_nightmode5_cmds,
3703 "qcom,mdss-dsi-dispparam-nightmode5-command", "qcom,mdss-dsi-dispparam-nightmode5-command-state");
3705 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_idleon_cmds,
3706 "qcom,mdss-dsi-dispparam-idleon-command", "qcom,mdss-dsi-dispparam-idleon-command-state");
3707 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_idleoff_cmds,
3708 "qcom,mdss-dsi-dispparam-idleoff-command", "qcom,mdss-dsi-dispparam-idleoff-command-state");
3709 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_test_cmds,
3710 "qcom,mdss-dsi-dispparam-test-command", "qcom,mdss-dsi-dispparam-test-command-state");
3712 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_normal1_cmds,
3713 "qcom,mdss-dsi-dispparam-normal1-command", "qcom,mdss-dsi-dispparam-normal1-command-state");
3714 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_normal2_cmds,
3715 "qcom,mdss-dsi-dispparam-normal2-command", "qcom,mdss-dsi-dispparam-normal2-command-state");
3716 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_srgb_cmds,
3717 "qcom,mdss-dsi-dispparam-srgb-command", "qcom,mdss-dsi-dispparam-srgb-command-state");
3718 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->dispparam_skin_ce_cmds,
3719 "qcom,mdss-dsi-dispparam-skin-ce-command", "qcom,mdss-dsi-dispparam-skin-ce-command-state");
3722 rc = of_property_read_u32_array(np, "qcom,mdss-dsi-panel-xy-coordinate", xy_coordinate, XY_COORDINATE_NUM);
3724 pr_debug("%s:%d, Unable to read panel xy coordinate\n",
3725 __func__, __LINE__);
3727 ctrl_pdata->xy_coordinate_cmds.cmd = xy_coordinate[0];
3728 ctrl_pdata->xy_coordinate_cmds.param_num = xy_coordinate[1];
3729 ctrl_pdata->xy_coordinate_cmds.params_bit = xy_coordinate[2];
3732 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->displayoff_cmds,
3733 "qcom,mdss-dsi-displayoff-command", "qcom,mdss-dsi-displayoff-command-state");
3735 mdss_dsi_parse_dcs_cmds(np, &ctrl_pdata->displayon_cmds,
3736 "qcom,mdss-dsi-displayon-command", "qcom,mdss-dsi-displayon-command-state");
3738 rc = mdss_dsi_parse_panel_features(np, ctrl_pdata);
3740 pr_err("%s: failed to parse panel features\n", __func__);
3744 mdss_dsi_parse_panel_horizintal_line_idle(np, ctrl_pdata);
3746 mdss_dsi_parse_dfps_config(np, ctrl_pdata);
3748 mdss_dsi_set_refresh_rate_range(np, pinfo);
3750 pinfo->is_dba_panel = of_property_read_bool(np,
3753 if (pinfo->is_dba_panel) {
3754 bridge_chip_name = of_get_property(np,
3755 "qcom,bridge-name", &len);
3756 if (!bridge_chip_name || len <= 0) {
3757 pr_err("%s:%d Unable to read qcom,bridge_name, data=%pK,len=%d\n",
3758 __func__, __LINE__, bridge_chip_name, len);
3762 strlcpy(ctrl_pdata->bridge_name, bridge_chip_name,
3763 MSM_DBA_CHIP_NAME_MAX_LEN);
3766 rc = of_property_read_u32(np,
3767 "qcom,mdss-dsi-host-esc-clk-freq-hz",
3768 &pinfo->esc_clk_rate_hz);
3770 pinfo->esc_clk_rate_hz = MDSS_DSI_MAX_ESC_CLK_RATE_HZ;
3771 pr_debug("%s: esc clk %d\n", __func__, pinfo->esc_clk_rate_hz);
3779 int mdss_dsi_panel_init(struct device_node *node,
3780 struct mdss_dsi_ctrl_pdata *ctrl_pdata,
3784 static const char *panel_name;
3785 struct mdss_panel_info *pinfo;
3786 bool dispparam_enabled;
3788 static const char *panel_model;
3790 if (!node || !ctrl_pdata) {
3791 pr_err("%s: Invalid arguments\n", __func__);
3795 pinfo = &ctrl_pdata->panel_data.panel_info;
3798 pr_debug("%s:%d\n", __func__, __LINE__);
3799 pinfo->panel_name[0] = '\0';
3800 panel_name = of_get_property(node, "qcom,mdss-dsi-panel-name", NULL);
3802 pr_info("%s:%d, Panel name not specified\n",
3803 __func__, __LINE__);
3805 pr_info("%s: Panel Name = %s\n", __func__, panel_name);
3806 strlcpy(&pinfo->panel_name[0], panel_name, MDSS_MAX_PANEL_LEN);
3808 rc = mdss_panel_parse_dt(node, ctrl_pdata);
3810 pr_err("%s:%d panel dt parse failed\n", __func__, __LINE__);
3814 INIT_DELAYED_WORK(&ctrl_pdata->cmds_work, panelon_dimming_enable_delayed_work);
3816 pinfo->panel_active = 0;
3817 pinfo->kickoff_count = 0;
3818 pinfo->bl_duration = 0;
3819 pinfo->bl_level_integral = 0;
3820 pinfo->bl_highlevel_duration = 0;
3821 pinfo->bl_lowlevel_duration = 0;
3823 rc = of_property_read_u32(node, "qcom,mdss-panel-on-dimming-delay", &pinfo->panel_on_dimming_delay);
3825 pinfo->panel_on_dimming_delay = 0;
3826 pr_info("Panel on dimming delay disabled\n");
3828 pr_info("Panel on dimming delay %d ms\n", pinfo->panel_on_dimming_delay);
3830 rc = of_property_read_u32(node, "qcom,mdss-dsi-panel-id", &panel_id);
3832 pr_info("%s: panel id parse failed\n", __func__);
3835 update_hardware_info(TYPE_PANEL, panel_id);
3837 panel_model = of_get_property(node, "qcom,mdss-dsi-panel-model", NULL);
3839 pinfo->dynamic_switch_pending = false;
3840 pinfo->is_lpm_mode = false;
3841 pinfo->esd_rdy = false;
3842 pinfo->persist_mode = false;
3844 pinfo->ccbb_enabled = of_property_read_bool(node,
3845 "qcom,dispccbb-enabled");
3846 pinfo->bl_notify_enabled = of_property_read_bool(node,
3847 "qcom,dispblnotify-enabled");
3848 dispparam_enabled = of_property_read_bool(node,
3849 "qcom,dispparam-enabled");
3850 pinfo->disable_cabc = of_property_read_bool(node,
3851 "qcom,disp-paneloff-disablecabc-enabled");
3853 if (dispparam_enabled) {
3854 pr_info("%s:%d Dispparam enabled.\n", __func__, __LINE__);
3855 ctrl_pdata->panel_data.panel_info.dispparam_enabled = 1;
3856 ctrl_pdata->dispparam_fnc = mdss_dsi_panel_dispparam;
3858 pr_info("%s:%d Dispparam disabled.\n", __func__, __LINE__);
3859 ctrl_pdata->panel_data.panel_info.dispparam_enabled = 0;
3860 ctrl_pdata->dispparam_fnc = NULL;
3863 ctrl_pdata->on = mdss_dsi_panel_on;
3864 ctrl_pdata->post_panel_on = mdss_dsi_post_panel_on;
3865 ctrl_pdata->off = mdss_dsi_panel_off;
3866 ctrl_pdata->low_power_config = mdss_dsi_panel_low_power_config;
3867 ctrl_pdata->panel_data.set_backlight = mdss_dsi_panel_bl_ctrl;
3868 ctrl_pdata->panel_data.apply_display_setting =
3869 mdss_dsi_panel_apply_display_setting;
3870 ctrl_pdata->switch_mode = mdss_dsi_panel_switch_mode;