1 // SPDX-License-Identifier: GPL-2.0-only
3 * Ralink MT7621/MT7628 built-in hardware watchdog timer
5 * Copyright (C) 2014 John Crispin <john@phrozen.org>
7 * This driver was based on: drivers/watchdog/rt2880_wdt.c
10 #include <linux/clk.h>
11 #include <linux/reset.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/watchdog.h>
15 #include <linux/moduleparam.h>
16 #include <linux/platform_device.h>
17 #include <linux/mod_devicetable.h>
19 #include <asm/mach-ralink/ralink_regs.h>
21 #define SYSC_RSTSTAT 0x38
22 #define WDT_RST_CAUSE BIT(1)
24 #define RALINK_WDT_TIMEOUT 30
26 #define TIMER_REG_TMRSTAT 0x00
27 #define TIMER_REG_TMR1LOAD 0x24
28 #define TIMER_REG_TMR1CTL 0x20
30 #define TMR1CTL_ENABLE BIT(7)
31 #define TMR1CTL_RESTART BIT(9)
32 #define TMR1CTL_PRESCALE_SHIFT 16
34 struct mt7621_wdt_data {
36 struct reset_control *rst;
37 struct watchdog_device wdt;
40 static bool nowayout = WATCHDOG_NOWAYOUT;
41 module_param(nowayout, bool, 0);
42 MODULE_PARM_DESC(nowayout,
43 "Watchdog cannot be stopped once started (default="
44 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
46 static inline void rt_wdt_w32(void __iomem *base, unsigned int reg, u32 val)
48 iowrite32(val, base + reg);
51 static inline u32 rt_wdt_r32(void __iomem *base, unsigned int reg)
53 return ioread32(base + reg);
56 static int mt7621_wdt_ping(struct watchdog_device *w)
58 struct mt7621_wdt_data *drvdata = watchdog_get_drvdata(w);
60 rt_wdt_w32(drvdata->base, TIMER_REG_TMRSTAT, TMR1CTL_RESTART);
65 static int mt7621_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
67 struct mt7621_wdt_data *drvdata = watchdog_get_drvdata(w);
70 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1LOAD, t * 1000);
76 static int mt7621_wdt_start(struct watchdog_device *w)
78 struct mt7621_wdt_data *drvdata = watchdog_get_drvdata(w);
81 /* set the prescaler to 1ms == 1000us */
82 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, 1000 << TMR1CTL_PRESCALE_SHIFT);
84 mt7621_wdt_set_timeout(w, w->timeout);
86 t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL);
88 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t);
93 static int mt7621_wdt_stop(struct watchdog_device *w)
95 struct mt7621_wdt_data *drvdata = watchdog_get_drvdata(w);
100 t = rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL);
101 t &= ~TMR1CTL_ENABLE;
102 rt_wdt_w32(drvdata->base, TIMER_REG_TMR1CTL, t);
107 static int mt7621_wdt_bootcause(void)
109 if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
110 return WDIOF_CARDRESET;
115 static int mt7621_wdt_is_running(struct watchdog_device *w)
117 struct mt7621_wdt_data *drvdata = watchdog_get_drvdata(w);
119 return !!(rt_wdt_r32(drvdata->base, TIMER_REG_TMR1CTL) & TMR1CTL_ENABLE);
122 static const struct watchdog_info mt7621_wdt_info = {
123 .identity = "Mediatek Watchdog",
124 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
127 static const struct watchdog_ops mt7621_wdt_ops = {
128 .owner = THIS_MODULE,
129 .start = mt7621_wdt_start,
130 .stop = mt7621_wdt_stop,
131 .ping = mt7621_wdt_ping,
132 .set_timeout = mt7621_wdt_set_timeout,
135 static int mt7621_wdt_probe(struct platform_device *pdev)
137 struct device *dev = &pdev->dev;
138 struct watchdog_device *mt7621_wdt;
139 struct mt7621_wdt_data *drvdata;
142 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
146 drvdata->base = devm_platform_ioremap_resource(pdev, 0);
147 if (IS_ERR(drvdata->base))
148 return PTR_ERR(drvdata->base);
150 drvdata->rst = devm_reset_control_get_exclusive(dev, NULL);
151 if (!IS_ERR(drvdata->rst))
152 reset_control_deassert(drvdata->rst);
154 mt7621_wdt = &drvdata->wdt;
155 mt7621_wdt->info = &mt7621_wdt_info;
156 mt7621_wdt->ops = &mt7621_wdt_ops;
157 mt7621_wdt->min_timeout = 1;
158 mt7621_wdt->max_timeout = 0xfffful / 1000;
159 mt7621_wdt->parent = dev;
161 mt7621_wdt->bootstatus = mt7621_wdt_bootcause();
163 watchdog_init_timeout(mt7621_wdt, mt7621_wdt->max_timeout, dev);
164 watchdog_set_nowayout(mt7621_wdt, nowayout);
165 watchdog_set_drvdata(mt7621_wdt, drvdata);
167 if (mt7621_wdt_is_running(mt7621_wdt)) {
169 * Make sure to apply timeout from watchdog core, taking
170 * the prescaler of this driver here into account (the
171 * boot loader might be using a different prescaler).
173 * To avoid spurious resets because of different scaling,
174 * we first disable the watchdog, set the new prescaler
175 * and timeout, and then re-enable the watchdog.
177 mt7621_wdt_stop(mt7621_wdt);
178 mt7621_wdt_start(mt7621_wdt);
179 set_bit(WDOG_HW_RUNNING, &mt7621_wdt->status);
182 err = devm_watchdog_register_device(dev, &drvdata->wdt);
186 platform_set_drvdata(pdev, drvdata);
191 static void mt7621_wdt_shutdown(struct platform_device *pdev)
193 struct mt7621_wdt_data *drvdata = platform_get_drvdata(pdev);
195 mt7621_wdt_stop(&drvdata->wdt);
198 static const struct of_device_id mt7621_wdt_match[] = {
199 { .compatible = "mediatek,mt7621-wdt" },
202 MODULE_DEVICE_TABLE(of, mt7621_wdt_match);
204 static struct platform_driver mt7621_wdt_driver = {
205 .probe = mt7621_wdt_probe,
206 .shutdown = mt7621_wdt_shutdown,
208 .name = KBUILD_MODNAME,
209 .of_match_table = mt7621_wdt_match,
213 module_platform_driver(mt7621_wdt_driver);
215 MODULE_DESCRIPTION("MediaTek MT762x hardware watchdog driver");
216 MODULE_AUTHOR("John Crispin <john@phrozen.org");
217 MODULE_LICENSE("GPL v2");