1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Carnegie Mellon University, 1993.
5 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
6 Modified by Ken Raeburn for gas-2.x and ECOFF support.
7 Modified by Richard Henderson for ELF support.
8 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
10 This file is part of GAS, the GNU Assembler.
12 GAS is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 GAS is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with GAS; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
28 * Mach Operating System
29 * Copyright (c) 1993 Carnegie Mellon University
30 * All Rights Reserved.
32 * Permission to use, copy, modify and distribute this software and its
33 * documentation is hereby granted, provided that both the copyright
34 * notice and this permission notice appear in all copies of the
35 * software, derivative works or modified versions, and any portions
36 * thereof, and that both notices appear in supporting documentation.
38 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
39 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
40 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
42 * Carnegie Mellon requests users of this software to return to
44 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
45 * School of Computer Science
46 * Carnegie Mellon University
47 * Pittsburgh PA 15213-3890
49 * any improvements or extensions that they make and grant Carnegie the
50 * rights to redistribute these changes.
55 #include "struc-symbol.h"
58 #include "opcode/alpha.h"
61 #include "elf/alpha.h"
62 #include "dwarf2dbg.h"
63 #include "dw2gencfi.h"
66 #include "safe-ctype.h"
70 #define TOKENIZE_ERROR -1
71 #define TOKENIZE_ERROR_REPORT -2
73 #define MAX_INSN_FIXUPS 2
74 #define MAX_INSN_ARGS 5
79 bfd_reloc_code_real_type reloc;
86 struct alpha_fixup fixups[MAX_INSN_FIXUPS];
104 void (*emit) PARAMS ((const expressionS *, int, const PTR));
106 enum alpha_macro_arg argsets[16];
109 /* Extra expression types. */
111 #define O_pregister O_md1 /* O_register, in parentheses */
112 #define O_cpregister O_md2 /* + a leading comma */
114 /* The alpha_reloc_op table below depends on the ordering of these. */
115 #define O_literal O_md3 /* !literal relocation */
116 #define O_lituse_addr O_md4 /* !lituse_addr relocation */
117 #define O_lituse_base O_md5 /* !lituse_base relocation */
118 #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation */
119 #define O_lituse_jsr O_md7 /* !lituse_jsr relocation */
120 #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation */
121 #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation */
122 #define O_gpdisp O_md10 /* !gpdisp relocation */
123 #define O_gprelhigh O_md11 /* !gprelhigh relocation */
124 #define O_gprellow O_md12 /* !gprellow relocation */
125 #define O_gprel O_md13 /* !gprel relocation */
126 #define O_samegp O_md14 /* !samegp relocation */
127 #define O_tlsgd O_md15 /* !tlsgd relocation */
128 #define O_tlsldm O_md16 /* !tlsldm relocation */
129 #define O_gotdtprel O_md17 /* !gotdtprel relocation */
130 #define O_dtprelhi O_md18 /* !dtprelhi relocation */
131 #define O_dtprello O_md19 /* !dtprello relocation */
132 #define O_dtprel O_md20 /* !dtprel relocation */
133 #define O_gottprel O_md21 /* !gottprel relocation */
134 #define O_tprelhi O_md22 /* !tprelhi relocation */
135 #define O_tprello O_md23 /* !tprello relocation */
136 #define O_tprel O_md24 /* !tprel relocation */
138 #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
139 #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
140 #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
141 #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
142 #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
143 #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
145 #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
147 /* Macros for extracting the type and number of encoded register tokens. */
149 #define is_ir_num(x) (((x) & 32) == 0)
150 #define is_fpr_num(x) (((x) & 32) != 0)
151 #define regno(x) ((x) & 31)
153 /* Something odd inherited from the old assembler. */
155 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
156 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
158 /* Predicates for 16- and 32-bit ranges */
159 /* XXX: The non-shift version appears to trigger a compiler bug when
160 cross-assembling from x86 w/ gcc 2.7.2. */
163 #define range_signed_16(x) \
164 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
165 #define range_signed_32(x) \
166 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
168 #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
169 (offsetT) (x) <= (offsetT) 0x7FFF)
170 #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
171 (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
174 /* Macros for sign extending from 16- and 32-bits. */
175 /* XXX: The cast macros will work on all the systems that I care about,
176 but really a predicate should be found to use the non-cast forms. */
179 #define sign_extend_16(x) ((short) (x))
180 #define sign_extend_32(x) ((int) (x))
182 #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
183 #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
184 ^ 0x80000000) - 0x80000000)
187 /* Macros to build tokens. */
189 #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
190 (t).X_op = O_register, \
191 (t).X_add_number = (r))
192 #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
193 (t).X_op = O_pregister, \
194 (t).X_add_number = (r))
195 #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
196 (t).X_op = O_cpregister, \
197 (t).X_add_number = (r))
198 #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
199 (t).X_op = O_register, \
200 (t).X_add_number = (r) + 32)
201 #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
202 (t).X_op = O_symbol, \
203 (t).X_add_symbol = (s), \
204 (t).X_add_number = (a))
205 #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
206 (t).X_op = O_constant, \
207 (t).X_add_number = (n))
209 /* Prototypes for all local functions. */
211 static struct alpha_reloc_tag *get_alpha_reloc_tag PARAMS ((long));
212 static void alpha_adjust_relocs PARAMS ((bfd *, asection *, PTR));
214 static int tokenize_arguments PARAMS ((char *, expressionS *, int));
215 static const struct alpha_opcode *find_opcode_match
216 PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
217 static const struct alpha_macro *find_macro_match
218 PARAMS ((const struct alpha_macro *, const expressionS *, int *));
219 static unsigned insert_operand
220 PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
221 static void assemble_insn
222 PARAMS ((const struct alpha_opcode *, const expressionS *, int,
223 struct alpha_insn *, bfd_reloc_code_real_type));
224 static void emit_insn PARAMS ((struct alpha_insn *));
225 static void assemble_tokens_to_insn
226 PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
227 static void assemble_tokens
228 PARAMS ((const char *, const expressionS *, int, int));
230 static long load_expression
231 PARAMS ((int, const expressionS *, int *, expressionS *));
233 static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
234 static void emit_division PARAMS ((const expressionS *, int, const PTR));
235 static void emit_lda PARAMS ((const expressionS *, int, const PTR));
236 static void emit_ldah PARAMS ((const expressionS *, int, const PTR));
237 static void emit_ir_load PARAMS ((const expressionS *, int, const PTR));
238 static void emit_loadstore PARAMS ((const expressionS *, int, const PTR));
239 static void emit_jsrjmp PARAMS ((const expressionS *, int, const PTR));
240 static void emit_ldX PARAMS ((const expressionS *, int, const PTR));
241 static void emit_ldXu PARAMS ((const expressionS *, int, const PTR));
242 static void emit_uldX PARAMS ((const expressionS *, int, const PTR));
243 static void emit_uldXu PARAMS ((const expressionS *, int, const PTR));
244 static void emit_ldil PARAMS ((const expressionS *, int, const PTR));
245 static void emit_stX PARAMS ((const expressionS *, int, const PTR));
246 static void emit_ustX PARAMS ((const expressionS *, int, const PTR));
247 static void emit_sextX PARAMS ((const expressionS *, int, const PTR));
248 static void emit_retjcr PARAMS ((const expressionS *, int, const PTR));
250 static void s_alpha_text PARAMS ((int));
251 static void s_alpha_data PARAMS ((int));
253 static void s_alpha_comm PARAMS ((int));
254 static void s_alpha_rdata PARAMS ((int));
257 static void s_alpha_sdata PARAMS ((int));
260 static void s_alpha_section PARAMS ((int));
261 static void s_alpha_ent PARAMS ((int));
262 static void s_alpha_end PARAMS ((int));
263 static void s_alpha_mask PARAMS ((int));
264 static void s_alpha_frame PARAMS ((int));
265 static void s_alpha_prologue PARAMS ((int));
266 static void s_alpha_file PARAMS ((int));
267 static void s_alpha_loc PARAMS ((int));
268 static void s_alpha_stab PARAMS ((int));
269 static void s_alpha_coff_wrapper PARAMS ((int));
272 static void s_alpha_section PARAMS ((int));
274 static void s_alpha_gprel32 PARAMS ((int));
275 static void s_alpha_float_cons PARAMS ((int));
276 static void s_alpha_proc PARAMS ((int));
277 static void s_alpha_set PARAMS ((int));
278 static void s_alpha_base PARAMS ((int));
279 static void s_alpha_align PARAMS ((int));
280 static void s_alpha_stringer PARAMS ((int));
281 static void s_alpha_space PARAMS ((int));
282 static void s_alpha_ucons PARAMS ((int));
283 static void s_alpha_arch PARAMS ((int));
285 static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
287 static void select_gp_value PARAMS ((void));
289 static void alpha_align PARAMS ((int, char *, symbolS *, int));
291 /* Generic assembler global variables which must be defined by all
294 /* Characters which always start a comment. */
295 const char comment_chars[] = "#";
297 /* Characters which start a comment at the beginning of a line. */
298 const char line_comment_chars[] = "#";
300 /* Characters which may be used to separate multiple commands on a
302 const char line_separator_chars[] = ";";
304 /* Characters which are used to indicate an exponent in a floating
306 const char EXP_CHARS[] = "eE";
308 /* Characters which mean that a number is a floating point constant,
311 const char FLT_CHARS[] = "dD";
313 /* XXX: Do all of these really get used on the alpha?? */
314 char FLT_CHARS[] = "rRsSfFdDxXpP";
318 const char *md_shortopts = "Fm:g+1h:HG:";
320 const char *md_shortopts = "Fm:gG:";
323 struct option md_longopts[] =
325 #define OPTION_32ADDR (OPTION_MD_BASE)
326 { "32addr", no_argument, NULL, OPTION_32ADDR },
327 #define OPTION_RELAX (OPTION_32ADDR + 1)
328 { "relax", no_argument, NULL, OPTION_RELAX },
330 #define OPTION_MDEBUG (OPTION_RELAX + 1)
331 #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
332 { "mdebug", no_argument, NULL, OPTION_MDEBUG },
333 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
335 { NULL, no_argument, NULL, 0 }
338 size_t md_longopts_size = sizeof (md_longopts);
342 #define AXP_REG_R16 16
343 #define AXP_REG_R17 17
345 #define AXP_REG_T9 22
347 #define AXP_REG_T10 23
349 #define AXP_REG_T11 24
351 #define AXP_REG_T12 25
352 #define AXP_REG_AI 25
354 #define AXP_REG_FP 29
357 #define AXP_REG_GP AXP_REG_PV
358 #endif /* OBJ_EVAX */
360 /* The cpu for which we are generating code. */
361 static unsigned alpha_target = AXP_OPCODE_BASE;
362 static const char *alpha_target_name = "<all>";
364 /* The hash table of instruction opcodes. */
365 static struct hash_control *alpha_opcode_hash;
367 /* The hash table of macro opcodes. */
368 static struct hash_control *alpha_macro_hash;
371 /* The $gp relocation symbol. */
372 static symbolS *alpha_gp_symbol;
374 /* XXX: what is this, and why is it exported? */
375 valueT alpha_gp_value;
378 /* The current $gp register. */
379 static int alpha_gp_register = AXP_REG_GP;
381 /* A table of the register symbols. */
382 static symbolS *alpha_register_table[64];
384 /* Constant sections, or sections of constants. */
386 static segT alpha_lita_section;
389 static segT alpha_link_section;
390 static segT alpha_ctors_section;
391 static segT alpha_dtors_section;
393 static segT alpha_lit8_section;
395 /* Symbols referring to said sections. */
397 static symbolS *alpha_lita_symbol;
400 static symbolS *alpha_link_symbol;
401 static symbolS *alpha_ctors_symbol;
402 static symbolS *alpha_dtors_symbol;
404 static symbolS *alpha_lit8_symbol;
406 /* Literal for .litX+0x8000 within .lita. */
408 static offsetT alpha_lit8_literal;
411 /* Is the assembler not allowed to use $at? */
412 static int alpha_noat_on = 0;
414 /* Are macros enabled? */
415 static int alpha_macros_on = 1;
417 /* Are floats disabled? */
418 static int alpha_nofloats_on = 0;
420 /* Are addresses 32 bit? */
421 static int alpha_addr32_on = 0;
423 /* Symbol labelling the current insn. When the Alpha gas sees
426 and the section happens to not be on an eight byte boundary, it
427 will align both the symbol and the .quad to an eight byte boundary. */
428 static symbolS *alpha_insn_label;
430 /* Whether we should automatically align data generation pseudo-ops.
431 .align 0 will turn this off. */
432 static int alpha_auto_align_on = 1;
434 /* The known current alignment of the current section. */
435 static int alpha_current_align;
437 /* These are exported to ECOFF code. */
438 unsigned long alpha_gprmask, alpha_fprmask;
440 /* Whether the debugging option was seen. */
441 static int alpha_debug;
444 /* Whether we are emitting an mdebug section. */
445 int alpha_flag_mdebug = -1;
448 /* Don't fully resolve relocations, allowing code movement in the linker. */
449 static int alpha_flag_relax;
451 /* What value to give to bfd_set_gp_size. */
452 static int g_switch_value = 8;
455 /* Collect information about current procedure here. */
457 symbolS *symbol; /* proc pdesc symbol */
459 int framereg; /* register for frame pointer */
460 int framesize; /* size of frame */
470 static int alpha_flag_hash_long_names = 0; /* -+ */
471 static int alpha_flag_show_after_trunc = 0; /* -H */
473 /* If the -+ switch is given, then a hash is appended to any name that is
474 longer than 64 characters, else longer symbol names are truncated. */
479 /* A table to map the spelling of a relocation operand into an appropriate
480 bfd_reloc_code_real_type type. The table is assumed to be ordered such
481 that op-O_literal indexes into it. */
483 #define ALPHA_RELOC_TABLE(op) \
484 (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
486 : (int) (op) - (int) O_literal) ])
488 #define DEF(NAME, RELOC, REQ, ALLOW) \
489 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
491 static const struct alpha_reloc_op_tag
493 const char *name; /* string to lookup */
494 size_t length; /* size of the string */
495 operatorT op; /* which operator to use */
496 bfd_reloc_code_real_type reloc; /* relocation before frob */
497 unsigned int require_seq : 1; /* require a sequence number */
498 unsigned int allow_seq : 1; /* allow a sequence number */
502 DEF(literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
503 DEF(lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
504 DEF(lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
505 DEF(lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
506 DEF(lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
507 DEF(lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1),
508 DEF(lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1),
509 DEF(gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
510 DEF(gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
511 DEF(gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
512 DEF(gprel, BFD_RELOC_GPREL16, 0, 0),
513 DEF(samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0),
514 DEF(tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1),
515 DEF(tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1),
516 DEF(gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0),
517 DEF(dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0),
518 DEF(dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0),
519 DEF(dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0),
520 DEF(gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0),
521 DEF(tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0),
522 DEF(tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0),
523 DEF(tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0),
528 static const int alpha_num_reloc_op
529 = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
530 #endif /* RELOC_OP_P */
532 /* Maximum # digits needed to hold the largest sequence # */
533 #define ALPHA_RELOC_DIGITS 25
535 /* Structure to hold explict sequence information. */
536 struct alpha_reloc_tag
538 fixS *master; /* the literal reloc */
539 fixS *slaves; /* head of linked list of lituses */
540 segT segment; /* segment relocs are in or undefined_section*/
541 long sequence; /* sequence # */
542 unsigned n_master; /* # of literals */
543 unsigned n_slaves; /* # of lituses */
544 unsigned saw_tlsgd : 1; /* true if ... */
545 unsigned saw_tlsldm : 1;
546 unsigned saw_lu_tlsgd : 1;
547 unsigned saw_lu_tlsldm : 1;
548 unsigned multi_section_p : 1; /* true if more than one section was used */
549 char string[1]; /* printable form of sequence to hash with */
552 /* Hash table to link up literals with the appropriate lituse */
553 static struct hash_control *alpha_literal_hash;
555 /* Sequence numbers for internal use by macros. */
556 static long next_sequence_num = -1;
558 /* A table of CPU names and opcode sets. */
560 static const struct cpu_type
567 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
568 This supports usage under DU 4.0b that does ".arch ev4", and
569 usage in MILO that does -m21064. Probably something more
570 specific like -m21064-pal should be used, but oh well. */
572 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
573 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
574 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
575 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
576 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
577 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
578 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
580 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
581 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
582 { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
583 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
584 { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
585 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
587 { "ev4", AXP_OPCODE_BASE },
588 { "ev45", AXP_OPCODE_BASE },
589 { "lca45", AXP_OPCODE_BASE },
590 { "ev5", AXP_OPCODE_BASE },
591 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
592 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
593 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
594 { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
595 { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
597 { "all", AXP_OPCODE_BASE },
601 /* The macro table */
603 static const struct alpha_macro alpha_macros[] =
605 /* Load/Store macros */
606 { "lda", emit_lda, NULL,
607 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
608 { "ldah", emit_ldah, NULL,
609 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
611 { "ldl", emit_ir_load, "ldl",
612 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
613 { "ldl_l", emit_ir_load, "ldl_l",
614 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
615 { "ldq", emit_ir_load, "ldq",
616 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
617 { "ldq_l", emit_ir_load, "ldq_l",
618 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
619 { "ldq_u", emit_ir_load, "ldq_u",
620 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
621 { "ldf", emit_loadstore, "ldf",
622 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
623 { "ldg", emit_loadstore, "ldg",
624 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
625 { "lds", emit_loadstore, "lds",
626 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
627 { "ldt", emit_loadstore, "ldt",
628 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
630 { "ldb", emit_ldX, (PTR) 0,
631 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
632 { "ldbu", emit_ldXu, (PTR) 0,
633 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
634 { "ldw", emit_ldX, (PTR) 1,
635 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
636 { "ldwu", emit_ldXu, (PTR) 1,
637 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
639 { "uldw", emit_uldX, (PTR) 1,
640 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
641 { "uldwu", emit_uldXu, (PTR) 1,
642 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
643 { "uldl", emit_uldX, (PTR) 2,
644 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
645 { "uldlu", emit_uldXu, (PTR) 2,
646 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
647 { "uldq", emit_uldXu, (PTR) 3,
648 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
650 { "ldgp", emit_ldgp, NULL,
651 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
653 { "ldi", emit_lda, NULL,
654 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
655 { "ldil", emit_ldil, NULL,
656 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
657 { "ldiq", emit_lda, NULL,
658 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
660 { "ldif" emit_ldiq, NULL,
661 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
662 { "ldid" emit_ldiq, NULL,
663 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
664 { "ldig" emit_ldiq, NULL,
665 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
666 { "ldis" emit_ldiq, NULL,
667 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
668 { "ldit" emit_ldiq, NULL,
669 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
672 { "stl", emit_loadstore, "stl",
673 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
674 { "stl_c", emit_loadstore, "stl_c",
675 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
676 { "stq", emit_loadstore, "stq",
677 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
678 { "stq_c", emit_loadstore, "stq_c",
679 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
680 { "stq_u", emit_loadstore, "stq_u",
681 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
682 { "stf", emit_loadstore, "stf",
683 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
684 { "stg", emit_loadstore, "stg",
685 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
686 { "sts", emit_loadstore, "sts",
687 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
688 { "stt", emit_loadstore, "stt",
689 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
691 { "stb", emit_stX, (PTR) 0,
692 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
693 { "stw", emit_stX, (PTR) 1,
694 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
695 { "ustw", emit_ustX, (PTR) 1,
696 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
697 { "ustl", emit_ustX, (PTR) 2,
698 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
699 { "ustq", emit_ustX, (PTR) 3,
700 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
702 /* Arithmetic macros */
704 { "absl" emit_absl, 1, { IR } },
705 { "absl" emit_absl, 2, { IR, IR } },
706 { "absl" emit_absl, 2, { EXP, IR } },
707 { "absq" emit_absq, 1, { IR } },
708 { "absq" emit_absq, 2, { IR, IR } },
709 { "absq" emit_absq, 2, { EXP, IR } },
712 { "sextb", emit_sextX, (PTR) 0,
713 { MACRO_IR, MACRO_IR, MACRO_EOA,
715 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
716 { "sextw", emit_sextX, (PTR) 1,
717 { MACRO_IR, MACRO_IR, MACRO_EOA,
719 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
721 { "divl", emit_division, "__divl",
722 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
723 MACRO_IR, MACRO_IR, MACRO_EOA,
724 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
725 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
726 { "divlu", emit_division, "__divlu",
727 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
728 MACRO_IR, MACRO_IR, MACRO_EOA,
729 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
730 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
731 { "divq", emit_division, "__divq",
732 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
733 MACRO_IR, MACRO_IR, MACRO_EOA,
734 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
735 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
736 { "divqu", emit_division, "__divqu",
737 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
738 MACRO_IR, MACRO_IR, MACRO_EOA,
739 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
740 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
741 { "reml", emit_division, "__reml",
742 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
743 MACRO_IR, MACRO_IR, MACRO_EOA,
744 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
745 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
746 { "remlu", emit_division, "__remlu",
747 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
748 MACRO_IR, MACRO_IR, MACRO_EOA,
749 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
750 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
751 { "remq", emit_division, "__remq",
752 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
753 MACRO_IR, MACRO_IR, MACRO_EOA,
754 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
755 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
756 { "remqu", emit_division, "__remqu",
757 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
758 MACRO_IR, MACRO_IR, MACRO_EOA,
759 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
760 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
762 { "jsr", emit_jsrjmp, "jsr",
763 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
764 MACRO_PIR, MACRO_EOA,
765 MACRO_IR, MACRO_EXP, MACRO_EOA,
766 MACRO_EXP, MACRO_EOA } },
767 { "jmp", emit_jsrjmp, "jmp",
768 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
769 MACRO_PIR, MACRO_EOA,
770 MACRO_IR, MACRO_EXP, MACRO_EOA,
771 MACRO_EXP, MACRO_EOA } },
772 { "ret", emit_retjcr, "ret",
773 { MACRO_IR, MACRO_EXP, MACRO_EOA,
775 MACRO_PIR, MACRO_EXP, MACRO_EOA,
776 MACRO_PIR, MACRO_EOA,
777 MACRO_EXP, MACRO_EOA,
779 { "jcr", emit_retjcr, "jcr",
780 { MACRO_IR, MACRO_EXP, MACRO_EOA,
782 MACRO_PIR, MACRO_EXP, MACRO_EOA,
783 MACRO_PIR, MACRO_EOA,
784 MACRO_EXP, MACRO_EOA,
786 { "jsr_coroutine", emit_retjcr, "jcr",
787 { MACRO_IR, MACRO_EXP, MACRO_EOA,
789 MACRO_PIR, MACRO_EXP, MACRO_EOA,
790 MACRO_PIR, MACRO_EOA,
791 MACRO_EXP, MACRO_EOA,
795 static const unsigned int alpha_num_macros
796 = sizeof (alpha_macros) / sizeof (*alpha_macros);
798 /* Public interface functions */
800 /* This function is called once, at assembler startup time. It sets
801 up all the tables, etc. that the MD part of the assembler will
802 need, that can be determined before arguments are parsed. */
809 /* Verify that X_op field is wide enough. */
813 assert (e.X_op == O_max);
816 /* Create the opcode hash table. */
817 alpha_opcode_hash = hash_new ();
818 for (i = 0; i < alpha_num_opcodes;)
820 const char *name, *retval, *slash;
822 name = alpha_opcodes[i].name;
823 retval = hash_insert (alpha_opcode_hash, name, (PTR) &alpha_opcodes[i]);
825 as_fatal (_("internal error: can't hash opcode `%s': %s"),
828 /* Some opcodes include modifiers of various sorts with a "/mod"
829 syntax, like the architecture manual suggests. However, for
830 use with gcc at least, we also need access to those same opcodes
833 if ((slash = strchr (name, '/')) != NULL)
835 char *p = xmalloc (strlen (name));
836 memcpy (p, name, slash - name);
837 strcpy (p + (slash - name), slash + 1);
839 (void) hash_insert (alpha_opcode_hash, p, (PTR) &alpha_opcodes[i]);
840 /* Ignore failures -- the opcode table does duplicate some
841 variants in different forms, like "hw_stq" and "hw_st/q". */
844 while (++i < alpha_num_opcodes
845 && (alpha_opcodes[i].name == name
846 || !strcmp (alpha_opcodes[i].name, name)))
850 /* Create the macro hash table. */
851 alpha_macro_hash = hash_new ();
852 for (i = 0; i < alpha_num_macros;)
854 const char *name, *retval;
856 name = alpha_macros[i].name;
857 retval = hash_insert (alpha_macro_hash, name, (PTR) &alpha_macros[i]);
859 as_fatal (_("internal error: can't hash macro `%s': %s"),
862 while (++i < alpha_num_macros
863 && (alpha_macros[i].name == name
864 || !strcmp (alpha_macros[i].name, name)))
868 /* Construct symbols for each of the registers. */
869 for (i = 0; i < 32; ++i)
873 sprintf (name, "$%d", i);
874 alpha_register_table[i] = symbol_create (name, reg_section, i,
881 sprintf (name, "$f%d", i - 32);
882 alpha_register_table[i] = symbol_create (name, reg_section, i,
886 /* Create the special symbols and sections we'll be using. */
888 /* So .sbss will get used for tiny objects. */
889 bfd_set_gp_size (stdoutput, g_switch_value);
892 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
894 /* For handling the GP, create a symbol that won't be output in the
895 symbol table. We'll edit it out of relocs later. */
896 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
901 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
907 segT sec = subseg_new (".mdebug", (subsegT) 0);
908 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
909 bfd_set_section_alignment (stdoutput, sec, 3);
913 /* Create literal lookup hash table. */
914 alpha_literal_hash = hash_new ();
916 subseg_set (text_section, 0);
919 /* The public interface to the instruction assembler. */
925 char opname[32]; /* Current maximum is 13. */
926 expressionS tok[MAX_INSN_ARGS];
930 /* Split off the opcode. */
931 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
932 trunclen = (opnamelen < sizeof (opname) - 1
934 : sizeof (opname) - 1);
935 memcpy (opname, str, trunclen);
936 opname[trunclen] = '\0';
938 /* Tokenize the rest of the line. */
939 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
941 if (ntok != TOKENIZE_ERROR_REPORT)
942 as_bad (_("syntax error"));
948 assemble_tokens (opname, tok, ntok, alpha_macros_on);
951 /* Round up a section's size to the appropriate boundary. */
954 md_section_align (seg, size)
958 int align = bfd_get_section_alignment (stdoutput, seg);
959 valueT mask = ((valueT) 1 << align) - 1;
961 return (size + mask) & ~mask;
964 /* Turn a string in input_line_pointer into a floating point constant
965 of type TYPE, and store the appropriate bytes in *LITP. The number
966 of LITTLENUMS emitted is stored in *SIZEP. An error message is
967 returned, or NULL on OK. */
969 /* Equal to MAX_PRECISION in atof-ieee.c. */
970 #define MAX_LITTLENUMS 6
972 extern char *vax_md_atof PARAMS ((int, char *, int *));
975 md_atof (type, litP, sizeP)
981 LITTLENUM_TYPE words[MAX_LITTLENUMS];
982 LITTLENUM_TYPE *wordP;
989 /* VAX md_atof doesn't like "G" for some reason. */
993 return vax_md_atof (type, litP, sizeP);
1016 return _("Bad call to MD_ATOF()");
1018 t = atof_ieee (input_line_pointer, type, words);
1020 input_line_pointer = t;
1021 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1023 for (wordP = words + prec - 1; prec--;)
1025 md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
1026 litP += sizeof (LITTLENUM_TYPE);
1032 /* Take care of the target-specific command-line options. */
1035 md_parse_option (c, arg)
1042 alpha_nofloats_on = 1;
1046 alpha_addr32_on = 1;
1054 g_switch_value = atoi (arg);
1059 const struct cpu_type *p;
1060 for (p = cpu_types; p->name; ++p)
1061 if (strcmp (arg, p->name) == 0)
1063 alpha_target_name = p->name, alpha_target = p->flags;
1066 as_warn (_("Unknown CPU identifier `%s'"), arg);
1072 case '+': /* For g++. Hash any name > 63 chars long. */
1073 alpha_flag_hash_long_names = 1;
1076 case 'H': /* Show new symbol after hash truncation */
1077 alpha_flag_show_after_trunc = 1;
1080 case 'h': /* for gnu-c/vax compatibility. */
1085 alpha_flag_relax = 1;
1090 alpha_flag_mdebug = 1;
1092 case OPTION_NO_MDEBUG:
1093 alpha_flag_mdebug = 0;
1104 /* Print a description of the command-line options that we accept. */
1107 md_show_usage (stream)
1112 -32addr treat addresses as 32-bit values\n\
1113 -F lack floating point instructions support\n\
1114 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\
1115 specify variant of Alpha architecture\n\
1116 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\
1117 these variants include PALcode opcodes\n"),
1122 -+ hash encode (don't truncate) names longer than 64 characters\n\
1123 -H show new symbol after hash truncation\n"),
1128 /* Decide from what point a pc-relative relocation is relative to,
1129 relative to the pc-relative fixup. Er, relatively speaking. */
1132 md_pcrel_from (fixP)
1135 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
1136 switch (fixP->fx_r_type)
1138 case BFD_RELOC_23_PCREL_S2:
1139 case BFD_RELOC_ALPHA_HINT:
1140 case BFD_RELOC_ALPHA_BRSGP:
1147 /* Attempt to simplify or even eliminate a fixup. The return value is
1148 ignored; perhaps it was once meaningful, but now it is historical.
1149 To indicate that a fixup has been eliminated, set fixP->fx_done.
1151 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1152 internally into the GPDISP reloc used externally. We had to do
1153 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1154 the distance to the "lda" instruction for setting the addend to
1158 md_apply_fix3 (fixP, valP, seg)
1163 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
1164 valueT value = * valP;
1165 unsigned image, size;
1167 switch (fixP->fx_r_type)
1169 /* The GPDISP relocations are processed internally with a symbol
1170 referring to the current function's section; we need to drop
1171 in a value which, when added to the address of the start of
1172 the function, gives the desired GP. */
1173 case BFD_RELOC_ALPHA_GPDISP_HI16:
1175 fixS *next = fixP->fx_next;
1177 /* With user-specified !gpdisp relocations, we can be missing
1178 the matching LO16 reloc. We will have already issued an
1181 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
1182 - fixP->fx_frag->fr_address - fixP->fx_where);
1184 value = (value - sign_extend_16 (value)) >> 16;
1187 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
1191 case BFD_RELOC_ALPHA_GPDISP_LO16:
1192 value = sign_extend_16 (value);
1193 fixP->fx_offset = 0;
1199 fixP->fx_addsy = section_symbol (seg);
1200 md_number_to_chars (fixpos, value, 2);
1205 fixP->fx_r_type = BFD_RELOC_16_PCREL;
1210 fixP->fx_r_type = BFD_RELOC_32_PCREL;
1215 fixP->fx_r_type = BFD_RELOC_64_PCREL;
1218 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1220 md_number_to_chars (fixpos, value, size);
1226 case BFD_RELOC_GPREL32:
1227 assert (fixP->fx_subsy == alpha_gp_symbol);
1229 /* FIXME: inherited this obliviousness of `value' -- why? */
1230 md_number_to_chars (fixpos, -alpha_gp_value, 4);
1233 case BFD_RELOC_GPREL32:
1235 case BFD_RELOC_GPREL16:
1236 case BFD_RELOC_ALPHA_GPREL_HI16:
1237 case BFD_RELOC_ALPHA_GPREL_LO16:
1240 case BFD_RELOC_23_PCREL_S2:
1241 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1243 image = bfd_getl32 (fixpos);
1244 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
1249 case BFD_RELOC_ALPHA_HINT:
1250 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1252 image = bfd_getl32 (fixpos);
1253 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
1259 case BFD_RELOC_ALPHA_BRSGP:
1262 case BFD_RELOC_ALPHA_TLSGD:
1263 case BFD_RELOC_ALPHA_TLSLDM:
1264 case BFD_RELOC_ALPHA_GOTDTPREL16:
1265 case BFD_RELOC_ALPHA_DTPREL_HI16:
1266 case BFD_RELOC_ALPHA_DTPREL_LO16:
1267 case BFD_RELOC_ALPHA_DTPREL16:
1268 case BFD_RELOC_ALPHA_GOTTPREL16:
1269 case BFD_RELOC_ALPHA_TPREL_HI16:
1270 case BFD_RELOC_ALPHA_TPREL_LO16:
1271 case BFD_RELOC_ALPHA_TPREL16:
1273 S_SET_THREAD_LOCAL (fixP->fx_addsy);
1278 case BFD_RELOC_ALPHA_LITERAL:
1279 md_number_to_chars (fixpos, value, 2);
1282 case BFD_RELOC_ALPHA_ELF_LITERAL:
1283 case BFD_RELOC_ALPHA_LITUSE:
1284 case BFD_RELOC_ALPHA_LINKAGE:
1285 case BFD_RELOC_ALPHA_CODEADDR:
1288 case BFD_RELOC_VTABLE_INHERIT:
1289 case BFD_RELOC_VTABLE_ENTRY:
1294 const struct alpha_operand *operand;
1296 if ((int) fixP->fx_r_type >= 0)
1297 as_fatal (_("unhandled relocation type %s"),
1298 bfd_get_reloc_code_name (fixP->fx_r_type));
1300 assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
1301 operand = &alpha_operands[-(int) fixP->fx_r_type];
1303 /* The rest of these fixups only exist internally during symbol
1304 resolution and have no representation in the object file.
1305 Therefore they must be completely resolved as constants. */
1307 if (fixP->fx_addsy != 0
1308 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
1309 as_bad_where (fixP->fx_file, fixP->fx_line,
1310 _("non-absolute expression in constant field"));
1312 image = bfd_getl32 (fixpos);
1313 image = insert_operand (image, operand, (offsetT) value,
1314 fixP->fx_file, fixP->fx_line);
1319 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
1323 as_warn_where (fixP->fx_file, fixP->fx_line,
1324 _("type %d reloc done?\n"), (int) fixP->fx_r_type);
1329 md_number_to_chars (fixpos, image, 4);
1335 /* Look for a register name in the given symbol. */
1338 md_undefined_symbol (name)
1343 int is_float = 0, num;
1348 if (name[1] == 'p' && name[2] == '\0')
1349 return alpha_register_table[AXP_REG_FP];
1354 if (!ISDIGIT (*++name))
1358 case '0': case '1': case '2': case '3': case '4':
1359 case '5': case '6': case '7': case '8': case '9':
1360 if (name[1] == '\0')
1361 num = name[0] - '0';
1362 else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
1364 num = (name[0] - '0') * 10 + name[1] - '0';
1371 if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
1372 as_warn (_("Used $at without \".set noat\""));
1373 return alpha_register_table[num + is_float];
1376 if (name[1] == 't' && name[2] == '\0')
1379 as_warn (_("Used $at without \".set noat\""));
1380 return alpha_register_table[AXP_REG_AT];
1385 if (name[1] == 'p' && name[2] == '\0')
1386 return alpha_register_table[alpha_gp_register];
1390 if (name[1] == 'p' && name[2] == '\0')
1391 return alpha_register_table[AXP_REG_SP];
1399 /* @@@ Magic ECOFF bits. */
1402 alpha_frob_ecoff_data ()
1405 /* $zero and $f31 are read-only */
1406 alpha_gprmask &= ~1;
1407 alpha_fprmask &= ~1;
1411 /* Hook to remember a recently defined label so that the auto-align
1412 code can adjust the symbol after we know what alignment will be
1416 alpha_define_label (sym)
1419 alpha_insn_label = sym;
1422 /* Return true if we must always emit a reloc for a type and false if
1423 there is some hope of resolving it at assembly time. */
1426 alpha_force_relocation (f)
1429 if (alpha_flag_relax)
1432 switch (f->fx_r_type)
1434 case BFD_RELOC_ALPHA_GPDISP_HI16:
1435 case BFD_RELOC_ALPHA_GPDISP_LO16:
1436 case BFD_RELOC_ALPHA_GPDISP:
1437 case BFD_RELOC_ALPHA_LITERAL:
1438 case BFD_RELOC_ALPHA_ELF_LITERAL:
1439 case BFD_RELOC_ALPHA_LITUSE:
1440 case BFD_RELOC_GPREL16:
1441 case BFD_RELOC_GPREL32:
1442 case BFD_RELOC_ALPHA_GPREL_HI16:
1443 case BFD_RELOC_ALPHA_GPREL_LO16:
1444 case BFD_RELOC_ALPHA_LINKAGE:
1445 case BFD_RELOC_ALPHA_CODEADDR:
1446 case BFD_RELOC_ALPHA_BRSGP:
1447 case BFD_RELOC_ALPHA_TLSGD:
1448 case BFD_RELOC_ALPHA_TLSLDM:
1449 case BFD_RELOC_ALPHA_GOTDTPREL16:
1450 case BFD_RELOC_ALPHA_DTPREL_HI16:
1451 case BFD_RELOC_ALPHA_DTPREL_LO16:
1452 case BFD_RELOC_ALPHA_DTPREL16:
1453 case BFD_RELOC_ALPHA_GOTTPREL16:
1454 case BFD_RELOC_ALPHA_TPREL_HI16:
1455 case BFD_RELOC_ALPHA_TPREL_LO16:
1456 case BFD_RELOC_ALPHA_TPREL16:
1463 return generic_force_reloc (f);
1466 /* Return true if we can partially resolve a relocation now. */
1469 alpha_fix_adjustable (f)
1472 /* Are there any relocation types for which we must generate a reloc
1473 but we can adjust the values contained within it? */
1474 switch (f->fx_r_type)
1476 case BFD_RELOC_ALPHA_GPDISP_HI16:
1477 case BFD_RELOC_ALPHA_GPDISP_LO16:
1478 case BFD_RELOC_ALPHA_GPDISP:
1481 case BFD_RELOC_ALPHA_LITERAL:
1482 case BFD_RELOC_ALPHA_ELF_LITERAL:
1483 case BFD_RELOC_ALPHA_LITUSE:
1484 case BFD_RELOC_ALPHA_LINKAGE:
1485 case BFD_RELOC_ALPHA_CODEADDR:
1488 case BFD_RELOC_VTABLE_ENTRY:
1489 case BFD_RELOC_VTABLE_INHERIT:
1492 case BFD_RELOC_GPREL16:
1493 case BFD_RELOC_GPREL32:
1494 case BFD_RELOC_ALPHA_GPREL_HI16:
1495 case BFD_RELOC_ALPHA_GPREL_LO16:
1496 case BFD_RELOC_23_PCREL_S2:
1499 case BFD_RELOC_ALPHA_HINT:
1502 case BFD_RELOC_ALPHA_TLSGD:
1503 case BFD_RELOC_ALPHA_TLSLDM:
1504 case BFD_RELOC_ALPHA_GOTDTPREL16:
1505 case BFD_RELOC_ALPHA_DTPREL_HI16:
1506 case BFD_RELOC_ALPHA_DTPREL_LO16:
1507 case BFD_RELOC_ALPHA_DTPREL16:
1508 case BFD_RELOC_ALPHA_GOTTPREL16:
1509 case BFD_RELOC_ALPHA_TPREL_HI16:
1510 case BFD_RELOC_ALPHA_TPREL_LO16:
1511 case BFD_RELOC_ALPHA_TPREL16:
1512 /* ??? No idea why we can't return a reference to .tbss+10, but
1513 we're preventing this in the other assemblers. Follow for now. */
1517 case BFD_RELOC_ALPHA_BRSGP:
1518 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
1519 let it get resolved at assembly time. */
1521 symbolS *sym = f->fx_addsy;
1525 if (generic_force_reloc (f))
1528 switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD)
1530 case STO_ALPHA_NOPV:
1532 case STO_ALPHA_STD_GPLOAD:
1536 if (S_IS_LOCAL (sym))
1539 name = S_GET_NAME (sym);
1540 as_bad_where (f->fx_file, f->fx_line,
1541 _("!samegp reloc against symbol without .prologue: %s"),
1545 f->fx_r_type = BFD_RELOC_23_PCREL_S2;
1546 f->fx_offset += offset;
1557 /* Generate the BFD reloc to be stuck in the object file from the
1558 fixup used internally in the assembler. */
1561 tc_gen_reloc (sec, fixp)
1562 asection *sec ATTRIBUTE_UNUSED;
1567 reloc = (arelent *) xmalloc (sizeof (arelent));
1568 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1569 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1570 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1572 /* Make sure none of our internal relocations make it this far.
1573 They'd better have been fully resolved by this point. */
1574 assert ((int) fixp->fx_r_type > 0);
1576 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1577 if (reloc->howto == NULL)
1579 as_bad_where (fixp->fx_file, fixp->fx_line,
1580 _("cannot represent `%s' relocation in object file"),
1581 bfd_get_reloc_code_name (fixp->fx_r_type));
1585 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1587 as_fatal (_("internal error? cannot generate `%s' relocation"),
1588 bfd_get_reloc_code_name (fixp->fx_r_type));
1590 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1593 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
1595 /* Fake out bfd_perform_relocation. sigh. */
1596 reloc->addend = -alpha_gp_value;
1601 reloc->addend = fixp->fx_offset;
1603 /* Ohhh, this is ugly. The problem is that if this is a local global
1604 symbol, the relocation will entirely be performed at link time, not
1605 at assembly time. bfd_perform_reloc doesn't know about this sort
1606 of thing, and as a result we need to fake it out here. */
1607 if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
1608 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)
1609 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_THREAD_LOCAL))
1610 && !S_IS_COMMON (fixp->fx_addsy))
1611 reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
1618 /* Parse a register name off of the input_line and return a register
1619 number. Gets md_undefined_symbol above to do the register name
1622 Only called as a part of processing the ECOFF .frame directive. */
1625 tc_get_register (frame)
1626 int frame ATTRIBUTE_UNUSED;
1628 int framereg = AXP_REG_SP;
1631 if (*input_line_pointer == '$')
1633 char *s = input_line_pointer;
1634 char c = get_symbol_end ();
1635 symbolS *sym = md_undefined_symbol (s);
1637 *strchr (s, '\0') = c;
1638 if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
1641 as_warn (_("frame reg expected, using $%d."), framereg);
1644 note_gpreg (framereg);
1648 /* This is called before the symbol table is processed. In order to
1649 work with gcc when using mips-tfile, we must keep all local labels.
1650 However, in other cases, we want to discard them. If we were
1651 called with -g, but we didn't see any debugging information, it may
1652 mean that gcc is smuggling debugging information through to
1653 mips-tfile, in which case we must generate all local labels. */
1658 alpha_frob_file_before_adjust ()
1660 if (alpha_debug != 0
1661 && ! ecoff_debugging_seen)
1662 flag_keep_locals = 1;
1665 #endif /* OBJ_ECOFF */
1667 static struct alpha_reloc_tag *
1668 get_alpha_reloc_tag (sequence)
1671 char buffer[ALPHA_RELOC_DIGITS];
1672 struct alpha_reloc_tag *info;
1674 sprintf (buffer, "!%ld", sequence);
1676 info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
1679 size_t len = strlen (buffer);
1682 info = (struct alpha_reloc_tag *)
1683 xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
1685 info->segment = now_seg;
1686 info->sequence = sequence;
1687 strcpy (info->string, buffer);
1688 errmsg = hash_insert (alpha_literal_hash, info->string, (PTR) info);
1696 /* Before the relocations are written, reorder them, so that user
1697 supplied !lituse relocations follow the appropriate !literal
1698 relocations, and similarly for !gpdisp relocations. */
1703 if (alpha_literal_hash)
1704 bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL);
1708 alpha_adjust_relocs (abfd, sec, ptr)
1709 bfd *abfd ATTRIBUTE_UNUSED;
1711 PTR ptr ATTRIBUTE_UNUSED;
1713 segment_info_type *seginfo = seg_info (sec);
1719 /* If seginfo is NULL, we did not create this section; don't do
1720 anything with it. By using a pointer to a pointer, we can update
1721 the links in place. */
1722 if (seginfo == NULL)
1725 /* If there are no relocations, skip the section. */
1726 if (! seginfo->fix_root)
1729 /* First rebuild the fixup chain without the expicit lituse and
1730 gpdisp_lo16 relocs. */
1731 prevP = &seginfo->fix_root;
1732 for (fixp = seginfo->fix_root; fixp; fixp = next)
1734 next = fixp->fx_next;
1735 fixp->fx_next = (fixS *) 0;
1737 switch (fixp->fx_r_type)
1739 case BFD_RELOC_ALPHA_LITUSE:
1740 if (fixp->tc_fix_data.info->n_master == 0)
1741 as_bad_where (fixp->fx_file, fixp->fx_line,
1742 _("No !literal!%ld was found"),
1743 fixp->tc_fix_data.info->sequence);
1745 if (fixp->fx_offset == LITUSE_ALPHA_TLSGD)
1747 if (! fixp->tc_fix_data.info->saw_tlsgd)
1748 as_bad_where (fixp->fx_file, fixp->fx_line,
1749 _("No !tlsgd!%ld was found"),
1750 fixp->tc_fix_data.info->sequence);
1752 else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM)
1754 if (! fixp->tc_fix_data.info->saw_tlsldm)
1755 as_bad_where (fixp->fx_file, fixp->fx_line,
1756 _("No !tlsldm!%ld was found"),
1757 fixp->tc_fix_data.info->sequence);
1762 case BFD_RELOC_ALPHA_GPDISP_LO16:
1763 if (fixp->tc_fix_data.info->n_master == 0)
1764 as_bad_where (fixp->fx_file, fixp->fx_line,
1765 _("No ldah !gpdisp!%ld was found"),
1766 fixp->tc_fix_data.info->sequence);
1769 case BFD_RELOC_ALPHA_ELF_LITERAL:
1770 if (fixp->tc_fix_data.info
1771 && (fixp->tc_fix_data.info->saw_tlsgd
1772 || fixp->tc_fix_data.info->saw_tlsldm))
1778 prevP = &fixp->fx_next;
1783 /* Go back and re-chain dependent relocations. They are currently
1784 linked through the next_reloc field in reverse order, so as we
1785 go through the next_reloc chain, we effectively reverse the chain
1788 Except if there is more than one !literal for a given sequence
1789 number. In that case, the programmer and/or compiler is not sure
1790 how control flows from literal to lituse, and we can't be sure to
1791 get the relaxation correct.
1793 ??? Well, actually we could, if there are enough lituses such that
1794 we can make each literal have at least one of each lituse type
1795 present. Not implemented.
1797 Also suppress the optimization if the !literals/!lituses are spread
1798 in different segments. This can happen with "intersting" uses of
1799 inline assembly; examples are present in the Linux kernel semaphores. */
1801 for (fixp = seginfo->fix_root; fixp; fixp = next)
1803 next = fixp->fx_next;
1804 switch (fixp->fx_r_type)
1806 case BFD_RELOC_ALPHA_TLSGD:
1807 case BFD_RELOC_ALPHA_TLSLDM:
1808 if (!fixp->tc_fix_data.info)
1810 if (fixp->tc_fix_data.info->n_master == 0)
1812 else if (fixp->tc_fix_data.info->n_master > 1)
1814 as_bad_where (fixp->fx_file, fixp->fx_line,
1815 _("too many !literal!%ld for %s"),
1816 fixp->tc_fix_data.info->sequence,
1817 (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD
1818 ? "!tlsgd" : "!tlsldm"));
1822 fixp->tc_fix_data.info->master->fx_next = fixp->fx_next;
1823 fixp->fx_next = fixp->tc_fix_data.info->master;
1824 fixp = fixp->fx_next;
1827 case BFD_RELOC_ALPHA_ELF_LITERAL:
1828 if (fixp->tc_fix_data.info
1829 && fixp->tc_fix_data.info->n_master == 1
1830 && ! fixp->tc_fix_data.info->multi_section_p)
1832 for (slave = fixp->tc_fix_data.info->slaves;
1833 slave != (fixS *) 0;
1834 slave = slave->tc_fix_data.next_reloc)
1836 slave->fx_next = fixp->fx_next;
1837 fixp->fx_next = slave;
1842 case BFD_RELOC_ALPHA_GPDISP_HI16:
1843 if (fixp->tc_fix_data.info->n_slaves == 0)
1844 as_bad_where (fixp->fx_file, fixp->fx_line,
1845 _("No lda !gpdisp!%ld was found"),
1846 fixp->tc_fix_data.info->sequence);
1849 slave = fixp->tc_fix_data.info->slaves;
1850 slave->fx_next = next;
1851 fixp->fx_next = slave;
1863 debug_exp (tok, ntok)
1869 fprintf (stderr, "debug_exp: %d tokens", ntok);
1870 for (i = 0; i < ntok; i++)
1872 expressionS *t = &tok[i];
1877 default: name = "unknown"; break;
1878 case O_illegal: name = "O_illegal"; break;
1879 case O_absent: name = "O_absent"; break;
1880 case O_constant: name = "O_constant"; break;
1881 case O_symbol: name = "O_symbol"; break;
1882 case O_symbol_rva: name = "O_symbol_rva"; break;
1883 case O_register: name = "O_register"; break;
1884 case O_big: name = "O_big"; break;
1885 case O_uminus: name = "O_uminus"; break;
1886 case O_bit_not: name = "O_bit_not"; break;
1887 case O_logical_not: name = "O_logical_not"; break;
1888 case O_multiply: name = "O_multiply"; break;
1889 case O_divide: name = "O_divide"; break;
1890 case O_modulus: name = "O_modulus"; break;
1891 case O_left_shift: name = "O_left_shift"; break;
1892 case O_right_shift: name = "O_right_shift"; break;
1893 case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
1894 case O_bit_or_not: name = "O_bit_or_not"; break;
1895 case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
1896 case O_bit_and: name = "O_bit_and"; break;
1897 case O_add: name = "O_add"; break;
1898 case O_subtract: name = "O_subtract"; break;
1899 case O_eq: name = "O_eq"; break;
1900 case O_ne: name = "O_ne"; break;
1901 case O_lt: name = "O_lt"; break;
1902 case O_le: name = "O_le"; break;
1903 case O_ge: name = "O_ge"; break;
1904 case O_gt: name = "O_gt"; break;
1905 case O_logical_and: name = "O_logical_and"; break;
1906 case O_logical_or: name = "O_logical_or"; break;
1907 case O_index: name = "O_index"; break;
1908 case O_pregister: name = "O_pregister"; break;
1909 case O_cpregister: name = "O_cpregister"; break;
1910 case O_literal: name = "O_literal"; break;
1911 case O_lituse_addr: name = "O_lituse_addr"; break;
1912 case O_lituse_base: name = "O_lituse_base"; break;
1913 case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
1914 case O_lituse_jsr: name = "O_lituse_jsr"; break;
1915 case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break;
1916 case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break;
1917 case O_gpdisp: name = "O_gpdisp"; break;
1918 case O_gprelhigh: name = "O_gprelhigh"; break;
1919 case O_gprellow: name = "O_gprellow"; break;
1920 case O_gprel: name = "O_gprel"; break;
1921 case O_samegp: name = "O_samegp"; break;
1922 case O_tlsgd: name = "O_tlsgd"; break;
1923 case O_tlsldm: name = "O_tlsldm"; break;
1924 case O_gotdtprel: name = "O_gotdtprel"; break;
1925 case O_dtprelhi: name = "O_dtprelhi"; break;
1926 case O_dtprello: name = "O_dtprello"; break;
1927 case O_dtprel: name = "O_dtprel"; break;
1928 case O_gottprel: name = "O_gottprel"; break;
1929 case O_tprelhi: name = "O_tprelhi"; break;
1930 case O_tprello: name = "O_tprello"; break;
1931 case O_tprel: name = "O_tprel"; break;
1934 fprintf (stderr, ", %s(%s, %s, %d)", name,
1935 (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
1936 (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
1937 (int) t->X_add_number);
1939 fprintf (stderr, "\n");
1944 /* Parse the arguments to an opcode. */
1947 tokenize_arguments (str, tok, ntok)
1952 expressionS *end_tok = tok + ntok;
1953 char *old_input_line_pointer;
1954 int saw_comma = 0, saw_arg = 0;
1956 expressionS *orig_tok = tok;
1960 const struct alpha_reloc_op_tag *r;
1963 int reloc_found_p = 0;
1966 memset (tok, 0, sizeof (*tok) * ntok);
1968 /* Save and restore input_line_pointer around this function. */
1969 old_input_line_pointer = input_line_pointer;
1970 input_line_pointer = str;
1973 /* ??? Wrest control of ! away from the regular expression parser. */
1974 is_end_of_line[(unsigned char) '!'] = 1;
1977 while (tok < end_tok && *input_line_pointer)
1980 switch (*input_line_pointer)
1987 /* A relocation operand can be placed after the normal operand on an
1988 assembly language statement, and has the following form:
1989 !relocation_type!sequence_number. */
1992 /* Only support one relocation op per insn. */
1993 as_bad (_("More than one relocation op per insn"));
2000 ++input_line_pointer;
2002 p = input_line_pointer;
2003 c = get_symbol_end ();
2005 /* Parse !relocation_type. */
2006 len = input_line_pointer - p;
2009 as_bad (_("No relocation operand"));
2013 r = &alpha_reloc_op[0];
2014 for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
2015 if (len == r->length && memcmp (p, r->name, len) == 0)
2019 as_bad (_("Unknown relocation operand: !%s"), p);
2023 *input_line_pointer = c;
2025 if (*input_line_pointer != '!')
2029 as_bad (_("no sequence number after !%s"), p);
2033 tok->X_add_number = 0;
2039 as_bad (_("!%s does not use a sequence number"), p);
2043 input_line_pointer++;
2045 /* Parse !sequence_number. */
2047 if (tok->X_op != O_constant || tok->X_add_number <= 0)
2049 as_bad (_("Bad sequence number: !%s!%s"),
2050 r->name, input_line_pointer);
2059 #endif /* RELOC_OP_P */
2062 ++input_line_pointer;
2063 if (saw_comma || !saw_arg)
2070 char *hold = input_line_pointer++;
2072 /* First try for parenthesized register ... */
2074 if (*input_line_pointer == ')' && tok->X_op == O_register)
2076 tok->X_op = (saw_comma ? O_cpregister : O_pregister);
2079 ++input_line_pointer;
2084 /* ... then fall through to plain expression. */
2085 input_line_pointer = hold;
2089 if (saw_arg && !saw_comma)
2093 if (tok->X_op == O_illegal || tok->X_op == O_absent)
2106 input_line_pointer = old_input_line_pointer;
2109 debug_exp (orig_tok, ntok - (end_tok - tok));
2112 is_end_of_line[(unsigned char) '!'] = 0;
2115 return ntok - (end_tok - tok);
2119 is_end_of_line[(unsigned char) '!'] = 0;
2121 input_line_pointer = old_input_line_pointer;
2122 return TOKENIZE_ERROR;
2126 is_end_of_line[(unsigned char) '!'] = 0;
2128 input_line_pointer = old_input_line_pointer;
2129 return TOKENIZE_ERROR_REPORT;
2132 /* Search forward through all variants of an opcode looking for a
2135 static const struct alpha_opcode *
2136 find_opcode_match (first_opcode, tok, pntok, pcpumatch)
2137 const struct alpha_opcode *first_opcode;
2138 const expressionS *tok;
2142 const struct alpha_opcode *opcode = first_opcode;
2144 int got_cpu_match = 0;
2148 const unsigned char *opidx;
2151 /* Don't match opcodes that don't exist on this architecture. */
2152 if (!(opcode->flags & alpha_target))
2157 for (opidx = opcode->operands; *opidx; ++opidx)
2159 const struct alpha_operand *operand = &alpha_operands[*opidx];
2161 /* Only take input from real operands. */
2162 if (operand->flags & AXP_OPERAND_FAKE)
2165 /* When we expect input, make sure we have it. */
2168 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
2173 /* Match operand type with expression type. */
2174 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
2176 case AXP_OPERAND_IR:
2177 if (tok[tokidx].X_op != O_register
2178 || !is_ir_num (tok[tokidx].X_add_number))
2181 case AXP_OPERAND_FPR:
2182 if (tok[tokidx].X_op != O_register
2183 || !is_fpr_num (tok[tokidx].X_add_number))
2186 case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
2187 if (tok[tokidx].X_op != O_pregister
2188 || !is_ir_num (tok[tokidx].X_add_number))
2191 case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
2192 if (tok[tokidx].X_op != O_cpregister
2193 || !is_ir_num (tok[tokidx].X_add_number))
2197 case AXP_OPERAND_RELATIVE:
2198 case AXP_OPERAND_SIGNED:
2199 case AXP_OPERAND_UNSIGNED:
2200 switch (tok[tokidx].X_op)
2215 /* Everything else should have been fake. */
2221 /* Possible match -- did we use all of our input? */
2230 while (++opcode - alpha_opcodes < (int) alpha_num_opcodes
2231 && !strcmp (opcode->name, first_opcode->name));
2234 *pcpumatch = got_cpu_match;
2239 /* Search forward through all variants of a macro looking for a syntax
2242 static const struct alpha_macro *
2243 find_macro_match (first_macro, tok, pntok)
2244 const struct alpha_macro *first_macro;
2245 const expressionS *tok;
2248 const struct alpha_macro *macro = first_macro;
2253 const enum alpha_macro_arg *arg = macro->argsets;
2267 /* Index register. */
2269 if (tokidx >= ntok || tok[tokidx].X_op != O_register
2270 || !is_ir_num (tok[tokidx].X_add_number))
2275 /* Parenthesized index register. */
2277 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
2278 || !is_ir_num (tok[tokidx].X_add_number))
2283 /* Optional parenthesized index register. */
2285 if (tokidx < ntok && tok[tokidx].X_op == O_pregister
2286 && is_ir_num (tok[tokidx].X_add_number))
2290 /* Leading comma with a parenthesized index register. */
2292 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
2293 || !is_ir_num (tok[tokidx].X_add_number))
2298 /* Floating point register. */
2300 if (tokidx >= ntok || tok[tokidx].X_op != O_register
2301 || !is_fpr_num (tok[tokidx].X_add_number))
2306 /* Normal expression. */
2310 switch (tok[tokidx].X_op)
2319 case O_lituse_bytoff:
2335 while (*arg != MACRO_EOA)
2343 while (++macro - alpha_macros < (int) alpha_num_macros
2344 && !strcmp (macro->name, first_macro->name));
2349 /* Insert an operand value into an instruction. */
2352 insert_operand (insn, operand, val, file, line)
2354 const struct alpha_operand *operand;
2359 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
2363 if (operand->flags & AXP_OPERAND_SIGNED)
2365 max = (1 << (operand->bits - 1)) - 1;
2366 min = -(1 << (operand->bits - 1));
2370 max = (1 << operand->bits) - 1;
2374 if (val < min || val > max)
2377 _("operand out of range (%s not between %d and %d)");
2378 char buf[sizeof (val) * 3 + 2];
2380 sprint_value (buf, val);
2382 as_warn_where (file, line, err, buf, min, max);
2384 as_warn (err, buf, min, max);
2388 if (operand->insert)
2390 const char *errmsg = NULL;
2392 insn = (*operand->insert) (insn, val, &errmsg);
2397 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
2402 /* Turn an opcode description and a set of arguments into
2403 an instruction and a fixup. */
2406 assemble_insn (opcode, tok, ntok, insn, reloc)
2407 const struct alpha_opcode *opcode;
2408 const expressionS *tok;
2410 struct alpha_insn *insn;
2411 bfd_reloc_code_real_type reloc;
2413 const struct alpha_operand *reloc_operand = NULL;
2414 const expressionS *reloc_exp = NULL;
2415 const unsigned char *argidx;
2419 memset (insn, 0, sizeof (*insn));
2420 image = opcode->opcode;
2422 for (argidx = opcode->operands; *argidx; ++argidx)
2424 const struct alpha_operand *operand = &alpha_operands[*argidx];
2425 const expressionS *t = (const expressionS *) 0;
2427 if (operand->flags & AXP_OPERAND_FAKE)
2429 /* fake operands take no value and generate no fixup */
2430 image = insert_operand (image, operand, 0, NULL, 0);
2436 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
2438 case AXP_OPERAND_DEFAULT_FIRST:
2441 case AXP_OPERAND_DEFAULT_SECOND:
2444 case AXP_OPERAND_DEFAULT_ZERO:
2446 static expressionS zero_exp;
2448 zero_exp.X_op = O_constant;
2449 zero_exp.X_unsigned = 1;
2464 image = insert_operand (image, operand, regno (t->X_add_number),
2469 image = insert_operand (image, operand, t->X_add_number, NULL, 0);
2470 assert (reloc_operand == NULL);
2471 reloc_operand = operand;
2476 /* This is only 0 for fields that should contain registers,
2477 which means this pattern shouldn't have matched. */
2478 if (operand->default_reloc == 0)
2481 /* There is one special case for which an insn receives two
2482 relocations, and thus the user-supplied reloc does not
2483 override the operand reloc. */
2484 if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
2486 struct alpha_fixup *fixup;
2488 if (insn->nfixups >= MAX_INSN_FIXUPS)
2489 as_fatal (_("too many fixups"));
2491 fixup = &insn->fixups[insn->nfixups++];
2493 fixup->reloc = BFD_RELOC_ALPHA_HINT;
2497 if (reloc == BFD_RELOC_UNUSED)
2498 reloc = operand->default_reloc;
2500 assert (reloc_operand == NULL);
2501 reloc_operand = operand;
2508 if (reloc != BFD_RELOC_UNUSED)
2510 struct alpha_fixup *fixup;
2512 if (insn->nfixups >= MAX_INSN_FIXUPS)
2513 as_fatal (_("too many fixups"));
2515 /* ??? My but this is hacky. But the OSF/1 assembler uses the same
2516 relocation tag for both ldah and lda with gpdisp. Choose the
2517 correct internal relocation based on the opcode. */
2518 if (reloc == BFD_RELOC_ALPHA_GPDISP)
2520 if (strcmp (opcode->name, "ldah") == 0)
2521 reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2522 else if (strcmp (opcode->name, "lda") == 0)
2523 reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2525 as_bad (_("invalid relocation for instruction"));
2528 /* If this is a real relocation (as opposed to a lituse hint), then
2529 the relocation width should match the operand width. */
2530 else if (reloc < BFD_RELOC_UNUSED)
2532 reloc_howto_type *reloc_howto
2533 = bfd_reloc_type_lookup (stdoutput, reloc);
2534 if (reloc_howto->bitsize != reloc_operand->bits)
2536 as_bad (_("invalid relocation for field"));
2541 fixup = &insn->fixups[insn->nfixups++];
2543 fixup->exp = *reloc_exp;
2545 fixup->exp.X_op = O_absent;
2546 fixup->reloc = reloc;
2552 /* Actually output an instruction with its fixup. */
2556 struct alpha_insn *insn;
2561 /* Take care of alignment duties. */
2562 if (alpha_auto_align_on && alpha_current_align < 2)
2563 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
2564 if (alpha_current_align > 2)
2565 alpha_current_align = 2;
2566 alpha_insn_label = NULL;
2568 /* Write out the instruction. */
2570 md_number_to_chars (f, insn->insn, 4);
2573 dwarf2_emit_insn (4);
2576 /* Apply the fixups in order. */
2577 for (i = 0; i < insn->nfixups; ++i)
2579 const struct alpha_operand *operand = (const struct alpha_operand *) 0;
2580 struct alpha_fixup *fixup = &insn->fixups[i];
2581 struct alpha_reloc_tag *info = NULL;
2585 /* Some fixups are only used internally and so have no howto. */
2586 if ((int) fixup->reloc < 0)
2588 operand = &alpha_operands[-(int) fixup->reloc];
2590 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
2592 else if (fixup->reloc > BFD_RELOC_UNUSED
2593 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
2594 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
2601 reloc_howto_type *reloc_howto
2602 = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
2603 assert (reloc_howto);
2605 size = bfd_get_reloc_size (reloc_howto);
2606 assert (size >= 1 && size <= 4);
2608 pcrel = reloc_howto->pc_relative;
2611 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
2612 &fixup->exp, pcrel, fixup->reloc);
2614 /* Turn off complaints that the addend is too large for some fixups,
2615 and copy in the sequence number for the explicit relocations. */
2616 switch (fixup->reloc)
2618 case BFD_RELOC_ALPHA_HINT:
2619 case BFD_RELOC_GPREL32:
2620 case BFD_RELOC_GPREL16:
2621 case BFD_RELOC_ALPHA_GPREL_HI16:
2622 case BFD_RELOC_ALPHA_GPREL_LO16:
2623 case BFD_RELOC_ALPHA_GOTDTPREL16:
2624 case BFD_RELOC_ALPHA_DTPREL_HI16:
2625 case BFD_RELOC_ALPHA_DTPREL_LO16:
2626 case BFD_RELOC_ALPHA_DTPREL16:
2627 case BFD_RELOC_ALPHA_GOTTPREL16:
2628 case BFD_RELOC_ALPHA_TPREL_HI16:
2629 case BFD_RELOC_ALPHA_TPREL_LO16:
2630 case BFD_RELOC_ALPHA_TPREL16:
2631 fixP->fx_no_overflow = 1;
2634 case BFD_RELOC_ALPHA_GPDISP_HI16:
2635 fixP->fx_no_overflow = 1;
2636 fixP->fx_addsy = section_symbol (now_seg);
2637 fixP->fx_offset = 0;
2639 info = get_alpha_reloc_tag (insn->sequence);
2640 if (++info->n_master > 1)
2641 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
2642 if (info->segment != now_seg)
2643 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2645 fixP->tc_fix_data.info = info;
2648 case BFD_RELOC_ALPHA_GPDISP_LO16:
2649 fixP->fx_no_overflow = 1;
2651 info = get_alpha_reloc_tag (insn->sequence);
2652 if (++info->n_slaves > 1)
2653 as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
2654 if (info->segment != now_seg)
2655 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2657 fixP->tc_fix_data.info = info;
2658 info->slaves = fixP;
2661 case BFD_RELOC_ALPHA_LITERAL:
2662 case BFD_RELOC_ALPHA_ELF_LITERAL:
2663 fixP->fx_no_overflow = 1;
2665 if (insn->sequence == 0)
2667 info = get_alpha_reloc_tag (insn->sequence);
2668 info->master = fixP;
2670 if (info->segment != now_seg)
2671 info->multi_section_p = 1;
2672 fixP->tc_fix_data.info = info;
2676 case DUMMY_RELOC_LITUSE_ADDR:
2677 fixP->fx_offset = LITUSE_ALPHA_ADDR;
2679 case DUMMY_RELOC_LITUSE_BASE:
2680 fixP->fx_offset = LITUSE_ALPHA_BASE;
2682 case DUMMY_RELOC_LITUSE_BYTOFF:
2683 fixP->fx_offset = LITUSE_ALPHA_BYTOFF;
2685 case DUMMY_RELOC_LITUSE_JSR:
2686 fixP->fx_offset = LITUSE_ALPHA_JSR;
2688 case DUMMY_RELOC_LITUSE_TLSGD:
2689 fixP->fx_offset = LITUSE_ALPHA_TLSGD;
2691 case DUMMY_RELOC_LITUSE_TLSLDM:
2692 fixP->fx_offset = LITUSE_ALPHA_TLSLDM;
2695 fixP->fx_addsy = section_symbol (now_seg);
2696 fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
2698 info = get_alpha_reloc_tag (insn->sequence);
2699 if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD)
2700 info->saw_lu_tlsgd = 1;
2701 else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM)
2702 info->saw_lu_tlsldm = 1;
2703 if (++info->n_slaves > 1)
2705 if (info->saw_lu_tlsgd)
2706 as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
2708 else if (info->saw_lu_tlsldm)
2709 as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
2712 fixP->tc_fix_data.info = info;
2713 fixP->tc_fix_data.next_reloc = info->slaves;
2714 info->slaves = fixP;
2715 if (info->segment != now_seg)
2716 info->multi_section_p = 1;
2719 case BFD_RELOC_ALPHA_TLSGD:
2720 fixP->fx_no_overflow = 1;
2722 if (insn->sequence == 0)
2724 info = get_alpha_reloc_tag (insn->sequence);
2725 if (info->saw_tlsgd)
2726 as_bad (_("duplicate !tlsgd!%ld"), insn->sequence);
2727 else if (info->saw_tlsldm)
2728 as_bad (_("sequence number in use for !tlsldm!%ld"),
2731 info->saw_tlsgd = 1;
2732 fixP->tc_fix_data.info = info;
2735 case BFD_RELOC_ALPHA_TLSLDM:
2736 fixP->fx_no_overflow = 1;
2738 if (insn->sequence == 0)
2740 info = get_alpha_reloc_tag (insn->sequence);
2741 if (info->saw_tlsldm)
2742 as_bad (_("duplicate !tlsldm!%ld"), insn->sequence);
2743 else if (info->saw_tlsgd)
2744 as_bad (_("sequence number in use for !tlsgd!%ld"),
2747 info->saw_tlsldm = 1;
2748 fixP->tc_fix_data.info = info;
2752 if ((int) fixup->reloc < 0)
2754 if (operand->flags & AXP_OPERAND_NOOVERFLOW)
2755 fixP->fx_no_overflow = 1;
2762 /* Given an opcode name and a pre-tokenized set of arguments, assemble
2763 the insn, but do not emit it.
2765 Note that this implies no macros allowed, since we can't store more
2766 than one insn in an insn structure. */
2769 assemble_tokens_to_insn (opname, tok, ntok, insn)
2771 const expressionS *tok;
2773 struct alpha_insn *insn;
2775 const struct alpha_opcode *opcode;
2777 /* search opcodes */
2778 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2782 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2785 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
2789 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2791 as_bad (_("opcode `%s' not supported for target %s"), opname,
2795 as_bad (_("unknown opcode `%s'"), opname);
2798 /* Given an opcode name and a pre-tokenized set of arguments, take the
2799 opcode all the way through emission. */
2802 assemble_tokens (opname, tok, ntok, local_macros_on)
2804 const expressionS *tok;
2806 int local_macros_on;
2808 int found_something = 0;
2809 const struct alpha_opcode *opcode;
2810 const struct alpha_macro *macro;
2812 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2815 /* If a user-specified relocation is present, this is not a macro. */
2816 if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
2818 reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
2823 if (local_macros_on)
2825 macro = ((const struct alpha_macro *)
2826 hash_find (alpha_macro_hash, opname));
2829 found_something = 1;
2830 macro = find_macro_match (macro, tok, &ntok);
2833 (*macro->emit) (tok, ntok, macro->arg);
2839 /* Search opcodes. */
2840 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2843 found_something = 1;
2844 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2847 struct alpha_insn insn;
2848 assemble_insn (opcode, tok, ntok, &insn, reloc);
2850 /* Copy the sequence number for the reloc from the reloc token. */
2851 if (reloc != BFD_RELOC_UNUSED)
2852 insn.sequence = tok[ntok].X_add_number;
2859 if (found_something)
2862 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2864 as_bad (_("opcode `%s' not supported for target %s"), opname,
2868 as_bad (_("unknown opcode `%s'"), opname);
2871 /* Some instruction sets indexed by lg(size). */
2872 static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
2873 static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
2874 static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
2875 static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
2876 static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
2877 static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
2878 static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
2879 static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
2880 static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
2882 /* Implement the ldgp macro. */
2885 emit_ldgp (tok, ntok, unused)
2886 const expressionS *tok;
2887 int ntok ATTRIBUTE_UNUSED;
2888 const PTR unused ATTRIBUTE_UNUSED;
2893 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2894 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2895 with appropriate constants and relocations. */
2896 struct alpha_insn insn;
2897 expressionS newtok[3];
2901 if (regno (tok[2].X_add_number) == AXP_REG_PV)
2902 ecoff_set_gp_prolog_size (0);
2906 set_tok_const (newtok[1], 0);
2909 assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
2914 if (addend.X_op != O_constant)
2915 as_bad (_("can not resolve expression"));
2916 addend.X_op = O_symbol;
2917 addend.X_add_symbol = alpha_gp_symbol;
2921 insn.fixups[0].exp = addend;
2922 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2923 insn.sequence = next_sequence_num;
2927 set_tok_preg (newtok[2], tok[0].X_add_number);
2929 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2932 addend.X_add_number += 4;
2936 insn.fixups[0].exp = addend;
2937 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2938 insn.sequence = next_sequence_num--;
2941 #endif /* OBJ_ECOFF || OBJ_ELF */
2946 /* Add symbol+addend to link pool.
2947 Return offset from basesym to entry in link pool.
2949 Add new fixup only if offset isn't 16bit. */
2952 add_to_link_pool (basesym, sym, addend)
2957 segT current_section = now_seg;
2958 int current_subsec = now_subseg;
2960 bfd_reloc_code_real_type reloc_type;
2962 segment_info_type *seginfo = seg_info (alpha_link_section);
2965 offset = - *symbol_get_obj (basesym);
2967 /* @@ This assumes all entries in a given section will be of the same
2968 size... Probably correct, but unwise to rely on. */
2969 /* This must always be called with the same subsegment. */
2971 if (seginfo->frchainP)
2972 for (fixp = seginfo->frchainP->fix_root;
2973 fixp != (fixS *) NULL;
2974 fixp = fixp->fx_next, offset += 8)
2976 if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
2978 if (range_signed_16 (offset))
2985 /* Not found in 16bit signed range. */
2987 subseg_set (alpha_link_section, 0);
2991 fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
2994 subseg_set (current_section, current_subsec);
2995 seginfo->literal_pool_size += 8;
2999 #endif /* OBJ_EVAX */
3001 /* Load a (partial) expression into a target register.
3003 If poffset is not null, after the call it will either contain
3004 O_constant 0, or a 16-bit offset appropriate for any MEM format
3005 instruction. In addition, pbasereg will be modified to point to
3006 the base register to use in that MEM format instruction.
3008 In any case, *pbasereg should contain a base register to add to the
3009 expression. This will normally be either AXP_REG_ZERO or
3010 alpha_gp_register. Symbol addresses will always be loaded via $gp,
3011 so "foo($0)" is interpreted as adding the address of foo to $0;
3012 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
3013 but this is what OSF/1 does.
3015 If explicit relocations of the form !literal!<number> are allowed,
3016 and used, then explict_reloc with be an expression pointer.
3018 Finally, the return value is nonzero if the calling macro may emit
3019 a LITUSE reloc if otherwise appropriate; the return value is the
3020 sequence number to use. */
3023 load_expression (targreg, exp, pbasereg, poffset)
3025 const expressionS *exp;
3027 expressionS *poffset;
3029 long emit_lituse = 0;
3030 offsetT addend = exp->X_add_number;
3031 int basereg = *pbasereg;
3032 struct alpha_insn insn;
3033 expressionS newtok[3];
3042 /* Attempt to reduce .lit load by splitting the offset from
3043 its symbol when possible, but don't create a situation in
3045 if (!range_signed_32 (addend) &&
3046 (alpha_noat_on || targreg == AXP_REG_AT))
3048 lit = add_to_literal_pool (exp->X_add_symbol, addend,
3049 alpha_lita_section, 8);
3054 lit = add_to_literal_pool (exp->X_add_symbol, 0,
3055 alpha_lita_section, 8);
3059 as_fatal (_("overflow in literal (.lita) table"));
3061 /* emit "ldq r, lit(gp)" */
3063 if (basereg != alpha_gp_register && targreg == basereg)
3066 as_bad (_("macro requires $at register while noat in effect"));
3067 if (targreg == AXP_REG_AT)
3068 as_bad (_("macro requires $at while $at in use"));
3070 set_tok_reg (newtok[0], AXP_REG_AT);
3073 set_tok_reg (newtok[0], targreg);
3074 set_tok_sym (newtok[1], alpha_lita_symbol, lit);
3075 set_tok_preg (newtok[2], alpha_gp_register);
3077 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3079 assert (insn.nfixups == 1);
3080 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
3081 insn.sequence = emit_lituse = next_sequence_num--;
3082 #endif /* OBJ_ECOFF */
3084 /* emit "ldq r, gotoff(gp)" */
3086 if (basereg != alpha_gp_register && targreg == basereg)
3089 as_bad (_("macro requires $at register while noat in effect"));
3090 if (targreg == AXP_REG_AT)
3091 as_bad (_("macro requires $at while $at in use"));
3093 set_tok_reg (newtok[0], AXP_REG_AT);
3096 set_tok_reg (newtok[0], targreg);
3098 /* XXX: Disable this .got minimizing optimization so that we can get
3099 better instruction offset knowledge in the compiler. This happens
3100 very infrequently anyway. */
3102 || (!range_signed_32 (addend)
3103 && (alpha_noat_on || targreg == AXP_REG_AT)))
3110 set_tok_sym (newtok[1], exp->X_add_symbol, 0);
3113 set_tok_preg (newtok[2], alpha_gp_register);
3115 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3117 assert (insn.nfixups == 1);
3118 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
3119 insn.sequence = emit_lituse = next_sequence_num--;
3120 #endif /* OBJ_ELF */
3124 /* Find symbol or symbol pointer in link section. */
3126 if (exp->X_add_symbol == alpha_evax_proc.symbol)
3128 if (range_signed_16 (addend))
3130 set_tok_reg (newtok[0], targreg);
3131 set_tok_const (newtok[1], addend);
3132 set_tok_preg (newtok[2], basereg);
3133 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
3138 set_tok_reg (newtok[0], targreg);
3139 set_tok_const (newtok[1], 0);
3140 set_tok_preg (newtok[2], basereg);
3141 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
3146 if (!range_signed_32 (addend))
3148 link = add_to_link_pool (alpha_evax_proc.symbol,
3149 exp->X_add_symbol, addend);
3154 link = add_to_link_pool (alpha_evax_proc.symbol,
3155 exp->X_add_symbol, 0);
3157 set_tok_reg (newtok[0], targreg);
3158 set_tok_const (newtok[1], link);
3159 set_tok_preg (newtok[2], basereg);
3160 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3162 #endif /* OBJ_EVAX */
3167 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
3169 /* emit "addq r, base, r" */
3171 set_tok_reg (newtok[1], basereg);
3172 set_tok_reg (newtok[2], targreg);
3173 assemble_tokens ("addq", newtok, 3, 0);
3185 /* Assume that this difference expression will be resolved to an
3186 absolute value and that that value will fit in 16 bits. */
3188 set_tok_reg (newtok[0], targreg);
3190 set_tok_preg (newtok[2], basereg);
3191 assemble_tokens ("lda", newtok, 3, 0);
3194 set_tok_const (*poffset, 0);
3198 if (exp->X_add_number > 0)
3199 as_bad (_("bignum invalid; zero assumed"));
3201 as_bad (_("floating point number invalid; zero assumed"));
3206 as_bad (_("can't handle expression"));
3211 if (!range_signed_32 (addend))
3214 long seq_num = next_sequence_num--;
3216 /* For 64-bit addends, just put it in the literal pool. */
3219 /* emit "ldq targreg, lit(basereg)" */
3220 lit = add_to_link_pool (alpha_evax_proc.symbol,
3221 section_symbol (absolute_section), addend);
3222 set_tok_reg (newtok[0], targreg);
3223 set_tok_const (newtok[1], lit);
3224 set_tok_preg (newtok[2], alpha_gp_register);
3225 assemble_tokens ("ldq", newtok, 3, 0);
3228 if (alpha_lit8_section == NULL)
3230 create_literal_section (".lit8",
3231 &alpha_lit8_section,
3232 &alpha_lit8_symbol);
3235 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
3236 alpha_lita_section, 8);
3237 if (alpha_lit8_literal >= 0x8000)
3238 as_fatal (_("overflow in literal (.lita) table"));
3242 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
3244 as_fatal (_("overflow in literal (.lit8) table"));
3246 /* emit "lda litreg, .lit8+0x8000" */
3248 if (targreg == basereg)
3251 as_bad (_("macro requires $at register while noat in effect"));
3252 if (targreg == AXP_REG_AT)
3253 as_bad (_("macro requires $at while $at in use"));
3255 set_tok_reg (newtok[0], AXP_REG_AT);
3258 set_tok_reg (newtok[0], targreg);
3260 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
3263 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
3265 set_tok_preg (newtok[2], alpha_gp_register);
3267 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3269 assert (insn.nfixups == 1);
3271 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
3274 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
3276 insn.sequence = seq_num;
3280 /* emit "ldq litreg, lit(litreg)" */
3282 set_tok_const (newtok[1], lit);
3283 set_tok_preg (newtok[2], newtok[0].X_add_number);
3285 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3287 assert (insn.nfixups < MAX_INSN_FIXUPS);
3288 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3289 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3291 insn.sequence = seq_num;
3296 /* emit "addq litreg, base, target" */
3298 if (basereg != AXP_REG_ZERO)
3300 set_tok_reg (newtok[1], basereg);
3301 set_tok_reg (newtok[2], targreg);
3302 assemble_tokens ("addq", newtok, 3, 0);
3304 #endif /* !OBJ_EVAX */
3307 set_tok_const (*poffset, 0);
3308 *pbasereg = targreg;
3312 offsetT low, high, extra, tmp;
3314 /* for 32-bit operands, break up the addend */
3316 low = sign_extend_16 (addend);
3318 high = sign_extend_16 (tmp >> 16);
3320 if (tmp - (high << 16))
3324 high = sign_extend_16 (tmp >> 16);
3329 set_tok_reg (newtok[0], targreg);
3330 set_tok_preg (newtok[2], basereg);
3334 /* emit "ldah r, extra(r) */
3335 set_tok_const (newtok[1], extra);
3336 assemble_tokens ("ldah", newtok, 3, 0);
3337 set_tok_preg (newtok[2], basereg = targreg);
3342 /* emit "ldah r, high(r) */
3343 set_tok_const (newtok[1], high);
3344 assemble_tokens ("ldah", newtok, 3, 0);
3346 set_tok_preg (newtok[2], basereg);
3349 if ((low && !poffset) || (!poffset && basereg != targreg))
3351 /* emit "lda r, low(base)" */
3352 set_tok_const (newtok[1], low);
3353 assemble_tokens ("lda", newtok, 3, 0);
3359 set_tok_const (*poffset, low);
3360 *pbasereg = basereg;
3366 /* The lda macro differs from the lda instruction in that it handles
3367 most simple expressions, particualrly symbol address loads and
3371 emit_lda (tok, ntok, unused)
3372 const expressionS *tok;
3374 const PTR unused ATTRIBUTE_UNUSED;
3379 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3381 basereg = tok[2].X_add_number;
3383 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
3386 /* The ldah macro differs from the ldah instruction in that it has $31
3387 as an implied base register. */
3390 emit_ldah (tok, ntok, unused)
3391 const expressionS *tok;
3392 int ntok ATTRIBUTE_UNUSED;
3393 const PTR unused ATTRIBUTE_UNUSED;
3395 expressionS newtok[3];
3399 set_tok_preg (newtok[2], AXP_REG_ZERO);
3401 assemble_tokens ("ldah", newtok, 3, 0);
3404 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
3405 etc. They differ from the real instructions in that they do simple
3406 expressions like the lda macro. */
3409 emit_ir_load (tok, ntok, opname)
3410 const expressionS *tok;
3416 expressionS newtok[3];
3417 struct alpha_insn insn;
3420 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3422 basereg = tok[2].X_add_number;
3424 lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
3428 set_tok_preg (newtok[2], basereg);
3430 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
3434 assert (insn.nfixups < MAX_INSN_FIXUPS);
3435 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3436 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3438 insn.sequence = lituse;
3444 /* Handle fp register loads, and both integer and fp register stores.
3445 Again, we handle simple expressions. */
3448 emit_loadstore (tok, ntok, opname)
3449 const expressionS *tok;
3455 expressionS newtok[3];
3456 struct alpha_insn insn;
3459 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3461 basereg = tok[2].X_add_number;
3463 if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
3466 as_bad (_("macro requires $at register while noat in effect"));
3468 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
3477 set_tok_preg (newtok[2], basereg);
3479 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
3483 assert (insn.nfixups < MAX_INSN_FIXUPS);
3484 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3485 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3487 insn.sequence = lituse;
3493 /* Load a half-word or byte as an unsigned value. */
3496 emit_ldXu (tok, ntok, vlgsize)
3497 const expressionS *tok;
3501 if (alpha_target & AXP_OPCODE_BWX)
3502 emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
3505 expressionS newtok[3];
3506 struct alpha_insn insn;
3511 as_bad (_("macro requires $at register while noat in effect"));
3514 basereg = (tok[1].X_op == O_constant
3515 ? AXP_REG_ZERO : alpha_gp_register);
3517 basereg = tok[2].X_add_number;
3519 /* emit "lda $at, exp" */
3521 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
3523 /* emit "ldq_u targ, 0($at)" */
3526 set_tok_const (newtok[1], 0);
3527 set_tok_preg (newtok[2], basereg);
3528 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3532 assert (insn.nfixups < MAX_INSN_FIXUPS);
3533 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3534 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3536 insn.sequence = lituse;
3541 /* emit "extXl targ, $at, targ" */
3543 set_tok_reg (newtok[1], basereg);
3544 newtok[2] = newtok[0];
3545 assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
3549 assert (insn.nfixups < MAX_INSN_FIXUPS);
3550 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3551 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3553 insn.sequence = lituse;
3560 /* Load a half-word or byte as a signed value. */
3563 emit_ldX (tok, ntok, vlgsize)
3564 const expressionS *tok;
3568 emit_ldXu (tok, ntok, vlgsize);
3569 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
3572 /* Load an integral value from an unaligned address as an unsigned
3576 emit_uldXu (tok, ntok, vlgsize)
3577 const expressionS *tok;
3581 long lgsize = (long) vlgsize;
3582 expressionS newtok[3];
3585 as_bad (_("macro requires $at register while noat in effect"));
3587 /* emit "lda $at, exp" */
3589 memcpy (newtok, tok, sizeof (expressionS) * ntok);
3590 newtok[0].X_add_number = AXP_REG_AT;
3591 assemble_tokens ("lda", newtok, ntok, 1);
3593 /* emit "ldq_u $t9, 0($at)" */
3595 set_tok_reg (newtok[0], AXP_REG_T9);
3596 set_tok_const (newtok[1], 0);
3597 set_tok_preg (newtok[2], AXP_REG_AT);
3598 assemble_tokens ("ldq_u", newtok, 3, 1);
3600 /* emit "ldq_u $t10, size-1($at)" */
3602 set_tok_reg (newtok[0], AXP_REG_T10);
3603 set_tok_const (newtok[1], (1 << lgsize) - 1);
3604 assemble_tokens ("ldq_u", newtok, 3, 1);
3606 /* emit "extXl $t9, $at, $t9" */
3608 set_tok_reg (newtok[0], AXP_REG_T9);
3609 set_tok_reg (newtok[1], AXP_REG_AT);
3610 set_tok_reg (newtok[2], AXP_REG_T9);
3611 assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
3613 /* emit "extXh $t10, $at, $t10" */
3615 set_tok_reg (newtok[0], AXP_REG_T10);
3616 set_tok_reg (newtok[2], AXP_REG_T10);
3617 assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
3619 /* emit "or $t9, $t10, targ" */
3621 set_tok_reg (newtok[0], AXP_REG_T9);
3622 set_tok_reg (newtok[1], AXP_REG_T10);
3624 assemble_tokens ("or", newtok, 3, 1);
3627 /* Load an integral value from an unaligned address as a signed value.
3628 Note that quads should get funneled to the unsigned load since we
3629 don't have to do the sign extension. */
3632 emit_uldX (tok, ntok, vlgsize)
3633 const expressionS *tok;
3637 emit_uldXu (tok, ntok, vlgsize);
3638 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
3641 /* Implement the ldil macro. */
3644 emit_ldil (tok, ntok, unused)
3645 const expressionS *tok;
3647 const PTR unused ATTRIBUTE_UNUSED;
3649 expressionS newtok[2];
3651 memcpy (newtok, tok, sizeof (newtok));
3652 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
3654 assemble_tokens ("lda", newtok, ntok, 1);
3657 /* Store a half-word or byte. */
3660 emit_stX (tok, ntok, vlgsize)
3661 const expressionS *tok;
3665 int lgsize = (int) (long) vlgsize;
3667 if (alpha_target & AXP_OPCODE_BWX)
3668 emit_loadstore (tok, ntok, stX_op[lgsize]);
3671 expressionS newtok[3];
3672 struct alpha_insn insn;
3677 as_bad (_("macro requires $at register while noat in effect"));
3680 basereg = (tok[1].X_op == O_constant
3681 ? AXP_REG_ZERO : alpha_gp_register);
3683 basereg = tok[2].X_add_number;
3685 /* emit "lda $at, exp" */
3687 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
3689 /* emit "ldq_u $t9, 0($at)" */
3691 set_tok_reg (newtok[0], AXP_REG_T9);
3692 set_tok_const (newtok[1], 0);
3693 set_tok_preg (newtok[2], basereg);
3694 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3698 assert (insn.nfixups < MAX_INSN_FIXUPS);
3699 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3700 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3702 insn.sequence = lituse;
3707 /* emit "insXl src, $at, $t10" */
3710 set_tok_reg (newtok[1], basereg);
3711 set_tok_reg (newtok[2], AXP_REG_T10);
3712 assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
3716 assert (insn.nfixups < MAX_INSN_FIXUPS);
3717 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3718 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3720 insn.sequence = lituse;
3725 /* emit "mskXl $t9, $at, $t9" */
3727 set_tok_reg (newtok[0], AXP_REG_T9);
3728 newtok[2] = newtok[0];
3729 assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
3733 assert (insn.nfixups < MAX_INSN_FIXUPS);
3734 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3735 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3737 insn.sequence = lituse;
3742 /* emit "or $t9, $t10, $t9" */
3744 set_tok_reg (newtok[1], AXP_REG_T10);
3745 assemble_tokens ("or", newtok, 3, 1);
3747 /* emit "stq_u $t9, 0($at) */
3749 set_tok_const(newtok[1], 0);
3750 set_tok_preg (newtok[2], AXP_REG_AT);
3751 assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
3755 assert (insn.nfixups < MAX_INSN_FIXUPS);
3756 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3757 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3759 insn.sequence = lituse;
3766 /* Store an integer to an unaligned address. */
3769 emit_ustX (tok, ntok, vlgsize)
3770 const expressionS *tok;
3774 int lgsize = (int) (long) vlgsize;
3775 expressionS newtok[3];
3777 /* emit "lda $at, exp" */
3779 memcpy (newtok, tok, sizeof (expressionS) * ntok);
3780 newtok[0].X_add_number = AXP_REG_AT;
3781 assemble_tokens ("lda", newtok, ntok, 1);
3783 /* emit "ldq_u $9, 0($at)" */
3785 set_tok_reg (newtok[0], AXP_REG_T9);
3786 set_tok_const (newtok[1], 0);
3787 set_tok_preg (newtok[2], AXP_REG_AT);
3788 assemble_tokens ("ldq_u", newtok, 3, 1);
3790 /* emit "ldq_u $10, size-1($at)" */
3792 set_tok_reg (newtok[0], AXP_REG_T10);
3793 set_tok_const (newtok[1], (1 << lgsize) - 1);
3794 assemble_tokens ("ldq_u", newtok, 3, 1);
3796 /* emit "insXl src, $at, $t11" */
3799 set_tok_reg (newtok[1], AXP_REG_AT);
3800 set_tok_reg (newtok[2], AXP_REG_T11);
3801 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
3803 /* emit "insXh src, $at, $t12" */
3805 set_tok_reg (newtok[2], AXP_REG_T12);
3806 assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
3808 /* emit "mskXl $t9, $at, $t9" */
3810 set_tok_reg (newtok[0], AXP_REG_T9);
3811 newtok[2] = newtok[0];
3812 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
3814 /* emit "mskXh $t10, $at, $t10" */
3816 set_tok_reg (newtok[0], AXP_REG_T10);
3817 newtok[2] = newtok[0];
3818 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
3820 /* emit "or $t9, $t11, $t9" */
3822 set_tok_reg (newtok[0], AXP_REG_T9);
3823 set_tok_reg (newtok[1], AXP_REG_T11);
3824 newtok[2] = newtok[0];
3825 assemble_tokens ("or", newtok, 3, 1);
3827 /* emit "or $t10, $t12, $t10" */
3829 set_tok_reg (newtok[0], AXP_REG_T10);
3830 set_tok_reg (newtok[1], AXP_REG_T12);
3831 newtok[2] = newtok[0];
3832 assemble_tokens ("or", newtok, 3, 1);
3834 /* emit "stq_u $t9, 0($at)" */
3836 set_tok_reg (newtok[0], AXP_REG_T9);
3837 set_tok_const (newtok[1], 0);
3838 set_tok_preg (newtok[2], AXP_REG_AT);
3839 assemble_tokens ("stq_u", newtok, 3, 1);
3841 /* emit "stq_u $t10, size-1($at)" */
3843 set_tok_reg (newtok[0], AXP_REG_T10);
3844 set_tok_const (newtok[1], (1 << lgsize) - 1);
3845 assemble_tokens ("stq_u", newtok, 3, 1);
3848 /* Sign extend a half-word or byte. The 32-bit sign extend is
3849 implemented as "addl $31, $r, $t" in the opcode table. */
3852 emit_sextX (tok, ntok, vlgsize)
3853 const expressionS *tok;
3857 long lgsize = (long) vlgsize;
3859 if (alpha_target & AXP_OPCODE_BWX)
3860 assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
3863 int bitshift = 64 - 8 * (1 << lgsize);
3864 expressionS newtok[3];
3866 /* emit "sll src,bits,dst" */
3869 set_tok_const (newtok[1], bitshift);
3870 newtok[2] = tok[ntok - 1];
3871 assemble_tokens ("sll", newtok, 3, 1);
3873 /* emit "sra dst,bits,dst" */
3875 newtok[0] = newtok[2];
3876 assemble_tokens ("sra", newtok, 3, 1);
3880 /* Implement the division and modulus macros. */
3884 /* Make register usage like in normal procedure call.
3885 Don't clobber PV and RA. */
3888 emit_division (tok, ntok, symname)
3889 const expressionS *tok;
3893 /* DIVISION and MODULUS. Yech.
3898 mov x,R16 # if x != R16
3899 mov y,R17 # if y != R17
3904 with appropriate optimizations if R0,R16,R17 are the registers
3905 specified by the compiler. */
3909 expressionS newtok[3];
3911 xr = regno (tok[0].X_add_number);
3912 yr = regno (tok[1].X_add_number);
3917 rr = regno (tok[2].X_add_number);
3919 /* Move the operands into the right place. */
3920 if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
3922 /* They are in exactly the wrong order -- swap through AT. */
3925 as_bad (_("macro requires $at register while noat in effect"));
3927 set_tok_reg (newtok[0], AXP_REG_R16);
3928 set_tok_reg (newtok[1], AXP_REG_AT);
3929 assemble_tokens ("mov", newtok, 2, 1);
3931 set_tok_reg (newtok[0], AXP_REG_R17);
3932 set_tok_reg (newtok[1], AXP_REG_R16);
3933 assemble_tokens ("mov", newtok, 2, 1);
3935 set_tok_reg (newtok[0], AXP_REG_AT);
3936 set_tok_reg (newtok[1], AXP_REG_R17);
3937 assemble_tokens ("mov", newtok, 2, 1);
3941 if (yr == AXP_REG_R16)
3943 set_tok_reg (newtok[0], AXP_REG_R16);
3944 set_tok_reg (newtok[1], AXP_REG_R17);
3945 assemble_tokens ("mov", newtok, 2, 1);
3948 if (xr != AXP_REG_R16)
3950 set_tok_reg (newtok[0], xr);
3951 set_tok_reg (newtok[1], AXP_REG_R16);
3952 assemble_tokens ("mov", newtok, 2, 1);
3955 if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
3957 set_tok_reg (newtok[0], yr);
3958 set_tok_reg (newtok[1], AXP_REG_R17);
3959 assemble_tokens ("mov", newtok, 2, 1);
3963 sym = symbol_find_or_make ((const char *) symname);
3965 set_tok_reg (newtok[0], AXP_REG_AT);
3966 set_tok_sym (newtok[1], sym, 0);
3967 assemble_tokens ("lda", newtok, 2, 1);
3969 /* Call the division routine. */
3970 set_tok_reg (newtok[0], AXP_REG_AT);
3971 set_tok_cpreg (newtok[1], AXP_REG_AT);
3972 set_tok_const (newtok[2], 0);
3973 assemble_tokens ("jsr", newtok, 3, 1);
3975 /* Move the result to the right place. */
3976 if (rr != AXP_REG_R0)
3978 set_tok_reg (newtok[0], AXP_REG_R0);
3979 set_tok_reg (newtok[1], rr);
3980 assemble_tokens ("mov", newtok, 2, 1);
3984 #else /* !OBJ_EVAX */
3987 emit_division (tok, ntok, symname)
3988 const expressionS *tok;
3992 /* DIVISION and MODULUS. Yech.
4002 with appropriate optimizations if t10,t11,t12 are the registers
4003 specified by the compiler. */
4007 expressionS newtok[3];
4009 xr = regno (tok[0].X_add_number);
4010 yr = regno (tok[1].X_add_number);
4015 rr = regno (tok[2].X_add_number);
4017 sym = symbol_find_or_make ((const char *) symname);
4019 /* Move the operands into the right place. */
4020 if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
4022 /* They are in exactly the wrong order -- swap through AT. */
4024 as_bad (_("macro requires $at register while noat in effect"));
4026 set_tok_reg (newtok[0], AXP_REG_T10);
4027 set_tok_reg (newtok[1], AXP_REG_AT);
4028 assemble_tokens ("mov", newtok, 2, 1);
4030 set_tok_reg (newtok[0], AXP_REG_T11);
4031 set_tok_reg (newtok[1], AXP_REG_T10);
4032 assemble_tokens ("mov", newtok, 2, 1);
4034 set_tok_reg (newtok[0], AXP_REG_AT);
4035 set_tok_reg (newtok[1], AXP_REG_T11);
4036 assemble_tokens ("mov", newtok, 2, 1);
4040 if (yr == AXP_REG_T10)
4042 set_tok_reg (newtok[0], AXP_REG_T10);
4043 set_tok_reg (newtok[1], AXP_REG_T11);
4044 assemble_tokens ("mov", newtok, 2, 1);
4047 if (xr != AXP_REG_T10)
4049 set_tok_reg (newtok[0], xr);
4050 set_tok_reg (newtok[1], AXP_REG_T10);
4051 assemble_tokens ("mov", newtok, 2, 1);
4054 if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
4056 set_tok_reg (newtok[0], yr);
4057 set_tok_reg (newtok[1], AXP_REG_T11);
4058 assemble_tokens ("mov", newtok, 2, 1);
4062 /* Call the division routine. */
4063 set_tok_reg (newtok[0], AXP_REG_T9);
4064 set_tok_sym (newtok[1], sym, 0);
4065 assemble_tokens ("jsr", newtok, 2, 1);
4067 /* Reload the GP register. */
4071 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
4072 set_tok_reg (newtok[0], alpha_gp_register);
4073 set_tok_const (newtok[1], 0);
4074 set_tok_preg (newtok[2], AXP_REG_T9);
4075 assemble_tokens ("ldgp", newtok, 3, 1);
4078 /* Move the result to the right place. */
4079 if (rr != AXP_REG_T12)
4081 set_tok_reg (newtok[0], AXP_REG_T12);
4082 set_tok_reg (newtok[1], rr);
4083 assemble_tokens ("mov", newtok, 2, 1);
4087 #endif /* !OBJ_EVAX */
4089 /* The jsr and jmp macros differ from their instruction counterparts
4090 in that they can load the target address and default most
4094 emit_jsrjmp (tok, ntok, vopname)
4095 const expressionS *tok;
4099 const char *opname = (const char *) vopname;
4100 struct alpha_insn insn;
4101 expressionS newtok[3];
4105 if (tokidx < ntok && tok[tokidx].X_op == O_register)
4106 r = regno (tok[tokidx++].X_add_number);
4108 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
4110 set_tok_reg (newtok[0], r);
4112 if (tokidx < ntok &&
4113 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
4114 r = regno (tok[tokidx++].X_add_number);
4116 /* keep register if jsr $n.<sym> */
4120 int basereg = alpha_gp_register;
4121 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
4125 set_tok_cpreg (newtok[1], r);
4128 /* FIXME: Add hint relocs to BFD for evax. */
4131 newtok[2] = tok[tokidx];
4134 set_tok_const (newtok[2], 0);
4136 assemble_tokens_to_insn (opname, newtok, 3, &insn);
4140 assert (insn.nfixups < MAX_INSN_FIXUPS);
4141 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
4142 insn.fixups[insn.nfixups].exp.X_op = O_absent;
4144 insn.sequence = lituse;
4150 /* The ret and jcr instructions differ from their instruction
4151 counterparts in that everything can be defaulted. */
4154 emit_retjcr (tok, ntok, vopname)
4155 const expressionS *tok;
4159 const char *opname = (const char *) vopname;
4160 expressionS newtok[3];
4163 if (tokidx < ntok && tok[tokidx].X_op == O_register)
4164 r = regno (tok[tokidx++].X_add_number);
4168 set_tok_reg (newtok[0], r);
4170 if (tokidx < ntok &&
4171 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
4172 r = regno (tok[tokidx++].X_add_number);
4176 set_tok_cpreg (newtok[1], r);
4179 newtok[2] = tok[tokidx];
4181 set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
4183 assemble_tokens (opname, newtok, 3, 0);
4186 /* Assembler directives. */
4188 /* Handle the .text pseudo-op. This is like the usual one, but it
4189 clears alpha_insn_label and restores auto alignment. */
4201 alpha_insn_label = NULL;
4202 alpha_auto_align_on = 1;
4203 alpha_current_align = 0;
4206 /* Handle the .data pseudo-op. This is like the usual one, but it
4207 clears alpha_insn_label and restores auto alignment. */
4218 alpha_insn_label = NULL;
4219 alpha_auto_align_on = 1;
4220 alpha_current_align = 0;
4223 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
4225 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
4226 openVMS constructs a section for every common symbol. */
4229 s_alpha_comm (ignore)
4230 int ignore ATTRIBUTE_UNUSED;
4232 register char *name;
4236 register symbolS *symbolP;
4239 segT current_section = now_seg;
4240 int current_subsec = now_subseg;
4244 name = input_line_pointer;
4245 c = get_symbol_end ();
4247 /* just after name is now '\0' */
4248 p = input_line_pointer;
4253 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
4254 if (*input_line_pointer == ',')
4256 input_line_pointer++;
4259 if ((temp = get_absolute_expression ()) < 0)
4261 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4262 ignore_rest_of_line ();
4267 symbolP = symbol_find_or_make (name);
4270 /* Make a section for the common symbol. */
4271 new_seg = subseg_new (xstrdup (name), 0);
4277 /* alignment might follow */
4278 if (*input_line_pointer == ',')
4282 input_line_pointer++;
4283 align = get_absolute_expression ();
4284 bfd_set_section_alignment (stdoutput, new_seg, align);
4288 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4290 as_bad (_("Ignoring attempt to re-define symbol"));
4291 ignore_rest_of_line ();
4296 if (bfd_section_size (stdoutput, new_seg) > 0)
4298 if (bfd_section_size (stdoutput, new_seg) != temp)
4299 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4300 S_GET_NAME (symbolP),
4301 (long) bfd_section_size (stdoutput, new_seg),
4305 if (S_GET_VALUE (symbolP))
4307 if (S_GET_VALUE (symbolP) != (valueT) temp)
4308 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4309 S_GET_NAME (symbolP),
4310 (long) S_GET_VALUE (symbolP),
4317 subseg_set (new_seg, 0);
4318 p = frag_more (temp);
4319 new_seg->flags |= SEC_IS_COMMON;
4320 if (! S_IS_DEFINED (symbolP))
4321 S_SET_SEGMENT (symbolP, new_seg);
4323 S_SET_VALUE (symbolP, (valueT) temp);
4325 S_SET_EXTERNAL (symbolP);
4329 subseg_set (current_section, current_subsec);
4332 know (symbol_get_frag (symbolP) == &zero_address_frag);
4334 demand_empty_rest_of_line ();
4337 #endif /* ! OBJ_ELF */
4341 /* Handle the .rdata pseudo-op. This is like the usual one, but it
4342 clears alpha_insn_label and restores auto alignment. */
4345 s_alpha_rdata (ignore)
4346 int ignore ATTRIBUTE_UNUSED;
4350 temp = get_absolute_expression ();
4351 subseg_new (".rdata", 0);
4352 demand_empty_rest_of_line ();
4353 alpha_insn_label = NULL;
4354 alpha_auto_align_on = 1;
4355 alpha_current_align = 0;
4362 /* Handle the .sdata pseudo-op. This is like the usual one, but it
4363 clears alpha_insn_label and restores auto alignment. */
4366 s_alpha_sdata (ignore)
4367 int ignore ATTRIBUTE_UNUSED;
4371 temp = get_absolute_expression ();
4372 subseg_new (".sdata", 0);
4373 demand_empty_rest_of_line ();
4374 alpha_insn_label = NULL;
4375 alpha_auto_align_on = 1;
4376 alpha_current_align = 0;
4381 struct alpha_elf_frame_data
4384 symbolS *func_end_sym;
4385 symbolS *prologue_sym;
4391 offsetT mask_offset;
4392 offsetT fmask_offset;
4394 struct alpha_elf_frame_data *next;
4397 static struct alpha_elf_frame_data *all_frame_data;
4398 static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data;
4399 static struct alpha_elf_frame_data *cur_frame_data;
4401 /* Handle the .section pseudo-op. This is like the usual one, but it
4402 clears alpha_insn_label and restores auto alignment. */
4405 s_alpha_section (ignore)
4406 int ignore ATTRIBUTE_UNUSED;
4408 obj_elf_section (ignore);
4410 alpha_insn_label = NULL;
4411 alpha_auto_align_on = 1;
4412 alpha_current_align = 0;
4417 int dummy ATTRIBUTE_UNUSED;
4419 if (ECOFF_DEBUGGING)
4420 ecoff_directive_ent (0);
4423 char *name, name_end;
4424 name = input_line_pointer;
4425 name_end = get_symbol_end ();
4427 if (! is_name_beginner (*name))
4429 as_warn (_(".ent directive has no name"));
4430 *input_line_pointer = name_end;
4437 as_warn (_("nested .ent directives"));
4439 sym = symbol_find_or_make (name);
4440 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4442 cur_frame_data = calloc (1, sizeof (*cur_frame_data));
4443 cur_frame_data->func_sym = sym;
4445 /* Provide sensible defaults. */
4446 cur_frame_data->fp_regno = 30; /* sp */
4447 cur_frame_data->ra_regno = 26; /* ra */
4449 *plast_frame_data = cur_frame_data;
4450 plast_frame_data = &cur_frame_data->next;
4452 /* The .ent directive is sometimes followed by a number. Not sure
4453 what it really means, but ignore it. */
4454 *input_line_pointer = name_end;
4456 if (*input_line_pointer == ',')
4458 input_line_pointer++;
4461 if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
4462 (void) get_absolute_expression ();
4464 demand_empty_rest_of_line ();
4470 int dummy ATTRIBUTE_UNUSED;
4472 if (ECOFF_DEBUGGING)
4473 ecoff_directive_end (0);
4476 char *name, name_end;
4477 name = input_line_pointer;
4478 name_end = get_symbol_end ();
4480 if (! is_name_beginner (*name))
4482 as_warn (_(".end directive has no name"));
4483 *input_line_pointer = name_end;
4489 sym = symbol_find (name);
4490 if (!cur_frame_data)
4491 as_warn (_(".end directive without matching .ent"));
4492 else if (sym != cur_frame_data->func_sym)
4493 as_warn (_(".end directive names different symbol than .ent"));
4495 /* Create an expression to calculate the size of the function. */
4498 OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym);
4499 expressionS *exp = xmalloc (sizeof (expressionS));
4502 exp->X_op = O_subtract;
4503 exp->X_add_symbol = symbol_temp_new_now ();
4504 exp->X_op_symbol = sym;
4505 exp->X_add_number = 0;
4507 cur_frame_data->func_end_sym = exp->X_add_symbol;
4510 cur_frame_data = NULL;
4512 *input_line_pointer = name_end;
4514 demand_empty_rest_of_line ();
4522 if (ECOFF_DEBUGGING)
4525 ecoff_directive_fmask (0);
4527 ecoff_directive_mask (0);
4534 if (!cur_frame_data)
4537 as_warn (_(".fmask outside of .ent"));
4539 as_warn (_(".mask outside of .ent"));
4540 discard_rest_of_line ();
4544 if (get_absolute_expression_and_terminator (&val) != ',')
4547 as_warn (_("bad .fmask directive"));
4549 as_warn (_("bad .mask directive"));
4550 --input_line_pointer;
4551 discard_rest_of_line ();
4555 offset = get_absolute_expression ();
4556 demand_empty_rest_of_line ();
4560 cur_frame_data->fmask = val;
4561 cur_frame_data->fmask_offset = offset;
4565 cur_frame_data->mask = val;
4566 cur_frame_data->mask_offset = offset;
4572 s_alpha_frame (dummy)
4573 int dummy ATTRIBUTE_UNUSED;
4575 if (ECOFF_DEBUGGING)
4576 ecoff_directive_frame (0);
4581 if (!cur_frame_data)
4583 as_warn (_(".frame outside of .ent"));
4584 discard_rest_of_line ();
4588 cur_frame_data->fp_regno = tc_get_register (1);
4591 if (*input_line_pointer++ != ','
4592 || get_absolute_expression_and_terminator (&val) != ',')
4594 as_warn (_("bad .frame directive"));
4595 --input_line_pointer;
4596 discard_rest_of_line ();
4599 cur_frame_data->frame_size = val;
4601 cur_frame_data->ra_regno = tc_get_register (0);
4603 /* Next comes the "offset of saved $a0 from $sp". In gcc terms
4604 this is current_function_pretend_args_size. There's no place
4605 to put this value, so ignore it. */
4611 s_alpha_prologue (ignore)
4612 int ignore ATTRIBUTE_UNUSED;
4617 arg = get_absolute_expression ();
4618 demand_empty_rest_of_line ();
4620 if (ECOFF_DEBUGGING)
4621 sym = ecoff_get_cur_proc_sym ();
4623 sym = cur_frame_data ? cur_frame_data->func_sym : NULL;
4627 as_bad (_(".prologue directive without a preceding .ent directive"));
4633 case 0: /* No PV required. */
4634 S_SET_OTHER (sym, STO_ALPHA_NOPV
4635 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4637 case 1: /* Std GP load. */
4638 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
4639 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4641 case 2: /* Non-std use of PV. */
4645 as_bad (_("Invalid argument %d to .prologue."), arg);
4650 cur_frame_data->prologue_sym = symbol_temp_new_now ();
4653 static char *first_file_directive;
4656 s_alpha_file (ignore)
4657 int ignore ATTRIBUTE_UNUSED;
4659 /* Save the first .file directive we see, so that we can change our
4660 minds about whether ecoff debugging should or shouldn't be enabled. */
4661 if (alpha_flag_mdebug < 0 && ! first_file_directive)
4663 char *start = input_line_pointer;
4666 discard_rest_of_line ();
4668 len = input_line_pointer - start;
4669 first_file_directive = xmalloc (len + 1);
4670 memcpy (first_file_directive, start, len);
4671 first_file_directive[len] = '\0';
4673 input_line_pointer = start;
4676 if (ECOFF_DEBUGGING)
4677 ecoff_directive_file (0);
4679 dwarf2_directive_file (0);
4683 s_alpha_loc (ignore)
4684 int ignore ATTRIBUTE_UNUSED;
4686 if (ECOFF_DEBUGGING)
4687 ecoff_directive_loc (0);
4689 dwarf2_directive_loc (0);
4696 /* If we've been undecided about mdebug, make up our minds in favour. */
4697 if (alpha_flag_mdebug < 0)
4699 segT sec = subseg_new (".mdebug", 0);
4700 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
4701 bfd_set_section_alignment (stdoutput, sec, 3);
4703 ecoff_read_begin_hook ();
4705 if (first_file_directive)
4707 char *save_ilp = input_line_pointer;
4708 input_line_pointer = first_file_directive;
4709 ecoff_directive_file (0);
4710 input_line_pointer = save_ilp;
4711 free (first_file_directive);
4714 alpha_flag_mdebug = 1;
4720 s_alpha_coff_wrapper (which)
4723 static void (* const fns[]) PARAMS ((int)) = {
4724 ecoff_directive_begin,
4725 ecoff_directive_bend,
4726 ecoff_directive_def,
4727 ecoff_directive_dim,
4728 ecoff_directive_endef,
4729 ecoff_directive_scl,
4730 ecoff_directive_tag,
4731 ecoff_directive_val,
4734 assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
4736 if (ECOFF_DEBUGGING)
4740 as_bad (_("ECOFF debugging is disabled."));
4741 ignore_rest_of_line ();
4745 /* Called at the end of assembly. Here we emit unwind info for frames
4746 unless the compiler has done it for us. */
4749 alpha_elf_md_end (void)
4751 struct alpha_elf_frame_data *p;
4754 as_warn (_(".ent directive without matching .end"));
4756 /* If someone has generated the unwind info themselves, great. */
4757 if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL)
4760 /* Generate .eh_frame data for the unwind directives specified. */
4761 for (p = all_frame_data; p ; p = p->next)
4762 if (p->prologue_sym)
4764 /* Create a temporary symbol at the same location as our
4765 function symbol. This prevents problems with globals. */
4766 cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym),
4767 S_GET_VALUE (p->func_sym),
4768 symbol_get_frag (p->func_sym)));
4770 cfi_set_return_column (p->ra_regno);
4771 cfi_add_CFA_def_cfa_register (30);
4772 if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size)
4777 cfi_add_advance_loc (p->prologue_sym);
4779 if (p->fp_regno != 30)
4780 if (p->frame_size != 0)
4781 cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size);
4783 cfi_add_CFA_def_cfa_register (p->fp_regno);
4784 else if (p->frame_size != 0)
4785 cfi_add_CFA_def_cfa_offset (p->frame_size);
4788 offset = p->mask_offset;
4790 /* Recall that $26 is special-cased and stored first. */
4791 if ((mask >> 26) & 1)
4793 cfi_add_CFA_offset (26, offset);
4804 cfi_add_CFA_offset (i, offset);
4809 offset = p->fmask_offset;
4817 cfi_add_CFA_offset (i + 32, offset);
4822 cfi_end_fde (p->func_end_sym);
4825 #endif /* OBJ_ELF */
4829 /* Handle the section specific pseudo-op. */
4832 s_alpha_section (secid)
4836 #define EVAX_SECTION_COUNT 5
4837 static char *section_name[EVAX_SECTION_COUNT + 1] =
4838 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
4840 if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
4842 as_fatal (_("Unknown section directive"));
4843 demand_empty_rest_of_line ();
4846 temp = get_absolute_expression ();
4847 subseg_new (section_name[secid], 0);
4848 demand_empty_rest_of_line ();
4849 alpha_insn_label = NULL;
4850 alpha_auto_align_on = 1;
4851 alpha_current_align = 0;
4854 /* Parse .ent directives. */
4857 s_alpha_ent (ignore)
4858 int ignore ATTRIBUTE_UNUSED;
4861 expressionS symexpr;
4863 alpha_evax_proc.pdsckind = 0;
4864 alpha_evax_proc.framereg = -1;
4865 alpha_evax_proc.framesize = 0;
4866 alpha_evax_proc.rsa_offset = 0;
4867 alpha_evax_proc.ra_save = AXP_REG_RA;
4868 alpha_evax_proc.fp_save = -1;
4869 alpha_evax_proc.imask = 0;
4870 alpha_evax_proc.fmask = 0;
4871 alpha_evax_proc.prologue = 0;
4872 alpha_evax_proc.type = 0;
4874 expression (&symexpr);
4876 if (symexpr.X_op != O_symbol)
4878 as_fatal (_(".ent directive has no symbol"));
4879 demand_empty_rest_of_line ();
4883 symbol = make_expr_symbol (&symexpr);
4884 symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
4885 alpha_evax_proc.symbol = symbol;
4887 demand_empty_rest_of_line ();
4891 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
4894 s_alpha_frame (ignore)
4895 int ignore ATTRIBUTE_UNUSED;
4899 alpha_evax_proc.framereg = tc_get_register (1);
4902 if (*input_line_pointer++ != ','
4903 || get_absolute_expression_and_terminator (&val) != ',')
4905 as_warn (_("Bad .frame directive 1./2. param"));
4906 --input_line_pointer;
4907 demand_empty_rest_of_line ();
4911 alpha_evax_proc.framesize = val;
4913 (void) tc_get_register (1);
4915 if (*input_line_pointer++ != ',')
4917 as_warn (_("Bad .frame directive 3./4. param"));
4918 --input_line_pointer;
4919 demand_empty_rest_of_line ();
4922 alpha_evax_proc.rsa_offset = get_absolute_expression ();
4928 s_alpha_pdesc (ignore)
4929 int ignore ATTRIBUTE_UNUSED;
4938 segment_info_type *seginfo = seg_info (alpha_link_section);
4940 if (now_seg != alpha_link_section)
4942 as_bad (_(".pdesc directive not in link (.link) section"));
4943 demand_empty_rest_of_line ();
4947 if ((alpha_evax_proc.symbol == 0)
4948 || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
4950 as_fatal (_(".pdesc has no matching .ent"));
4951 demand_empty_rest_of_line ();
4955 *symbol_get_obj (alpha_evax_proc.symbol) =
4956 (valueT) seginfo->literal_pool_size;
4959 if (exp.X_op != O_symbol)
4961 as_warn (_(".pdesc directive has no entry symbol"));
4962 demand_empty_rest_of_line ();
4966 entry_sym = make_expr_symbol (&exp);
4967 /* Save bfd symbol of proc desc in function symbol. */
4968 symbol_get_bfdsym (alpha_evax_proc.symbol)->udata.p
4969 = symbol_get_bfdsym (entry_sym);
4972 if (*input_line_pointer++ != ',')
4974 as_warn (_("No comma after .pdesc <entryname>"));
4975 demand_empty_rest_of_line ();
4980 name = input_line_pointer;
4981 name_end = get_symbol_end ();
4983 if (strncmp (name, "stack", 5) == 0)
4985 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
4987 else if (strncmp (name, "reg", 3) == 0)
4989 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
4991 else if (strncmp (name, "null", 4) == 0)
4993 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
4997 as_fatal (_("unknown procedure kind"));
4998 demand_empty_rest_of_line ();
5002 *input_line_pointer = name_end;
5003 demand_empty_rest_of_line ();
5005 #ifdef md_flush_pending_output
5006 md_flush_pending_output ();
5009 frag_align (3, 0, 0);
5011 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
5013 seginfo->literal_pool_size += 16;
5015 *p = alpha_evax_proc.pdsckind
5016 | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
5017 *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
5019 switch (alpha_evax_proc.pdsckind)
5021 case PDSC_S_K_KIND_NULL:
5025 case PDSC_S_K_KIND_FP_REGISTER:
5026 *(p + 2) = alpha_evax_proc.fp_save;
5027 *(p + 3) = alpha_evax_proc.ra_save;
5029 case PDSC_S_K_KIND_FP_STACK:
5030 md_number_to_chars (p + 2, (valueT) alpha_evax_proc.rsa_offset, 2);
5032 default: /* impossible */
5037 *(p + 5) = alpha_evax_proc.type & 0x0f;
5039 /* Signature offset. */
5040 md_number_to_chars (p + 6, (valueT) 0, 2);
5042 fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
5044 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
5047 /* Add dummy fix to make add_to_link_pool work. */
5049 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
5051 seginfo->literal_pool_size += 8;
5053 /* pdesc+16: Size. */
5054 md_number_to_chars (p, (valueT) alpha_evax_proc.framesize, 4);
5056 md_number_to_chars (p + 4, (valueT) 0, 2);
5059 md_number_to_chars (p + 6, alpha_evax_proc.prologue, 2);
5061 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
5064 /* Add dummy fix to make add_to_link_pool work. */
5066 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
5068 seginfo->literal_pool_size += 8;
5070 /* pdesc+24: register masks. */
5072 md_number_to_chars (p, alpha_evax_proc.imask, 4);
5073 md_number_to_chars (p + 4, alpha_evax_proc.fmask, 4);
5078 /* Support for crash debug on vms. */
5081 s_alpha_name (ignore)
5082 int ignore ATTRIBUTE_UNUSED;
5086 segment_info_type *seginfo = seg_info (alpha_link_section);
5088 if (now_seg != alpha_link_section)
5090 as_bad (_(".name directive not in link (.link) section"));
5091 demand_empty_rest_of_line ();
5096 if (exp.X_op != O_symbol)
5098 as_warn (_(".name directive has no symbol"));
5099 demand_empty_rest_of_line ();
5103 demand_empty_rest_of_line ();
5105 #ifdef md_flush_pending_output
5106 md_flush_pending_output ();
5109 frag_align (3, 0, 0);
5111 seginfo->literal_pool_size += 8;
5113 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
5119 s_alpha_linkage (ignore)
5120 int ignore ATTRIBUTE_UNUSED;
5125 #ifdef md_flush_pending_output
5126 md_flush_pending_output ();
5130 if (exp.X_op != O_symbol)
5132 as_fatal (_("No symbol after .linkage"));
5136 p = frag_more (LKP_S_K_SIZE);
5137 memset (p, 0, LKP_S_K_SIZE);
5138 fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
5139 BFD_RELOC_ALPHA_LINKAGE);
5141 demand_empty_rest_of_line ();
5147 s_alpha_code_address (ignore)
5148 int ignore ATTRIBUTE_UNUSED;
5153 #ifdef md_flush_pending_output
5154 md_flush_pending_output ();
5158 if (exp.X_op != O_symbol)
5160 as_fatal (_("No symbol after .code_address"));
5166 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
5167 BFD_RELOC_ALPHA_CODEADDR);
5169 demand_empty_rest_of_line ();
5175 s_alpha_fp_save (ignore)
5176 int ignore ATTRIBUTE_UNUSED;
5179 alpha_evax_proc.fp_save = tc_get_register (1);
5181 demand_empty_rest_of_line ();
5186 s_alpha_mask (ignore)
5187 int ignore ATTRIBUTE_UNUSED;
5191 if (get_absolute_expression_and_terminator (&val) != ',')
5193 as_warn (_("Bad .mask directive"));
5194 --input_line_pointer;
5198 alpha_evax_proc.imask = val;
5199 (void) get_absolute_expression ();
5201 demand_empty_rest_of_line ();
5207 s_alpha_fmask (ignore)
5208 int ignore ATTRIBUTE_UNUSED;
5212 if (get_absolute_expression_and_terminator (&val) != ',')
5214 as_warn (_("Bad .fmask directive"));
5215 --input_line_pointer;
5219 alpha_evax_proc.fmask = val;
5220 (void) get_absolute_expression ();
5222 demand_empty_rest_of_line ();
5228 s_alpha_end (ignore)
5229 int ignore ATTRIBUTE_UNUSED;
5233 c = get_symbol_end ();
5234 *input_line_pointer = c;
5235 demand_empty_rest_of_line ();
5236 alpha_evax_proc.symbol = 0;
5242 s_alpha_file (ignore)
5243 int ignore ATTRIBUTE_UNUSED;
5247 static char case_hack[32];
5249 sprintf (case_hack, "<CASE:%01d%01d>",
5250 alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
5252 s = symbol_find_or_make (case_hack);
5253 symbol_get_bfdsym (s)->flags |= BSF_FILE;
5255 get_absolute_expression ();
5256 s = symbol_find_or_make (demand_copy_string (&length));
5257 symbol_get_bfdsym (s)->flags |= BSF_FILE;
5258 demand_empty_rest_of_line ();
5262 #endif /* OBJ_EVAX */
5264 /* Handle the .gprel32 pseudo op. */
5267 s_alpha_gprel32 (ignore)
5268 int ignore ATTRIBUTE_UNUSED;
5280 e.X_add_symbol = section_symbol (absolute_section);
5293 e.X_add_symbol = section_symbol (absolute_section);
5296 e.X_op = O_subtract;
5297 e.X_op_symbol = alpha_gp_symbol;
5305 if (alpha_auto_align_on && alpha_current_align < 2)
5306 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
5307 if (alpha_current_align > 2)
5308 alpha_current_align = 2;
5309 alpha_insn_label = NULL;
5313 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
5314 &e, 0, BFD_RELOC_GPREL32);
5317 /* Handle floating point allocation pseudo-ops. This is like the
5318 generic vresion, but it makes sure the current label, if any, is
5319 correctly aligned. */
5322 s_alpha_float_cons (type)
5349 if (alpha_auto_align_on && alpha_current_align < log_size)
5350 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5351 if (alpha_current_align > log_size)
5352 alpha_current_align = log_size;
5353 alpha_insn_label = NULL;
5358 /* Handle the .proc pseudo op. We don't really do much with it except
5362 s_alpha_proc (is_static)
5363 int is_static ATTRIBUTE_UNUSED;
5371 /* Takes ".proc name,nargs" */
5373 name = input_line_pointer;
5374 c = get_symbol_end ();
5375 p = input_line_pointer;
5376 symbolP = symbol_find_or_make (name);
5379 if (*input_line_pointer != ',')
5382 as_warn (_("Expected comma after name \"%s\""), name);
5385 ignore_rest_of_line ();
5389 input_line_pointer++;
5390 temp = get_absolute_expression ();
5392 /* *symbol_get_obj (symbolP) = (signed char) temp; */
5393 as_warn (_("unhandled: .proc %s,%d"), name, temp);
5394 demand_empty_rest_of_line ();
5397 /* Handle the .set pseudo op. This is used to turn on and off most of
5398 the assembler features. */
5402 int x ATTRIBUTE_UNUSED;
5408 name = input_line_pointer;
5409 ch = get_symbol_end ();
5412 if (s[0] == 'n' && s[1] == 'o')
5417 if (!strcmp ("reorder", s))
5419 else if (!strcmp ("at", s))
5420 alpha_noat_on = !yesno;
5421 else if (!strcmp ("macro", s))
5422 alpha_macros_on = yesno;
5423 else if (!strcmp ("move", s))
5425 else if (!strcmp ("volatile", s))
5428 as_warn (_("Tried to .set unrecognized mode `%s'"), name);
5430 *input_line_pointer = ch;
5431 demand_empty_rest_of_line ();
5434 /* Handle the .base pseudo op. This changes the assembler's notion of
5435 the $gp register. */
5438 s_alpha_base (ignore)
5439 int ignore ATTRIBUTE_UNUSED;
5442 if (first_32bit_quadrant)
5444 /* not fatal, but it might not work in the end */
5445 as_warn (_("File overrides no-base-register option."));
5446 first_32bit_quadrant = 0;
5451 if (*input_line_pointer == '$')
5453 input_line_pointer++;
5454 if (*input_line_pointer == 'r')
5455 input_line_pointer++;
5458 alpha_gp_register = get_absolute_expression ();
5459 if (alpha_gp_register < 0 || alpha_gp_register > 31)
5461 alpha_gp_register = AXP_REG_GP;
5462 as_warn (_("Bad base register, using $%d."), alpha_gp_register);
5465 demand_empty_rest_of_line ();
5468 /* Handle the .align pseudo-op. This aligns to a power of two. It
5469 also adjusts any current instruction label. We treat this the same
5470 way the MIPS port does: .align 0 turns off auto alignment. */
5473 s_alpha_align (ignore)
5474 int ignore ATTRIBUTE_UNUSED;
5478 long max_alignment = 15;
5480 align = get_absolute_expression ();
5481 if (align > max_alignment)
5483 align = max_alignment;
5484 as_bad (_("Alignment too large: %d. assumed"), align);
5488 as_warn (_("Alignment negative: 0 assumed"));
5492 if (*input_line_pointer == ',')
5494 input_line_pointer++;
5495 fill = get_absolute_expression ();
5503 alpha_auto_align_on = 1;
5504 alpha_align (align, pfill, alpha_insn_label, 1);
5508 alpha_auto_align_on = 0;
5511 demand_empty_rest_of_line ();
5514 /* Hook the normal string processor to reset known alignment. */
5517 s_alpha_stringer (terminate)
5520 alpha_current_align = 0;
5521 alpha_insn_label = NULL;
5522 stringer (terminate);
5525 /* Hook the normal space processing to reset known alignment. */
5528 s_alpha_space (ignore)
5531 alpha_current_align = 0;
5532 alpha_insn_label = NULL;
5536 /* Hook into cons for auto-alignment. */
5539 alpha_cons_align (size)
5545 while ((size >>= 1) != 0)
5548 if (alpha_auto_align_on && alpha_current_align < log_size)
5549 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5550 if (alpha_current_align > log_size)
5551 alpha_current_align = log_size;
5552 alpha_insn_label = NULL;
5555 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
5556 pseudos. We just turn off auto-alignment and call down to cons. */
5559 s_alpha_ucons (bytes)
5562 int hold = alpha_auto_align_on;
5563 alpha_auto_align_on = 0;
5565 alpha_auto_align_on = hold;
5568 /* Switch the working cpu type. */
5571 s_alpha_arch (ignored)
5572 int ignored ATTRIBUTE_UNUSED;
5575 const struct cpu_type *p;
5578 name = input_line_pointer;
5579 ch = get_symbol_end ();
5581 for (p = cpu_types; p->name; ++p)
5582 if (strcmp (name, p->name) == 0)
5584 alpha_target_name = p->name, alpha_target = p->flags;
5587 as_warn ("Unknown CPU identifier `%s'", name);
5590 *input_line_pointer = ch;
5591 demand_empty_rest_of_line ();
5595 /* print token expression with alpha specific extension. */
5598 alpha_print_token (f, exp)
5600 const expressionS *exp;
5610 expressionS nexp = *exp;
5611 nexp.X_op = O_register;
5612 print_expr (f, &nexp);
5617 print_expr (f, exp);
5624 /* The target specific pseudo-ops which we support. */
5626 const pseudo_typeS md_pseudo_table[] = {
5628 {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
5629 {"rdata", s_alpha_rdata, 0},
5631 {"text", s_alpha_text, 0},
5632 {"data", s_alpha_data, 0},
5634 {"sdata", s_alpha_sdata, 0},
5637 {"section", s_alpha_section, 0},
5638 {"section.s", s_alpha_section, 0},
5639 {"sect", s_alpha_section, 0},
5640 {"sect.s", s_alpha_section, 0},
5643 { "pdesc", s_alpha_pdesc, 0},
5644 { "name", s_alpha_name, 0},
5645 { "linkage", s_alpha_linkage, 0},
5646 { "code_address", s_alpha_code_address, 0},
5647 { "ent", s_alpha_ent, 0},
5648 { "frame", s_alpha_frame, 0},
5649 { "fp_save", s_alpha_fp_save, 0},
5650 { "mask", s_alpha_mask, 0},
5651 { "fmask", s_alpha_fmask, 0},
5652 { "end", s_alpha_end, 0},
5653 { "file", s_alpha_file, 0},
5654 { "rdata", s_alpha_section, 1},
5655 { "comm", s_alpha_comm, 0},
5656 { "link", s_alpha_section, 3},
5657 { "ctors", s_alpha_section, 4},
5658 { "dtors", s_alpha_section, 5},
5661 /* Frame related pseudos. */
5662 {"ent", s_alpha_ent, 0},
5663 {"end", s_alpha_end, 0},
5664 {"mask", s_alpha_mask, 0},
5665 {"fmask", s_alpha_mask, 1},
5666 {"frame", s_alpha_frame, 0},
5667 {"prologue", s_alpha_prologue, 0},
5668 {"file", s_alpha_file, 5},
5669 {"loc", s_alpha_loc, 9},
5670 {"stabs", s_alpha_stab, 's'},
5671 {"stabn", s_alpha_stab, 'n'},
5672 /* COFF debugging related pseudos. */
5673 {"begin", s_alpha_coff_wrapper, 0},
5674 {"bend", s_alpha_coff_wrapper, 1},
5675 {"def", s_alpha_coff_wrapper, 2},
5676 {"dim", s_alpha_coff_wrapper, 3},
5677 {"endef", s_alpha_coff_wrapper, 4},
5678 {"scl", s_alpha_coff_wrapper, 5},
5679 {"tag", s_alpha_coff_wrapper, 6},
5680 {"val", s_alpha_coff_wrapper, 7},
5682 {"prologue", s_ignore, 0},
5684 {"gprel32", s_alpha_gprel32, 0},
5685 {"t_floating", s_alpha_float_cons, 'd'},
5686 {"s_floating", s_alpha_float_cons, 'f'},
5687 {"f_floating", s_alpha_float_cons, 'F'},
5688 {"g_floating", s_alpha_float_cons, 'G'},
5689 {"d_floating", s_alpha_float_cons, 'D'},
5691 {"proc", s_alpha_proc, 0},
5692 {"aproc", s_alpha_proc, 1},
5693 {"set", s_alpha_set, 0},
5694 {"reguse", s_ignore, 0},
5695 {"livereg", s_ignore, 0},
5696 {"base", s_alpha_base, 0}, /*??*/
5697 {"option", s_ignore, 0},
5698 {"aent", s_ignore, 0},
5699 {"ugen", s_ignore, 0},
5700 {"eflag", s_ignore, 0},
5702 {"align", s_alpha_align, 0},
5703 {"double", s_alpha_float_cons, 'd'},
5704 {"float", s_alpha_float_cons, 'f'},
5705 {"single", s_alpha_float_cons, 'f'},
5706 {"ascii", s_alpha_stringer, 0},
5707 {"asciz", s_alpha_stringer, 1},
5708 {"string", s_alpha_stringer, 1},
5709 {"space", s_alpha_space, 0},
5710 {"skip", s_alpha_space, 0},
5711 {"zero", s_alpha_space, 0},
5713 /* Unaligned data pseudos. */
5714 {"uword", s_alpha_ucons, 2},
5715 {"ulong", s_alpha_ucons, 4},
5716 {"uquad", s_alpha_ucons, 8},
5719 /* Dwarf wants these versions of unaligned. */
5720 {"2byte", s_alpha_ucons, 2},
5721 {"4byte", s_alpha_ucons, 4},
5722 {"8byte", s_alpha_ucons, 8},
5725 /* We don't do any optimizing, so we can safely ignore these. */
5726 {"noalias", s_ignore, 0},
5727 {"alias", s_ignore, 0},
5729 {"arch", s_alpha_arch, 0},
5734 /* Build a BFD section with its flags set appropriately for the .lita,
5735 .lit8, or .lit4 sections. */
5738 create_literal_section (name, secp, symp)
5743 segT current_section = now_seg;
5744 int current_subsec = now_subseg;
5747 *secp = new_sec = subseg_new (name, 0);
5748 subseg_set (current_section, current_subsec);
5749 bfd_set_section_alignment (stdoutput, new_sec, 4);
5750 bfd_set_section_flags (stdoutput, new_sec,
5751 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
5754 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
5759 /* @@@ GP selection voodoo. All of this seems overly complicated and
5760 unnecessary; which is the primary reason it's for ECOFF only. */
5761 static inline void maybe_set_gp PARAMS ((asection *));
5770 vma = bfd_get_section_vma (foo, sec);
5771 if (vma && vma < alpha_gp_value)
5772 alpha_gp_value = vma;
5778 assert (alpha_gp_value == 0);
5780 /* Get minus-one in whatever width... */
5784 /* Select the smallest VMA of these existing sections. */
5785 maybe_set_gp (alpha_lita_section);
5787 /* These were disabled before -- should we use them? */
5788 maybe_set_gp (sdata);
5789 maybe_set_gp (lit8_sec);
5790 maybe_set_gp (lit4_sec);
5793 /* @@ Will a simple 0x8000 work here? If not, why not? */
5794 #define GP_ADJUSTMENT (0x8000 - 0x10)
5796 alpha_gp_value += GP_ADJUSTMENT;
5798 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
5801 printf (_("Chose GP value of %lx\n"), alpha_gp_value);
5804 #endif /* OBJ_ECOFF */
5807 /* Map 's' to SHF_ALPHA_GPREL. */
5810 alpha_elf_section_letter (letter, ptr_msg)
5815 return SHF_ALPHA_GPREL;
5817 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
5821 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
5824 alpha_elf_section_flags (flags, attr, type)
5826 int attr, type ATTRIBUTE_UNUSED;
5828 if (attr & SHF_ALPHA_GPREL)
5829 flags |= SEC_SMALL_DATA;
5832 #endif /* OBJ_ELF */
5834 /* Called internally to handle all alignment needs. This takes care
5835 of eliding calls to frag_align if'n the cached current alignment
5836 says we've already got it, as well as taking care of the auto-align
5837 feature wrt labels. */
5840 alpha_align (n, pfill, label, force)
5844 int force ATTRIBUTE_UNUSED;
5846 if (alpha_current_align >= n)
5851 if (subseg_text_p (now_seg))
5852 frag_align_code (n, 0);
5854 frag_align (n, 0, 0);
5857 frag_align (n, *pfill, 0);
5859 alpha_current_align = n;
5861 if (label != NULL && S_GET_SEGMENT (label) == now_seg)
5863 symbol_set_frag (label, frag_now);
5864 S_SET_VALUE (label, (valueT) frag_now_fix ());
5867 record_alignment (now_seg, n);
5869 /* ??? If alpha_flag_relax && force && elf, record the requested alignment
5870 in a reloc for the linker to see. */
5873 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
5874 of an rs_align_code fragment. */
5877 alpha_handle_align (fragp)
5880 static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
5881 static char const nopunop[8] = {
5882 0x1f, 0x04, 0xff, 0x47,
5883 0x00, 0x00, 0xfe, 0x2f
5889 if (fragp->fr_type != rs_align_code)
5892 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
5893 p = fragp->fr_literal + fragp->fr_fix;
5906 memcpy (p, unop, 4);
5912 memcpy (p, nopunop, 8);
5914 fragp->fr_fix += fix;
5918 /* The Alpha has support for some VAX floating point types, as well as for
5919 IEEE floating point. We consider IEEE to be the primary floating point
5920 format, and sneak in the VAX floating point support here. */
5921 #define md_atof vax_md_atof
5922 #include "config/atof-vax.c"