1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright (C) 2000 Free Software Foundation, Inc.
4 Contributed by Axis Communications AB, Lund, Sweden.
5 Originally written for GAS 1.38.1 by Mikael Asker.
6 Updated, BFDized and GNUified by Hans-Peter Nilsson.
8 This file is part of GAS, the GNU Assembler.
10 GAS is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GAS is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GAS; see the file COPYING. If not, write to the
22 Free Software Foundation, 59 Temple Place - Suite 330, Boston,
23 MA 02111-1307, USA. */
29 #include "opcode/cris.h"
31 /* Conventions used here:
32 Generally speaking, pointers to binutils types such as "fragS" and
33 "expressionS" get parameter and variable names ending in "P", such as
34 "fragP", to harmonize with the rest of the binutils code. Other
35 pointers get a "p" suffix, such as "bufp". Any function or type-name
36 that could clash with a current or future binutils or GAS function get
39 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
40 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
43 CRIS_INSN_NORMAL, CRIS_INSN_NONE, CRIS_INSN_BRANCH
46 /* An instruction will have one of these prefixes.
47 Although the same bit-pattern, we handle BDAP with an immediate
48 expression (eventually quick or [pc+]) different from when we only have
49 register expressions. */
52 PREFIX_NONE, PREFIX_BDAP_IMM, PREFIX_BDAP, PREFIX_BIAP, PREFIX_DIP,
56 /* The prefix for an instruction. */
59 enum prefix_kind kind;
63 /* There might be an expression to be evaluated, like I in [rN+I]. */
66 /* If there's an expression, we might need a relocation. Here's the
67 type of what relocation to start relaxaton with.
68 The relocation is assumed to start immediately after the prefix insn,
69 so we don't provide an offset. */
70 enum bfd_reloc_code_real reloc;
73 /* The description of the instruction being assembled. */
74 struct cris_instruction
76 /* If CRIS_INSN_NONE, then this insn is of zero length. */
77 enum cris_insn_kind insn_type;
79 /* If a special register was mentioned, this is its description, else
81 const struct cris_spec_reg *spec_reg;
85 /* An insn may have at most one expression; theoretically there could be
86 another in its prefix (but I don't see how that could happen). */
89 /* The expression might need a relocation. Here's one to start
91 enum bfd_reloc_code_real reloc;
93 /* The size in bytes of an immediate expression, or zero in
98 static void cris_process_instruction PARAMS ((char *,
99 struct cris_instruction *,
100 struct cris_prefix *));
101 static int get_bwd_size_modifier PARAMS ((char **, int *));
102 static int get_bw_size_modifier PARAMS ((char **, int *));
103 static int get_gen_reg PARAMS ((char **, int *));
104 static int get_spec_reg PARAMS ((char **,
105 const struct cris_spec_reg **));
106 static int get_autoinc_prefix_or_indir_op PARAMS ((char **,
107 struct cris_prefix *,
110 static int get_3op_or_dip_prefix_op PARAMS ((char **,
111 struct cris_prefix *));
112 static int cris_get_expression PARAMS ((char **, expressionS *));
113 static int get_flags PARAMS ((char **, int *));
114 static void gen_bdap PARAMS ((int, expressionS *));
115 static int branch_disp PARAMS ((int));
116 static void gen_cond_branch_32 PARAMS ((char *, char *, fragS *,
117 symbolS *, symbolS *, long int));
118 static void cris_number_to_imm PARAMS ((char *, long, int, fixS *));
119 static void cris_create_short_jump PARAMS ((char *, addressT, addressT,
120 fragS *, symbolS *));
121 /* Handle to the opcode hash table. */
122 static struct hash_control *op_hash = NULL;
124 const pseudo_typeS md_pseudo_table[] =
130 static int warn_for_branch_expansion = 0;
132 const char cris_comment_chars[] = ";";
134 /* This array holds the chars that only start a comment at the beginning of
135 a line. If the line seems to have the form '# 123 filename'
136 .line and .file directives will appear in the pre-processed output */
137 /* Note that input_file.c hand-checks for '#' at the beginning of the
138 first line of the input file. This is because the compiler outputs
139 #NO_APP at the beginning of its output. */
140 /* Also note that slash-star will always start a comment */
141 const char line_comment_chars[] = "#";
142 const char line_separator_chars[] = "@";
144 /* Now all floating point support is shut off. See md_atof. */
145 const char EXP_CHARS[] = "";
146 const char FLT_CHARS[] = "";
149 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
151 ---/ /--+-----------------+-----------------+-----------------+
152 | what state ? | how long ? |
153 ---/ /--+-----------------+-----------------+-----------------+
155 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
156 This is a Un*x convention.
157 Not all lengths are legit for a given value of (what state).
159 Groups for CRIS address relaxing:
162 length: byte, word, 10-byte expansion
165 length: byte, word, dword */
167 #define STATE_CONDITIONAL_BRANCH (1)
168 #define STATE_BASE_PLUS_DISP_PREFIX (2)
170 #define STATE_LENGTH_MASK (3)
171 #define STATE_BYTE (0)
172 #define STATE_WORD (1)
173 #define STATE_DWORD (2)
174 /* Symbol undefined. */
175 #define STATE_UNDF (3)
176 #define STATE_MAX_LENGTH (3)
179 /* These displacements are relative to the adress following the opcode
180 word of the instruction. The first letter is Byte, Word. The 2nd
181 letter is Forward, Backward. */
183 #define BRANCH_BF ( 254)
184 #define BRANCH_BB (-256)
185 #define BRANCH_WF (2+ 32767)
186 #define BRANCH_WB (2+-32768)
188 #define BDAP_BF ( 127)
189 #define BDAP_BB (-128)
190 #define BDAP_WF ( 32767)
191 #define BDAP_WB (-32768)
193 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
195 const relax_typeS md_cris_relax_table[] =
197 /* Error sentinel (0, 0). */
210 {BRANCH_BF, BRANCH_BB, 0, ENCODE_RELAX (1, 1)},
212 /* Bcc [PC+] (1, 1). */
213 {BRANCH_WF, BRANCH_WB, 2, ENCODE_RELAX (1, 2)},
215 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
223 {BDAP_BF, BDAP_BB, 0, ENCODE_RELAX (2, 1)},
225 /* BDAP.[bw] [PC+] (2, 1). */
226 {BDAP_WF, BDAP_WB, 2, ENCODE_RELAX (2, 2)},
228 /* BDAP.d [PC+] (2, 2). */
242 /* Target-specific multicharacter options, not const-declared at usage
243 in 2.9.1 and CVS of 2000-02-16. */
244 struct option md_longopts[] =
246 {NULL, no_argument, NULL, 0}
249 /* Not const-declared at usage in 2.9.1. */
250 size_t md_longopts_size = sizeof (md_longopts);
251 const char *md_shortopts = "hHN";
254 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
255 since a short_jump must skip a *number* of long jumps, it must also be
256 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
257 for the delay slot and hope that the jump table at most needs
258 32767/4=8191 long-jumps. A branch is better than a jump, since it is
259 relative; we will not have a reloc to fix up somewhere.
261 Note that we can't add relocs, because relaxation uses these fixed
262 numbers, and md_create_short_jump is called after relaxation. */
264 const int md_short_jump_size = 6;
265 const int md_long_jump_size = 6;
268 /* Report output format. */
270 cris_target_format ()
272 switch (OUTPUT_FLAVOR)
274 case bfd_target_aout_flavour:
277 case bfd_target_elf_flavour:
286 /* Prepare machine-dependent frags for relaxation.
288 Called just before relaxation starts. Any symbol that is now undefined
289 will not become defined.
291 Return the correct fr_subtype in the frag.
293 Return the initial "guess for fr_var" to caller. The guess for fr_var
294 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
295 or fr_var contributes to our returned value.
297 Although it may not be explicit in the frag, pretend
298 fr_var starts with a value. */
301 md_estimate_size_before_relax (fragP, segment_type)
303 /* The segment is either N_DATA or N_TEXT. */
308 old_fr_fix = fragP->fr_fix;
310 switch (fragP->fr_subtype)
312 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF):
313 if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
315 /* The symbol lies in the same segment - a relaxable case. */
317 = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE);
321 /* Unknown or not the same segment, so not relaxable. */
324 /* A small branch-always (2 bytes) to the "real" branch
325 instruction, plus a delay-slot nop (2 bytes), plus a
326 jump (2 plus 4 bytes). See gen_cond_branch_32. */
327 fragP->fr_fix += 2 + 2 + 2 + 4;
328 writep = fragP->fr_literal + old_fr_fix;
329 gen_cond_branch_32 (fragP->fr_opcode, writep, fragP,
330 fragP->fr_symbol, (symbolS *)NULL,
336 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
337 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
338 /* We *might* give a better initial guess if we peek at offsets
339 now, but the caller will relax correctly and without this, so
343 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF):
344 /* Note that we can not do anything sane with relaxing
345 [rX + a_known_symbol_in_text], it will have to be a 32-bit
348 We could play tricks with managing a constant pool and make
349 a_known_symbol_in_text a "bdap [pc + offset]" pointing there, but
350 that's pointless, it can only be longer and slower.
352 Off-topic: If PIC becomes *really* important, and has to be done
353 in the assembler and linker only (which would be weird or
354 clueless), we can so something. Imagine:
355 move.x [r + 32_bit_symbol],r
356 move.x [32_bit_symbol],r
357 move.x 32_bit_symbol,r
358 can be shortened by a word (8-bit offset) if we are close to the
359 symbol or keep its length (16-bit offset) or be a word longer
360 (32-bit offset). Then change the 32_bit_symbol into a "bdap [pc
361 + offset]", and put the offset to the 32_bit_symbol in "offset".
362 Weird, to say the least, and we still have to add support for a
363 PC-relative relocation in the loader (shared libraries). But
364 it's an interesting thought. */
366 if (S_GET_SEGMENT (fragP->fr_symbol) != absolute_section)
368 /* Go for dword if not absolute or same segment. */
370 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD);
375 /* Absolute expression. */
377 value = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
379 if (value >= -128 && value <= 127)
381 /* Byte displacement. */
382 (fragP->fr_opcode)[0] = value;
386 /* Word or dword displacement. */
387 int pow2_of_size = 1;
390 if (value < -32768 || value > 32767)
392 /* Outside word range, make it a dword. */
396 /* Modify the byte-offset BDAP into a word or dword offset
397 BDAP. Or really, a BDAP rX,8bit into a
398 BDAP.[wd] rX,[PC+] followed by a and a word or dword. */
399 (fragP->fr_opcode)[0] = BDAP_PC_LOW + pow2_of_size * 16;
401 /* Keep the register number in the highest four bits. */
402 (fragP->fr_opcode)[1] &= 0xF0;
403 (fragP->fr_opcode)[1] |= BDAP_INCR_HIGH;
405 /* It grew by two or four bytes. */
406 fragP->fr_fix += 1 << pow2_of_size;
407 writep = fragP->fr_literal + old_fr_fix;
408 md_number_to_chars (writep, value, 1 << pow2_of_size);
415 BAD_CASE (fragP->fr_subtype);
418 return fragP->fr_var + (fragP->fr_fix - old_fr_fix);
422 /* Perform post-processing of machine-dependent frags after relaxation.
423 Called after relaxation is finished.
425 fr_type == rs_machine_dependent.
426 fr_subtype is what the address relaxed to.
428 Out: Any fixS:s and constants are set up.
430 The caller will turn the frag into a ".space 0". */
433 md_convert_frag (abfd, sec, fragP)
434 bfd *abfd ATTRIBUTE_UNUSED;
435 segT sec ATTRIBUTE_UNUSED;
438 /* Pointer to first byte in variable-sized part of the frag. */
441 /* Pointer to first opcode byte in frag. */
444 /* Used to check integrity of the relaxation.
445 One of 2 = long, 1 = word, or 0 = byte. */
448 /* Size in bytes of variable-sized part of frag. */
449 int var_part_size = 0;
451 /* This is part of *fragP. It contains all information about addresses
452 and offsets to varying parts. */
454 unsigned long var_part_offset;
456 /* Where, in file space, is _var of *fragP? */
457 unsigned long address_of_var_part = 0;
459 /* Where, in file space, does addr point? */
460 unsigned long target_address;
462 know (fragP->fr_type == rs_machine_dependent);
464 length_code = fragP->fr_subtype & STATE_LENGTH_MASK;
465 know (length_code >= 0 && length_code < STATE_MAX_LENGTH);
467 var_part_offset = fragP->fr_fix;
468 var_partp = fragP->fr_literal + var_part_offset;
469 opcodep = fragP->fr_opcode;
471 symbolP = fragP->fr_symbol;
474 ? S_GET_VALUE (symbolP) + symbol_get_frag(fragP->fr_symbol)->fr_address
475 : 0 ) + fragP->fr_offset;
476 address_of_var_part = fragP->fr_address + var_part_offset;
478 switch (fragP->fr_subtype)
480 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
481 opcodep[0] = branch_disp ((target_address - address_of_var_part));
485 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
486 /* We had a quick immediate branch, now turn it into a word one i.e. a
488 opcodep[0] = BRANCH_PC_LOW;
490 opcodep[1] |= BRANCH_INCR_HIGH;
491 md_number_to_chars (var_partp,
492 (long) (target_address - (address_of_var_part + 2)),
497 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
498 gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
499 fragP->fr_symbol, (symbolS *)NULL,
501 /* Ten bytes added: a branch, nop and a jump. */
502 var_part_size = 2 + 2 + 4 + 2;
505 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
506 var_partp[0] = target_address - (address_of_var_part + 1);
510 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
511 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
512 one that uses PC autoincrement. */
513 opcodep[0] = BDAP_PC_LOW + (1 << 4);
515 opcodep[1] |= BDAP_INCR_HIGH;
516 md_number_to_chars (var_partp, (long)(target_address), 2);
520 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
521 /* We had a BDAP 16-bit "word", change the offset to a dword. */
522 opcodep[0] = BDAP_PC_LOW + (2 << 4);
524 opcodep[1] |= BDAP_INCR_HIGH;
525 if (fragP->fr_symbol == NULL)
526 md_number_to_chars (var_partp, fragP->fr_offset, 4);
528 fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol,
529 fragP->fr_offset, 0, BFD_RELOC_32);
534 BAD_CASE (fragP->fr_subtype);
538 fragP->fr_fix += var_part_size;
542 /* Generate a short jump around a secondary jump table.
543 Used by md_create_long_jump.
545 This used to be md_create_short_jump, but is now called from
546 md_create_long_jump instead, when sufficient.
547 since the sizes of the jumps are the same. It used to be brittle,
548 making possibilities for creating bad code. */
551 cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol)
555 fragS *fragP ATTRIBUTE_UNUSED;
556 symbolS *to_symbol ATTRIBUTE_UNUSED;
560 distance = to_addr - from_addr;
562 if (-254 <= distance && distance <= 256)
564 /* Create a "short" short jump: "BA distance - 2". */
565 storep[0] = branch_disp (distance-2);
566 storep[1] = BA_QUICK_HIGH;
568 /* A nop for the delay slot. */
569 md_number_to_chars (storep+2, NOP_OPCODE, 2);
571 /* The extra word should be filled with something sane too. Make it
572 a nop to keep disassembly sane. */
573 md_number_to_chars (storep+4, NOP_OPCODE, 2);
577 /* Make it a "long" short jump: "BA (PC+)". */
578 md_number_to_chars (storep, BA_PC_INCR_OPCODE, 2);
580 /* ".WORD distance - 4". */
581 md_number_to_chars (storep + 2, (long) (distance - 4), 2);
583 /* A nop for the delay slot. */
584 md_number_to_chars (storep+4, NOP_OPCODE, 2);
589 /* Generate a long jump in a secondary jump table.
591 storep Where to store the jump instruction.
592 from_addr Address of the jump instruction.
593 to_addr Destination address of the jump.
594 fragP Which frag the destination address operand
596 to_symbol Destination symbol. */
599 md_create_long_jump (storep, from_addr, to_addr, fragP, to_symbol)
608 distance = to_addr - from_addr;
610 if (-32763 <= distance && distance <= 32772)
612 /* Then make it a "short" long jump. */
613 cris_create_short_jump (storep, from_addr, to_addr, fragP,
618 /* We have a "long" long jump: "JUMP (PC+)". */
619 md_number_to_chars (storep, JUMP_PC_INCR_OPCODE, 2);
621 /* Follow with a ".DWORD to_addr". */
622 fix_new (fragP, storep + 2 - fragP->fr_literal, 4, to_symbol,
628 /* Port-specific assembler initialization. */
632 const char *hashret = NULL;
635 /* Set up a hash table for the instructions. */
636 op_hash = hash_new ();
638 as_fatal (_("Virtual memory exhausted"));
640 while (cris_opcodes[i].name != NULL)
642 const char *name = cris_opcodes[i].name;
643 hashret = hash_insert (op_hash, name, (PTR) &cris_opcodes[i]);
645 if (hashret != NULL && *hashret != '\0')
646 as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes[i].name,
647 *hashret == 0 ? _("(unknown reason)") : hashret);
650 if (cris_opcodes[i].match & cris_opcodes[i].lose)
651 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes[i].name,
652 cris_opcodes[i].args);
655 } while (cris_opcodes[i].name != NULL
656 && strcmp (cris_opcodes[i].name, name) == 0);
661 /* Assemble a source line. */
666 struct cris_instruction output_instruction;
667 struct cris_prefix prefix;
673 /* Do the low-level grunt - assemble to bits and split up into a prefix
674 and ordinary insn. */
675 cris_process_instruction (str, &output_instruction, &prefix);
677 /* Handle any prefixes to the instruction. */
683 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
684 extra bytes, so we handle it separately. */
685 case PREFIX_BDAP_IMM:
686 gen_bdap (prefix.base_reg_number, &prefix.expr);
692 opcodep = frag_more (2);
694 /* Output the prefix opcode. */
695 md_number_to_chars (opcodep, (long) prefix.opcode, 2);
697 /* This only happens for DIP, but is ok for the others as they have
699 if (prefix.reloc != BFD_RELOC_NONE)
701 /* Output an absolute mode address. */
703 fix_new_exp (frag_now, (p - frag_now->fr_literal), 4,
704 &prefix.expr, 0, prefix.reloc);
709 opcodep = frag_more (2);
711 /* Output the prefix opcode. Being a "push", we add the negative
712 size of the register to "sp". */
713 if (output_instruction.spec_reg != NULL)
715 /* Special register. */
716 opcodep[0] = -output_instruction.spec_reg->reg_size;
720 /* General register. */
723 opcodep[1] = (REG_SP << 4) + (BDAP_QUICK_OPCODE >> 8);
727 BAD_CASE (prefix.kind);
730 /* If we only had a prefix insn, we're done. */
731 if (output_instruction.insn_type == CRIS_INSN_NONE)
734 /* Done with the prefix. Continue with the main instruction. */
735 opcodep = frag_more (2);
737 /* Output the instruction opcode. */
738 md_number_to_chars (opcodep, (long)(output_instruction.opcode), 2);
740 /* Output the symbol-dependent instruction stuff. */
741 if (output_instruction.insn_type == CRIS_INSN_BRANCH)
743 segT to_seg = absolute_section;
744 int is_undefined = 0;
747 if (output_instruction.expr.X_op != O_constant)
749 to_seg = S_GET_SEGMENT (output_instruction.expr.X_add_symbol);
751 if (to_seg == undefined_section)
755 if (output_instruction.expr.X_op == O_constant
756 || to_seg == now_seg || is_undefined)
758 /* If is_undefined, then the expression may BECOME now_seg. */
759 length_code = is_undefined ? STATE_UNDF : STATE_BYTE;
761 /* Make room for max ten bytes of variable length. */
762 frag_var (rs_machine_dependent, 10, 0,
763 ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code),
764 output_instruction.expr.X_add_symbol,
765 output_instruction.expr.X_add_number,
770 /* We have: to_seg != now_seg && to_seg != undefined_section.
771 This means it is a branch to a known symbol in another
772 section. Code in data? Weird but valid. Emit a 32-bit
774 gen_cond_branch_32 (opcodep, frag_more (10), frag_now,
775 output_instruction.expr.X_add_symbol,
777 output_instruction.expr.X_add_number);
782 if (output_instruction.imm_oprnd_size > 0)
784 /* The intruction has an immediate operand. */
785 enum bfd_reloc_code_real reloc = 0;
787 switch (output_instruction.imm_oprnd_size)
789 /* Any byte-size immediate constants are treated as
790 word-size. FIXME: Thus overflow check does not work
794 reloc = BFD_RELOC_16;
798 reloc = BFD_RELOC_32;
802 BAD_CASE (output_instruction.imm_oprnd_size);
805 p = frag_more (output_instruction.imm_oprnd_size);
806 fix_new_exp (frag_now, (p - frag_now->fr_literal),
807 output_instruction.imm_oprnd_size,
808 &output_instruction.expr, 0, reloc);
810 else if (output_instruction.reloc != BFD_RELOC_NONE)
812 /* An immediate operand that has a relocation and needs to be
813 processed further. */
815 /* It is important to use fix_new_exp here and everywhere else
816 (and not fix_new), as fix_new_exp can handle "difference
817 expressions" - where the expression contains a difference of
818 two symbols in the same segment. */
819 fix_new_exp (frag_now, (opcodep - frag_now->fr_literal), 2,
820 &output_instruction.expr, 0,
821 output_instruction.reloc);
827 /* Low level text-to-bits assembly. */
829 cris_process_instruction (insn_text, out_insnp, prefixp)
831 struct cris_instruction *out_insnp;
832 struct cris_prefix *prefixp;
835 char modified_char = 0;
837 struct cris_opcode *instruction;
844 /* Reset these fields to a harmless state in case we need to return in
846 prefixp->kind = PREFIX_NONE;
847 prefixp->reloc = BFD_RELOC_NONE;
848 out_insnp->insn_type = CRIS_INSN_NORMAL;
849 out_insnp->imm_oprnd_size = 0;
851 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
852 that the caller has translated the opcode to lower-case, up to the
854 for (operands = insn_text;
859 /* Terminate the opcode after letters, but save the character there if
860 it was of significance. */
867 /* Put back the modified character later */
868 modified_char = *operands;
872 /* Consume the character after the mnemonic and replace */
878 as_bad (_("Unknown opcode: `%s'"), insn_text);
882 /* Find the instruction. */
883 instruction = (struct cris_opcode *) hash_find (op_hash, insn_text);
884 if (instruction == NULL)
886 as_bad (_("Unknown opcode: `%s'"), insn_text);
890 /* Put back the modified character. */
891 switch (modified_char)
897 *--operands = modified_char;
901 /* Try to match an opcode table slot. */
908 /* Initialize *prefixp, perhaps after being modified for a
910 prefixp->kind = PREFIX_NONE;
911 prefixp->reloc = BFD_RELOC_NONE;
913 /* Initialize *out_insnp. */
914 memset (out_insnp, 0, sizeof (*out_insnp));
915 out_insnp->opcode = instruction->match;
916 out_insnp->reloc = BFD_RELOC_NONE;
917 out_insnp->insn_type = CRIS_INSN_NORMAL;
918 out_insnp->imm_oprnd_size = 0;
922 /* Build the opcode, checking as we go to make sure that the
924 for (args = instruction->args;
931 /* If we've come to the end of arguments, we're done. */
937 /* Non-matcher character for disassembly.
943 /* These must match exactly. */
949 /* This is not really an operand, but causes a "BDAP
950 -size,SP" prefix to be output, for PUSH instructions. */
951 prefixp->kind = PREFIX_PUSH;
955 /* This letter marks an operand that should not be matched
956 in the assembler. It is a branch with 16-bit
957 displacement. The assembler will create them from the
958 8-bit flavor when necessary. The assembler does not
959 support the [rN+] operand, as the [r15+] that is
960 generated for 16-bit displacements. */
964 /* A 5-bit unsigned immediate in bits <4:0>. */
965 if (! cris_get_expression (&s, &out_insnp->expr))
969 if (out_insnp->expr.X_op == O_constant
970 && (out_insnp->expr.X_add_number < 0
971 || out_insnp->expr.X_add_number > 31))
972 as_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
973 out_insnp->expr.X_add_number);
975 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_5;
980 /* A 4-bit unsigned immediate in bits <3:0>. */
981 if (! cris_get_expression (&s, &out_insnp->expr))
985 if (out_insnp->expr.X_op == O_constant
986 && (out_insnp->expr.X_add_number < 0
987 || out_insnp->expr.X_add_number > 15))
988 as_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
989 out_insnp->expr.X_add_number);
991 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_4;
996 /* General register in bits <15:12> and <3:0>. */
997 if (! get_gen_reg (&s, ®no))
1001 out_insnp->opcode |= regno /* << 0 */;
1002 out_insnp->opcode |= regno << 12;
1007 /* Flags from the condition code register. */
1011 if (! get_flags (&s, &flags))
1015 |= ((flags & 0xf0) << 8) | (flags & 0xf);
1020 /* A 6-bit signed immediate in bits <5:0>. */
1021 if (! cris_get_expression (&s, &out_insnp->expr))
1025 if (out_insnp->expr.X_op == O_constant
1026 && (out_insnp->expr.X_add_number < -32
1027 || out_insnp->expr.X_add_number > 31))
1028 as_bad (_("Immediate value not in 6 bit range: %ld"),
1029 out_insnp->expr.X_add_number);
1030 out_insnp->reloc = BFD_RELOC_CRIS_SIGNED_6;
1035 /* A 6-bit unsigned immediate in bits <5:0>. */
1036 if (! cris_get_expression (&s, &out_insnp->expr))
1040 if (out_insnp->expr.X_op == O_constant
1041 && (out_insnp->expr.X_add_number < 0
1042 || out_insnp->expr.X_add_number > 63))
1043 as_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1044 out_insnp->expr.X_add_number);
1045 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_6;
1050 /* A size modifier, B, W or D, to be put in a bit position
1051 suitable for CLEAR instructions (i.e. reflecting a zero
1053 if (! get_bwd_size_modifier (&s, &size_bits))
1060 out_insnp->opcode |= 0 << 12;
1064 out_insnp->opcode |= 4 << 12;
1068 out_insnp->opcode |= 8 << 12;
1075 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1076 if (! get_bwd_size_modifier (&s, &size_bits))
1080 out_insnp->opcode |= size_bits << 4;
1085 /* A branch expression. */
1086 if (! cris_get_expression (&s, &out_insnp->expr))
1090 out_insnp->insn_type = CRIS_INSN_BRANCH;
1095 /* A BDAP expression for any size, "expr,r". */
1096 if (! cris_get_expression (&s, &prefixp->expr))
1105 if (!get_gen_reg (&s, &prefixp->base_reg_number))
1108 /* Since 'O' is used with an explicit bdap, we have no
1109 "real" instruction. */
1110 prefixp->kind = PREFIX_BDAP_IMM;
1111 out_insnp->insn_type = CRIS_INSN_NONE;
1116 /* Special register in bits <15:12>. */
1117 if (! get_spec_reg (&s, &out_insnp->spec_reg))
1121 /* Use of some special register names come with a
1122 specific warning. Note that we have no ".cpu type"
1123 pseudo yet, so some of this is just unused
1125 if (out_insnp->spec_reg->warning)
1126 as_warn (out_insnp->spec_reg->warning);
1127 else if (out_insnp->spec_reg->applicable_version
1128 == cris_ver_warning)
1129 /* Others have a generic warning. */
1130 as_warn (_("Unimplemented register `%s' specified"),
1131 out_insnp->spec_reg->name);
1134 |= out_insnp->spec_reg->number << 12;
1139 /* This character is used in the disassembler to
1140 recognize a prefix instruction to fold into the
1141 addressing mode for the next instruction. It is
1146 /* General register in bits <15:12>. */
1147 if (! get_gen_reg (&s, ®no))
1151 out_insnp->opcode |= regno << 12;
1156 /* General register in bits <3:0>. */
1157 if (! get_gen_reg (&s, ®no))
1161 out_insnp->opcode |= regno /* << 0 */;
1166 /* Source operand in bit <10> and a prefix; a 3-operand
1168 if (! get_3op_or_dip_prefix_op (&s, prefixp))
1174 /* Source operand in bits <10>, <3:0> and optionally a
1175 prefix; i.e. an indirect operand or an side-effect
1177 if (! get_autoinc_prefix_or_indir_op (&s, prefixp, &mode,
1184 if (prefixp->kind != PREFIX_NONE)
1186 /* A prefix, so it has the autoincrement bit
1188 out_insnp->opcode |= (AUTOINCR_BIT << 8);
1191 /* No prefix. The "mode" variable contains bits like
1192 whether or not this is autoincrement mode. */
1193 out_insnp->opcode |= (mode << 10);
1195 out_insnp->opcode |= regno /* << 0 */ ;
1200 /* Rs.m in bits <15:12> and <5:4>. */
1201 if (! get_gen_reg (&s, ®no)
1202 || ! get_bwd_size_modifier (&s, &size_bits))
1206 out_insnp->opcode |=
1207 (regno << 12) | (size_bits << 4);
1212 /* Source operand in bits <10>, <3:0> and optionally a
1213 prefix; i.e. an indirect operand or an side-effect
1216 The difference to 's' is that this does not allow an
1217 "immediate" expression. */
1218 if (! get_autoinc_prefix_or_indir_op (&s, prefixp,
1226 if (prefixp->kind != PREFIX_NONE)
1228 /* A prefix, and those matched here always have
1229 side-effects (see 's' case). */
1230 out_insnp->opcode |= (AUTOINCR_BIT << 8);
1234 /* No prefix. The "mode" variable contains bits
1235 like whether or not this is autoincrement
1237 out_insnp->opcode |= (mode << 10);
1240 out_insnp->opcode |= regno /* << 0 */;
1245 /* Size modifier (B or W) in bit <4>. */
1246 if (! get_bw_size_modifier (&s, &size_bits))
1250 out_insnp->opcode |= size_bits << 4;
1258 /* We get here when we fail a match above or we found a
1259 complete match. Break out of this loop. */
1263 /* Was it a match or a miss? */
1266 /* If it's just that the args don't match, maybe the next
1267 item in the table is the same opcode but with
1268 matching operands. */
1269 if (instruction[1].name != NULL
1270 && ! strcmp (instruction->name, instruction[1].name))
1272 /* Yep. Restart and try that one instead. */
1279 /* We've come to the end of instructions with this
1280 opcode, so it must be an error. */
1281 as_bad (_("Illegal operands"));
1287 /* We have a match. Check if there's anything more to do. */
1290 /* There was an immediate mode operand, so we must check
1291 that it has an appropriate size. */
1293 switch (instruction->imm_oprnd_size)
1297 /* Shouldn't happen; this one does not have immediate
1298 operands with different sizes. */
1299 BAD_CASE (instruction->imm_oprnd_size);
1303 out_insnp->imm_oprnd_size = 4;
1307 switch (out_insnp->spec_reg->reg_size)
1310 if (out_insnp->expr.X_op == O_constant
1311 && (out_insnp->expr.X_add_number < -128
1312 || out_insnp->expr.X_add_number > 255))
1313 as_bad (_("Immediate value not in 8 bit range: %ld"),
1314 out_insnp->expr.X_add_number);
1317 /* FIXME: We need an indicator in the instruction
1318 table to pass on, to indicate if we need to check
1319 overflow for a signed or unsigned number. */
1320 if (out_insnp->expr.X_op == O_constant
1321 && (out_insnp->expr.X_add_number < -32768
1322 || out_insnp->expr.X_add_number > 65535))
1323 as_bad (_("Immediate value not in 16 bit range: %ld"),
1324 out_insnp->expr.X_add_number);
1325 out_insnp->imm_oprnd_size = 2;
1329 out_insnp->imm_oprnd_size = 4;
1333 BAD_CASE (out_insnp->spec_reg->reg_size);
1341 if (out_insnp->expr.X_op == O_constant
1342 && (out_insnp->expr.X_add_number < -128
1343 || out_insnp->expr.X_add_number > 255))
1344 as_bad (_("Immediate value not in 8 bit range: %ld"),
1345 out_insnp->expr.X_add_number);
1348 if (out_insnp->expr.X_op == O_constant
1349 && (out_insnp->expr.X_add_number < -32768
1350 || out_insnp->expr.X_add_number > 65535))
1351 as_bad (_("Immediate value not in 16 bit range: %ld"),
1352 out_insnp->expr.X_add_number);
1353 out_insnp->imm_oprnd_size = 2;
1357 out_insnp->imm_oprnd_size = 4;
1361 BAD_CASE (out_insnp->spec_reg->reg_size);
1371 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
1372 which must point to a '.' in front of the modifier. On successful
1373 return, *cPP is advanced to the character following the size
1374 modifier, and is undefined otherwise.
1376 cPP Pointer to pointer to string starting
1377 with the size modifier.
1379 size_bitsp Pointer to variable to contain the size bits on
1382 Return 1 iff a correct size modifier is found, else 0. */
1385 get_bwd_size_modifier (cPP, size_bitsp)
1393 /* Consume the '.' */
1417 /* Consume the size letter. */
1424 /* Get a B or W size modifier from the string pointed out by *cPP,
1425 which must point to a '.' in front of the modifier. On successful
1426 return, *cPP is advanced to the character following the size
1427 modifier, and is undefined otherwise.
1429 cPP Pointer to pointer to string starting
1430 with the size modifier.
1432 size_bitsp Pointer to variable to contain the size bits on
1435 Return 1 iff a correct size modifier is found, else 0. */
1438 get_bw_size_modifier (cPP, size_bitsp)
1446 /* Consume the '.' */
1465 /* Consume the size letter. */
1472 /* Get a general register from the string pointed out by *cPP. The
1473 variable *cPP is advanced to the character following the general
1474 register name on a successful return, and has its initial position
1477 cPP Pointer to pointer to string, beginning with a general
1480 regnop Pointer to int containing the register number.
1482 Return 1 iff a correct general register designator is found,
1486 get_gen_reg (cPP, regnop)
1497 /* "P" as in "PC"? Consume the "P". */
1500 if ((**cPP == 'C' || **cPP == 'c')
1501 && ! isalnum ((*cPP)[1]))
1503 /* It's "PC": consume the "c" and we're done. */
1512 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r' */
1515 if (isdigit (**cPP))
1517 /* It's r[0-9]. Consume and check the next digit. */
1518 *regnop = **cPP - '0';
1521 if (! isalnum (**cPP))
1523 /* No more digits, we're done. */
1528 /* One more digit. Consume and add. */
1529 *regnop = *regnop*10 + (**cPP - '0');
1531 /* We need to check for a valid register number; Rn,
1532 0 <= n <= MAX_REG. */
1533 if (*regnop <= MAX_REG)
1535 /* Consume second digit. */
1545 /* "S" as in "SP"? Consume the "S". */
1547 if (**cPP == 'P' || **cPP == 'p')
1549 /* It's "SP": consume the "p" and we're done. */
1557 /* Just here to silence compilation warnings. */
1561 /* We get here if we fail. Restore the pointer. */
1567 /* Get a special register from the string pointed out by *cPP. The
1568 variable *cPP is advanced to the character following the special
1569 register name if one is found, and retains its original position
1572 cPP Pointer to pointer to string starting with a special register
1575 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
1576 register description will be stored.
1578 Return 1 iff a correct special register name is found. */
1581 get_spec_reg (cPP, sregpp)
1583 const struct cris_spec_reg **sregpp;
1588 const struct cris_spec_reg *sregp;
1590 /* Loop over all special registers. */
1591 for (sregp = cris_spec_regs;
1592 sregp->name != NULL;
1596 /* Start over from beginning of the supposed name. */
1601 && (isupper (*s1) ? tolower (*s1) == *s2 : *s1 == *s2))
1607 /* For a match, we must have consumed the name in the table, and we
1608 must be outside what could be part of a name. Assume here that a
1609 test for alphanumerics is sufficient for a name test. */
1610 if (*s2 == 0 && ! isalnum (*s1))
1612 /* We have a match. Update the pointer and be done. */
1619 /* If we got here, we did not find any name. */
1624 /* Get an unprefixed or side-effect-prefix operand from the string pointed
1625 out by *cPP. The pointer *cPP is advanced to the character following
1626 the indirect operand if we have success, else it contains an undefined
1629 cPP Pointer to pointer to string beginning with the first
1630 character of the supposed operand.
1632 prefixp Pointer to structure containing an optional instruction
1635 is_autoincp Pointer to int indicating the indirect or autoincrement
1638 src_regnop Pointer to int containing the source register number in
1641 imm_foundp Pointer to an int indicating if an immediate expression
1644 imm_exprP Pointer to a structure containing an immediate
1645 expression, if success and if *imm_foundp is nonzero.
1647 Return 1 iff a correct indirect operand is found. */
1650 get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop,
1651 imm_foundp, imm_exprP)
1653 struct cris_prefix *prefixp;
1657 expressionS *imm_exprP;
1659 /* Assume there was no immediate mode expression. */
1664 /* So this operand is one of:
1666 Autoincrement: [rN+]
1667 Indexed with assign: [rN=rM+rO.S]
1668 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
1670 Either way, consume the '['. */
1673 /* Get the rN register. */
1674 if (! get_gen_reg (cPP, src_regnop))
1675 /* If there was no register, then this cannot match. */
1679 /* We got the register, now check the next character. */
1683 /* Indirect mode. We're done here. */
1684 prefixp->kind = PREFIX_NONE;
1689 /* This must be an auto-increment mode, if there's a
1691 prefixp->kind = PREFIX_NONE;
1694 /* We consume this character and break out to check the
1700 /* This must be indexed with assign, or offset with assign
1704 /* Either way, the next thing must be a register. */
1705 if (! get_gen_reg (cPP, &prefixp->base_reg_number))
1706 /* No register, no match. */
1710 /* We've consumed "[rN=rM", so we must be looking at
1711 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
1715 int index_reg_number;
1721 /* This must be [rx=ry+[rz].s] or
1722 [rx=ry+[rz+].s] or no match. We must be
1723 looking at rz after consuming the '['. */
1726 if (!get_gen_reg (cPP, &index_reg_number))
1729 prefixp->kind = PREFIX_BDAP;
1731 = (BDAP_INDIR_OPCODE
1732 + (prefixp->base_reg_number << 12)
1733 + index_reg_number);
1737 /* We've seen "[rx=ry+[rz+" here, so now we
1738 know that there must be "].s]" left to
1741 prefixp->opcode |= AUTOINCR_BIT << 8;
1744 /* If it wasn't autoincrement, we don't need to
1747 /* Check the next-to-last ']'. */
1753 /* Check the ".s" modifier. */
1754 if (! get_bwd_size_modifier (cPP, &size_bits))
1757 prefixp->opcode |= size_bits << 4;
1759 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
1760 We break out to check the final ']'. */
1764 /* It wasn't an idirection. Check if it's a
1766 if (get_gen_reg (cPP, &index_reg_number))
1770 /* Indexed with assign mode: "[rN+rM.S]". */
1771 prefixp->kind = PREFIX_BIAP;
1773 = (BIAP_OPCODE + (index_reg_number << 12)
1774 + prefixp->base_reg_number /* << 0 */);
1776 if (! get_bwd_size_modifier (cPP, &size_bits))
1777 /* Size missing, this isn't a match. */
1781 /* Size found, break out to check the
1783 prefixp->opcode |= size_bits << 4;
1788 /* Not a register. Then this must be "[rN+I]". */
1789 if (cris_get_expression (cPP, &prefixp->expr))
1791 /* We've got offset with assign mode. Fill
1792 in the blanks and break out to match the
1794 prefixp->kind = PREFIX_BDAP_IMM;
1798 /* Neither register nor expression found, so
1799 this can't be a match. */
1803 /* Not "[rN+" but perhaps "[rN-"? */
1806 /* We must have an offset with assign mode. */
1807 if (! cris_get_expression (cPP, &prefixp->expr))
1808 /* No expression, no match. */
1812 /* We've got offset with assign mode. Fill
1813 in the blanks and break out to match the
1815 prefixp->kind = PREFIX_BDAP_IMM;
1820 /* Neither '+' nor '-' after "[rN=rM". Lose. */
1824 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
1829 /* When we get here, we have a match and will just check the closing
1830 ']'. We can still fail though. */
1835 /* Don't forget to consume the final ']'.
1836 Then return in glory. */
1842 /* No indirection. Perhaps a constant? */
1843 if (cris_get_expression (cPP, imm_exprP))
1845 /* Expression found, this is immediate mode. */
1846 prefixp->kind = PREFIX_NONE;
1848 *src_regnop = REG_PC;
1853 /* No luck today. */
1858 /* This function gets an indirect operand in a three-address operand
1859 combination from the string pointed out by *cPP. The pointer *cPP is
1860 advanced to the character following the indirect operand on success, or
1861 has an unspecified value on failure.
1863 cPP Pointer to pointer to string begining
1866 prefixp Pointer to structure containing an
1869 Returns 1 iff a correct indirect operand is found. */
1872 get_3op_or_dip_prefix_op (cPP, prefixp)
1874 struct cris_prefix *prefixp;
1877 /* We must have a '[' or it's a clean failure. */
1883 /* Eat the first '['. */
1888 /* A second '[', so this must be double-indirect mode. */
1890 prefixp->kind = PREFIX_DIP;
1891 prefixp->opcode = DIP_OPCODE;
1893 /* Get the register or fail entirely. */
1894 if (! get_gen_reg (cPP, ®_number))
1898 prefixp->opcode |= reg_number /* << 0 */ ;
1901 /* Since we found a '+', this must be double-indirect
1902 autoincrement mode. */
1904 prefixp->opcode |= AUTOINCR_BIT << 8;
1907 /* There's nothing particular to do, if this was a
1908 double-indirect *without* autoincrement. */
1911 /* Check the first ']'. The second one is checked at the end. */
1915 /* Eat the first ']', so we'll be looking at a second ']'. */
1919 /* No second '['. Then we should have a register here, making
1921 if (get_gen_reg (cPP, &prefixp->base_reg_number))
1923 /* This must be indexed or offset mode: "[rN+I]" or
1924 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
1927 /* Not the first alternative, must be one of the last
1929 int index_reg_number;
1935 /* This is "[rx+["... Expect a register next. */
1939 if (!get_gen_reg (cPP, &index_reg_number))
1942 prefixp->kind = PREFIX_BDAP;
1944 = (BDAP_INDIR_OPCODE
1945 + (prefixp->base_reg_number << 12)
1946 + index_reg_number);
1948 /* We've seen "[rx+[ry", so check if this is
1952 /* Yep, now at "[rx+[ry+". */
1954 prefixp->opcode |= AUTOINCR_BIT << 8;
1956 /* If it wasn't autoincrement, we don't need to
1959 /* Check a first closing ']': "[rx+[ry]" or
1965 /* Now expect a size modifier ".S". */
1966 if (! get_bwd_size_modifier (cPP, &size_bits))
1969 prefixp->opcode |= size_bits << 4;
1971 /* Ok, all interesting stuff has been seen:
1972 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
1973 expect a final ']', which we'll do in a common
1977 /* Seen "[rN+", but not a '[', so check if we have a
1979 if (get_gen_reg (cPP, &index_reg_number))
1981 /* This is indexed mode: "[rN+rM.S]" or
1984 prefixp->kind = PREFIX_BIAP;
1987 | prefixp->base_reg_number /* << 0 */
1988 | (index_reg_number << 12));
1991 if (! get_bwd_size_modifier (cPP, &size_bits))
1992 /* Missing size, so fail. */
1995 /* Size found. Add that piece and drop down to
1996 the common checking of the closing ']'. */
1997 prefixp->opcode |= size_bits << 4;
2000 /* Seen "[rN+", but not a '[' or a register, so then
2001 it must be a constant "I". */
2002 if (cris_get_expression (cPP, &prefixp->expr))
2004 /* Expression found, so fill in the bits of offset
2005 mode and drop down to check the closing ']'. */
2006 prefixp->kind = PREFIX_BDAP_IMM;
2009 /* Nothing valid here: lose. */
2013 /* Seen "[rN" but no '+', so check if it's a '-'. */
2016 /* Yep, we must have offset mode. */
2017 if (! cris_get_expression (cPP, &prefixp->expr))
2018 /* No expression, so we lose. */
2022 /* Expression found to make this offset mode, so
2023 fill those bits and drop down to check the
2025 prefixp->kind = PREFIX_BDAP_IMM;
2030 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
2031 Hmm. Normally this is a simple indirect mode that we
2032 shouldn't match, but if we expect ']', then we have a
2033 zero offset, so it can be a three-address-operand,
2034 like "[rN],rO,rP", thus offset mode.
2036 Don't eat the ']', that will be done in the closing
2038 prefixp->expr.X_op = O_constant;
2039 prefixp->expr.X_add_number = 0;
2040 prefixp->expr.X_add_symbol = NULL;
2041 prefixp->expr.X_op_symbol = NULL;
2042 prefixp->kind = PREFIX_BDAP_IMM;
2047 /* A '[', but no second '[', and no register. Check if we
2048 have an expression, making this "[I]" for a double-indirect
2050 if (cris_get_expression (cPP, &prefixp->expr))
2052 /* Expression found, the so called absolute mode for a
2053 double-indirect prefix on PC. */
2054 prefixp->kind = PREFIX_DIP;
2056 = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
2057 prefixp->reloc = BFD_RELOC_32;
2060 /* Neither '[' nor register nor expression. We lose. */
2065 /* We get here as a closing ceremony to a successful match. We just
2066 need to check the closing ']'. */
2068 /* Oops. Close but no air-polluter. */
2071 /* Don't forget to consume that ']', before returning in glory. */
2077 /* Get an expression from the string pointed out by *cPP.
2078 The pointer *cPP is advanced to the character following the expression
2079 on a success, or retains its original value otherwise.
2081 cPP Pointer to pointer to string beginning with the expression.
2083 exprP Pointer to structure containing the expression.
2085 Return 1 iff a correct expression is found. */
2088 cris_get_expression (cPP, exprP)
2092 char *saved_input_line_pointer;
2095 /* The "expression" function expects to find an expression at the
2096 global variable input_line_pointer, so we have to save it to give
2097 the impression that we don't fiddle with global variables. */
2098 saved_input_line_pointer = input_line_pointer;
2099 input_line_pointer = *cPP;
2101 exp = expression (exprP);
2102 if (exprP->X_op == O_illegal || exprP->X_op == O_absent)
2104 input_line_pointer = saved_input_line_pointer;
2108 /* Everything seems to be fine, just restore the global
2109 input_line_pointer and say we're successful. */
2110 *cPP = input_line_pointer;
2111 input_line_pointer = saved_input_line_pointer;
2116 /* Get a sequence of flag characters from *spp. The pointer *cPP is
2117 advanced to the character following the expression. The flag
2118 characters are consecutive, no commas or spaces.
2120 cPP Pointer to pointer to string beginning with the expression.
2122 flagp Pointer to int to return the flags expression.
2124 Return 1 iff a correct flags expression is found. */
2127 get_flags (cPP, flagsp)
2180 /* We consider this successful if we stop at a comma or
2181 whitespace. Anything else, and we consider it a failure. */
2184 && ! isspace (**cPP))
2190 /* Don't forget to consume each flag character. */
2196 /* Generate code and fixes for a BDAP prefix.
2198 base_regno Int containing the base register number.
2200 exprP Pointer to structure containing the offset expression. */
2203 gen_bdap (base_regno, exprP)
2207 unsigned int opcode;
2210 /* Put out the prefix opcode; assume quick immediate mode at first. */
2211 opcode = BDAP_QUICK_OPCODE | (base_regno << 12);
2212 opcodep = frag_more (2);
2213 md_number_to_chars (opcodep, opcode, 2);
2215 if (exprP->X_op == O_constant)
2217 /* We have an absolute expression that we know the size of right
2222 value = exprP->X_add_number;
2223 if (value < -32768 || value > 32767)
2224 /* Outside range for a "word", make it a dword. */
2227 /* Assume "word" size. */
2230 /* If this is a signed-byte value, we can fit it into the prefix
2232 if (value >= -128 && value <= 127)
2236 /* This is a word or dword displacement, which will be put in a
2237 word or dword after the prefix. */
2240 opcodep[0] = BDAP_PC_LOW + (size << 4);
2242 opcodep[1] |= BDAP_INCR_HIGH;
2243 p = frag_more (1 << size);
2244 md_number_to_chars (p, value, 1 << size);
2248 /* The expression is not defined yet but may become absolute. We make
2249 it a relocation to be relaxed. */
2250 frag_var (rs_machine_dependent, 4, 0,
2251 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF),
2252 exprP->X_add_symbol, exprP->X_add_number, opcodep);
2256 /* Encode a branch displacement in the range -256..254 into the form used
2257 by CRIS conditional branch instructions.
2259 offset The displacement value in bytes. */
2262 branch_disp (offset)
2267 disp = offset & 0xFE;
2276 /* Generate code and fixes for a 32-bit conditional branch instruction
2277 created by "extending" an existing 8-bit branch instruction.
2279 opcodep Pointer to the word containing the original 8-bit branch
2282 writep Pointer to "extension area" following the first instruction
2285 fragP Pointer to the frag containing the instruction.
2287 add_symP, Parts of the destination address expression.
2292 gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num)
2300 if (warn_for_branch_expansion)
2302 /* FIXME: Find out and change to as_warn_where. Add testcase. */
2303 as_warn (_("32-bit conditional branch generated"));
2306 /* Here, writep points to what will be opcodep + 2. First, we change
2307 the actual branch in opcodep[0] and opcodep[1], so that in the
2308 final insn, it will look like:
2311 This means we don't have to worry about changing the opcode or
2312 messing with te delay-slot instruction. So, we move it to last in
2313 the "extended" branch, and just change the displacement. Admittedly,
2314 it's not the optimal extended construct, but we should get this
2315 rarely enough that it shouldn't matter. */
2317 writep[8] = branch_disp (-2-6);
2318 writep[9] = opcodep[1];
2320 /* Then, we change the branch to an unconditional branch over the
2321 extended part, to the new location of the Bcc:
2325 Note that these two writes are to currently different locations,
2328 md_number_to_chars (opcodep, BA_QUICK_OPCODE + 8, 2);
2329 md_number_to_chars (writep, NOP_OPCODE, 2);
2331 /* Then the extended thing, the 32-bit jump insn.
2332 opcodep+4: JUMP [PC+] */
2334 md_number_to_chars (writep + 2, JUMP_PC_INCR_OPCODE, 2);
2336 /* We have to fill in the actual value too.
2338 This is most probably an expression, but we can cope with an absolute
2339 value too. FIXME: Testcase needed. */
2341 if (add_symP == NULL && sub_symP == NULL)
2342 /* An absolute address. */
2343 md_number_to_chars (writep + 4, add_num, 4);
2346 /* Not absolute, we have to make it a frag for later evaluation. */
2347 know (sub_symP == 0);
2349 fix_new (fragP, writep + 4 - fragP->fr_literal, 4, add_symP,
2350 add_num, 0, BFD_RELOC_32);
2357 Turn a string in input_line_pointer into a floating point constant of
2358 type type, and store the appropriate bytes in *litp. The number of
2359 LITTLENUMS emitted is stored in *sizep.
2361 type A character from FLTCHARS that describes what kind of
2362 floating-point number is wanted.
2364 litp A pointer to an array that the result should be stored in.
2366 sizep A pointer to an integer where the size of the result is stored.
2368 But we don't support floating point constants in assembly code *at all*,
2369 since it's suboptimal and just opens up bug opportunities. GCC emits
2370 the bit patterns as hex. All we could do here is to emit what GCC
2371 would have done in the first place. *Nobody* writes floating-point
2372 code as assembly code, but if they do, they should be able enough to
2373 find out the correct bit patterns and use them. */
2376 md_atof (type, litp, sizep)
2377 char type ATTRIBUTE_UNUSED;
2378 char *litp ATTRIBUTE_UNUSED;
2379 int *sizep ATTRIBUTE_UNUSED;
2381 /* FIXME: Is this function mentioned in the internals.texi manual? If
2383 return _("Bad call to md_atof () - floating point formats are not supported");
2387 /* Turn a number as a fixS * into a series of bytes that represents the
2388 number on the target machine. The purpose of this procedure is the
2389 same as that of md_number_to_chars but this procedure is supposed to
2390 handle general bit field fixes and machine-dependent fixups.
2392 bufp Pointer to an array where the result should be stored.
2394 val The value to store.
2396 n The number of bytes in "val" that should be stored.
2398 fixP The fix to be applied to the bit field starting at bufp. */
2401 cris_number_to_imm (bufp, val, n, fixP)
2412 /* We put the relative "vma" for the other segment for inter-segment
2413 relocations in the object data to stay binary "compatible" (with an
2414 uninteresting old version) for the relocation.
2415 Maybe delete some day. */
2417 && (sym_seg = S_GET_SEGMENT (fixP->fx_addsy)) != now_seg)
2418 val += sym_seg->vma;
2420 switch (fixP->fx_r_type)
2422 /* Ditto here, we put the addend into the object code as
2423 well as the reloc addend. Keep it that way for now, to simplify
2424 regression tests on the object file contents. FIXME: Seems
2425 uninteresting now that we have a test suite. */
2428 /* No use having warnings here, since most hosts have a 32-bit type
2429 for "long" (which will probably change soon, now that I wrote
2431 bufp[3] = (val >> 24) & 0xFF;
2432 bufp[2] = (val >> 16) & 0xFF;
2433 bufp[1] = (val >> 8) & 0xFF;
2434 bufp[0] = val & 0xFF;
2437 /* FIXME: The 16 and 8-bit cases should have a way to check
2438 whether a signed or unsigned (or any signedness) number is
2440 FIXME: Does the as_bad calls find the line number by themselves,
2441 or should we change them into as_bad_where? */
2444 if (val > 0xffff || val < -32768)
2445 as_bad (_("Value not in 16 bit range: %ld"), val);
2446 if (! fixP->fx_addsy)
2448 bufp[1] = (val >> 8) & 0xFF;
2449 bufp[0] = val & 0xFF;
2454 if (val > 255 || val < -128)
2455 as_bad (_("Value not in 8 bit range: %ld"), val);
2456 if (! fixP->fx_addsy)
2457 bufp[0] = val & 0xFF;
2460 case BFD_RELOC_CRIS_UNSIGNED_4:
2461 if (val > 15 || val < 0)
2462 as_bad (_("Value not in 4 bit unsigned range: %ld"), val);
2463 if (! fixP->fx_addsy)
2464 bufp[0] |= val & 0x0F;
2467 case BFD_RELOC_CRIS_UNSIGNED_5:
2468 if (val > 31 || val < 0)
2469 as_bad (_("Value not in 5 bit unsigned range: %ld"), val);
2470 if (! fixP->fx_addsy)
2471 bufp[0] |= val & 0x1F;
2474 case BFD_RELOC_CRIS_SIGNED_6:
2475 if (val > 31 || val < -32)
2476 as_bad (_("Value not in 6 bit range: %ld"), val);
2477 if (! fixP->fx_addsy)
2478 bufp[0] |= val & 0x3F;
2481 case BFD_RELOC_CRIS_UNSIGNED_6:
2482 if (val > 63 || val < 0)
2483 as_bad (_("Value not in 6 bit unsigned range: %ld"), val);
2484 if (! fixP->fx_addsy)
2485 bufp[0] |= val & 0x3F;
2488 case BFD_RELOC_CRIS_BDISP8:
2489 if (! fixP->fx_addsy)
2490 bufp[0] = branch_disp (val);
2493 case BFD_RELOC_NONE:
2494 /* May actually happen automatically. For example at broken
2495 words, if the word turns out not to be broken.
2496 FIXME: When? Which testcase? */
2497 if (! fixP->fx_addsy)
2498 md_number_to_chars (bufp, val, n);
2501 case BFD_RELOC_VTABLE_INHERIT:
2502 /* This borrowed from tc-ppc.c on a whim. */
2504 && !S_IS_DEFINED (fixP->fx_addsy)
2505 && !S_IS_WEAK (fixP->fx_addsy))
2506 S_SET_WEAK (fixP->fx_addsy);
2508 case BFD_RELOC_VTABLE_ENTRY:
2509 /* FIXME: I'm not sure why we do this (as does other ports), but it
2510 might be that this relocation can only be finished at link time. */
2515 BAD_CASE (fixP->fx_r_type);
2520 /* Processes machine-dependent command line options. Called once for
2521 each option on the command line that the machine-independent part of
2522 GAS does not understand. */
2524 md_parse_option (arg, argp)
2526 char *argp ATTRIBUTE_UNUSED;
2532 md_show_usage (stdout);
2533 exit (0); /* Don't continue */
2536 warn_for_branch_expansion = 1;
2544 /* Round up a section size to the appropriate boundary. */
2546 md_section_align (segment, size)
2550 /* Round all sects to multiple of 4, except the bss section, which
2551 we'll round to word-size.
2553 FIXME: Check if this really matters. All sections should be
2554 rounded up, and all sections should (optionally) be assumed to be
2555 dword-aligned, it's just that there is actual usage of linking to a
2557 if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
2559 if (segment == bss_section)
2560 return (size + 1) & ~1;
2561 return (size + 3) & ~3;
2565 /* FIXME: Is this wanted? It matches the testsuite, but that's not
2566 really a valid reason. */
2567 if (segment == text_section)
2568 return (size + 3) & ~3;
2575 /* Generate a machine-dependent relocation. */
2577 tc_gen_reloc (section, fixP)
2578 asection *section ATTRIBUTE_UNUSED;
2582 bfd_reloc_code_real_type code;
2584 switch (fixP->fx_r_type)
2589 case BFD_RELOC_VTABLE_INHERIT:
2590 case BFD_RELOC_VTABLE_ENTRY:
2591 code = fixP->fx_r_type;
2594 as_bad_where (fixP->fx_file, fixP->fx_line,
2595 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
2599 relP = (arelent *) xmalloc (sizeof (arelent));
2601 relP->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2602 *relP->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
2603 relP->address = fixP->fx_frag->fr_address + fixP->fx_where;
2606 /* FIXME: Is this correct? */
2607 relP->addend = fixP->fx_addnumber;
2609 /* At least *this one* is correct. */
2610 relP->addend = fixP->fx_offset;
2612 /* This is the standard place for KLUDGEs to work around bugs in
2613 bfd_install_relocation (first such note in the documentation
2614 appears with binutils-2.8).
2616 That function bfd_install_relocation does the wrong thing with
2617 putting stuff into the addend of a reloc (it should stay out) for a
2618 weak symbol. The really bad thing is that it adds the
2619 "segment-relative offset" of the symbol into the reloc. In this
2620 case, the reloc should instead be relative to the symbol with no
2621 other offset than the assembly code shows; and since the symbol is
2622 weak, any local definition should be ignored until link time (or
2624 To wit: weaksym+42 should be weaksym+42 in the reloc,
2625 not weaksym+(offset_from_segment_of_local_weaksym_definition)
2627 To "work around" this, we subtract the segment-relative offset of
2628 "known" weak symbols. This evens out the extra offset.
2630 That happens for a.out but not for ELF, since for ELF,
2631 bfd_install_relocation uses the "special function" field of the
2632 howto, and does not execute the code that needs to be undone. */
2634 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
2635 && fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy)
2636 && ! bfd_is_und_section (S_GET_SEGMENT (fixP->fx_addsy)))
2638 relP->addend -= S_GET_VALUE (fixP->fx_addsy);
2641 relP->howto = bfd_reloc_type_lookup (stdoutput, code);
2646 name = S_GET_NAME (fixP->fx_addsy);
2648 name = _("<unknown>");
2649 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
2650 name, bfd_get_reloc_code_name (code));
2657 /* Machine-dependent usage-output. */
2659 md_show_usage (stream)
2662 fprintf (stream, _("\n-- GNU as for CRIS\n"));
2663 fprintf (stream, "\n");
2665 _("*** Usage: as-cris [switches] [-o objectfile] [files...]\n"));
2666 fprintf (stream, _("Target-specific switches:\n"));
2667 fprintf (stream, _(" -h, -H : Don't execute, print this help text.\n"));
2669 _(" -N : Warn when branches are expanded to jumps.\n\n"));
2670 fprintf (stream, _("Use as-cris --help to see more options.\n"));
2671 fprintf (stream, _("objectfile : Output file in the a.out format %s"),
2672 _("described in the users manual.\n"));
2673 fprintf (stream, _(" Default output file is \"a.out\".\n"));
2674 fprintf (stream, _("files ... : Input files in the source format %s"),
2675 _(" described in the users manual.\n"));
2676 fprintf (stream, _(" Default input file is standard input.\n"));
2677 fprintf (stream, _("Description : Assembler for the CRIS processor.\n"));
2681 /* Apply a fixS (fixup of an instruction or data that we didn't have
2682 enough info to complete immediately) to the data in a frag. */
2685 md_apply_fix (fixP, valP)
2691 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2693 if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
2696 if (fixP->fx_bit_fixP || fixP->fx_im_disp != 0)
2698 as_bad_where (fixP->fx_file, fixP->fx_line, _("Invalid relocation"));
2703 /* I took this from tc-arc.c, since we used to not support
2704 fx_subsy != NULL. I'm not totally sure it's TRT. */
2705 if (fixP->fx_subsy != (symbolS *) NULL)
2707 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2708 val -= S_GET_VALUE (fixP->fx_subsy);
2711 /* We can't actually support subtracting a symbol. */
2712 as_bad_where (fixP->fx_file, fixP->fx_line,
2713 _("expression too complex"));
2717 cris_number_to_imm (buf, val, fixP->fx_size, fixP);
2724 /* All relocations are relative to the location just after the fixup;
2725 the address of the fixup plus its size. */
2728 md_pcrel_from (fixP)
2731 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
2733 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
2734 still unknown. Since we don't have pc-relative relocations, this
2735 is invalid. What to do if anything for a.out, is to add
2736 pc-relative relocations everywhere including the elinux program
2738 as_bad_where (fixP->fx_file, fixP->fx_line,
2739 _("Invalid pc-relative relocation"));
2740 return fixP->fx_size + addr;
2744 /* We have no need to give defaults for symbol-values. */
2746 md_undefined_symbol (name)
2747 char *name ATTRIBUTE_UNUSED;
2753 /* Definition of TC_FORCE_RELOCATION.
2754 FIXME: Unsure of this. Can we omit it? Just copied from tc-i386.c
2755 when doing multi-object format with ELF, since it's the only other
2756 multi-object-format target with a.out and ELF. */
2758 md_cris_force_relocation (fixp)
2761 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2762 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2767 /* Check and emit error if broken-word handling has failed to fix up a
2768 case-table. This is called from write.c, after doing everything it
2769 knows about how to handle broken words. */
2772 tc_cris_check_adjusted_broken_word (new_offset, brokwP)
2774 struct broken_word *brokwP;
2776 if (new_offset > 32767 || new_offset < -32768)
2777 /* We really want a genuine error, not a warning, so make it one. */
2778 as_bad_where (brokwP->frag->fr_file, brokwP->frag->fr_line,
2779 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
2786 * eval: (c-set-style "gnu")
2787 * indent-tabs-mode: t