3 // All available modes: FU, IS, IU, T, TFU, S2RND, ISS2, IH, W32
5 // Accumulator to Half D-register Moves
9 // Accumulator to D-register Moves
16 // Multiply 16-Bit Operands to Half Dreg
18 R0.H = R1.L * R2.H (W32);
20 // Multiply 16-Bit Operands to Dreg
22 R0 = R1.L * R2.H (IU);
24 R0 = R1.L * R2.H (TFU);
25 R0 = R1.L * R2.H (IH);
26 R0 = R1.L * R2.H (W32);
28 // Multiply and Multiply-Accumulate to Accumulator
30 A0 = R1.L * R2.H (IU);
32 A0 = R1.L * R2.H (TFU);
33 A0 = R1.L * R2.H (S2RND);
34 A0 = R1.L * R2.H (ISS2);
35 A0 = R1.L * R2.H (IH);
37 // Multiply and Multiply-Accumulate to Half-Register
39 R0.L = (A0 = R1.L * R2.H) (W32);
41 // Multiply and Multiply-Accumulate to Data Register
43 R0 = (A0 = R1.L * R2.H) (T);
44 R0 = (A0 = R1.L * R2.H) (TFU);
45 R0 = (A0 = R1.L * R2.H) (IH);
46 R0 = (A0 = R1.L * R2.H) (W32);