hal/HalDMOutSrc8192C_CE.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 //============================================================
  21 // Description:
  22 //
  23 // This file is for 92CE/92CU dynamic mechanism only
  24 //
  25 //
  26 //============================================================
  27
  28 //============================================================
  29 // include files
  30 //============================================================
  31
  32 #include "odm_precomp.h"
  33
  34 #define         DPK_DELTA_MAPPING_NUM   13
  35 #define         index_mapping_HP_NUM    15
  36 //091212 chiyokolin
  37 static  VOID
  38 odm_TXPowerTrackingCallback_ThermalMeter_92C(
  39             IN PADAPTER Adapter)
  40 {
  41         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
  42         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
  43         u8                      ThermalValue = 0, delta, delta_LCK, delta_IQK, delta_HP, TimeOut = 100;
  44         int                     ele_A, ele_D, TempCCk, X, value32;
  45         int                     Y, ele_C;
  46         s8                      OFDM_index[2], CCK_index = 0, OFDM_index_old[2], CCK_index_old = 0;
  47         int                     i = 0;
  48         bool            is2T = IS_92C_SERIAL(pHalData->VersionID);
  49
  50 #if MP_DRIVER == 1
  51         PMPT_CONTEXT    pMptCtx = &(Adapter->mppriv.MptCtx);
  52         u8                      *TxPwrLevel = pMptCtx->TxPwrLevel;
  53 #endif
  54         u8                      OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur
  55         u8                      ThermalValue_HP_count = 0;
  56         u32                     ThermalValue_HP = 0;
  57         s32                     index_mapping_HP[index_mapping_HP_NUM] = {
  58                                         0,      1,      3,      4,      6,
  59                                         7,      9,      10,     12,     13,
  60                                         15,     16,     18,     19,     21
  61                                         };
  62
  63         s8                      index_HP;
  64
  65         pdmpriv->TXPowerTrackingCallbackCnt++;  //cosa add for debug
  66         pdmpriv->bTXPowerTrackingInit = _TRUE;
  67
  68         if(pHalData->CurrentChannel == 14 && !pdmpriv->bCCKinCH14)
  69                 pdmpriv->bCCKinCH14 = _TRUE;
  70         else if(pHalData->CurrentChannel != 14 && pdmpriv->bCCKinCH14)
  71                 pdmpriv->bCCKinCH14 = _FALSE;
  72
  73         //DBG_8723A("===>dm_TXPowerTrackingCallback_ThermalMeter_92C\n");
  74
  75         ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF_PATH_A, RF_T_METER, 0x1f);        // 0x24: RF Reg[4:0]
  76
  77         //DBG_8723A("\n\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",ThermalValue,pdmpriv->ThermalValue,  pHalData->EEPROMThermalMeter);
  78
  79         rtl8192c_PHY_APCalibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter));
  80
  81         if(is2T)
  82                 rf = 2;
  83         else
  84                 rf = 1;
  85
  86         if(ThermalValue)
  87         {
  88 //              if(!pHalData->ThermalValue)
  89                 {
  90                         //Query OFDM path A default setting
  91                         ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D;
  92                         for(i=0; i<OFDM_TABLE_SIZE_92C; i++)    //find the index
  93                         {
  94                                 if(ele_D == (OFDMSwingTable[i]&bMaskOFDM_D))
  95                                 {
  96                                         OFDM_index_old[0] = (u8)i;
  97                                         //DBG_8723A("Initial pathA ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n", rOFDM0_XATxIQImbalance, ele_D, OFDM_index_old[0]);
  98                                         break;
  99                                 }
 100                         }
 101
 102                         //Query OFDM path B default setting
 103                         if(is2T)
 104                         {
 105                                 ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord)&bMaskOFDM_D;
 106                                 for(i=0; i<OFDM_TABLE_SIZE_92C; i++)    //find the index
 107                                 {
 108                                         if(ele_D == (OFDMSwingTable[i]&bMaskOFDM_D))
 109                                         {
 110                                                 OFDM_index_old[1] = (u8)i;
 111                                                 //DBG_8723A("Initial pathB ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n",rOFDM0_XBTxIQImbalance, ele_D, OFDM_index_old[1]);
 112                                                 break;
 113                                         }
 114                                 }
 115                         }
 116
 117                         //Query CCK default setting From 0xa24
 118                         TempCCk = PHY_QueryBBReg(Adapter, rCCK0_TxFilter2, bMaskDWord)&bMaskCCK;
 119                         for(i=0 ; i<CCK_TABLE_SIZE ; i++)
 120                         {
 121                                 if(pdmpriv->bCCKinCH14)
 122                                 {
 123                                         if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4)==_TRUE)
 124                                         {
 125                                                 CCK_index_old =(u8)i;
 126                                                 //DBG_8723A("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14);
 127                                                 break;
 128                                         }
 129                                 }
 130                                 else
 131                                 {
 132                                         if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4)==_TRUE)
 133                                         {
 134                                                 CCK_index_old =(u8)i;
 135                                                 //DBG_8723A("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14);
 136                                                 break;
 137                                         }
 138                                 }
 139                         }
 140
 141                         if(!pdmpriv->ThermalValue)
 142                         {
 143                                 pdmpriv->ThermalValue = pHalData->EEPROMThermalMeter;
 144                                 pdmpriv->ThermalValue_LCK = ThermalValue;
 145                                 pdmpriv->ThermalValue_IQK = ThermalValue;
 146                                 pdmpriv->ThermalValue_DPK = pHalData->EEPROMThermalMeter;
 147
 148 #ifdef CONFIG_USB_HCI
 149                                 for(i = 0; i < rf; i++)
 150                                         pdmpriv->OFDM_index_HP[i] = pdmpriv->OFDM_index[i] = OFDM_index_old[i];
 151                                 pdmpriv->CCK_index_HP = pdmpriv->CCK_index = CCK_index_old;
 152 #else
 153                                 for(i = 0; i < rf; i++)
 154                                         pdmpriv->OFDM_index[i] = OFDM_index_old[i];
 155                                 pdmpriv->CCK_index = CCK_index_old;
 156 #endif
 157                         }
 158
 159 #ifdef CONFIG_USB_HCI
 160                         if(pHalData->BoardType == BOARD_USB_High_PA)
 161                         {
 162                                 pdmpriv->ThermalValue_HP[pdmpriv->ThermalValue_HP_index] = ThermalValue;
 163                                 pdmpriv->ThermalValue_HP_index++;
 164                                 if(pdmpriv->ThermalValue_HP_index == HP_THERMAL_NUM)
 165                                         pdmpriv->ThermalValue_HP_index = 0;
 166
 167                                 for(i = 0; i < HP_THERMAL_NUM; i++)
 168                                 {
 169                                         if(pdmpriv->ThermalValue_HP[i])
 170                                         {
 171                                                 ThermalValue_HP += pdmpriv->ThermalValue_HP[i];
 172                                                 ThermalValue_HP_count++;
 173                                         }
 174                                 }
 175
 176                                 if(ThermalValue_HP_count)
 177                                         ThermalValue = (u8)(ThermalValue_HP / ThermalValue_HP_count);
 178                         }
 179 #endif
 180                 }
 181
 182                 delta = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
 183 #ifdef CONFIG_USB_HCI
 184                 if(pHalData->BoardType == BOARD_USB_High_PA)
 185                 {
 186                         if(pdmpriv->bDoneTxpower)
 187                                 delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
 188                         else
 189                                 delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);
 190                 }
 191                 else
 192 #endif
 193                 {
 194                         delta_HP = 0;
 195                 }
 196                 delta_LCK = (ThermalValue > pdmpriv->ThermalValue_LCK)?(ThermalValue - pdmpriv->ThermalValue_LCK):(pdmpriv->ThermalValue_LCK - ThermalValue);
 197                 delta_IQK = (ThermalValue > pdmpriv->ThermalValue_IQK)?(ThermalValue - pdmpriv->ThermalValue_IQK):(pdmpriv->ThermalValue_IQK - ThermalValue);
 198
 199                 //DBG_8723A("Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx delta 0x%lx delta_LCK 0x%lx delta_IQK 0x%lx\n", ThermalValue, pHalData->ThermalValue, pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK);
 200
 201                 if(delta_LCK > 1)
 202                 {
 203                         pdmpriv->ThermalValue_LCK = ThermalValue;
 204                         rtl8192c_PHY_LCCalibrate(Adapter);
 205                 }
 206
 207                 if((delta > 0 || delta_HP > 0) && pdmpriv->TxPowerTrackControl)
 208                 {
 209 #ifdef CONFIG_USB_HCI
 210                         if(pHalData->BoardType == BOARD_USB_High_PA)
 211                         {
 212                                 pdmpriv->bDoneTxpower = _TRUE;
 213                                 delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);
 214
 215                                 if(delta_HP > index_mapping_HP_NUM-1)
 216                                         index_HP = index_mapping_HP[index_mapping_HP_NUM-1];
 217                                 else
 218                                         index_HP = index_mapping_HP[delta_HP];
 219
 220                                 if(ThermalValue > pHalData->EEPROMThermalMeter) //set larger Tx power
 221                                 {
 222                                         for(i = 0; i < rf; i++)
 223                                                 OFDM_index[i] = pdmpriv->OFDM_index_HP[i] - index_HP;
 224                                         CCK_index = pdmpriv->CCK_index_HP -index_HP;
 225                                 }
 226                                 else
 227                                 {
 228                                         for(i = 0; i < rf; i++)
 229                                                 OFDM_index[i] = pdmpriv->OFDM_index_HP[i] + index_HP;
 230                                         CCK_index = pdmpriv->CCK_index_HP + index_HP;
 231                                 }
 232
 233                                 delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue);
 234
 235                         }
 236                         else
 237 #endif
 238                         {
 239                                 if(ThermalValue > pdmpriv->ThermalValue)
 240                                 {
 241                                         for(i = 0; i < rf; i++)
 242                                                 pdmpriv->OFDM_index[i] -= delta;
 243                                         pdmpriv->CCK_index -= delta;
 244                                 }
 245                                 else
 246                                 {
 247                                         for(i = 0; i < rf; i++)
 248                                                 pdmpriv->OFDM_index[i] += delta;
 249                                         pdmpriv->CCK_index += delta;
 250                                 }
 251                         }
 252
 253                         /*if(is2T)
 254                         {
 255                                 DBG_8723A("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n",
 256                                         pdmpriv->OFDM_index[0], pdmpriv->OFDM_index[1], pdmpriv->CCK_index);
 257                         }
 258                         else
 259                         {
 260                                 DBG_8723A("temp OFDM_A_index=0x%x, CCK_index=0x%x\n",
 261                                         pdmpriv->OFDM_index[0], pdmpriv->CCK_index);
 262                         }*/
 263
 264                         //no adjust
 265 #ifdef CONFIG_USB_HCI
 266                         if(pHalData->BoardType != BOARD_USB_High_PA)
 267 #endif
 268                         {
 269                                 if(ThermalValue > pHalData->EEPROMThermalMeter)
 270                                 {
 271                                         for(i = 0; i < rf; i++)
 272                                                 OFDM_index[i] = pdmpriv->OFDM_index[i]+1;
 273                                         CCK_index = pdmpriv->CCK_index+1;
 274                                 }
 275                                 else
 276                                 {
 277                                         for(i = 0; i < rf; i++)
 278                                                 OFDM_index[i] = pdmpriv->OFDM_index[i];
 279                                         CCK_index = pdmpriv->CCK_index;
 280                                 }
 281
 282 #if MP_DRIVER == 1
 283                                 for(i = 0; i < rf; i++)
 284                                 {
 285                                         if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26)
 286                                         {
 287                                                 if(ThermalValue > pHalData->EEPROMThermalMeter)
 288                                                 {
 289                                                         if (delta < 5)
 290                                                                 OFDM_index[i] -= 1;
 291                                                         else
 292                                                                 OFDM_index[i] -= 2;
 293                                                 }
 294                                                 else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter)
 295                                                 {
 296                                                         OFDM_index[i] += 1;
 297                                                 }
 298                                         }
 299                                         else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter)
 300                                         {
 301                                                 if (delta < 5)
 302                                                         OFDM_index[i] -= 1;
 303                                                 else
 304                                                         OFDM_index[i] -= 2;
 305                                         }
 306                                         else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5)
 307                                         {
 308                                                 OFDM_index[i] -= 1;
 309                                         }
 310                                 }
 311
 312                                 {
 313                                         if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26)
 314                                         {
 315                                                 if(ThermalValue > pHalData->EEPROMThermalMeter)
 316                                                 {
 317                                                         if (delta < 5)
 318                                                                 CCK_index -= 1;
 319                                                         else
 320                                                                 CCK_index -= 2;
 321                                                 }
 322                                                 else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter)
 323                                                 {
 324                                                         CCK_index += 1;
 325                                                 }
 326                                         }
 327                                         else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter)
 328                                         {
 329                                                 if (delta < 5)
 330                                                         CCK_index -= 1;
 331                                                 else
 332                                                         CCK_index -= 2;
 333                                         }
 334                                         else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5)
 335                                         {
 336                                                 CCK_index -= 1;
 337                                         }
 338                                 }
 339 #endif
 340                         }
 341
 342                         for(i = 0; i < rf; i++)
 343                         {
 344                                 if(OFDM_index[i] > (OFDM_TABLE_SIZE_92C-1))
 345                                         OFDM_index[i] = (OFDM_TABLE_SIZE_92C-1);
 346                                 else if (OFDM_index[i] < OFDM_min_index)
 347                                         OFDM_index[i] = OFDM_min_index;
 348                         }
 349
 350                         if(CCK_index > (CCK_TABLE_SIZE-1))
 351                                 CCK_index = (CCK_TABLE_SIZE-1);
 352                         else if (CCK_index < 0)
 353                                 CCK_index = 0;
 354
 355                         /*if(is2T)
 356                         {
 357                                 DBG_8723A("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n",
 358                                         OFDM_index[0], OFDM_index[1], CCK_index);
 359                         }
 360                         else
 361                         {
 362                                 DBG_8723A("new OFDM_A_index=0x%x, CCK_index=0x%x\n",
 363                                         OFDM_index[0], CCK_index);
 364                         }*/
 365                 }
 366
 367                 if(pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0))
 368                 {
 369                         //Adujst OFDM Ant_A according to IQK result
 370                         ele_D = (OFDMSwingTable[OFDM_index[0]] & 0xFFC00000)>>22;
 371                         X = pdmpriv->RegE94;
 372                         Y = pdmpriv->RegE9C;
 373
 374                         if(X != 0)
 375                         {
 376                                 if ((X & 0x00000200) != 0)
 377                                         X = X | 0xFFFFFC00;
 378                                 ele_A = ((X * ele_D)>>8)&0x000003FF;
 379
 380                                 //new element C = element D x Y
 381                                 if ((Y & 0x00000200) != 0)
 382                                         Y = Y | 0xFFFFFC00;
 383                                 ele_C = ((Y * ele_D)>>8)&0x000003FF;
 384
 385                                 //wirte new elements A, C, D to regC80 and regC94, element B is always 0
 386                                 value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A;
 387                                 PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
 388
 389                                 value32 = (ele_C&0x000003C0)>>6;
 390                                 PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
 391
 392                                 value32 = ((X * ele_D)>>7)&0x01;
 393                                 PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31, value32);
 394
 395                                 value32 = ((Y * ele_D)>>7)&0x01;
 396                                 PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT29, value32);
 397
 398                         }
 399                         else
 400                         {
 401                                 PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index[0]]);
 402                                 PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
 403                                 PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31|BIT29, 0x00);
 404                         }
 405
 406                         //RTPRINT(FINIT, INIT_IQK, ("TxPwrTracking path A: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D));
 407
 408                         //Adjust CCK according to IQK result
 409                         if(!pdmpriv->bCCKinCH14){
 410                                 rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
 411                                 rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
 412                                 rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
 413                                 rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
 414                                 rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
 415                                 rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
 416                                 rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
 417                                 rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
 418                         }
 419                         else{
 420                                 rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
 421                                 rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
 422                                 rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
 423                                 rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
 424                                 rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
 425                                 rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
 426                                 rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
 427                                 rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);
 428                         }
 429
 430                         if(is2T)
 431                         {
 432                                 ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22;
 433
 434                                 //new element A = element D x X
 435                                 X = pdmpriv->RegEB4;
 436                                 Y = pdmpriv->RegEBC;
 437
 438                                 if(X != 0){
 439                                         if ((X & 0x00000200) != 0)      //consider minus
 440                                                 X = X | 0xFFFFFC00;
 441                                         ele_A = ((X * ele_D)>>8)&0x000003FF;
 442
 443                                         //new element C = element D x Y
 444                                         if ((Y & 0x00000200) != 0)
 445                                                 Y = Y | 0xFFFFFC00;
 446                                         ele_C = ((Y * ele_D)>>8)&0x00003FF;
 447
 448                                         //wirte new elements A, C, D to regC88 and regC9C, element B is always 0
 449                                         value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A;
 450                                         PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
 451
 452                                         value32 = (ele_C&0x000003C0)>>6;
 453                                         PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
 454
 455                                         value32 = ((X * ele_D)>>7)&0x01;
 456                                         PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27, value32);
 457
 458                                         value32 = ((Y * ele_D)>>7)&0x01;
 459                                         PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT25, value32);
 460
 461                                 }
 462                                 else{
 463                                         PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[OFDM_index[1]]);
 464                                         PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
 465                                         PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27|BIT25, 0x00);
 466                                 }
 467
 468                                 //DBG_8723A("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D);
 469                         }
 470
 471                         /*
 472                         DBG_8723A("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", \
 473                                         PHY_QueryBBReg(Adapter, 0xc80, bMaskDWord),\
 474                                         PHY_QueryBBReg(Adapter, 0xc94, bMaskDWord), \
 475                                         PHY_QueryRFReg(Adapter, RF_PATH_A, 0x24, bMaskDWord));
 476                         */
 477                 }
 478
 479 #if MP_DRIVER == 1
 480                 if(delta_IQK > 1)
 481 #else
 482                 if(delta_IQK > 3)
 483 #endif
 484                 {
 485                         pdmpriv->ThermalValue_IQK = ThermalValue;
 486                         rtl8192c_PHY_IQCalibrate(Adapter,_FALSE);
 487                 }
 488
 489                 //update thermal meter value
 490                 if(pdmpriv->TxPowerTrackControl)
 491                         pdmpriv->ThermalValue = ThermalValue;
 492
 493         }
 494
 495         //DBG_8723A("<===dm_TXPowerTrackingCallback_ThermalMeter_92C\n");
 496
 497         pdmpriv->TXPowercount = 0;
 498
 499 }
 500
 501 /*
 502 static  VOID
 503 odm_InitializeTXPowerTracking_ThermalMeter(
 504         IN      PADAPTER                Adapter)
 505 {
 506         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
 507         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
 508
 509         //pMgntInfo->bTXPowerTracking = _TRUE;
 510         pdmpriv->TXPowercount = 0;
 511         pdmpriv->bTXPowerTrackingInit = _FALSE;
 512         pdmpriv->ThermalValue = 0;
 513
 514 #if     (MP_DRIVER != 1)        //for mp driver, turn off txpwrtracking as default
 515         pdmpriv->TxPowerTrackControl = _TRUE;
 516 #endif
 517
 518         MSG_8723A("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl);
 519 }
 520
 521
 522 static VOID
 523 ODM_InitializeTXPowerTracking(
 524         IN      PADAPTER                Adapter)
 525 {
 526         odm_InitializeTXPowerTracking_ThermalMeter(Adapter);
 527 }
 528 */
 529 //
 530 //      Description:
 531 //              - Dispatch TxPower Tracking direct call ONLY for 92s.
 532 //              - We shall NOT schedule Workitem within PASSIVE LEVEL, which will cause system resource
 533 //                 leakage under some platform.
 534 //
 535 //      Assumption:
 536 //              PASSIVE_LEVEL when this routine is called.
 537 //
 538 //      Added by Roger, 2009.06.18.
 539 //
 540 static VOID
 541 ODM_TXPowerTracking92CDirectCall(
 542             IN  PADAPTER                Adapter)
 543 {
 544         odm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter);
 545 }
 546
 547 static VOID
 548 odm_CheckTXPowerTracking_ThermalMeter(
 549         IN      PADAPTER                Adapter)
 550 {
 551         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
 552         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
 553         DM_ODM_T                *podmpriv = &pHalData->odmpriv;
 554         //u1Byte                                        TxPowerCheckCnt = 5;    //10 sec
 555
 556         //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/)
 557         if(!(podmpriv->SupportAbility & ODM_RF_TX_PWR_TRACK))
 558         {
 559                 return;
 560         }
 561
 562         if(!pdmpriv->TM_Trigger)                //at least delay 1 sec
 563         {
 564                 //pHalData->TxPowerCheckCnt++;  //cosa add for debug
 565                 PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
 566                 //DBG_8723A("Trigger 92C Thermal Meter!!\n");
 567
 568                 pdmpriv->TM_Trigger = 1;
 569                 return;
 570
 571         }
 572         else
 573         {
 574                 //DBG_8723A("Schedule TxPowerTracking direct call!!\n");
 575                 ODM_TXPowerTracking92CDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18.
 576                 pdmpriv->TM_Trigger = 0;
 577         }
 578
 579 }
 580
 581
 582 VOID
 583 rtl8192c_odm_CheckTXPowerTracking(
 584         IN      PADAPTER                Adapter)
 585 {
 586         odm_CheckTXPowerTracking_ThermalMeter(Adapter);
 587 }
 588
 589
 590
 591 #ifdef CONFIG_ANTENNA_DIVERSITY
 592 // Add new function to reset the state of antenna diversity before link.
 593 //
 594 void odm_SwAntDivResetBeforeLink8192C(IN PDM_ODM_T pDM_Odm)
 595 {
 596         SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
 597
 598         pDM_SWAT_Table->SWAS_NoLink_State = 0;
 599 }
 600
 601 // Compare RSSI for deciding antenna
 602 void    odm_AntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
 603 {
 604         //PADAPTER Adapter = pDM_Odm->Adapter ;
 605
 606         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
 607         PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
 608         if((0 != pHalData->AntDivCfg) && (!IS_92C_SERIAL(pHalData->VersionID)) )
 609         {
 610                 //DBG_8723A("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi),
 611                 //      src->Rssi,query_rx_pwr_percentage(src->Rssi));
 612                 //select optimum_antenna for before linked =>For antenna diversity
 613                 if(dst->Rssi >=  src->Rssi )//keep org parameter
 614                 {
 615                         src->Rssi = dst->Rssi;
 616                         src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;
 617                 }
 618         }
 619 }
 620
 621 // Add new function to reset the state of antenna diversity before link.
 622 u8 odm_AntDivBeforeLink8192C(PADAPTER Adapter )
 623 {
 624
 625         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
 626         PDM_ODM_T       pDM_Odm =&pHalData->odmpriv;
 627         SWAT_T          *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
 628         struct mlme_priv        *pmlmepriv = &(Adapter->mlmepriv);
 629
 630         // Condition that does not need to use antenna diversity.
 631         if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))
 632         {
 633                 //DBG_8723A("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n");
 634                 return _FALSE;
 635         }
 636
 637         if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
 638         {
 639                 pDM_SWAT_Table->SWAS_NoLink_State = 0;
 640                 return _FALSE;
 641         }
 642         // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF.
 643 /*
 644         if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect)
 645         {
 646
 647
 648                 ODM_RT_TRACE(pDM_Odm,COMP_SWAS, DBG_LOUD,
 649                                 ("SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n",
 650                                 pMgntInfo->RFChangeInProgress,
 651                                 pHalData->eRFPowerState));
 652
 653                 pDM_SWAT_Table->SWAS_NoLink_State = 0;
 654
 655                 return FALSE;
 656         }
 657 */
 658
 659         if(pDM_SWAT_Table->SWAS_NoLink_State == 0){
 660                 //switch channel
 661                 pDM_SWAT_Table->SWAS_NoLink_State = 1;
 662                 pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A;
 663
 664                 //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna);
 665                 rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE);
 666                 //DBG_8723A("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B");
 667                 return _TRUE;
 668         }
 669         else
 670         {
 671                 pDM_SWAT_Table->SWAS_NoLink_State = 0;
 672                 return _FALSE;
 673         }
 674
 675
 676
 677 }
 678 #endif
 679
 680 //-------------------------------------------------------------------------
 681 //
 682 //      IQK
 683 //
 684 //-------------------------------------------------------------------------
 685 #define MAX_TOLERANCE           5
 686 #define IQK_DELAY_TIME          1       //ms
 687
 688 static u8                       //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
 689 _PHY_PathA_IQK(
 690         IN      PADAPTER        pAdapter,
 691         IN      bool            configPathB
 692         )
 693 {
 694         u32 regEAC, regE94, regE9C, regEA4;
 695         u8 result = 0x00;
 696         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
 697
 698         //RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n"));
 699
 700         //path-A IQK setting
 701         //RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n"));
 702         PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
 703         PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
 704         PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102);
 705
 706         PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 :
 707                 IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502);
 708
 709         //path-B IQK setting
 710         if(configPathB)
 711         {
 712                 PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22);
 713                 PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22);
 714                 PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102);
 715                 PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202);
 716         }
 717
 718         //LO calibration setting
 719         //RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n"));
 720         PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1);
 721
 722         //One shot, path A LOK & IQK
 723         //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
 724         PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
 725         PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
 726
 727         // delay x ms
 728         //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME));
 729         rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000);
 730
 731         // Check failed
 732         regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
 733         //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC));
 734         regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord);
 735         //RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94));
 736         regE9C= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord);
 737         //RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C));
 738         regEA4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);
 739         //RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4));
 740
 741         if(!(regEAC & BIT28) &&
 742                 (((regE94 & 0x03FF0000)>>16) != 0x142) &&
 743                 (((regE9C & 0x03FF0000)>>16) != 0x42) )
 744                 result |= 0x01;
 745         else                                                    //if Tx not OK, ignore Rx
 746                 return result;
 747
 748         if(!(regEAC & BIT27) &&         //if Tx is OK, check whether Rx is OK
 749                 (((regEA4 & 0x03FF0000)>>16) != 0x132) &&
 750                 (((regEAC & 0x03FF0000)>>16) != 0x36))
 751                 result |= 0x02;
 752         else
 753                 DBG_8723A("Path A Rx IQK fail!!\n");
 754
 755         return result;
 756
 757
 758 }
 759
 760 static u8                               //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
 761 _PHY_PathB_IQK(
 762         IN      PADAPTER        pAdapter
 763         )
 764 {
 765         u32 regEAC, regEB4, regEBC, regEC4, regECC;
 766         u8      result = 0x00;
 767         //RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n"));
 768
 769         //One shot, path B LOK & IQK
 770         //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n"));
 771         PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002);
 772         PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000);
 773
 774         // delay x ms
 775         //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME));
 776         rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000);
 777
 778         // Check failed
 779         regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
 780         //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC));
 781         regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord);
 782         //RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4));
 783         regEBC= PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord);
 784         //RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC));
 785         regEC4= PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord);
 786         //RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4));
 787         regECC= PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord);
 788         //RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC));
 789
 790         if(!(regEAC & BIT31) &&
 791                 (((regEB4 & 0x03FF0000)>>16) != 0x142) &&
 792                 (((regEBC & 0x03FF0000)>>16) != 0x42))
 793                 result |= 0x01;
 794         else
 795                 return result;
 796
 797         if(!(regEAC & BIT30) &&
 798                 (((regEC4 & 0x03FF0000)>>16) != 0x132) &&
 799                 (((regECC & 0x03FF0000)>>16) != 0x36))
 800                 result |= 0x02;
 801         else
 802                 DBG_8723A("Path B Rx IQK fail!!\n");
 803
 804
 805         return result;
 806
 807 }
 808
 809 static VOID
 810 _PHY_PathAFillIQKMatrix(
 811         IN      PADAPTER        pAdapter,
 812         IN      bool            bIQKOK,
 813         IN      int                     result[][8],
 814         IN      u8                      final_candidate,
 815         IN      bool            bTxOnly
 816         )
 817 {
 818         u32     Oldval_0, X, TX0_A, reg;
 819         s32     Y, TX0_C;
 820
 821         DBG_8723A("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
 822
 823         if(final_candidate == 0xFF)
 824                 return;
 825         else if(bIQKOK)
 826         {
 827                 Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
 828
 829                 X = result[final_candidate][0];
 830                 if ((X & 0x00000200) != 0)
 831                         X = X | 0xFFFFFC00;
 832                 TX0_A = (X * Oldval_0) >> 8;
 833                 //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX0_A = 0x%lx, Oldval_0 0x%lx\n", X, TX0_A, Oldval_0));
 834                 PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
 835                 PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1));
 836
 837                 Y = result[final_candidate][1];
 838                 if ((Y & 0x00000200) != 0)
 839                         Y = Y | 0xFFFFFC00;
 840                 TX0_C = (Y * Oldval_0) >> 8;
 841                 //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX = 0x%lx\n", Y, TX0_C));
 842                 PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
 843                 PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
 844                 PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1));
 845
 846                 if(bTxOnly)
 847                 {
 848                         DBG_8723A("_PHY_PathAFillIQKMatrix only Tx OK\n");
 849                         return;
 850                 }
 851
 852                 reg = result[final_candidate][2];
 853                 PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg);
 854
 855                 reg = result[final_candidate][3] & 0x3F;
 856                 PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg);
 857
 858                 reg = (result[final_candidate][3] >> 6) & 0xF;
 859                 PHY_SetBBReg(pAdapter, rOFDM0_RxIQExtAnta, 0xF0000000, reg);
 860         }
 861 }
 862
 863 static VOID
 864 _PHY_PathBFillIQKMatrix(
 865         IN      PADAPTER        pAdapter,
 866         IN      bool    bIQKOK,
 867         IN      int                     result[][8],
 868         IN      u8                      final_candidate,
 869         IN      bool            bTxOnly                 //do Tx only
 870         )
 871 {
 872         u32     Oldval_1, X, TX1_A, reg;
 873         s32     Y, TX1_C;
 874
 875         DBG_8723A("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed");
 876
 877         if(final_candidate == 0xFF)
 878                 return;
 879         else if(bIQKOK)
 880         {
 881                 Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
 882
 883                 X = result[final_candidate][4];
 884                 if ((X & 0x00000200) != 0)
 885                         X = X | 0xFFFFFC00;
 886                 TX1_A = (X * Oldval_1) >> 8;
 887                 //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX1_A = 0x%lx\n", X, TX1_A));
 888                 PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
 889                 PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1));
 890
 891                 Y = result[final_candidate][5];
 892                 if ((Y & 0x00000200) != 0)
 893                         Y = Y | 0xFFFFFC00;
 894                 TX1_C = (Y * Oldval_1) >> 8;
 895                 //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX1_C = 0x%lx\n", Y, TX1_C));
 896                 PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
 897                 PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
 898                 PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1));
 899
 900                 if(bTxOnly)
 901                         return;
 902
 903                 reg = result[final_candidate][6];
 904                 PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
 905
 906                 reg = result[final_candidate][7] & 0x3F;
 907                 PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
 908
 909                 reg = (result[final_candidate][7] >> 6) & 0xF;
 910                 PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg);
 911         }
 912 }
 913
 914 static VOID
 915 _PHY_SaveADDARegisters(
 916         IN      PADAPTER        pAdapter,
 917         IN      u32*            ADDAReg,
 918         IN      u32*            ADDABackup,
 919         IN      u32                     RegisterNum
 920         )
 921 {
 922         u32     i;
 923
 924         //RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n"));
 925         for( i = 0 ; i < RegisterNum ; i++){
 926                 ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord);
 927         }
 928 }
 929
 930 static VOID
 931 _PHY_SaveMACRegisters(
 932         IN      PADAPTER        pAdapter,
 933         IN      u32*            MACReg,
 934         IN      u32*            MACBackup
 935         )
 936 {
 937         u32     i;
 938
 939         //RTPRINT(FINIT, INIT_IQK, ("Save MAC parameters.\n"));
 940         for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
 941                 MACBackup[i] =rtw_read8(pAdapter, MACReg[i]);
 942         }
 943         MACBackup[i] = rtw_read32(pAdapter, MACReg[i]);
 944
 945 }
 946
 947 static VOID
 948 _PHY_ReloadADDARegisters(
 949         IN      PADAPTER        pAdapter,
 950         IN      u32*            ADDAReg,
 951         IN      u32*            ADDABackup,
 952         IN      u32                     RegiesterNum
 953         )
 954 {
 955         u32     i;
 956
 957         //RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n"));
 958         for(i = 0 ; i < RegiesterNum ; i++){
 959                 PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
 960         }
 961 }
 962
 963 static VOID
 964 _PHY_ReloadMACRegisters(
 965         IN      PADAPTER        pAdapter,
 966         IN      u32*            MACReg,
 967         IN      u32*            MACBackup
 968         )
 969 {
 970         u32     i;
 971
 972         //RTPRINT(FINIT, INIT_IQK, ("Reload MAC parameters !\n"));
 973         for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){
 974                 rtw_write8(pAdapter, MACReg[i], (u8)MACBackup[i]);
 975         }
 976         rtw_write32(pAdapter, MACReg[i], MACBackup[i]);
 977 }
 978
 979 static VOID
 980 _PHY_PathADDAOn(
 981         IN      PADAPTER        pAdapter,
 982         IN      u32*            ADDAReg,
 983         IN      bool            isPathAOn,
 984         IN      bool            is2T
 985         )
 986 {
 987         u32     pathOn;
 988         u32     i;
 989
 990         //RTPRINT(FINIT, INIT_IQK, ("ADDA ON.\n"));
 991
 992         pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4;
 993         if(_FALSE == is2T){
 994                 pathOn = 0x0bdb25a0;
 995                 PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0);
 996         }
 997         else{
 998                 PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn);
 999         }
1000
1001         for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){
1002                 PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn);
1003         }
1004
1005 }
1006
1007 static VOID
1008 _PHY_MACSettingCalibration(
1009         IN      PADAPTER        pAdapter,
1010         IN      u32*            MACReg,
1011         IN      u32*            MACBackup
1012         )
1013 {
1014         u32     i = 0;
1015
1016         //RTPRINT(FINIT, INIT_IQK, ("MAC settings for Calibration.\n"));
1017
1018         rtw_write8(pAdapter, MACReg[i], 0x3F);
1019
1020         for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){
1021                 rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3)));
1022         }
1023         rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));
1024
1025 }
1026
1027 static VOID
1028 _PHY_PathAStandBy(
1029         IN      PADAPTER        pAdapter
1030         )
1031 {
1032         //RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n"));
1033
1034         PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0);
1035         PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000);
1036         PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
1037 }
1038
1039 static VOID
1040 _PHY_PIModeSwitch(
1041         IN      PADAPTER        pAdapter,
1042         IN      bool            PIMode
1043         )
1044 {
1045         u32     mode;
1046
1047         //RTPRINT(FINIT, INIT_IQK, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI")));
1048
1049         mode = PIMode ? 0x01000100 : 0x01000000;
1050         PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode);
1051         PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode);
1052 }
1053
1054 /*
1055 return _FALSE => do IQK again
1056 */
1057 static bool
1058 _PHY_SimularityCompare(
1059         IN      PADAPTER        pAdapter,
1060         IN      int             result[][8],
1061         IN      u8               c1,
1062         IN      u8               c2
1063         )
1064 {
1065         u32             i, j, diff, SimularityBitMap, bound = 0;
1066         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
1067         u8              final_candidate[2] = {0xFF, 0xFF};      //for path A and path B
1068         bool            bResult = _TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID);
1069
1070         if(is2T)
1071                 bound = 8;
1072         else
1073                 bound = 4;
1074
1075         SimularityBitMap = 0;
1076
1077         for( i = 0; i < bound; i++ )
1078         {
1079                 diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]);
1080                 if (diff > MAX_TOLERANCE)
1081                 {
1082                         if((i == 2 || i == 6) && !SimularityBitMap)
1083                         {
1084                                 if(result[c1][i]+result[c1][i+1] == 0)
1085                                         final_candidate[(i/4)] = c2;
1086                                 else if (result[c2][i]+result[c2][i+1] == 0)
1087                                         final_candidate[(i/4)] = c1;
1088                                 else
1089                                         SimularityBitMap = SimularityBitMap|(1<<i);
1090                         }
1091                         else
1092                                 SimularityBitMap = SimularityBitMap|(1<<i);
1093                 }
1094         }
1095
1096         if ( SimularityBitMap == 0)
1097         {
1098                 for( i = 0; i < (bound/4); i++ )
1099                 {
1100                         if(final_candidate[i] != 0xFF)
1101                         {
1102                                 for( j = i*4; j < (i+1)*4-2; j++)
1103                                         result[3][j] = result[final_candidate[i]][j];
1104                                 bResult = _FALSE;
1105                         }
1106                 }
1107                 return bResult;
1108         }
1109         else if (!(SimularityBitMap & 0x0F))                    //path A OK
1110         {
1111                 for(i = 0; i < 4; i++)
1112                         result[3][i] = result[c1][i];
1113                 return _FALSE;
1114         }
1115         else if (!(SimularityBitMap & 0xF0) && is2T)    //path B OK
1116         {
1117                 for(i = 4; i < 8; i++)
1118                         result[3][i] = result[c1][i];
1119                 return _FALSE;
1120         }
1121         else
1122                 return _FALSE;
1123
1124 }
1125
1126 static VOID
1127 _PHY_IQCalibrate(
1128         IN      PADAPTER        pAdapter,
1129         IN      int             result[][8],
1130         IN      u8              t,
1131         IN      bool            is2T
1132         )
1133 {
1134         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
1135         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
1136         u32                     i;
1137         u8                      PathAOK, PathBOK;
1138         u32                     ADDA_REG[IQK_ADDA_REG_NUM] = {
1139                                                 rFPGA0_XCD_SwitchControl,       rBlue_Tooth,
1140                                                 rRx_Wait_CCA,           rTx_CCK_RFON,
1141                                                 rTx_CCK_BBON,   rTx_OFDM_RFON,
1142                                                 rTx_OFDM_BBON,  rTx_To_Rx,
1143                                                 rTx_To_Tx,              rRx_CCK,
1144                                                 rRx_OFDM,               rRx_Wait_RIFS,
1145                                                 rRx_TO_Rx,              rStandby,
1146                                                 rSleep,                         rPMPD_ANAEN };
1147
1148         u32                     IQK_MAC_REG[IQK_MAC_REG_NUM] = {
1149                                                 REG_TXPAUSE,            REG_BCN_CTRL,
1150                                                 REG_BCN_CTRL_1, REG_GPIO_MUXCFG};
1151
1152         u32                     IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
1153                                                         rOFDM0_TRxPathEnable,           rOFDM0_TRMuxPar,
1154                                                         rFPGA0_XCD_RFInterfaceSW,       rConfig_AntA,   rConfig_AntB,
1155                                                         rFPGA0_XAB_RFInterfaceSW,       rFPGA0_XA_RFInterfaceOE,
1156                                                         rFPGA0_XB_RFInterfaceOE,        rFPGA0_RFMOD
1157                                                         };
1158
1159 #if MP_DRIVER
1160         const u32       retryCount = 9;
1161 #else
1162         const u32       retryCount = 2;
1163 #endif
1164
1165         // Note: IQ calibration must be performed after loading
1166         //              PHY_REG.txt , and radio_a, radio_b.txt
1167
1168         u32 bbvalue;
1169
1170         if(t==0)
1171         {
1172                 bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord);
1173                 //RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue));
1174
1175                 //RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R")));
1176
1177                 // Save ADDA parameters, turn Path A ADDA on
1178                 _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup,IQK_ADDA_REG_NUM);
1179                 _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
1180                 _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM);
1181         }
1182         _PHY_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T);
1183
1184         if(t==0)
1185         {
1186                 pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8));
1187         }
1188
1189         if(!pdmpriv->bRfPiEnable){
1190                 // Switch BB to PI mode to do IQ Calibration.
1191                 _PHY_PIModeSwitch(pAdapter, _TRUE);
1192         }
1193
1194         PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT24, 0x00);
1195         PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
1196         PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
1197         PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
1198         PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0x01);
1199         PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0x01);
1200         PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0x00);
1201         PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0x00);
1202
1203         if(is2T)
1204         {
1205                 PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000);
1206                 PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000);
1207         }
1208
1209         //MAC settings
1210         _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
1211
1212         //Page B init
1213         PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000);
1214
1215         if(is2T)
1216         {
1217                 PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000);
1218         }
1219
1220         // IQ calibration setting
1221         //RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n"));
1222         PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
1223         PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00);
1224         PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800);
1225
1226         for(i = 0 ; i < retryCount ; i++){
1227                 PathAOK = _PHY_PathA_IQK(pAdapter, is2T);
1228                 if(PathAOK == 0x03){
1229                                 DBG_8723A("Path A IQK Success!!\n");
1230                                 result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
1231                                 result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
1232                                 result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
1233                                 result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
1234                         break;
1235                 }
1236                 else if (i == (retryCount-1) && PathAOK == 0x01)        //Tx IQK OK
1237                 {
1238                         DBG_8723A("Path A IQK Only  Tx Success!!\n");
1239
1240                         result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
1241                         result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
1242                 }
1243         }
1244
1245         if(0x00 == PathAOK){
1246                 DBG_8723A("Path A IQK failed!!\n");
1247         }
1248
1249         if(is2T){
1250                 _PHY_PathAStandBy(pAdapter);
1251
1252                 // Turn Path B ADDA on
1253                 _PHY_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T);
1254
1255                 for(i = 0 ; i < retryCount ; i++){
1256                         PathBOK = _PHY_PathB_IQK(pAdapter);
1257                         if(PathBOK == 0x03){
1258                                 DBG_8723A("Path B IQK Success!!\n");
1259                                 result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
1260                                 result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
1261                                 result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
1262                                 result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
1263                                 break;
1264                         }
1265                         else if (i == (retryCount - 1) && PathBOK == 0x01)      //Tx IQK OK
1266                         {
1267                                 DBG_8723A("Path B Only Tx IQK Success!!\n");
1268                                 result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
1269                                 result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
1270                         }
1271                 }
1272
1273                 if(0x00 == PathBOK){
1274                         DBG_8723A("Path B IQK failed!!\n");
1275                 }
1276         }
1277
1278         //Back to BB mode, load original value
1279         //RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n"));
1280         PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0);
1281
1282         if(t!=0)
1283         {
1284                 if(!pdmpriv->bRfPiEnable){
1285                         // Switch back BB to SI mode after finish IQ Calibration.
1286                         _PHY_PIModeSwitch(pAdapter, _FALSE);
1287                 }
1288
1289                 // Reload ADDA power saving parameters
1290                 _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
1291
1292                 // Reload MAC parameters
1293                 _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
1294
1295                 // Reload BB parameters
1296                 _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM);
1297
1298                 // Restore RX initial gain
1299                 PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3);
1300                 if(is2T){
1301                         PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3);
1302                 }
1303
1304                 //load 0xe30 IQC default value
1305                 PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
1306                 PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
1307
1308         }
1309         //RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate() <==\n"));
1310
1311 }
1312
1313
1314 static VOID
1315 _PHY_LCCalibrate(
1316         IN      PADAPTER        pAdapter,
1317         IN      bool            is2T
1318         )
1319 {
1320         u8      tmpReg;
1321         u32     RF_Amode = 0, RF_Bmode = 0, LC_Cal;
1322
1323         //Check continuous TX and Packet TX
1324         tmpReg = rtw_read8(pAdapter, 0xd03);
1325
1326         if((tmpReg&0x70) != 0)                  //Deal with contisuous TX case
1327                 rtw_write8(pAdapter, 0xd03, tmpReg&0x8F);       //disable all continuous TX
1328         else                                                    // Deal with Packet TX case
1329                 rtw_write8(pAdapter, REG_TXPAUSE, 0xFF);                        // block all queues
1330
1331         if((tmpReg&0x70) != 0)
1332         {
1333                 //1. Read original RF mode
1334                 //Path-A
1335                 RF_Amode = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits);
1336
1337                 //Path-B
1338                 if(is2T)
1339                         RF_Bmode = PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits);
1340
1341                 //2. Set RF mode = standby mode
1342                 //Path-A
1343                 PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000);
1344
1345                 //Path-B
1346                 if(is2T)
1347                         PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000);
1348         }
1349
1350         //3. Read RF reg18
1351         LC_Cal = PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits);
1352
1353         //4. Set LC calibration begin
1354         PHY_SetRFReg(pAdapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000);
1355
1356         #ifdef CONFIG_LONG_DELAY_ISSUE
1357         rtw_msleep_os(100);
1358         #else
1359         rtw_mdelay_os(100);
1360         #endif
1361
1362         //Restore original situation
1363         if((tmpReg&0x70) != 0)  //Deal with contisuous TX case
1364         {
1365                 //Path-A
1366                 rtw_write8(pAdapter, 0xd03, tmpReg);
1367                 PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
1368
1369                 //Path-B
1370                 if(is2T)
1371                         PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode);
1372         }
1373         else // Deal with Packet TX case
1374         {
1375                 rtw_write8(pAdapter, REG_TXPAUSE, 0x00);
1376         }
1377
1378 }
1379
1380
1381 //Analog Pre-distortion calibration
1382 #define         APK_BB_REG_NUM  8
1383 #define         APK_CURVE_REG_NUM 4
1384 #define         PATH_NUM                2
1385
1386 static VOID
1387 _PHY_APCalibrate(
1388         IN      PADAPTER        pAdapter,
1389         IN      char            delta,
1390         IN      bool            is2T
1391         )
1392 {
1393         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
1394         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
1395
1396         u32                     regD[PATH_NUM];
1397         u32                     tmpReg, index, offset, i, apkbound;
1398         u8                      path, pathbound = PATH_NUM;
1399         u32                     BB_backup[APK_BB_REG_NUM];
1400         u32                     BB_REG[APK_BB_REG_NUM] = {
1401                                                 rFPGA1_TxBlock,         rOFDM0_TRxPathEnable,
1402                                                 rFPGA0_RFMOD,   rOFDM0_TRMuxPar,
1403                                                 rFPGA0_XCD_RFInterfaceSW,       rFPGA0_XAB_RFInterfaceSW,
1404                                                 rFPGA0_XA_RFInterfaceOE,        rFPGA0_XB_RFInterfaceOE };
1405         u32                     BB_AP_MODE[APK_BB_REG_NUM] = {
1406                                                 0x00000020, 0x00a05430, 0x02040000,
1407                                                 0x000800e4, 0x00204000 };
1408         u32                     BB_normal_AP_MODE[APK_BB_REG_NUM] = {
1409                                                 0x00000020, 0x00a05430, 0x02040000,
1410                                                 0x000800e4, 0x22204000 };
1411
1412         u32                     AFE_backup[IQK_ADDA_REG_NUM];
1413         u32                     AFE_REG[IQK_ADDA_REG_NUM] = {
1414                                                 rFPGA0_XCD_SwitchControl,       rBlue_Tooth,
1415                                                 rRx_Wait_CCA,           rTx_CCK_RFON,
1416                                                 rTx_CCK_BBON,   rTx_OFDM_RFON,
1417                                                 rTx_OFDM_BBON,  rTx_To_Rx,
1418                                                 rTx_To_Tx,              rRx_CCK,
1419                                                 rRx_OFDM,               rRx_Wait_RIFS,
1420                                                 rRx_TO_Rx,              rStandby,
1421                                                 rSleep,                         rPMPD_ANAEN };
1422
1423         u32                     MAC_backup[IQK_MAC_REG_NUM];
1424         u32                     MAC_REG[IQK_MAC_REG_NUM] = {
1425                                                 REG_TXPAUSE,            REG_BCN_CTRL,
1426                                                 REG_BCN_CTRL_1, REG_GPIO_MUXCFG};
1427
1428         u32                     APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
1429                                         {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
1430                                         {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
1431                                         };
1432
1433         u32                     APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
1434                                         {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c},  //path settings equal to path b settings
1435                                         {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
1436                                         };
1437
1438         u32                     APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
1439                                         {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
1440                                         {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
1441                                         };
1442
1443         u32                     APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
1444                                         {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a},  //path settings equal to path b settings
1445                                         {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
1446                                         };
1447         u32                     AFE_on_off[PATH_NUM] = {
1448                                         0x04db25a4, 0x0b1b25a4};        //path A on path B off / path A off path B on
1449
1450         u32                     APK_offset[PATH_NUM] = {
1451                                         rConfig_AntA, rConfig_AntB};
1452
1453         u32                     APK_normal_offset[PATH_NUM] = {
1454                                         rConfig_Pmpd_AntA, rConfig_Pmpd_AntB};
1455
1456         u32                     APK_value[PATH_NUM] = {
1457                                         0x92fc0000, 0x12fc0000};
1458
1459         u32                     APK_normal_value[PATH_NUM] = {
1460                                         0x92680000, 0x12680000};
1461
1462         char                    APK_delta_mapping[APK_BB_REG_NUM][13] = {
1463                                         {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
1464                                         {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
1465                                         {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
1466                                         {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6},
1467                                         {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
1468                                         };
1469
1470         u32                     APK_normal_setting_value_1[13] = {
1471                                         0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
1472                                         0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
1473                                         0x12680000, 0x00880000, 0x00880000
1474                                         };
1475
1476         u32                     APK_normal_setting_value_2[16] = {
1477                                         0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
1478                                         0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
1479                                         0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
1480                                         0x00050006
1481                                         };
1482
1483         u32                     APK_result[PATH_NUM][APK_BB_REG_NUM];   //val_1_1a, val_1_2a, val_2a, val_3a, val_4a
1484         //u32                   AP_curve[PATH_NUM][APK_CURVE_REG_NUM];
1485
1486         int                     BB_offset, delta_V, delta_offset;
1487
1488 #if (MP_DRIVER == 1)
1489         PMPT_CONTEXT    pMptCtx = &pAdapter->mppriv.MptCtx;
1490
1491         pMptCtx->APK_bound[0] = 45;
1492         pMptCtx->APK_bound[1] = 52;
1493 #endif
1494
1495         //RTPRINT(FINIT, INIT_IQK, ("==>PHY_APCalibrate() delta %d\n", delta));
1496
1497         //RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip")));
1498
1499         if(!is2T)
1500                 pathbound = 1;
1501
1502         //2 FOR NORMAL CHIP SETTINGS
1503
1504 // Temporarily do not allow normal driver to do the following settings because these offset
1505 // and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal
1506 // will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the
1507 // root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31.
1508 #if (MP_DRIVER != 1)
1509         return;
1510 #endif
1511
1512         //settings adjust for normal chip
1513         for(index = 0; index < PATH_NUM; index ++)
1514         {
1515                 APK_offset[index] = APK_normal_offset[index];
1516                 APK_value[index] = APK_normal_value[index];
1517                 AFE_on_off[index] = 0x6fdb25a4;
1518         }
1519
1520         for(index = 0; index < APK_BB_REG_NUM; index ++)
1521         {
1522                 for(path = 0; path < pathbound; path++)
1523                 {
1524                         APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index];
1525                         APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index];
1526                 }
1527                 BB_AP_MODE[index] = BB_normal_AP_MODE[index];
1528         }
1529
1530         apkbound = 6;
1531
1532         //save BB default value
1533         for(index = 0; index < APK_BB_REG_NUM ; index++)
1534         {
1535                 if(index == 0)          //skip
1536                         continue;
1537                 BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord);
1538         }
1539
1540         //save MAC default value
1541         _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup);
1542
1543         //save AFE default value
1544         _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
1545
1546         for(path = 0; path < pathbound; path++)
1547         {
1548                 if(path == RF_PATH_A)
1549                 {
1550                         //path A APK
1551                         //load APK setting
1552                         //path-A
1553                         offset = rPdp_AntA;
1554                         for(index = 0; index < 11; index ++)
1555                         {
1556                                 PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
1557                                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
1558
1559                                 offset += 0x04;
1560                         }
1561
1562                         PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000);
1563
1564                         offset = rConfig_AntA;
1565                         for(; index < 13; index ++)
1566                         {
1567                                 PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
1568                                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
1569
1570                                 offset += 0x04;
1571                         }
1572
1573                         //page-B1
1574                         PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000);
1575
1576                         //path A
1577                         offset = rPdp_AntA;
1578                         for(index = 0; index < 16; index++)
1579                         {
1580                                 PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);
1581                                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
1582
1583                                 offset += 0x04;
1584                         }
1585                         PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
1586                 }
1587                 else if(path == RF_PATH_B)
1588                 {
1589                         //path B APK
1590                         //load APK setting
1591                         //path-B
1592                         offset = rPdp_AntB;
1593                         for(index = 0; index < 10; index ++)
1594                         {
1595                                 PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
1596                                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
1597
1598                                 offset += 0x04;
1599                         }
1600                         PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000);
1601
1602                         PHY_SetBBReg(pAdapter, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000);
1603
1604                         offset = rConfig_AntA;
1605                         index = 11;
1606                         for(; index < 13; index ++) //offset 0xb68, 0xb6c
1607                         {
1608                                 PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]);
1609                                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
1610
1611                                 offset += 0x04;
1612                         }
1613
1614                         //page-B1
1615                         PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x40000000);
1616
1617                         //path B
1618                         offset = 0xb60;
1619                         for(index = 0; index < 16; index++)
1620                         {
1621                                 PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]);
1622                                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord)));
1623
1624                                 offset += 0x04;
1625                         }
1626                         PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
1627                 }
1628
1629                 //save RF default value
1630                 regD[path] = PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask);
1631
1632                 //Path A AFE all on, path B AFE All off or vise versa
1633                 for(index = 0; index < IQK_ADDA_REG_NUM ; index++)
1634                         PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]);
1635                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, 0xe70, bMaskDWord)));
1636
1637                 //BB to AP mode
1638                 if(path == 0)
1639                 {
1640                         for(index = 0; index < APK_BB_REG_NUM ; index++)
1641                         {
1642                                 if(index == 0)          //skip
1643                                         continue;
1644                                 else if (index < 5)
1645                                         PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]);
1646                                 else if (BB_REG[index] == 0x870)
1647                                         PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26);
1648                                 else
1649                                         PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0);
1650                         }
1651                         PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
1652                         PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
1653                 }
1654                 else            //path B
1655                 {
1656                         PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00);
1657                         PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00);
1658                 }
1659
1660                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord)));
1661
1662                 //MAC settings
1663                 _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup);
1664
1665                 if(path == RF_PATH_A)   //Path B to standby mode
1666                 {
1667                         PHY_SetRFReg(pAdapter, RF_PATH_B, RF_AC, bRFRegOffsetMask, 0x10000);
1668                 }
1669                 else                    //Path A to standby mode
1670                 {
1671                         PHY_SetRFReg(pAdapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x10000);
1672                         PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f);
1673                         PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20103);
1674                 }
1675
1676                 delta_offset = ((delta+14)/2);
1677                 if(delta_offset < 0)
1678                         delta_offset = 0;
1679                 else if (delta_offset > 12)
1680                         delta_offset = 12;
1681
1682                 //AP calibration
1683                 for(index = 0; index < APK_BB_REG_NUM; index++)
1684                 {
1685                         if(index != 1)          //only DO PA11+PAD01001, AP RF setting
1686                                 continue;
1687
1688                         tmpReg = APK_RF_init_value[path][index];
1689 #if 1
1690                         if(!pdmpriv->bAPKThermalMeterIgnore)
1691                         {
1692                                 BB_offset = (tmpReg & 0xF0000) >> 16;
1693
1694                                 if(!(tmpReg & BIT15)) //sign bit 0
1695                                 {
1696                                         BB_offset = -BB_offset;
1697                                 }
1698
1699                                 delta_V = APK_delta_mapping[index][delta_offset];
1700
1701                                 BB_offset += delta_V;
1702
1703                                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() APK num %d delta_V %d delta_offset %d\n", index, delta_V, delta_offset));
1704
1705                                 if(BB_offset < 0)
1706                                 {
1707                                         tmpReg = tmpReg & (~BIT15);
1708                                         BB_offset = -BB_offset;
1709                                 }
1710                                 else
1711                                 {
1712                                         tmpReg = tmpReg | BIT15;
1713                                 }
1714                                 tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16);
1715                         }
1716 #endif
1717
1718 #ifdef CONFIG_PCI_HCI
1719                         if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID))
1720                                 PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask, 0x894ae);
1721                         else
1722 #endif
1723                                 PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_IPA_A, bRFRegOffsetMask, 0x8992e);
1724                         //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0xc, bMaskDWord)));
1725                         PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_AC, bRFRegOffsetMask, APK_RF_value_0[path][index]);
1726                         //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0x0, bMaskDWord)));
1727                         PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask, tmpReg);
1728                         //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, (RF_RADIO_PATH_E)path, 0xd, bMaskDWord)));
1729
1730                         // PA11+PAD01111, one shot
1731                         i = 0;
1732                         do
1733                         {
1734                                 PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80000000);
1735                                 {
1736                                         PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]);
1737                                         //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord)));
1738                                         rtw_mdelay_os(3);
1739                                         PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]);
1740                                         //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord)));
1741                                         #ifdef CONFIG_LONG_DELAY_ISSUE
1742                                         rtw_msleep_os(20);
1743                                         #else
1744                                         rtw_mdelay_os(20);
1745                                         #endif
1746                                 }
1747                                 PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x00000000);
1748
1749                                 if(path == RF_PATH_A)
1750                                         tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0x03E00000);
1751                                 else
1752                                         tmpReg = PHY_QueryBBReg(pAdapter, rAPK, 0xF8000000);
1753                                 //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xbd8[25:21] %x\n", tmpReg));
1754
1755                                 i++;
1756                         }
1757                         while(tmpReg > apkbound && i < 4);
1758
1759                         APK_result[path][index] = tmpReg;
1760                 }
1761         }
1762
1763         //reload MAC default value
1764         _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup);
1765
1766         //reload BB default value
1767         for(index = 0; index < APK_BB_REG_NUM ; index++)
1768         {
1769                 if(index == 0)          //skip
1770                         continue;
1771                 PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]);
1772         }
1773
1774         //reload AFE default value
1775         _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM);
1776
1777         //reload RF path default value
1778         for(path = 0; path < pathbound; path++)
1779         {
1780                 PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_TXBIAS_A, bRFRegOffsetMask, regD[path]);
1781                 if(path == RF_PATH_B)
1782                 {
1783                         PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE1, bRFRegOffsetMask, 0x1000f);
1784                         PHY_SetRFReg(pAdapter, RF_PATH_A, RF_MODE2, bRFRegOffsetMask, 0x20101);
1785                 }
1786
1787                 //note no index == 0
1788                 if (APK_result[path][1] > 6)
1789                         APK_result[path][1] = 6;
1790                 //RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1]));
1791         }
1792
1793         //RTPRINT(FINIT, INIT_IQK, ("\n"));
1794
1795
1796         for(path = 0; path < pathbound; path++)
1797         {
1798                 PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G1_G4, bRFRegOffsetMask,
1799                 ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1]));
1800                 if(path == RF_PATH_A)
1801                         PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask,
1802                         ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05));
1803                 else
1804                         PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G5_G8, bRFRegOffsetMask,
1805                         ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05));
1806                 PHY_SetRFReg(pAdapter, (RF_RADIO_PATH_E)path, RF_BS_PA_APSET_G9_G11, bRFRegOffsetMask,
1807                 ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08));
1808         }
1809
1810         pdmpriv->bAPKdone = _TRUE;
1811
1812         //RTPRINT(FINIT, INIT_IQK, ("<==PHY_APCalibrate()\n"));
1813 }
1814
1815 VOID
1816 rtl8192c_PHY_IQCalibrate(
1817         IN      PADAPTER        pAdapter,
1818         IN      bool    bReCovery
1819         )
1820 {
1821         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
1822         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
1823         s32                     result[4][8];   //last is final result
1824         u8                      i, final_candidate;
1825         bool            bPathAOK, bPathBOK;
1826         s32                     RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
1827         bool            is12simular, is13simular, is23simular;
1828         bool    bStartContTx = _FALSE, bSingleTone = _FALSE, bCarrierSuppression = _FALSE;
1829         u32                     IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
1830                                         rOFDM0_XARxIQImbalance,         rOFDM0_XBRxIQImbalance,
1831                                         rOFDM0_ECCAThreshold,   rOFDM0_AGCRSSITable,
1832                                         rOFDM0_XATxIQImbalance,         rOFDM0_XBTxIQImbalance,
1833                                         rOFDM0_XCTxAFE,                         rOFDM0_XDTxAFE,
1834                                         rOFDM0_RxIQExtAnta};
1835
1836
1837 #if MP_DRIVER == 1
1838         bStartContTx = pAdapter->mppriv.MptCtx.bStartContTx;
1839         bSingleTone = pAdapter->mppriv.MptCtx.bSingleTone;
1840         bCarrierSuppression = pAdapter->mppriv.MptCtx.bCarrierSuppression;
1841 #endif
1842
1843         //ignore IQK when continuous Tx
1844         if(bStartContTx || bSingleTone || bCarrierSuppression)
1845                 return;
1846
1847 #if DISABLE_BB_RF
1848         return;
1849 #endif
1850
1851         if(bReCovery)
1852         {
1853                 _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9);
1854                 return;
1855         }
1856         DBG_8723A("IQK:Start!!!\n");
1857
1858         for(i = 0; i < 8; i++)
1859         {
1860                 result[0][i] = 0;
1861                 result[1][i] = 0;
1862                 result[2][i] = 0;
1863                 result[3][i] = 0;
1864         }
1865         final_candidate = 0xff;
1866         bPathAOK = _FALSE;
1867         bPathBOK = _FALSE;
1868         is12simular = _FALSE;
1869         is23simular = _FALSE;
1870         is13simular = _FALSE;
1871
1872         for (i=0; i<3; i++)
1873         {
1874                 if(IS_92C_SERIAL( pHalData->VersionID)){
1875                          _PHY_IQCalibrate(pAdapter, result, i, _TRUE);
1876                 }
1877                 else{
1878                         // For 88C 1T1R
1879                         _PHY_IQCalibrate(pAdapter, result, i, _FALSE);
1880                 }
1881
1882                 if(i == 1)
1883                 {
1884                         is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1);
1885                         if(is12simular)
1886                         {
1887                                 final_candidate = 0;
1888                                 break;
1889                         }
1890                 }
1891
1892                 if(i == 2)
1893                 {
1894                         is13simular = _PHY_SimularityCompare(pAdapter, result, 0, 2);
1895                         if(is13simular)
1896                         {
1897                                 final_candidate = 0;
1898                                 break;
1899                         }
1900
1901                         is23simular = _PHY_SimularityCompare(pAdapter, result, 1, 2);
1902                         if(is23simular)
1903                                 final_candidate = 1;
1904                         else
1905                         {
1906                                 for(i = 0; i < 8; i++)
1907                                         RegTmp += result[3][i];
1908
1909                                 if(RegTmp != 0)
1910                                         final_candidate = 3;
1911                                 else
1912                                         final_candidate = 0xFF;
1913                         }
1914                 }
1915         }
1916
1917         for (i=0; i<4; i++)
1918         {
1919                 RegE94 = result[i][0];
1920                 RegE9C = result[i][1];
1921                 RegEA4 = result[i][2];
1922                 RegEAC = result[i][3];
1923                 RegEB4 = result[i][4];
1924                 RegEBC = result[i][5];
1925                 RegEC4 = result[i][6];
1926                 RegECC = result[i][7];
1927                 //RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%lx RegE9C=%lx RegEA4=%lx RegEAC=%lx RegEB4=%lx RegEBC=%lx RegEC4=%lx RegECC=%lx\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC));
1928         }
1929
1930         if(final_candidate != 0xff)
1931         {
1932                 pdmpriv->RegE94 = RegE94 = result[final_candidate][0];
1933                 pdmpriv->RegE9C = RegE9C = result[final_candidate][1];
1934                 RegEA4 = result[final_candidate][2];
1935                 RegEAC = result[final_candidate][3];
1936                 pdmpriv->RegEB4 = RegEB4 = result[final_candidate][4];
1937                 pdmpriv->RegEBC = RegEBC = result[final_candidate][5];
1938                 RegEC4 = result[final_candidate][6];
1939                 RegECC = result[final_candidate][7];
1940                 DBG_8723A("IQK: final_candidate is %x\n", final_candidate);
1941                 DBG_8723A("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC);
1942                 bPathAOK = bPathBOK = _TRUE;
1943         }
1944         else
1945         {
1946                 RegE94 = RegEB4 = pdmpriv->RegE94 = pdmpriv->RegEB4 = 0x100;    //X default value
1947                 RegE9C = RegEBC = pdmpriv->RegE9C = pdmpriv->RegEBC = 0x0;              //Y default value
1948         }
1949
1950         if((RegE94 != 0)/*&&(RegEA4 != 0)*/)
1951                 _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));
1952
1953         if(IS_92C_SERIAL( pHalData->VersionID)){
1954                 if((RegEB4 != 0)/*&&(RegEC4 != 0)*/)
1955                 _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
1956         }
1957
1958         _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9);
1959
1960 }
1961
1962
1963 VOID
1964 rtl8192c_PHY_LCCalibrate(
1965         IN      PADAPTER        pAdapter
1966         )
1967 {
1968         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
1969         struct mlme_ext_priv    *pmlmeext = &pAdapter->mlmeextpriv;
1970         bool    bStartContTx = _FALSE, bSingleTone = _FALSE, bCarrierSuppression = _FALSE;
1971
1972 #if MP_DRIVER == 1
1973         bStartContTx = pAdapter->mppriv.MptCtx.bStartContTx;
1974         bSingleTone = pAdapter->mppriv.MptCtx.bSingleTone;
1975         bCarrierSuppression = pAdapter->mppriv.MptCtx.bCarrierSuppression;
1976 #endif
1977
1978 #if DISABLE_BB_RF
1979         return;
1980 #endif
1981
1982         //ignore IQK when continuous Tx
1983         if(bStartContTx || bSingleTone || bCarrierSuppression)
1984                 return;
1985
1986         if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
1987                 return;
1988
1989         if(IS_92C_SERIAL( pHalData->VersionID)){
1990                 _PHY_LCCalibrate(pAdapter, _TRUE);
1991         }
1992         else{
1993                 // For 88C 1T1R
1994                 _PHY_LCCalibrate(pAdapter, _FALSE);
1995         }
1996 }
1997
1998 VOID
1999 rtl8192c_PHY_APCalibrate(
2000         IN      PADAPTER        pAdapter,
2001         IN      char            delta
2002         )
2003 {
2004 }