2 * Machine definitions for boards featuring an NPCM7xx SoC.
4 * Copyright 2020 Google LLC
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 #include "qemu/osdep.h"
19 #include "hw/arm/npcm7xx.h"
20 #include "hw/core/cpu.h"
21 #include "hw/i2c/i2c_mux_pca954x.h"
22 #include "hw/i2c/smbus_eeprom.h"
23 #include "hw/loader.h"
24 #include "hw/nvram/eeprom_at24c.h"
25 #include "hw/qdev-core.h"
26 #include "hw/qdev-properties.h"
27 #include "qapi/error.h"
28 #include "qemu/datadir.h"
29 #include "qemu/units.h"
30 #include "sysemu/blockdev.h"
31 #include "sysemu/sysemu.h"
32 #include "sysemu/block-backend.h"
33 #include "qemu/error-report.h"
36 #define NPCM7XX_POWER_ON_STRAPS_DEFAULT ( \
37 NPCM7XX_PWRON_STRAP_SPI0F18 | \
38 NPCM7XX_PWRON_STRAP_SFAB | \
39 NPCM7XX_PWRON_STRAP_BSPA | \
40 NPCM7XX_PWRON_STRAP_FUP(FUP_NORM_UART2) | \
41 NPCM7XX_PWRON_STRAP_SECEN | \
42 NPCM7XX_PWRON_STRAP_HIZ | \
43 NPCM7XX_PWRON_STRAP_ECC | \
44 NPCM7XX_PWRON_STRAP_RESERVE1 | \
45 NPCM7XX_PWRON_STRAP_J2EN | \
46 NPCM7XX_PWRON_STRAP_CKFRQ(CKFRQ_DEFAULT))
48 #define NPCM750_EVB_POWER_ON_STRAPS ( \
49 NPCM7XX_POWER_ON_STRAPS_DEFAULT & ~NPCM7XX_PWRON_STRAP_J2EN)
50 #define QUANTA_GSJ_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT
51 #define QUANTA_GBS_POWER_ON_STRAPS ( \
52 NPCM7XX_POWER_ON_STRAPS_DEFAULT & ~NPCM7XX_PWRON_STRAP_SFAB)
53 #define KUDO_BMC_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT
54 #define MORI_BMC_POWER_ON_STRAPS NPCM7XX_POWER_ON_STRAPS_DEFAULT
56 static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin";
58 static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc)
60 const char *bios_name = machine->firmware ?: npcm7xx_default_bootrom;
61 g_autofree char *filename = NULL;
64 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
66 error_report("Could not find ROM image '%s'", bios_name);
67 if (!machine->kernel_filename) {
68 /* We can't boot without a bootrom or a kernel image. */
73 ret = load_image_mr(filename, &soc->irom);
75 error_report("Failed to load ROM image '%s'", filename);
80 static void npcm7xx_connect_flash(NPCM7xxFIUState *fiu, int cs_no,
81 const char *flash_type, DriveInfo *dinfo)
86 flash = qdev_new(flash_type);
88 qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo));
90 qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal);
92 flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0);
93 qdev_connect_gpio_out_named(DEVICE(fiu), "cs", cs_no, flash_cs);
96 static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram)
98 memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA, dram);
100 object_property_set_link(OBJECT(soc), "dram-mr", OBJECT(dram),
104 static void sdhci_attach_drive(SDHCIState *sdhci, int unit)
106 DriveInfo *di = drive_get(IF_SD, 0, unit);
107 BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
109 BusState *bus = qdev_get_child_bus(DEVICE(sdhci), "sd-bus");
111 error_report("No SD bus found in SOC object");
115 DeviceState *carddev = qdev_new(TYPE_SD_CARD);
116 qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
117 qdev_realize_and_unref(carddev, bus, &error_fatal);
120 static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
123 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
124 MachineClass *mc = MACHINE_CLASS(nmc);
127 if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
128 error_report("This board can only be used with %s",
129 mc->default_cpu_type);
133 obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
135 object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
140 static I2CBus *npcm7xx_i2c_get_bus(NPCM7xxState *soc, uint32_t num)
142 g_assert(num < ARRAY_SIZE(soc->smbus));
143 return I2C_BUS(qdev_get_child_bus(DEVICE(&soc->smbus[num]), "i2c-bus"));
146 static void npcm7xx_init_pwm_splitter(NPCM7xxMachine *machine,
147 NPCM7xxState *soc, const int *fan_counts)
149 SplitIRQ *splitters = machine->fan_splitter;
152 * PWM 0~3 belong to module 0 output 0~3.
153 * PWM 4~7 belong to module 1 output 0~3.
155 for (int i = 0; i < NPCM7XX_NR_PWM_MODULES; ++i) {
156 for (int j = 0; j < NPCM7XX_PWM_PER_MODULE; ++j) {
157 int splitter_no = i * NPCM7XX_PWM_PER_MODULE + j;
158 DeviceState *splitter;
160 if (fan_counts[splitter_no] < 1) {
163 object_initialize_child(OBJECT(machine), "fan-splitter[*]",
164 &splitters[splitter_no], TYPE_SPLIT_IRQ);
165 splitter = DEVICE(&splitters[splitter_no]);
166 qdev_prop_set_uint16(splitter, "num-lines",
167 fan_counts[splitter_no]);
168 qdev_realize(splitter, NULL, &error_abort);
169 qdev_connect_gpio_out_named(DEVICE(&soc->pwm[i]), "duty-gpio-out",
170 j, qdev_get_gpio_in(splitter, 0));
175 static void npcm7xx_connect_pwm_fan(NPCM7xxState *soc, SplitIRQ *splitter,
176 int fan_no, int output_no)
180 qemu_irq fan_duty_gpio;
182 g_assert(fan_no >= 0 && fan_no <= NPCM7XX_MFT_MAX_FAN_INPUT);
184 * Fan 0~1 belong to module 0 input 0~1.
185 * Fan 2~3 belong to module 1 input 0~1.
187 * Fan 14~15 belong to module 7 input 0~1.
188 * Fan 16~17 belong to module 0 input 2~3.
189 * Fan 18~19 belong to module 1 input 2~3.
192 fan = DEVICE(&soc->mft[fan_no / 2]);
193 fan_input = fan_no % 2;
195 fan = DEVICE(&soc->mft[(fan_no - 16) / 2]);
196 fan_input = fan_no % 2 + 2;
199 /* Connect the Fan to PWM module */
200 fan_duty_gpio = qdev_get_gpio_in_named(fan, "duty", fan_input);
201 qdev_connect_gpio_out(DEVICE(splitter), output_no, fan_duty_gpio);
204 static void npcm750_evb_i2c_init(NPCM7xxState *soc)
206 /* lm75 temperature sensor on SVB, tmp105 is compatible */
207 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 0), "tmp105", 0x48);
208 /* lm75 temperature sensor on EB, tmp105 is compatible */
209 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), "tmp105", 0x48);
210 /* tmp100 temperature sensor on EB, tmp105 is compatible */
211 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 2), "tmp105", 0x48);
212 /* tmp100 temperature sensor on SVB, tmp105 is compatible */
213 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 6), "tmp105", 0x48);
216 static void npcm750_evb_fan_init(NPCM7xxMachine *machine, NPCM7xxState *soc)
218 SplitIRQ *splitter = machine->fan_splitter;
219 static const int fan_counts[] = {2, 2, 2, 2, 2, 2, 2, 2};
221 npcm7xx_init_pwm_splitter(machine, soc, fan_counts);
222 npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x00, 0);
223 npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x01, 1);
224 npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x02, 0);
225 npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x03, 1);
226 npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x04, 0);
227 npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x05, 1);
228 npcm7xx_connect_pwm_fan(soc, &splitter[3], 0x06, 0);
229 npcm7xx_connect_pwm_fan(soc, &splitter[3], 0x07, 1);
230 npcm7xx_connect_pwm_fan(soc, &splitter[4], 0x08, 0);
231 npcm7xx_connect_pwm_fan(soc, &splitter[4], 0x09, 1);
232 npcm7xx_connect_pwm_fan(soc, &splitter[5], 0x0a, 0);
233 npcm7xx_connect_pwm_fan(soc, &splitter[5], 0x0b, 1);
234 npcm7xx_connect_pwm_fan(soc, &splitter[6], 0x0c, 0);
235 npcm7xx_connect_pwm_fan(soc, &splitter[6], 0x0d, 1);
236 npcm7xx_connect_pwm_fan(soc, &splitter[7], 0x0e, 0);
237 npcm7xx_connect_pwm_fan(soc, &splitter[7], 0x0f, 1);
240 static void quanta_gsj_i2c_init(NPCM7xxState *soc)
242 /* GSJ machine have 4 max31725 temperature sensors, tmp105 is compatible. */
243 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), "tmp105", 0x5c);
244 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 2), "tmp105", 0x5c);
245 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 3), "tmp105", 0x5c);
246 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 4), "tmp105", 0x5c);
248 at24c_eeprom_init(npcm7xx_i2c_get_bus(soc, 9), 0x55, 8192);
249 at24c_eeprom_init(npcm7xx_i2c_get_bus(soc, 10), 0x55, 8192);
253 * - power-brick@36: delta,dps800
254 * - hotswap@15: ti,lm5066i
262 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 15), "pca9548", 0x75);
265 static void quanta_gsj_fan_init(NPCM7xxMachine *machine, NPCM7xxState *soc)
267 SplitIRQ *splitter = machine->fan_splitter;
268 static const int fan_counts[] = {2, 2, 2, 0, 0, 0, 0, 0};
270 npcm7xx_init_pwm_splitter(machine, soc, fan_counts);
271 npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x00, 0);
272 npcm7xx_connect_pwm_fan(soc, &splitter[0], 0x01, 1);
273 npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x02, 0);
274 npcm7xx_connect_pwm_fan(soc, &splitter[1], 0x03, 1);
275 npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x04, 0);
276 npcm7xx_connect_pwm_fan(soc, &splitter[2], 0x05, 1);
279 static void quanta_gbs_i2c_init(NPCM7xxState *soc)
298 * atmel,24c64@50 mb_fru
300 * - channel 0: max31725@54
301 * - channel 1: max31725@55
302 * - channel 2: max31725@5d
303 * atmel,24c64@51 fan_fru
304 * - channel 3: atmel,24c64@52 hsbp_fru
317 * - channel 0: isil,isl68137@60
318 * - channel 1: isil,isl68137@61
319 * - channel 2: isil,isl68137@63
320 * - channel 3: isil,isl68137@45
338 static void kudo_bmc_i2c_init(NPCM7xxState *soc)
342 i2c_mux = i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1),
345 /* tmp105 is compatible with the lm75 */
346 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 4), "tmp105", 0x5c);
347 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), "tmp105", 0x5c);
348 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 6), "tmp105", 0x5c);
349 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 7), "tmp105", 0x5c);
351 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 1), TYPE_PCA9548, 0x77);
353 i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 4), TYPE_PCA9548, 0x77);
355 at24c_eeprom_init(npcm7xx_i2c_get_bus(soc, 4), 0x50, 8192); /* mbfru */
357 i2c_mux = i2c_slave_create_simple(npcm7xx_i2c_get_bus(soc, 13),
360 /* tmp105 is compatible with the lm75 */
361 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 2), "tmp105", 0x48);
362 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 3), "tmp105", 0x49);
363 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 4), "tmp105", 0x48);
364 i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 5), "tmp105", 0x49);
366 at24c_eeprom_init(npcm7xx_i2c_get_bus(soc, 14), 0x55, 8192); /* bmcfru */
368 /* TODO: Add remaining i2c devices. */
371 static void npcm750_evb_init(MachineState *machine)
375 soc = npcm7xx_create_soc(machine, NPCM750_EVB_POWER_ON_STRAPS);
376 npcm7xx_connect_dram(soc, machine->ram);
377 qdev_realize(DEVICE(soc), NULL, &error_fatal);
379 npcm7xx_load_bootrom(machine, soc);
380 npcm7xx_connect_flash(&soc->fiu[0], 0, "w25q256", drive_get(IF_MTD, 0, 0));
381 npcm750_evb_i2c_init(soc);
382 npcm750_evb_fan_init(NPCM7XX_MACHINE(machine), soc);
383 npcm7xx_load_kernel(machine, soc);
386 static void quanta_gsj_init(MachineState *machine)
390 soc = npcm7xx_create_soc(machine, QUANTA_GSJ_POWER_ON_STRAPS);
391 npcm7xx_connect_dram(soc, machine->ram);
392 qdev_realize(DEVICE(soc), NULL, &error_fatal);
394 npcm7xx_load_bootrom(machine, soc);
395 npcm7xx_connect_flash(&soc->fiu[0], 0, "mx25l25635e",
396 drive_get(IF_MTD, 0, 0));
397 quanta_gsj_i2c_init(soc);
398 quanta_gsj_fan_init(NPCM7XX_MACHINE(machine), soc);
399 npcm7xx_load_kernel(machine, soc);
402 static void quanta_gbs_init(MachineState *machine)
406 soc = npcm7xx_create_soc(machine, QUANTA_GBS_POWER_ON_STRAPS);
407 npcm7xx_connect_dram(soc, machine->ram);
408 qdev_realize(DEVICE(soc), NULL, &error_fatal);
410 npcm7xx_load_bootrom(machine, soc);
412 npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f",
413 drive_get(IF_MTD, 0, 0));
415 quanta_gbs_i2c_init(soc);
416 sdhci_attach_drive(&soc->mmc.sdhci, 0);
417 npcm7xx_load_kernel(machine, soc);
420 static void kudo_bmc_init(MachineState *machine)
424 soc = npcm7xx_create_soc(machine, KUDO_BMC_POWER_ON_STRAPS);
425 npcm7xx_connect_dram(soc, machine->ram);
426 qdev_realize(DEVICE(soc), NULL, &error_fatal);
428 npcm7xx_load_bootrom(machine, soc);
429 npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f",
430 drive_get(IF_MTD, 0, 0));
431 npcm7xx_connect_flash(&soc->fiu[1], 0, "mx66u51235f",
432 drive_get(IF_MTD, 3, 0));
434 kudo_bmc_i2c_init(soc);
435 sdhci_attach_drive(&soc->mmc.sdhci, 0);
436 npcm7xx_load_kernel(machine, soc);
439 static void mori_bmc_init(MachineState *machine)
443 soc = npcm7xx_create_soc(machine, MORI_BMC_POWER_ON_STRAPS);
444 npcm7xx_connect_dram(soc, machine->ram);
445 qdev_realize(DEVICE(soc), NULL, &error_fatal);
447 npcm7xx_load_bootrom(machine, soc);
448 npcm7xx_connect_flash(&soc->fiu[1], 0, "mx66u51235f",
449 drive_get(IF_MTD, 3, 0));
451 npcm7xx_load_kernel(machine, soc);
454 static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
456 NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type));
457 MachineClass *mc = MACHINE_CLASS(nmc);
459 nmc->soc_type = type;
460 mc->default_cpus = mc->min_cpus = mc->max_cpus = sc->num_cpus;
463 static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
465 MachineClass *mc = MACHINE_CLASS(oc);
470 mc->default_ram_id = "ram";
471 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
476 * https://github.com/Nuvoton-Israel/nuvoton-info/blob/master/npcm7xx-poleg/evaluation-board/board_deliverables/NPCM750x_EB_ver.A1.1_COMPLETE.pdf
478 static void npcm750_evb_machine_class_init(ObjectClass *oc, void *data)
480 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
481 MachineClass *mc = MACHINE_CLASS(oc);
483 npcm7xx_set_soc_type(nmc, TYPE_NPCM750);
485 mc->desc = "Nuvoton NPCM750 Evaluation Board (Cortex-A9)";
486 mc->init = npcm750_evb_init;
487 mc->default_ram_size = 512 * MiB;
490 static void gsj_machine_class_init(ObjectClass *oc, void *data)
492 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
493 MachineClass *mc = MACHINE_CLASS(oc);
495 npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
497 mc->desc = "Quanta GSJ (Cortex-A9)";
498 mc->init = quanta_gsj_init;
499 mc->default_ram_size = 512 * MiB;
502 static void gbs_bmc_machine_class_init(ObjectClass *oc, void *data)
504 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
505 MachineClass *mc = MACHINE_CLASS(oc);
507 npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
509 mc->desc = "Quanta GBS (Cortex-A9)";
510 mc->init = quanta_gbs_init;
511 mc->default_ram_size = 1 * GiB;
514 static void kudo_bmc_machine_class_init(ObjectClass *oc, void *data)
516 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
517 MachineClass *mc = MACHINE_CLASS(oc);
519 npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
521 mc->desc = "Kudo BMC (Cortex-A9)";
522 mc->init = kudo_bmc_init;
523 mc->default_ram_size = 1 * GiB;
526 static void mori_bmc_machine_class_init(ObjectClass *oc, void *data)
528 NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
529 MachineClass *mc = MACHINE_CLASS(oc);
531 npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
533 mc->desc = "Mori BMC (Cortex-A9)";
534 mc->init = mori_bmc_init;
535 mc->default_ram_size = 1 * GiB;
538 static const TypeInfo npcm7xx_machine_types[] = {
540 .name = TYPE_NPCM7XX_MACHINE,
541 .parent = TYPE_MACHINE,
542 .instance_size = sizeof(NPCM7xxMachine),
543 .class_size = sizeof(NPCM7xxMachineClass),
544 .class_init = npcm7xx_machine_class_init,
547 .name = MACHINE_TYPE_NAME("npcm750-evb"),
548 .parent = TYPE_NPCM7XX_MACHINE,
549 .class_init = npcm750_evb_machine_class_init,
551 .name = MACHINE_TYPE_NAME("quanta-gsj"),
552 .parent = TYPE_NPCM7XX_MACHINE,
553 .class_init = gsj_machine_class_init,
555 .name = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
556 .parent = TYPE_NPCM7XX_MACHINE,
557 .class_init = gbs_bmc_machine_class_init,
559 .name = MACHINE_TYPE_NAME("kudo-bmc"),
560 .parent = TYPE_NPCM7XX_MACHINE,
561 .class_init = kudo_bmc_machine_class_init,
563 .name = MACHINE_TYPE_NAME("mori-bmc"),
564 .parent = TYPE_NPCM7XX_MACHINE,
565 .class_init = mori_bmc_machine_class_init,
569 DEFINE_TYPES(npcm7xx_machine_types)