hw/m68k/virt.c

   1 /*
   2  * SPDX-License-Identifier: GPL-2.0-or-later
   3  *
   4  * QEMU Virtual M68K Machine
   5  *
   6  * (c) 2020 Laurent Vivier <laurent@vivier.eu>
   7  *
   8  */
   9
  10 #include "qemu/osdep.h"
  11 #include "qemu/units.h"
  12 #include "qemu/guest-random.h"
  13 #include "sysemu/sysemu.h"
  14 #include "cpu.h"
  15 #include "hw/boards.h"
  16 #include "hw/qdev-properties.h"
  17 #include "elf.h"
  18 #include "hw/loader.h"
  19 #include "ui/console.h"
  20 #include "hw/sysbus.h"
  21 #include "standard-headers/asm-m68k/bootinfo.h"
  22 #include "standard-headers/asm-m68k/bootinfo-virt.h"
  23 #include "bootinfo.h"
  24 #include "net/net.h"
  25 #include "qapi/error.h"
  26 #include "qemu/error-report.h"
  27 #include "sysemu/qtest.h"
  28 #include "sysemu/runstate.h"
  29 #include "sysemu/reset.h"
  30
  31 #include "hw/intc/m68k_irqc.h"
  32 #include "hw/misc/virt_ctrl.h"
  33 #include "hw/char/goldfish_tty.h"
  34 #include "hw/rtc/goldfish_rtc.h"
  35 #include "hw/intc/goldfish_pic.h"
  36 #include "hw/virtio/virtio-mmio.h"
  37 #include "hw/virtio/virtio-blk.h"
  38
  39 /*
  40  * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
  41  * CPU IRQ #1 -> PIC #1
  42  *               IRQ #1 to IRQ #31 -> unused
  43  *               IRQ #32 -> goldfish-tty
  44  * CPU IRQ #2 -> PIC #2
  45  *               IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
  46  * CPU IRQ #3 -> PIC #3
  47  *               IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
  48  * CPU IRQ #4 -> PIC #4
  49  *               IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96
  50  * CPU IRQ #5 -> PIC #5
  51  *               IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128
  52  * CPU IRQ #6 -> PIC #6
  53  *               IRQ #1 -> goldfish-rtc
  54  *               IRQ #2 to IRQ #32 -> unused
  55  * CPU IRQ #7 -> NMI
  56  */
  57
  58 #define PIC_IRQ_BASE(num)     (8 + (num - 1) * 32)
  59 #define PIC_IRQ(num, irq)     (PIC_IRQ_BASE(num) + irq - 1)
  60 #define PIC_GPIO(pic_irq)     (qdev_get_gpio_in(pic_dev[(pic_irq - 8) / 32], \
  61                                                 (pic_irq - 8) % 32))
  62
  63 #define VIRT_GF_PIC_MMIO_BASE 0xff000000     /* MMIO: 0xff000000 - 0xff005fff */
  64 #define VIRT_GF_PIC_IRQ_BASE  1              /* IRQ: #1 -> #6 */
  65 #define VIRT_GF_PIC_NB        6
  66
  67 /* 2 goldfish-rtc (and timer) */
  68 #define VIRT_GF_RTC_MMIO_BASE 0xff006000     /* MMIO: 0xff006000 - 0xff007fff */
  69 #define VIRT_GF_RTC_IRQ_BASE  PIC_IRQ(6, 1)  /* PIC: #6, IRQ: #1 */
  70 #define VIRT_GF_RTC_NB        2
  71
  72 /* 1 goldfish-tty */
  73 #define VIRT_GF_TTY_MMIO_BASE 0xff008000     /* MMIO: 0xff008000 - 0xff008fff */
  74 #define VIRT_GF_TTY_IRQ_BASE  PIC_IRQ(1, 32) /* PIC: #1, IRQ: #32 */
  75
  76 /* 1 virt-ctrl */
  77 #define VIRT_CTRL_MMIO_BASE 0xff009000    /* MMIO: 0xff009000 - 0xff009fff */
  78 #define VIRT_CTRL_IRQ_BASE  PIC_IRQ(1, 1) /* PIC: #1, IRQ: #1 */
  79
  80 /*
  81  * virtio-mmio size is 0x200 bytes
  82  * we use 4 goldfish-pic to attach them,
  83  * we can attach 32 virtio devices / goldfish-pic
  84  * -> we can manage 32 * 4 = 128 virtio devices
  85  */
  86 #define VIRT_VIRTIO_MMIO_BASE 0xff010000     /* MMIO: 0xff010000 - 0xff01ffff */
  87 #define VIRT_VIRTIO_IRQ_BASE  PIC_IRQ(2, 1)  /* PIC: 2, 3, 4, 5, IRQ: ALL */
  88
  89 typedef struct {
  90     M68kCPU *cpu;
  91     hwaddr initial_pc;
  92     hwaddr initial_stack;
  93 } ResetInfo;
  94
  95 static void main_cpu_reset(void *opaque)
  96 {
  97     ResetInfo *reset_info = opaque;
  98     M68kCPU *cpu = reset_info->cpu;
  99     CPUState *cs = CPU(cpu);
 100
 101     cpu_reset(cs);
 102     cpu->env.aregs[7] = reset_info->initial_stack;
 103     cpu->env.pc = reset_info->initial_pc;
 104 }
 105
 106 static void rerandomize_rng_seed(void *opaque)
 107 {
 108     struct bi_record *rng_seed = opaque;
 109     qemu_guest_getrandom_nofail((void *)rng_seed->data + 2,
 110                                 be16_to_cpu(*(uint16_t *)rng_seed->data));
 111 }
 112
 113 static void virt_init(MachineState *machine)
 114 {
 115     M68kCPU *cpu = NULL;
 116     int32_t kernel_size;
 117     uint64_t elf_entry;
 118     ram_addr_t initrd_base;
 119     int32_t initrd_size;
 120     ram_addr_t ram_size = machine->ram_size;
 121     const char *kernel_filename = machine->kernel_filename;
 122     const char *initrd_filename = machine->initrd_filename;
 123     const char *kernel_cmdline = machine->kernel_cmdline;
 124     hwaddr parameters_base;
 125     DeviceState *dev;
 126     DeviceState *irqc_dev;
 127     DeviceState *pic_dev[VIRT_GF_PIC_NB];
 128     SysBusDevice *sysbus;
 129     hwaddr io_base;
 130     int i;
 131     ResetInfo *reset_info;
 132     uint8_t rng_seed[32];
 133
 134     if (ram_size > 3399672 * KiB) {
 135         /*
 136          * The physical memory can be up to 4 GiB - 16 MiB, but linux
 137          * kernel crashes after this limit (~ 3.2 GiB)
 138          */
 139         error_report("Too much memory for this machine: %" PRId64 " KiB, "
 140                      "maximum 3399672 KiB", ram_size / KiB);
 141         exit(1);
 142     }
 143
 144     reset_info = g_new0(ResetInfo, 1);
 145
 146     /* init CPUs */
 147     cpu = M68K_CPU(cpu_create(machine->cpu_type));
 148
 149     reset_info->cpu = cpu;
 150     qemu_register_reset(main_cpu_reset, reset_info);
 151
 152     /* RAM */
 153     memory_region_add_subregion(get_system_memory(), 0, machine->ram);
 154
 155     /* IRQ Controller */
 156
 157     irqc_dev = qdev_new(TYPE_M68K_IRQC);
 158     object_property_set_link(OBJECT(irqc_dev), "m68k-cpu",
 159                              OBJECT(cpu), &error_abort);
 160     sysbus_realize_and_unref(SYS_BUS_DEVICE(irqc_dev), &error_fatal);
 161
 162     /*
 163      * 6 goldfish-pic
 164      *
 165      * map: 0xff000000 - 0xff006fff = 28 KiB
 166      * IRQ: #1 (lower priority) -> #6 (higher priority)
 167      *
 168      */
 169     io_base = VIRT_GF_PIC_MMIO_BASE;
 170     for (i = 0; i < VIRT_GF_PIC_NB; i++) {
 171         pic_dev[i] = qdev_new(TYPE_GOLDFISH_PIC);
 172         sysbus = SYS_BUS_DEVICE(pic_dev[i]);
 173         qdev_prop_set_uint8(pic_dev[i], "index", i);
 174         sysbus_realize_and_unref(sysbus, &error_fatal);
 175
 176         sysbus_mmio_map(sysbus, 0, io_base);
 177         sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(irqc_dev, i));
 178
 179         io_base += 0x1000;
 180     }
 181
 182     /* goldfish-rtc */
 183     io_base = VIRT_GF_RTC_MMIO_BASE;
 184     for (i = 0; i < VIRT_GF_RTC_NB; i++) {
 185         dev = qdev_new(TYPE_GOLDFISH_RTC);
 186         qdev_prop_set_bit(dev, "big-endian", true);
 187         sysbus = SYS_BUS_DEVICE(dev);
 188         sysbus_realize_and_unref(sysbus, &error_fatal);
 189         sysbus_mmio_map(sysbus, 0, io_base);
 190         sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_RTC_IRQ_BASE + i));
 191
 192         io_base += 0x1000;
 193     }
 194
 195     /* goldfish-tty */
 196     dev = qdev_new(TYPE_GOLDFISH_TTY);
 197     sysbus = SYS_BUS_DEVICE(dev);
 198     qdev_prop_set_chr(dev, "chardev", serial_hd(0));
 199     sysbus_realize_and_unref(sysbus, &error_fatal);
 200     sysbus_mmio_map(sysbus, 0, VIRT_GF_TTY_MMIO_BASE);
 201     sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_GF_TTY_IRQ_BASE));
 202
 203     /* virt controller */
 204     dev = qdev_new(TYPE_VIRT_CTRL);
 205     sysbus = SYS_BUS_DEVICE(dev);
 206     sysbus_realize_and_unref(sysbus, &error_fatal);
 207     sysbus_mmio_map(sysbus, 0, VIRT_CTRL_MMIO_BASE);
 208     sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_CTRL_IRQ_BASE));
 209
 210     /* virtio-mmio */
 211     io_base = VIRT_VIRTIO_MMIO_BASE;
 212     for (i = 0; i < 128; i++) {
 213         dev = qdev_new(TYPE_VIRTIO_MMIO);
 214         qdev_prop_set_bit(dev, "force-legacy", false);
 215         sysbus = SYS_BUS_DEVICE(dev);
 216         sysbus_realize_and_unref(sysbus, &error_fatal);
 217         sysbus_connect_irq(sysbus, 0, PIC_GPIO(VIRT_VIRTIO_IRQ_BASE + i));
 218         sysbus_mmio_map(sysbus, 0, io_base);
 219         io_base += 0x200;
 220     }
 221
 222     if (kernel_filename) {
 223         CPUState *cs = CPU(cpu);
 224         uint64_t high;
 225         void *param_blob, *param_ptr, *param_rng_seed;
 226
 227         if (kernel_cmdline) {
 228             param_blob = g_malloc(strlen(kernel_cmdline) + 1024);
 229         } else {
 230             param_blob = g_malloc(1024);
 231         }
 232
 233         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
 234                                &elf_entry, NULL, &high, NULL, 1,
 235                                EM_68K, 0, 0);
 236         if (kernel_size < 0) {
 237             error_report("could not load kernel '%s'", kernel_filename);
 238             exit(1);
 239         }
 240         reset_info->initial_pc = elf_entry;
 241         parameters_base = (high + 1) & ~1;
 242         param_ptr = param_blob;
 243
 244         BOOTINFO1(param_ptr, BI_MACHTYPE, MACH_VIRT);
 245         BOOTINFO1(param_ptr, BI_FPUTYPE, FPU_68040);
 246         BOOTINFO1(param_ptr, BI_MMUTYPE, MMU_68040);
 247         BOOTINFO1(param_ptr, BI_CPUTYPE, CPU_68040);
 248         BOOTINFO2(param_ptr, BI_MEMCHUNK, 0, ram_size);
 249
 250         BOOTINFO1(param_ptr, BI_VIRT_QEMU_VERSION,
 251                   ((QEMU_VERSION_MAJOR << 24) | (QEMU_VERSION_MINOR << 16) |
 252                    (QEMU_VERSION_MICRO << 8)));
 253         BOOTINFO2(param_ptr, BI_VIRT_GF_PIC_BASE,
 254                   VIRT_GF_PIC_MMIO_BASE, VIRT_GF_PIC_IRQ_BASE);
 255         BOOTINFO2(param_ptr, BI_VIRT_GF_RTC_BASE,
 256                   VIRT_GF_RTC_MMIO_BASE, VIRT_GF_RTC_IRQ_BASE);
 257         BOOTINFO2(param_ptr, BI_VIRT_GF_TTY_BASE,
 258                   VIRT_GF_TTY_MMIO_BASE, VIRT_GF_TTY_IRQ_BASE);
 259         BOOTINFO2(param_ptr, BI_VIRT_CTRL_BASE,
 260                   VIRT_CTRL_MMIO_BASE, VIRT_CTRL_IRQ_BASE);
 261         BOOTINFO2(param_ptr, BI_VIRT_VIRTIO_BASE,
 262                   VIRT_VIRTIO_MMIO_BASE, VIRT_VIRTIO_IRQ_BASE);
 263
 264         if (kernel_cmdline) {
 265             BOOTINFOSTR(param_ptr, BI_COMMAND_LINE,
 266                         kernel_cmdline);
 267         }
 268
 269         /* Pass seed to RNG. */
 270         param_rng_seed = param_ptr;
 271         qemu_guest_getrandom_nofail(rng_seed, sizeof(rng_seed));
 272         BOOTINFODATA(param_ptr, BI_RNG_SEED,
 273                      rng_seed, sizeof(rng_seed));
 274
 275         /* load initrd */
 276         if (initrd_filename) {
 277             initrd_size = get_image_size(initrd_filename);
 278             if (initrd_size < 0) {
 279                 error_report("could not load initial ram disk '%s'",
 280                              initrd_filename);
 281                 exit(1);
 282             }
 283
 284             initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK;
 285             load_image_targphys(initrd_filename, initrd_base,
 286                                 ram_size - initrd_base);
 287             BOOTINFO2(param_ptr, BI_RAMDISK, initrd_base,
 288                       initrd_size);
 289         } else {
 290             initrd_base = 0;
 291             initrd_size = 0;
 292         }
 293         BOOTINFO0(param_ptr, BI_LAST);
 294         rom_add_blob_fixed_as("bootinfo", param_blob, param_ptr - param_blob,
 295                               parameters_base, cs->as);
 296         qemu_register_reset_nosnapshotload(rerandomize_rng_seed,
 297                             rom_ptr_for_as(cs->as, parameters_base,
 298                                            param_ptr - param_blob) +
 299                             (param_rng_seed - param_blob));
 300         g_free(param_blob);
 301     }
 302 }
 303
 304 static void virt_machine_class_init(ObjectClass *oc, void *data)
 305 {
 306     MachineClass *mc = MACHINE_CLASS(oc);
 307     mc->desc = "QEMU M68K Virtual Machine";
 308     mc->init = virt_init;
 309     mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
 310     mc->max_cpus = 1;
 311     mc->no_floppy = 1;
 312     mc->no_parallel = 1;
 313     mc->default_ram_id = "m68k_virt.ram";
 314 }
 315
 316 static const TypeInfo virt_machine_info = {
 317     .name       = MACHINE_TYPE_NAME("virt"),
 318     .parent     = TYPE_MACHINE,
 319     .abstract   = true,
 320     .class_init = virt_machine_class_init,
 321 };
 322
 323 static void virt_machine_register_types(void)
 324 {
 325     type_register_static(&virt_machine_info);
 326 }
 327
 328 type_init(virt_machine_register_types)
 329
 330 #define DEFINE_VIRT_MACHINE(major, minor, latest) \
 331     static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
 332                                                     void *data) \
 333     { \
 334         MachineClass *mc = MACHINE_CLASS(oc); \
 335         virt_machine_##major##_##minor##_options(mc); \
 336         mc->desc = "QEMU " # major "." # minor " M68K Virtual Machine"; \
 337         if (latest) { \
 338             mc->alias = "virt"; \
 339         } \
 340     } \
 341     static const TypeInfo machvirt_##major##_##minor##_info = { \
 342         .name = MACHINE_TYPE_NAME("virt-" # major "." # minor), \
 343         .parent = MACHINE_TYPE_NAME("virt"), \
 344         .class_init = virt_##major##_##minor##_class_init, \
 345     }; \
 346     static void machvirt_machine_##major##_##minor##_init(void) \
 347     { \
 348         type_register_static(&machvirt_##major##_##minor##_info); \
 349     } \
 350     type_init(machvirt_machine_##major##_##minor##_init);
 351
 352 static void virt_machine_8_2_options(MachineClass *mc)
 353 {
 354 }
 355 DEFINE_VIRT_MACHINE(8, 2, true)
 356
 357 static void virt_machine_8_1_options(MachineClass *mc)
 358 {
 359     virt_machine_8_2_options(mc);
 360     compat_props_add(mc->compat_props, hw_compat_8_1, hw_compat_8_1_len);
 361 }
 362 DEFINE_VIRT_MACHINE(8, 1, false)
 363
 364 static void virt_machine_8_0_options(MachineClass *mc)
 365 {
 366     virt_machine_8_1_options(mc);
 367     compat_props_add(mc->compat_props, hw_compat_8_0, hw_compat_8_0_len);
 368 }
 369 DEFINE_VIRT_MACHINE(8, 0, false)
 370
 371 static void virt_machine_7_2_options(MachineClass *mc)
 372 {
 373     virt_machine_8_0_options(mc);
 374     compat_props_add(mc->compat_props, hw_compat_7_2, hw_compat_7_2_len);
 375 }
 376 DEFINE_VIRT_MACHINE(7, 2, false)
 377
 378 static void virt_machine_7_1_options(MachineClass *mc)
 379 {
 380     virt_machine_7_2_options(mc);
 381     compat_props_add(mc->compat_props, hw_compat_7_1, hw_compat_7_1_len);
 382 }
 383 DEFINE_VIRT_MACHINE(7, 1, false)
 384
 385 static void virt_machine_7_0_options(MachineClass *mc)
 386 {
 387     virt_machine_7_1_options(mc);
 388     compat_props_add(mc->compat_props, hw_compat_7_0, hw_compat_7_0_len);
 389 }
 390 DEFINE_VIRT_MACHINE(7, 0, false)
 391
 392 static void virt_machine_6_2_options(MachineClass *mc)
 393 {
 394     virt_machine_7_0_options(mc);
 395     compat_props_add(mc->compat_props, hw_compat_6_2, hw_compat_6_2_len);
 396 }
 397 DEFINE_VIRT_MACHINE(6, 2, false)
 398
 399 static void virt_machine_6_1_options(MachineClass *mc)
 400 {
 401     virt_machine_6_2_options(mc);
 402     compat_props_add(mc->compat_props, hw_compat_6_1, hw_compat_6_1_len);
 403 }
 404 DEFINE_VIRT_MACHINE(6, 1, false)
 405
 406 static void virt_machine_6_0_options(MachineClass *mc)
 407 {
 408     virt_machine_6_1_options(mc);
 409     compat_props_add(mc->compat_props, hw_compat_6_0, hw_compat_6_0_len);
 410 }
 411 DEFINE_VIRT_MACHINE(6, 0, false)