2 * Copyright 2014 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
20 #define I915_CACHELINE_SIZE 64
21 #define I915_CACHELINE_MASK (I915_CACHELINE_SIZE - 1)
23 static const uint32_t tileable_formats[] = { DRM_FORMAT_ARGB1555, DRM_FORMAT_ABGR8888,
24 DRM_FORMAT_ARGB8888, DRM_FORMAT_RGB565,
25 DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB1555,
26 DRM_FORMAT_XRGB8888, DRM_FORMAT_UYVY,
29 static const uint32_t linear_only_formats[] = { DRM_FORMAT_GR88, DRM_FORMAT_R8, DRM_FORMAT_YVU420,
30 DRM_FORMAT_YVU420_ANDROID };
37 static uint32_t i915_get_gen(int device_id)
39 const uint16_t gen3_ids[] = { 0x2582, 0x2592, 0x2772, 0x27A2, 0x27AE,
40 0x29C2, 0x29B2, 0x29D2, 0xA001, 0xA011 };
42 for (i = 0; i < ARRAY_SIZE(gen3_ids); i++)
43 if (gen3_ids[i] == device_id)
49 static int i915_add_kms_item(struct driver *drv, const struct kms_item *item)
52 struct combination *combo;
55 * Older hardware can't scanout Y-tiled formats. Newer devices can, and
56 * report this functionality via format modifiers.
58 for (i = 0; i < drv->backend->combos.size; i++) {
59 combo = &drv->backend->combos.data[i];
60 if (combo->format == item->format) {
61 if ((combo->metadata.tiling == I915_TILING_Y &&
62 item->modifier == I915_FORMAT_MOD_Y_TILED) ||
63 (combo->metadata.tiling == I915_TILING_X &&
64 item->modifier == I915_FORMAT_MOD_X_TILED)) {
65 combo->metadata.modifier = item->modifier;
66 combo->usage |= item->usage;
67 } else if (combo->metadata.tiling != I915_TILING_Y) {
68 combo->usage |= item->usage;
76 static int i915_add_combinations(struct driver *drv)
79 uint32_t i, num_items;
80 struct kms_item *items;
81 struct format_metadata metadata;
82 uint64_t flags = BO_COMMON_USE_MASK;
84 metadata.tiling = I915_TILING_NONE;
85 metadata.priority = 1;
86 metadata.modifier = DRM_FORMAT_MOD_NONE;
88 ret = drv_add_combinations(drv, linear_only_formats, ARRAY_SIZE(linear_only_formats),
93 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
98 drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
99 drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
101 flags &= ~BO_USE_SW_WRITE_OFTEN;
102 flags &= ~BO_USE_SW_READ_OFTEN;
103 flags &= ~BO_USE_LINEAR;
105 metadata.tiling = I915_TILING_X;
106 metadata.priority = 2;
108 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
113 metadata.tiling = I915_TILING_Y;
114 metadata.priority = 3;
116 ret = drv_add_combinations(drv, tileable_formats, ARRAY_SIZE(tileable_formats), &metadata,
121 items = drv_query_kms(drv, &num_items);
122 if (!items || !num_items)
125 for (i = 0; i < num_items; i++) {
126 ret = i915_add_kms_item(drv, &items[i]);
137 static int i915_align_dimensions(struct bo *bo, uint32_t tiling, uint32_t *stride,
138 uint32_t *aligned_height)
140 struct i915_device *i915 = bo->drv->priv;
141 uint32_t horizontal_alignment = 4;
142 uint32_t vertical_alignment = 4;
146 case I915_TILING_NONE:
147 horizontal_alignment = 64;
151 horizontal_alignment = 512;
152 vertical_alignment = 8;
156 if (i915->gen == 3) {
157 horizontal_alignment = 512;
158 vertical_alignment = 8;
160 horizontal_alignment = 128;
161 vertical_alignment = 32;
166 *aligned_height = ALIGN(bo->height, vertical_alignment);
168 *stride = ALIGN(*stride, horizontal_alignment);
170 while (*stride > horizontal_alignment)
171 horizontal_alignment <<= 1;
173 *stride = horizontal_alignment;
176 if (i915->gen <= 3 && *stride > 8192)
182 static void i915_clflush(void *start, size_t size)
184 void *p = (void *)(((uintptr_t)start) & ~I915_CACHELINE_MASK);
185 void *end = (void *)((uintptr_t)start + size);
187 __builtin_ia32_mfence();
189 __builtin_ia32_clflush(p);
190 p = (void *)((uintptr_t)p + I915_CACHELINE_SIZE);
194 static int i915_init(struct driver *drv)
198 struct i915_device *i915;
199 drm_i915_getparam_t get_param;
201 i915 = calloc(1, sizeof(*i915));
205 memset(&get_param, 0, sizeof(get_param));
206 get_param.param = I915_PARAM_CHIPSET_ID;
207 get_param.value = &device_id;
208 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
210 fprintf(stderr, "drv: Failed to get I915_PARAM_CHIPSET_ID\n");
215 i915->gen = i915_get_gen(device_id);
217 memset(&get_param, 0, sizeof(get_param));
218 get_param.param = I915_PARAM_HAS_LLC;
219 get_param.value = &i915->has_llc;
220 ret = drmIoctl(drv->fd, DRM_IOCTL_I915_GETPARAM, &get_param);
222 fprintf(stderr, "drv: Failed to get I915_PARAM_HAS_LLC\n");
229 return i915_add_combinations(drv);
232 static int i915_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
238 struct drm_i915_gem_create gem_create;
239 struct drm_i915_gem_set_tiling gem_set_tiling;
241 if (flags & (BO_USE_CURSOR | BO_USE_LINEAR | BO_USE_SW_READ_OFTEN | BO_USE_SW_WRITE_OFTEN))
242 bo->tiling = I915_TILING_NONE;
243 else if (flags & BO_USE_SCANOUT)
244 bo->tiling = I915_TILING_X;
246 bo->tiling = I915_TILING_Y;
248 stride = drv_stride_from_format(format, width, 0);
250 * Align the Y plane to 128 bytes so the chroma planes would be aligned
251 * to 64 byte boundaries. This is an Intel HW requirement.
253 if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID) {
254 stride = ALIGN(stride, 128);
255 bo->tiling = I915_TILING_NONE;
258 ret = i915_align_dimensions(bo, bo->tiling, &stride, &height);
262 drv_bo_from_format(bo, stride, height, format);
264 memset(&gem_create, 0, sizeof(gem_create));
265 gem_create.size = bo->total_size;
267 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
269 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_CREATE failed (size=%llu)\n",
274 for (plane = 0; plane < bo->num_planes; plane++)
275 bo->handles[plane].u32 = gem_create.handle;
277 memset(&gem_set_tiling, 0, sizeof(gem_set_tiling));
278 gem_set_tiling.handle = bo->handles[0].u32;
279 gem_set_tiling.tiling_mode = bo->tiling;
280 gem_set_tiling.stride = bo->strides[0];
282 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_TILING, &gem_set_tiling);
284 struct drm_gem_close gem_close;
285 memset(&gem_close, 0, sizeof(gem_close));
286 gem_close.handle = bo->handles[0].u32;
287 drmIoctl(bo->drv->fd, DRM_IOCTL_GEM_CLOSE, &gem_close);
289 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_TILING failed with %d", errno);
296 static void i915_close(struct driver *drv)
302 static int i915_bo_import(struct bo *bo, struct drv_import_fd_data *data)
305 struct drm_i915_gem_get_tiling gem_get_tiling;
307 ret = drv_prime_bo_import(bo, data);
311 /* TODO(gsingh): export modifiers and get rid of backdoor tiling. */
312 memset(&gem_get_tiling, 0, sizeof(gem_get_tiling));
313 gem_get_tiling.handle = bo->handles[0].u32;
315 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_GET_TILING, &gem_get_tiling);
317 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_GET_TILING failed.");
321 bo->tiling = gem_get_tiling.tiling_mode;
325 static void *i915_bo_map(struct bo *bo, struct map_info *data, size_t plane)
329 struct drm_i915_gem_set_domain set_domain;
331 memset(&set_domain, 0, sizeof(set_domain));
332 set_domain.handle = bo->handles[0].u32;
333 if (bo->tiling == I915_TILING_NONE) {
334 struct drm_i915_gem_mmap gem_map;
335 memset(&gem_map, 0, sizeof(gem_map));
337 gem_map.handle = bo->handles[0].u32;
339 gem_map.size = bo->total_size;
341 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_map);
343 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP failed\n");
347 addr = (void *)(uintptr_t)gem_map.addr_ptr;
348 set_domain.read_domains = I915_GEM_DOMAIN_CPU;
349 set_domain.write_domain = I915_GEM_DOMAIN_CPU;
352 struct drm_i915_gem_mmap_gtt gem_map;
353 memset(&gem_map, 0, sizeof(gem_map));
355 gem_map.handle = bo->handles[0].u32;
357 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &gem_map);
359 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_MMAP_GTT failed\n");
363 addr = mmap(0, bo->total_size, PROT_READ | PROT_WRITE, MAP_SHARED, bo->drv->fd,
366 set_domain.read_domains = I915_GEM_DOMAIN_GTT;
367 set_domain.write_domain = I915_GEM_DOMAIN_GTT;
370 if (addr == MAP_FAILED) {
371 fprintf(stderr, "drv: i915 GEM mmap failed\n");
375 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain);
377 fprintf(stderr, "drv: DRM_IOCTL_I915_GEM_SET_DOMAIN failed\n");
381 data->length = bo->total_size;
385 static int i915_bo_unmap(struct bo *bo, struct map_info *data)
387 struct i915_device *i915 = bo->drv->priv;
388 if (!i915->has_llc && bo->tiling == I915_TILING_NONE)
389 i915_clflush(data->addr, data->length);
391 return munmap(data->addr, data->length);
394 static uint32_t i915_resolve_format(uint32_t format)
397 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
398 /*HACK: See b/28671744 */
399 return DRM_FORMAT_XBGR8888;
400 case DRM_FORMAT_FLEX_YCbCr_420_888:
401 return DRM_FORMAT_YVU420_ANDROID;
407 struct backend backend_i915 = {
411 .bo_create = i915_bo_create,
412 .bo_destroy = drv_gem_bo_destroy,
413 .bo_import = i915_bo_import,
414 .bo_map = i915_bo_map,
415 .bo_unmap = i915_bo_unmap,
416 .resolve_format = i915_resolve_format,