2 * Copyright © 2010 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
19 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
20 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
21 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
22 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 * Xiang Haihao <haihao.xiang@intel.com>
33 #include "va_backend.h"
35 #include "intel_batchbuffer.h"
36 #include "intel_driver.h"
38 #include "i965_defines.h"
39 #include "i965_drv_video.h"
40 #include "i965_avc_hw_scoreboard.h"
41 #include "i965_media_h264.h"
42 #include "i965_media.h"
44 extern struct media_kernel *h264_avc_kernels;
47 #include "shaders/h264/mc/export.inc.gen5"
50 AVC_HW_SCOREBOARD = 0,
51 AVC_HW_SCOREBOARD_MBAFF
54 static unsigned long avc_hw_scoreboard_kernel_offset[] = {
55 SETHWSCOREBOARD_IP_GEN5,
56 SETHWSCOREBOARD_MBAFF_IP_GEN5
59 static unsigned int avc_hw_scoreboard_constants[] = {
71 i965_avc_hw_scoreboard_surface_state(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
73 struct i965_surface_state *ss;
76 bo = avc_hw_scoreboard_context->surface.ss_bo;
80 memset(ss, 0, sizeof(*ss));
81 ss->ss0.surface_type = I965_SURFACE_BUFFER;
82 ss->ss1.base_addr = avc_hw_scoreboard_context->surface.s_bo->offset;
83 ss->ss2.width = ((avc_hw_scoreboard_context->surface.total_mbs * MB_CMD_IN_OWS - 1) & 0x7f);
84 ss->ss2.height = (((avc_hw_scoreboard_context->surface.total_mbs * MB_CMD_IN_OWS - 1) >> 7) & 0x1fff);
85 ss->ss3.depth = (((avc_hw_scoreboard_context->surface.total_mbs * MB_CMD_IN_OWS - 1) >> 20) & 0x7f);
87 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
89 offsetof(struct i965_surface_state, ss1),
90 avc_hw_scoreboard_context->surface.s_bo);
95 i965_avc_hw_scoreboard_interface_descriptor_table(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
97 struct i965_interface_descriptor *desc;
100 bo = avc_hw_scoreboard_context->idrt.bo;
104 memset(desc, 0, sizeof(*desc));
105 desc->desc0.grf_reg_blocks = 7;
106 desc->desc0.kernel_start_pointer = (avc_hw_scoreboard_context->hw_kernel.bo->offset +
107 avc_hw_scoreboard_context->hw_kernel.offset) >> 6; /* reloc */
108 desc->desc1.const_urb_entry_read_offset = 0;
109 desc->desc1.const_urb_entry_read_len = 1;
110 desc->desc3.binding_table_entry_count = 0;
111 desc->desc3.binding_table_pointer =
112 avc_hw_scoreboard_context->binding_table.bo->offset >> 5; /*reloc */
114 dri_bo_emit_reloc(bo,
115 I915_GEM_DOMAIN_INSTRUCTION, 0,
116 desc->desc0.grf_reg_blocks + avc_hw_scoreboard_context->hw_kernel.offset,
117 offsetof(struct i965_interface_descriptor, desc0),
118 avc_hw_scoreboard_context->hw_kernel.bo);
120 dri_bo_emit_reloc(bo,
121 I915_GEM_DOMAIN_INSTRUCTION, 0,
122 desc->desc3.binding_table_entry_count,
123 offsetof(struct i965_interface_descriptor, desc3),
124 avc_hw_scoreboard_context->binding_table.bo);
130 i965_avc_hw_scoreboard_binding_table(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
132 unsigned int *binding_table;
133 dri_bo *bo = avc_hw_scoreboard_context->binding_table.bo;
137 binding_table = bo->virtual;
138 memset(binding_table, 0, bo->size);
139 binding_table[0] = avc_hw_scoreboard_context->surface.ss_bo->offset;
140 dri_bo_emit_reloc(bo,
141 I915_GEM_DOMAIN_INSTRUCTION, 0,
144 avc_hw_scoreboard_context->surface.ss_bo);
149 i965_avc_hw_scoreboard_vfe_state(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
151 struct i965_vfe_state *vfe_state;
154 bo = avc_hw_scoreboard_context->vfe_state.bo;
157 vfe_state = bo->virtual;
158 memset(vfe_state, 0, sizeof(*vfe_state));
159 vfe_state->vfe1.max_threads = avc_hw_scoreboard_context->urb.num_vfe_entries - 1;
160 vfe_state->vfe1.urb_entry_alloc_size = avc_hw_scoreboard_context->urb.size_vfe_entry - 1;
161 vfe_state->vfe1.num_urb_entries = avc_hw_scoreboard_context->urb.num_vfe_entries;
162 vfe_state->vfe1.vfe_mode = VFE_GENERIC_MODE;
163 vfe_state->vfe1.children_present = 0;
164 vfe_state->vfe2.interface_descriptor_base =
165 avc_hw_scoreboard_context->idrt.bo->offset >> 4; /* reloc */
166 dri_bo_emit_reloc(bo,
167 I915_GEM_DOMAIN_INSTRUCTION, 0,
169 offsetof(struct i965_vfe_state, vfe2),
170 avc_hw_scoreboard_context->idrt.bo);
175 i965_avc_hw_scoreboard_upload_constants(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
177 unsigned char *constant_buffer;
179 dri_bo_map(avc_hw_scoreboard_context->curbe.bo, 1);
180 assert(avc_hw_scoreboard_context->curbe.bo->virtual);
181 constant_buffer = avc_hw_scoreboard_context->curbe.bo->virtual;
182 memcpy(constant_buffer, avc_hw_scoreboard_constants, sizeof(avc_hw_scoreboard_constants));
183 dri_bo_unmap(avc_hw_scoreboard_context->curbe.bo);
187 i965_avc_hw_scoreboard_states_setup(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
189 i965_avc_hw_scoreboard_surface_state(avc_hw_scoreboard_context);
190 i965_avc_hw_scoreboard_binding_table(avc_hw_scoreboard_context);
191 i965_avc_hw_scoreboard_interface_descriptor_table(avc_hw_scoreboard_context);
192 i965_avc_hw_scoreboard_vfe_state(avc_hw_scoreboard_context);
193 i965_avc_hw_scoreboard_upload_constants(avc_hw_scoreboard_context);
197 i965_avc_hw_scoreboard_pipeline_select(VADriverContextP ctx)
200 OUT_BATCH(ctx, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
205 i965_avc_hw_scoreboard_urb_layout(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
207 struct i965_driver_data *i965 = i965_driver_data(ctx);
208 unsigned int vfe_fence, cs_fence;
210 vfe_fence = avc_hw_scoreboard_context->urb.cs_start;
211 cs_fence = URB_SIZE((&i965->intel));
214 OUT_BATCH(ctx, CMD_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | 1);
217 (vfe_fence << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */
218 (cs_fence << UF2_CS_FENCE_SHIFT)); /* CS_SIZE */
223 i965_avc_hw_scoreboard_state_base_address(VADriverContextP ctx)
226 OUT_BATCH(ctx, CMD_STATE_BASE_ADDRESS | 6);
227 OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
228 OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
229 OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
230 OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
231 OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
232 OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
233 OUT_BATCH(ctx, 0 | BASE_ADDRESS_MODIFY);
238 i965_avc_hw_scoreboard_state_pointers(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
241 OUT_BATCH(ctx, CMD_MEDIA_STATE_POINTERS | 1);
243 OUT_RELOC(ctx, avc_hw_scoreboard_context->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
248 i965_avc_hw_scoreboard_cs_urb_layout(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
251 OUT_BATCH(ctx, CMD_CS_URB_STATE | 0);
253 ((avc_hw_scoreboard_context->urb.size_cs_entry - 1) << 4) | /* URB Entry Allocation Size */
254 (avc_hw_scoreboard_context->urb.num_cs_entries << 0)); /* Number of URB Entries */
259 i965_avc_hw_scoreboard_constant_buffer(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
262 OUT_BATCH(ctx, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2));
263 OUT_RELOC(ctx, avc_hw_scoreboard_context->curbe.bo,
264 I915_GEM_DOMAIN_INSTRUCTION, 0,
265 avc_hw_scoreboard_context->urb.size_cs_entry - 1);
270 i965_avc_hw_scoreboard_objects(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
273 OUT_BATCH(ctx, CMD_MEDIA_OBJECT | 4);
274 OUT_BATCH(ctx, 0); /* interface descriptor offset: 0 */
275 OUT_BATCH(ctx, 0); /* no indirect data */
277 OUT_BATCH(ctx, ((avc_hw_scoreboard_context->inline_data.num_mb_cmds << 16) |
278 (avc_hw_scoreboard_context->inline_data.starting_mb_number << 0)));
279 OUT_BATCH(ctx, avc_hw_scoreboard_context->inline_data.pic_width_in_mbs);
284 i965_avc_hw_scoreboard_pipeline_setup(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
286 intel_batchbuffer_start_atomic(ctx, 0x1000);
287 intel_batchbuffer_emit_mi_flush(ctx);
288 i965_avc_hw_scoreboard_pipeline_select(ctx);
289 i965_avc_hw_scoreboard_state_base_address(ctx);
290 i965_avc_hw_scoreboard_state_pointers(ctx, avc_hw_scoreboard_context);
291 i965_avc_hw_scoreboard_urb_layout(ctx, avc_hw_scoreboard_context);
292 i965_avc_hw_scoreboard_cs_urb_layout(ctx, avc_hw_scoreboard_context);
293 i965_avc_hw_scoreboard_constant_buffer(ctx, avc_hw_scoreboard_context);
294 i965_avc_hw_scoreboard_objects(ctx, avc_hw_scoreboard_context);
295 intel_batchbuffer_end_atomic(ctx);
299 i965_avc_hw_scoreboard(VADriverContextP ctx, struct decode_state *decode_state)
301 struct i965_driver_data *i965 = i965_driver_data(ctx);
302 struct i965_media_state *media_state = &i965->media_state;
303 struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)media_state->private_context;
304 struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context;
306 if (i965_h264_context->use_avc_hw_scoreboard) {
307 assert(i965_h264_context != NULL);
308 avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
310 avc_hw_scoreboard_context->inline_data.num_mb_cmds = i965_h264_context->avc_it_command_mb_info.mbs;
311 avc_hw_scoreboard_context->inline_data.starting_mb_number = i965_h264_context->avc_it_command_mb_info.mbs;
312 avc_hw_scoreboard_context->inline_data.pic_width_in_mbs = i965_h264_context->picture.width_in_mbs;
313 avc_hw_scoreboard_context->surface.total_mbs = i965_h264_context->avc_it_command_mb_info.mbs * 2;
315 dri_bo_unreference(avc_hw_scoreboard_context->hw_kernel.bo);
316 avc_hw_scoreboard_context->hw_kernel.bo = h264_avc_kernels[H264_AVC_COMBINED].bo;
317 assert(avc_hw_scoreboard_context->hw_kernel.bo != NULL);
318 dri_bo_reference(avc_hw_scoreboard_context->hw_kernel.bo);
320 if (i965_h264_context->picture.mbaff_frame_flag)
321 avc_hw_scoreboard_context->hw_kernel.offset = avc_hw_scoreboard_kernel_offset[AVC_HW_SCOREBOARD_MBAFF];
323 avc_hw_scoreboard_context->hw_kernel.offset = avc_hw_scoreboard_kernel_offset[AVC_HW_SCOREBOARD];
325 i965_avc_hw_scoreboard_states_setup(avc_hw_scoreboard_context);
326 i965_avc_hw_scoreboard_pipeline_setup(ctx, avc_hw_scoreboard_context);
331 i965_avc_hw_scoreboard_decode_init(VADriverContextP ctx)
333 struct i965_driver_data *i965 = i965_driver_data(ctx);
334 struct i965_media_state *media_state = &i965->media_state;
335 struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)media_state->private_context;
336 struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context;
339 if (i965_h264_context->use_avc_hw_scoreboard) {
340 assert(i965_h264_context != NULL);
341 avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
343 dri_bo_unreference(avc_hw_scoreboard_context->curbe.bo);
344 bo = dri_bo_alloc(i965->intel.bufmgr,
348 avc_hw_scoreboard_context->curbe.bo = bo;
350 dri_bo_unreference(avc_hw_scoreboard_context->surface.s_bo);
351 avc_hw_scoreboard_context->surface.s_bo = i965_h264_context->avc_it_command_mb_info.bo;
352 assert(avc_hw_scoreboard_context->surface.s_bo != NULL);
353 dri_bo_reference(avc_hw_scoreboard_context->surface.s_bo);
355 dri_bo_unreference(avc_hw_scoreboard_context->surface.ss_bo);
356 bo = dri_bo_alloc(i965->intel.bufmgr,
358 sizeof(struct i965_surface_state), 32);
360 avc_hw_scoreboard_context->surface.ss_bo = bo;
362 dri_bo_unreference(avc_hw_scoreboard_context->binding_table.bo);
363 bo = dri_bo_alloc(i965->intel.bufmgr,
365 MAX_MEDIA_SURFACES * sizeof(unsigned int), 32);
367 avc_hw_scoreboard_context->binding_table.bo = bo;
369 dri_bo_unreference(avc_hw_scoreboard_context->idrt.bo);
370 bo = dri_bo_alloc(i965->intel.bufmgr,
371 "interface discriptor",
372 MAX_INTERFACE_DESC * sizeof(struct i965_interface_descriptor), 16);
374 avc_hw_scoreboard_context->idrt.bo = bo;
376 dri_bo_unreference(avc_hw_scoreboard_context->vfe_state.bo);
377 bo = dri_bo_alloc(i965->intel.bufmgr,
379 sizeof(struct i965_vfe_state), 32);
381 avc_hw_scoreboard_context->vfe_state.bo = bo;
383 avc_hw_scoreboard_context->urb.num_vfe_entries = 1;
384 avc_hw_scoreboard_context->urb.size_vfe_entry = 2;
385 avc_hw_scoreboard_context->urb.num_cs_entries = 1;
386 avc_hw_scoreboard_context->urb.size_cs_entry = 1;
387 avc_hw_scoreboard_context->urb.vfe_start = 0;
388 avc_hw_scoreboard_context->urb.cs_start = avc_hw_scoreboard_context->urb.vfe_start +
389 avc_hw_scoreboard_context->urb.num_vfe_entries * avc_hw_scoreboard_context->urb.size_vfe_entry;
390 assert(avc_hw_scoreboard_context->urb.cs_start +
391 avc_hw_scoreboard_context->urb.num_cs_entries * avc_hw_scoreboard_context->urb.size_cs_entry <= URB_SIZE((&i965->intel)));
396 i965_avc_hw_scoreboard_ternimate(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
398 dri_bo_unreference(avc_hw_scoreboard_context->curbe.bo);
399 avc_hw_scoreboard_context->curbe.bo = NULL;
401 dri_bo_unreference(avc_hw_scoreboard_context->surface.ss_bo);
402 avc_hw_scoreboard_context->surface.ss_bo = NULL;
404 dri_bo_unreference(avc_hw_scoreboard_context->surface.s_bo);
405 avc_hw_scoreboard_context->surface.s_bo = NULL;
407 dri_bo_unreference(avc_hw_scoreboard_context->binding_table.bo);
408 avc_hw_scoreboard_context->binding_table.bo = NULL;
410 dri_bo_unreference(avc_hw_scoreboard_context->idrt.bo);
411 avc_hw_scoreboard_context->idrt.bo = NULL;
413 dri_bo_unreference(avc_hw_scoreboard_context->vfe_state.bo);
414 avc_hw_scoreboard_context->vfe_state.bo = NULL;
416 dri_bo_unreference(avc_hw_scoreboard_context->hw_kernel.bo);
417 avc_hw_scoreboard_context->hw_kernel.bo = NULL;