2 * Common header file for all AVC MC kernels
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3 * Copyright © <2010>, Intel Corporation.
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5 * This program is licensed under the terms and conditions of the
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6 * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
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7 * http://www.opensource.org/licenses/eclipse-1.0.php.
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10 #if !defined(__HEADER__) // Make sure this file is only included once
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13 // Module name: header.inc
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15 // Common header file for all AVC MC kernels
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18 #ifndef COMBINED_KERNEL
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20 #define SW_SCOREBOARD // SW Scoreboard should be enabled for CTG and earlier
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21 #undef HW_SCOREBOARD // HW Scoreboard should be disabled for CTG and earlier
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23 #define HW_SCOREBOARD // HW Scoreboard should be enabled for ILK and beyond
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24 #undef SW_SCOREBOARD // SW Scoreboard should be disabled for ILK and beyond
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26 #endif // COMBINED_KERNEL
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28 //#define MONO // Build Monochrome kernels
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30 // Surface state definition
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60 #define REFUVFM10 28
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61 #define REFUVFM11 29
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62 #define REFUVFM12 30
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63 #define REFUVFM13 31
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64 #define REFUVFM14 32
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65 #define REFUVFM15 33
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67 .default_execution_size (16)
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68 .default_register_type :ub
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70 // ----------- Common constant definitions ------------
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72 // Bit position constants
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84 #define BIT10 0x0400
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85 #define BIT11 0x0800
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86 #define BIT12 0x1000
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87 #define BIT13 0x2000
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88 #define BIT14 0x4000
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89 #define BIT15 0x8000
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90 #define BIT16 0x00010000
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91 #define BIT17 0x00020000
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92 #define BIT18 0x00040000
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93 #define BIT19 0x00080000
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94 #define BIT20 0x00100000
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95 #define BIT21 0x00200000
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96 #define BIT22 0x00400000
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97 #define BIT23 0x00800000
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98 #define BIT24 0x01000000
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99 #define BIT25 0x02000000
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100 #define BIT26 0x04000000
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101 #define BIT27 0x08000000
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102 #define BIT28 0x10000000
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103 #define BIT29 0x20000000
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104 #define BIT30 0x40000000
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105 #define BIT31 0x80000000
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107 #define GRFWIB 32 // GRF register width in byte
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108 #define GRFWIW 16 // GRF register width in word
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109 #define GRFWID 8 // GRF register width in dword
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111 #define INST_SIZE 16 // Instruction size = 128b = 16 Bytes
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113 #define REGION(Width,HStride) <Width*HStride;Width,HStride>
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115 #define NULLREG null<1>:ud
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116 #define NULLREGW null<1>:w
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118 #define TOP_FIELD 0
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119 #define BOTTOM_FIELD 1
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121 // M2 - M9 for date writing message payload
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122 .declare MSGPAYLOAD Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
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123 .declare MSGPAYLOADB Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=ub
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124 .declare MSGPAYLOADW Base=m2 ElementSize=2 SrcRegion=REGION(16,1) Type=uw
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125 .declare MSGPAYLOADD Base=m2 ElementSize=4 SrcRegion=REGION(8,1) Type=ud
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127 // ----------- Common Message Descriptor ------------
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130 #define MSG_GW 0x03 // Message Gateway Extended Message Descriptor,
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131 #define DAPREAD 0x04 // Data Port Read Extended Message Descriptor,
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132 #define DAPWRITE 0x05 // Data Port Write Extended Message Descriptor,
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133 #define TS 0x07 // Thread Spawner Extended Message Descriptor
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134 #define TS_EOT 0x27 // End of Thread Extended Message Descriptor
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136 #define EOTMSGDSC 0x02000010 // End of Thread Message Descriptor, don't deference URB handle
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138 // Data Port Message Descriptor
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139 #define DWBRMSGDSC_RC 0x02086000 // DWORD Block Read Message Descriptor, reading from render cache = 6.
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140 #define DWBRMSGDSC_RC_TF 0x02086600 // DWORD Block Read Message Descriptor, reading from render cache = 6.
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141 #define DWBRMSGDSC_RC_BF 0x02086700 // DWORD Block Read Message Descriptor, reading from render cache = 6.
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142 #define DWBRMSGDSC_SC 0x0208A000 // DWORD Block Read Message Descriptor, reading from sampler cache = A.
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143 #define DWBRMSGDSC_SC_TF 0x0208E600 // DWORD Block Read Message Descriptor, reading top field from field mode sampler cache.
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144 #define DWBRMSGDSC_SC_BF 0x0208E700 // DWORD Block Read Message Descriptor, reading bottom field from field mode sampler cache.
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146 #define DWBWMSGDSC 0x02082000 // DWORD Block Write Message Descriptor
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147 #define DWBWMSGDSC_WC 0x0218A000 // DWORD Block Write Message Descriptor + write commit
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149 // Enable Write Commit writeback mesage
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150 #define ENWRCOM 0x00108000 // Enable "write commit" and set response length = 1
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152 // Thread Spawner Message Descriptor
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153 #define TSMSGDSC 0x02000011
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155 // Message Gateway Message Descriptors
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156 #define OGWMSGDSC 0x02000000 // OpenGateway Message Descriptor
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157 #define CGWMSGDSC 0x02000001 // CloseGateway Message Descriptor
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158 #define FWDMSGDSC 0x02000002 // ForwardMsg Message Descriptor
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160 #define NOTIFYMSG 0x00008000 // Send notification with ForwardMsg message
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162 #define RESP_LEN(len) 0x100000*len
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163 #define MSG_LEN(len) 0x2000000*len
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165 #else // Pre DEV_ILK
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173 #define EOTMSGDSC 0x87100010 // End of Thread Message Descriptor, don't deference URB handle
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175 // Data Port Message Descriptor
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176 #define DWBRMSGDSC_RC 0x04106000 // DWORD Block Read Message Descriptor, reading from render cache = 6.
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177 #define DWBRMSGDSC_RC_TF 0x04106600 // DWORD Block Read Message Descriptor, reading from render cache = 6.
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178 #define DWBRMSGDSC_RC_BF 0x04106700 // DWORD Block Read Message Descriptor, reading from render cache = 6.
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179 #define DWBRMSGDSC_SC 0x0410A000 // DWORD Block Read Message Descriptor, reading from sampler cache = A.
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180 #define DWBRMSGDSC_SC_TF 0x0410A600 // DWORD Block Read Message Descriptor, reading top field from field mode sampler cache.
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181 #define DWBRMSGDSC_SC_BF 0x0410A700 // DWORD Block Read Message Descriptor, reading bottom field from field mode sampler cache.
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183 #define DWBWMSGDSC 0x05102000 // DWORD Block Write Message Descriptor
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184 #define DWBWMSGDSC_WC 0x0511A000 // DWORD Block Write Message Descriptor + write commit
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186 // Enable Write Commit writeback mesage
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187 #define ENWRCOM 0x00018000 // Enable "write commit" and set response length = 1
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189 // Thread Spawner Message Descriptor
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190 #define TSMSGDSC 0x07100011
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192 // Message Gateway Message Descriptors
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193 #define OGWMSGDSC 0x03100000 // OpenGateway Message Descriptor
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194 #define CGWMSGDSC 0x03100001 // CloseGateway Message Descriptor
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195 #define FWDMSGDSC 0x03100002 // ForwardMsg Message Descriptor
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197 #define NOTIFYMSG 0x00008000 // Send notification with ForwardMsg message
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198 #define ACKREQMSG 0x00014000 // Acknowledgement required so response length should be 1
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200 #define RESP_LEN(len) 0x10000*len
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201 #define MSG_LEN(len) 0x100000*len
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205 // Enable frame/field selection in message descriptor
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206 #define ENMSGDSCFM 0x400 // Enable MSGDSC to select frame surface
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207 #define ENMSGDSCTF 0x600 // Enable MSGDSC to select top field surface
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208 #define ENMSGDSCBF 0x700 // Enable MSGDSC to select bottom field surface
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210 // ----------- Message related register ------------
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212 #define MSGHDR m1 // Message Payload Header
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213 #define MSGHDRY m1 // Message Payload Header register for Y data
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214 #define MSGHDRY0 m1 // Message Payload Header register for Y data
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215 #define MSGHDRY1 m2 // Message Payload Header register for Y data
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216 #define MSGHDRY2 m3 // Message Payload Header register for Y data
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217 #define MSGHDRY3 m4 // Message Payload Header register for Y data
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218 #define MSGHDRUV m5 // Message Payload Header register for U/V data
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219 #define MSGSRC r62 // Message source register, should never be used for other purposes
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220 #define MSGDSC a0.0:ud // Message Descriptor register (type DWORD)
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222 #define MH_ORI MSGSRC.0 // DWORD block R/W message header block offset
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223 #define MH_ORIX MSGSRC.0 // DWORD block R/W message header X offset
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224 #define MH_ORIY MSGSRC.1 // DWORD block R/W message header Y offset
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225 #define MH_SIZE MSGSRC.2 // DWORD block R/W message header block width & height
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227 // Data necessary for kernel operations
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229 // Address registers used as pointers
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231 // Note: Please keep the register order as is since they are used in compressed instructions
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233 #define PPREDBUF_Y a0.4 // Pointer to predicted Y picture
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234 #define PPREDBUF_Y1 a0.5 // Pointer to predicted Y picture for extended instruction
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236 #define PPREDBUF_UV a0.4 // Pointer to predicted U/V picture
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237 #define PPREDBUF_UV1 a0.5 // Pointer to predicted U/V picture for extended instruction
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239 #define PDECBUF a0.4 // Pointer to decoded picture data
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240 #define PDECBUF_UD a0.2 // Pointer to decoded picture data in DWORD unit
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242 // ----------- R63 is reserved for global variables ------------
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244 // Note: Don't program it with values other than what are defined here.
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248 #define RETURN_REG G_REG.0 // Return pointer for all sub-routine calls (type DWORD)
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249 #define RETURN_REG1 G_REG.1 // Return pointer for second-level calls
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251 #define I_ORIX G_REG.13 // :uw, H. origin of the macroblock in pixel unit, don't overwrite in-line data
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252 #define I_ORIY G_REG.14 // :uw, V. origin of the macroblock in pixel unit, don't overwrite in-line data
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256 // Note: For macros that require multiple line expansion, insert "\n" at the end of each line.
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258 #define GRF(reg) r##reg
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260 #define END_THREAD send (8) NULLREG MSGHDR r0:ud TS_EOT EOTMSGDSC
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262 #define END_THREAD send (8) NULLREG MSGHDR r0:ud EOTMSGDSC
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265 #define CALL(subFunc, skipInst) add (1) RETURN_REG<1>:ud ip:ud (1+skipInst)*INST_SIZE \n\
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268 #define CALL_1(subFunc, skipInst) add (1) RETURN_REG1<1>:ud ip:ud (1+skipInst)*INST_SIZE \n\
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271 #define RETURN mov (1) ip:ud RETURN_REG<0;1,0>:ud // Return to calling module
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272 #define RETURN_1 mov (1) ip:ud RETURN_REG1<0;1,0>:ud // Return to second-level calling module
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273 // To support iterative calling
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274 #ifdef SW_SCOREBOARD
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277 #define LEADING_THREAD 1 // For CTG A, no SRT is needed. Only PRT is necessary
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279 #define LEADING_THREAD 0 // For CTG B0 and beyond, PRT doesn't take into debug count
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280 #define DOUBLE_SB // Scoreboard size needs to be doubled
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283 #ifdef DOUBLE_SB // Scoreboard size needs to be doubled
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284 #define SB_MASK 0x1ff // Scoreboard wrap-around mask (for 512 entries)
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286 #define SB_MASK 0xff // Scoreboard wrap-around mask (for 256 entries)
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287 #endif // defined(DOUBLE_SB)
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289 // Scoreboard related definitions
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295 #define M05_STORE r0.13 // :uw, reuse r0.6:ud upper-word to store M0.5 header information for scoreboard
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298 #endif // SW_SCOREBOARD
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300 // End of header.inc
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302 #endif // !defined(__HEADER__)
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