2 * Header file for all AVC INTER prediction kernels
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3 * Copyright © <2010>, Intel Corporation.
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5 * This program is licensed under the terms and conditions of the
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6 * Eclipse Public License (EPL), version 1.0. The full text of the EPL is at
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7 * http://www.opensource.org/licenses/eclipse-1.0.php.
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10 #if !defined(__INTER_HEADER__) // Make sure this file is only included once
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11 #define __INTER_HEADER__
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13 // Module name: inter_header.inc
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15 // Header file for all AVC INTER prediction kernels
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18 #define INTER_KERNEL
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20 //-------------------------------------------------------------------------------------------
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21 // TODO: The followings will be merged with the above definitions later
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22 //-------------------------------------------------------------------------------------------
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25 //------------ Input parameters & bit masks
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27 // SW WA for weighted prediction - 2007/09/06
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28 //.declare guwR1 Base=r1 ElementSize=2 Type=uw
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29 //.declare guwW128 Base=r63.13 ElementSize=2 Type=uw
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32 // #define SW_W_128 // Enable SW WA for special Weight=128 case. Can be commented to disable it
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33 #else // Pre DEV_ILK
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34 #define SW_W_128 // Enable SW WA for special Weight=128 case.
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38 .declare gudW128 Base=r1.0 ElementSize=4 Type=ud
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42 #define gORIX r3.4 // :ub, X origin
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43 #define gORIY r3.5 // :ub, Y origin
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45 #define gCBP r3.9 // :ub, CBP (0, 0, Y0, Y1, Y2, Y3, Cb, Cr)
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46 #define nCBPY_MASK 0x3c
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47 #define nCBPU_MASK 0x2
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48 #define nCBPV_MASK 0x1
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50 #define gFIELDFLAGS r3.1 // :uw - To compute message descriptor for write
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52 #define gMBTYPE r3.1 // :ub, MB type
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53 #define nMBTYPE_MASK 0x1f
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54 #define gFIELDMBFLAG r3.1 // :ub, Field MB flag
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55 #define nFIELDMB_MASK 0x40
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56 #define gMBPARITY r3.3 // :ub, Bottom field flag
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57 #define nMBPARITY_MASK 0x01
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59 #define gWPREDFLAG r3.0 // :ub, Weighted pred flag
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60 #define nWBIDIR_MASK 0xc0
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62 #define gSUBMB_SHAPE r3.12 // :ub, Sub-MB shape
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63 #define gSUBMB_MODE r3.13 // :ub, Sub-MB prediction mode
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64 .declare guwSUBMB_SHAPE_MODE Base=r3.6 ElementSize=2 Type=uw
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66 #define gYWDENOM r3.14 // :ub, Luma log2 weight denom
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67 #define gCWDENOM r3.15 // :ub, Chroma log2 weight denom
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69 #define gADDR r3.24 // :ub, Register addresses of error data / MV
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71 .declare gubBIDX Base=r3.16 ElementSize=1 Type=ub
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73 #define gWGT r8 // Weights/offsets
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74 .declare gdWGT Base=r8 ElementSize=4 Type=d
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75 .declare gwWGT Base=r8 ElementSize=2 Type=w
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76 #define gMV r4 // MVs
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77 .declare gwMV Base=r4 ElementSize=2 Type=w
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78 .declare gdMV Base=r4 ElementSize=4 Type=d
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80 .declare gwERRORY Base=r10 ElementSize=2 Type=w // 16 GRFs
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81 .declare gubERRORY Base=r10 ElementSize=1 Type=ub
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82 .declare gwERRORC Base=r26 ElementSize=2 Type=w // 8 GRFs
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83 .declare gubERRORC Base=r26 ElementSize=2 Type=ub
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85 //------------ Address registers
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86 #define pMSGDSC a0.0 // ud: Must be the leading dword of the address register
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91 #define pERRORYC a0.2 // :ud
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92 #define pERRORY a0.4
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93 #define pERRORC a0.5
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96 #define pWGT_BIDX a0.1 // :ud, WGT & BIDX
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97 #define pRECON_MV a0.3 // :ud, RECON & MV
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99 #define pREF0 a0.0 // :uw
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100 #define pREF0D a0.0 // :ud
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103 #define pREF2D a0.1 // :ud
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106 #define pREF4D a0.2 // :ud
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109 #define pREF6D a0.3 // :ud
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113 #define pRESD a0.3 // :ud
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114 #define pRESULT a0.7
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119 //------------ Constants for static/inline/indirect
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120 #define nOFFSET_BIDX 112 // = 32*3+4*4
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122 #define nOFFSET_WGT 256 // = 32*8
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123 #define nOFFSET_WGT_BIDX 0x01000070 // = (256<<16)+112
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124 #define nOFFSET_ERROR 0x03400140 // = (320+128*4)<<16+320=0x03400140
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125 #define nOFFSET_ERRORY 0x0140
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126 #define nOFFSET_ERRORC 0x0340
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127 #define nOFFSET_MV 128 // = 32*4
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128 #define nOFFSET_RECON_MV 0x04400080 // = (1088<<16)+128 // TODO: OFFSET_RECON is obsolete
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130 //------------ Constants for kernel internal variables
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131 #define nOFFSET_INTPY0 0x0640 // = 32*50
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132 #define nOFFSET_INTPY1 0x0780 // = 32*60
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133 #define nOFFSET_INTPC0 0x06c0 // = 32*54
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134 #define nOFFSET_INTPC1 0x0480 // = 32*36
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135 #define nOFFSET_INTP0 0x06c00640
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136 #define nOFFSET_INTP1 0x04800780
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138 #define nOFFSET_INTERIM 0x0480 // = 32*36
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139 #define nOFFSET_INTERIM2 0x04A00480 // = ((32*37)<<16)|(32*36)
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140 #define nOFFSET_INTERIM3 0x04A00480 // = ((32*36+32)<<16)|(32*36)
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141 #define nOFFSET_INTERIM4 0x04A00490 // = ((32*37)<<16)|(32*36+16)
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143 #define nOFFSET_INTERIM4x4 0x04C0 // = 32*38
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144 #define nOFFSET_INTERIM4x4_4 0x04E004D0 // = ((32*38+32)<<16)|(32*38+16)
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145 #define nOFFSET_INTERIM4x4_5 0x04D004C0 // = ((32*38+16)<<16)|(32*38)
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146 #define nOFFSET_INTERIM4x4_6 0x04E004C0 // = ((32*38+32)<<16)|(32*38)
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147 #define nOFFSET_INTERIM4x4_7 0x04D004C8 // = ((32*38+16)<<16)|(32*38+8)
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148 #define nOFFSET_INTERIM4x4_8 0x04E004D8 // = ((32*38+32)<<16)|(32*38+24)
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149 #define nOFFSET_INTERIM4x4_9 0x04F004E8 // = ((32*38+48)<<16)|(32*38+40)
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151 #define nOFFSET_RES 0x540 // = 32*42
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152 #define nOFFSET_REF 0x560 // = 32*43
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153 #define nOFFSET_REFC 0x700 // = 32*56
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155 // Binding table index
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156 #define nBDIX_DESTY 0
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157 #define nBDIX_DESTC 1
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158 #define nBI_LC_DIFF 0x10 // Binding table index diff between luma and chroma
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161 #define nGRFHWIB 16
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163 //------------ Regions
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165 .declare gudREF Base=r43 ElementSize=4 SrcRegion=<16;16,1> Type=ud
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166 .declare gubREF Base=r43 ElementSize=1 Type=ub
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167 .declare gudREFC Base=r56 ElementSize=4 SrcRegion=<16;16,1> Type=ud
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170 .declare gudREF21x21 Base=r58 ElementSize=4 SrcRegion=<16;16,1> Type=ud
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171 .declare gudREF18x10 Base=r66 ElementSize=4 SrcRegion=<16;16,1> Type=ud
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172 .declare gubREF18x10 Base=r66 ElementSize=1 SrcRegion=<16;16,1> Type=ub
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176 .declare gudREF16x16 Base=r38 ElementSize=4 Type=ud // 8 GRFs
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177 .declare gubREF16x16 Base=r38 ElementSize=1 Type=ub
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178 .declare gudREFC16x8 Base=r46 ElementSize=4 Type=ud // 4 GRFs
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179 .declare gubREFC16x8 Base=r46 ElementSize=1 Type=ub
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182 .declare gubAVG Base=r56 ElementSize=1 Type=ub
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183 .declare gubREFY_BWD Base=r64 ElementSize=1 Type=ub
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184 .declare gubREFC_BWD Base=r72 ElementSize=1 Type=ub
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187 .declare guwINTPY0 Base=r50 ElementSize=2 SrcRegion=<16;16,1> Type=uw
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188 .declare gudINTPY0 Base=r50 ElementSize=4 Type=ud
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189 .declare gubINTPY0 Base=r50 ElementSize=1 SrcRegion=<32;16,2> Type=ub
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190 .declare guwINTPY1 Base=r60 ElementSize=2 SrcRegion=<16;16,1> Type=uw
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191 .declare gudINTPY1 Base=r60 ElementSize=4 Type=ud
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192 .declare gubINTPY1 Base=r60 ElementSize=1 SrcRegion=<32;16,2> Type=ub
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193 .declare guwYPRED Base=r50 ElementSize=2 SrcRegion=<8;8,1> Type=uw
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194 .declare gubYPRED Base=r50 ElementSize=1 SrcRegion=<32;16,2> Type=ub
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196 .declare guwINTPC0 Base=r54 ElementSize=2 SrcRegion=<16;16,1> Type=uw
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197 .declare gwINTPC0 Base=r54 ElementSize=2 SrcRegion=<16;16,1> Type=w
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198 .declare gudINTPC0 Base=r54 ElementSize=4 Type=ud
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199 .declare gubINTPC0 Base=r54 ElementSize=1 SrcRegion=<32;16,2> Type=ub
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200 .declare guwINTPC1 Base=r36 ElementSize=2 SrcRegion=<16;16,1> Type=uw
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201 .declare gudINTPC1 Base=r36 ElementSize=4 Type=ud
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202 .declare gubINTPC1 Base=r36 ElementSize=1 SrcRegion=<32;16,2> Type=ub
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203 .declare guwCPRED Base=r54 ElementSize=2 SrcRegion=<16;8,2> Type=uw
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204 .declare gubCPRED Base=r54 ElementSize=1 SrcRegion=<32;8,4> Type=ub
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206 #define gINTERIM r36
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207 .declare gubINTERIM_BUF Base=r36 ElementSize=1 SrcRegion=<32;16,2> Type=ub
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208 #define gINTERIM4x4 r38
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209 .declare gubINTERIM4x4_BUF Base=r38 ElementSize=1 SrcRegion=<32;16,2> Type=ub
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210 .declare gwINTERIM4x4_BUF Base=r38 ElementSize=2 Type=w
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212 .declare gubINTERIM_BUF2 Base=r42 ElementSize=1 SrcRegion=<8;4,2> Type=ub
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213 .declare gwINTERIM_BUF2 Base=r42 ElementSize=2 SrcRegion=<16;16,1> Type=w
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214 .declare guwINTERIM_BUF2 Base=r42 ElementSize=2 Type=uw
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216 .declare gwINTERIM_BUF3 Base=r38 ElementSize=2 SrcRegion=<16;16,1> Type=w // 2 GRFs
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217 .declare gubINTERIM_BUF3 Base=r38 ElementSize=1 Type=ub
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219 .declare gwTEMP Base=r42 ElementSize=2 SrcRegion=<16;16,1> Type=w
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221 //------------ General registers
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223 #define gX r3.2 // w
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224 #define gY r3.3 // w
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226 #define gMSGDSC_R r3.6 // ud
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227 #define gMSGDSC_W r3.7 // ud
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230 .declare gwMBTYPE Base=r8.6 ElementSize=2 Type=w // Shared with gLOOP_SUBMB
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233 #define gLOOP_SUBMB r8.6
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234 #define gLOOP_SUBMBPT r8.7
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235 #define gLOOP_DIR r9.6
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236 #define gLOOPCNT r9.7 // Loop counter for submodules
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238 .declare gwMBTYPE Base=r1.0 ElementSize=2 Type=w // Shared with gLOOP_SUBMB
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241 #define gLOOP_SUBMB r1.0
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242 #define gLOOP_SUBMBPT r1.1
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243 #define gLOOP_DIR r8.7
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244 #define gLOOPCNT r9.7 // Loop counter for submodules
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247 #define gW0 r34.6 // Temporary WORD
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248 #define gW1 r34.7 // Temporary WORD
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249 #define gW2 r34.8 // Temporary WORD
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250 #define gW3 r34.9 // Temporary WORD
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251 #define gD0 r34.3 // Temporary DWORD
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257 #define gMVX_INT r34.0 // :w
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258 #define gMVY_INT r34.1 // :w
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259 #define gMVX_FRAC r34.2 // :w
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260 #define gMVY_FRAC r34.3 // :w
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261 #define gMVX_FRACC r34.4 // :w
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262 #define gMVY_FRACC r34.5 // :w
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264 #define gpINTPY r34.10
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265 #define gpINTPC r34.11
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266 #define gpINTP r34.5 // DW
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268 #define gPREDFLAG r34.12
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269 #define gBIDX r34.13
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270 #define gREFPARITY r34.14
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271 #define gCHRMVADJ r1.14
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272 #define gPARITY r1.15
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273 #define gCBP_MASK r1.1
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275 #define gMVSTEP r1.13
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277 #define gpADDR r1.2 // :uw (8 words)
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279 #define gSHAPETEMP r8.15 // :uw
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281 #define gCOEFA r42.0
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282 #define gCOEFB r42.1
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283 #define gCOEFC r42.2
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284 #define gCOEFD r42.3
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286 // Weighted prediction
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287 #define gPREDFLAG0 r46.0
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288 #define gPREDFLAG1 r46.2
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290 #define gWEIGHTFLAG r43.2
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291 #define gBIPRED r43.3
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292 #define gYADD r43.4
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293 #define gCADD r43.5
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294 #define gYSHIFT r43.6
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295 #define gCSHIFT r43.7
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297 #define gOFFSET r44.0
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298 #define gUOFFSET r44.1
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299 #define gVOFFSET r44.2
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308 #define gUO1 r45.7
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309 #define gVW0 r45.8
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310 #define gVO0 r45.9
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311 #define gVW1 r45.10
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312 #define gVO1 r45.11
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314 #define gWT0_D r45.0
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315 #define gUW0_D r45.2
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317 //------------ Message-related Registers & constants
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318 #define gMSGSRC r2 // Message Source
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320 #define mMSGHDR m1
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321 #define mMSGHDRY m1
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322 #define mMSGHDRC m2
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323 #define mMSGHDR1 m1
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324 #define mMSGHDR2 m2
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325 #define mMSGHDR3 m3
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326 #define mMSGHDR4 m4
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327 #define mMSGHDRYW m1
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328 #define mMSGHDRCW m10
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331 // 0000 0100(read) 0001(msg len) xxxx(resp len) 1010 (sampler cache) xxxx (field/frame) xxxx xxxx (bidx)
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332 #define nDWBRMSGDSC_SC 0x0208A002 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
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333 #define nDWBRMSGDSC_SC_TF 0x0208E602 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
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334 #define nDWBRMSGDSC_SC_BF 0x0208E702 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
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335 // 0000 0101(write) 0001(msg len) xxxx(resp len) 0010 (render cache) xxxx (field/frame) xxxx xxxx (bidx)
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336 #define nDWBWMSGDSC 0x02082000 // DWORD Block Write Message Descriptor through Data Port, Render Cache
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337 #define nDWBWMSGDSC_TF 0x02082600 // DWORD Block Write Message Descriptor through Data Port, Render Cache
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338 #define nDWBWMSGDSC_BF 0x02082700 // DWORD Block Write Message Descriptor through Data Port, Render Cache
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340 #else // Pre DEV_ILK
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341 // 0000 0100(read) 0001(msg len) xxxx(resp len) 1010 (sampler cache) xxxx (field/frame) xxxx xxxx (bidx)
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342 #define nDWBRMSGDSC_SC 0x0410A002 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
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343 #define nDWBRMSGDSC_SC_TF 0x0410A602 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
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344 #define nDWBRMSGDSC_SC_BF 0x0410A702 // DWORD Block Read Message Descriptor through Data Port, Sampler Cache
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345 // 0000 0101(write) 0001(msg len) xxxx(resp len) 0010 (render cache) xxxx (field/frame) xxxx xxxx (bidx)
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346 #define nDWBWMSGDSC 0x05102000 // DWORD Block Write Message Descriptor through Data Port, Render Cache
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347 #define nDWBWMSGDSC_TF 0x05102600 // DWORD Block Write Message Descriptor through Data Port, Render Cache
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348 #define nDWBWMSGDSC_BF 0x05102700 // DWORD Block Write Message Descriptor through Data Port, Render Cache
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351 #define nDWB_FIELD_MASK 0x0600
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353 // message data payload
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354 .declare mbMSGPAYLOADY Base=m2 ElementSize=1 SrcRegion=REGION(16,1) Type=b
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355 .declare mbMSGPAYLOADC Base=m11 ElementSize=1 SrcRegion=REGION(16,1) Type=b
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357 // Destination registers for write commit
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358 #define gREG_WRITE_COMMIT_Y r10.0
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359 #define gREG_WRITE_COMMIT_UV r11.0
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361 #define RETURN_REG_INTER r1.5 // Return pointer for all sub-routine calls (type DWORD)
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363 #define CALL_INTER(subFunc, skipInst) add (1) RETURN_REG_INTER<1>:ud ip:ud 1+skipInst*INST_SIZE \n\
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365 #define RETURN_INTER mov (1) ip:ud RETURN_REG_INTER<0;1,0>:ud // Return to calling module
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368 // End of inter_header.inc
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370 #endif // !defined(__INTER_HEADER__)
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