1 ; -*- coding: utf-8 -*-
4 ; Fast Forth For Texas Instrument MSP430FR5994
6 ; Copyright (C) <2014> <J.M. THOORENS>
8 ; This program is free software: you can redistribute it and/or modify
9 ; it under the terms of the GNU General Public License as published by
10 ; the Free Software Foundation, either version 3 of the License, or
11 ; (at your option) any later version.
13 ; This program is distributed in the hope that it will be useful,
14 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
15 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 ; GNU General Public License for more details.
18 ; You should have received a copy of the GNU General Public License
19 ; along with this program. If not, see <http://www.gnu.org/licenses/>.
22 ; ======================================================================
23 ; MSP_EXP430FR5994 board
24 ; ======================================================================
26 ; J101 Target <---> eZ-FET
30 ; P2.1 UCA0_RX 8-7 <---- TX UARTtoUSB bridge
31 ; +--4k7-< DeepRST <-- GND
33 ; P2.0 UCA0_TX 6-5 <-+-> RX UARTtoUSB bridge
38 ; P5.6 - sw1 <--- LCD contrast + (finger :-)
39 ; P5.5 - sw2 <--- LCD contrast - (finger ;-)
47 ; P1.2/TA1.1/TA0CLK/COUT/A2/C2 <--- OUT IR_Receiver (1 TSOP32236)
48 ; P6.1/UCA3RXD/UCA3SOMI -------------------------> 4 LCD_RS
49 ; P6.0/UCA3TXD/UCA3SIMO -------------------------> 5 LCD_R/W
50 ; P6.2/UCA3CLK -------------------------> 6 LCD_EN0
51 ; P1.3/TA1.2/UCB0STE/A3/C3
54 ; P7.1/UCB2SOMI/UCB2SCL ---> SCL I2C MASTER/SLAVE
55 ; P7.0/UCB2SIMO/UCB2SDA <--> SDA I2C MASTER/SLAVE
60 ; P3.0/A12/C12 <------------------------> 11 LCD_DB4
61 ; P3.1/A13/C13 <------------------------> 12 LCD_DB5
62 ; P3.2/A14/C14 <------------------------> 13 LCD_DB6
63 ; P3.3/A15/C15 <------------------------> 14 LCD_DB7
64 ; P1.4/TB0.1/UCA0STE/A4/C4
65 ; P1.5/TB0.2/UCA0CLK/A5/C5 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
75 ; P2.6/TB0.1/UCA1RXD/UCA1SOMI
76 ; P2.5/TB0.0/UCA1TXD/UCA1SIMO
78 ; P4.2/A10 RTS ----> CTS UARTtoUSB bridge (optional hardware control flow)
79 ; P4.1/A9 CTS <---- RTS UARTtoUSB bridge (optional hardware control flow)
83 ; P5.7/UCA2STE/TA4.1/MCLK
87 ; P5.0/UCB1SIMO/UCB1SDA
88 ; P5.1/UCB1SOMI/UCB1SCL
90 ; P8.2 <--> SDA I2C SOFTWARE MASTER
91 ; P8.1 <--> SCL I2C SOFTWARE MASTER
94 ; P7.2/UCB2CLK <--- CD_SD
95 ; P1.6/TB0.3/UCB0SIMO/UCB0SDA/TA0.0 ---> SD_MOSI
96 ; P1.7/TB0.4/UCB0SOMI/UCB0SCL/TA1.0 <--- SD_MISO
98 ; P2.2/TB0.2/UCB0CLK ---> SD_CLK
109 ; -----------------------------------------------
111 ; -----------------------------------------------
113 ; <-------+---0V0----------> 1 LCD_Vss
114 ; >------ | --3V6-----+----> 2 LCD_Vdd
121 ; TB0.2 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
122 ; -------------------------> 4 LCD_RS
123 ; -------------------------> 5 LCD_R/W
124 ; -------------------------> 6 LCD_EN0
125 ; <------------------------> 11 LCD_DB4
126 ; <------------------------> 12 LCD_DB5
127 ; <------------------------> 13 LCD_DB5
128 ; <------------------------> 14 LCD_DB7
130 ; ----------------------------------------------------------------------
131 ; POWER ON RESET AND INITIALIZATION : I/O
132 ; ----------------------------------------------------------------------
133 ; reset state : Px{DIR,REN,SEL0,SEL1,SELC,IE,IFG,IV} = 0 ; Px{IN,OUT,IES} = ?
134 ; ----------------------------------------------------------------------
135 ; POWER ON RESET AND INITIALIZATION : PORT1/2
136 ; ----------------------------------------------------------------------
138 ; PORT1 FastForth usage
148 ; PORTx default wanted state : pins as input with pullup resistor
150 ; BIS #3,&PADIR ; all pins 0 as input else LEDs
151 ; MOV #0FFFCh,&PAOUT ; all pins high else LEDs
152 ; BIC #3,&PAREN ; all pins 1 with pull resistors else LEDs
154 BIS #-1,&PAREN ; all pins 1 with pull up/down resistors
155 MOV #0FFFCh,&PAOUT ; all pins high else LEDs
157 ; PORT2 FastForth usage
158 .IFDEF UCB0_SD ; see device.inc
159 SD_SEL .equ PASEL1 ; to configure UCB0
160 SD_REN .equ PAREN ; to configure pullup resistors
161 BUS_SD .equ 04C0h ; pins P2.2 as UCB0CLK, P1.6 as UCB0SIMO & P1.7 as UCB0SOMI
164 .IFDEF UCA0_TERM ; see device.inc
165 ; P2.0 UCA0-TXD --> USB2UART RXD
166 ; P2.1 UCA0-RXD <-- USB2UART TXD
170 TXD .equ 1 ; P2.0 = TXD + FORTH Deep_RST pin
171 RXD .equ 2 ; P2.1 = RXD
175 .IFDEF UCA1_TERM ; see device.inc
176 ; P2.5 UCA1-TXD --> USB2UART RXD
177 ; P2.6 UCA1-RXD <-- USB2UART TXD
181 TXD .equ 20h ; P2.5 = TXD
182 RXD .equ 40h ; P2.6 = RXD
187 ; ----------------------------------------------------------------------
188 ; POWER ON RESET AND INITIALIZATION : PORT3/4
189 ; ----------------------------------------------------------------------
191 ; PORT3 FastForth usage
193 ; PORT4 FastForth usage
196 CS_SD .equ 1 ; P4.0 Chip Select
199 HANDSHAKOUT .equ P4OUT
203 MOV #-1,&PBREN ; REN1 all pullup resistors
206 .IFDEF TERMINAL4WIRES
207 ; RTS output is wired to the CTS input of UART2USB bridge
208 ; configure RTS as output high to disable RX TERM during start FORTH
209 BIS.B #RTS,&P4DIR ; RTS as output high
210 .IFDEF TERMINAL5WIRES
211 ; CTS input must be wired to the RTS output of UART2USB bridge
212 ; configure CTS as input low (true) to avoid lock when CTS is not wired
213 BIC.B #CTS,&P4OUT ; CTS input pulled down
214 .ENDIF ; TERMINAL5WIRES
215 .ENDIF ; TERMINAL4WIRES
217 ; ----------------------------------------------------------------------
218 ; POWER ON RESET AND INITIALIZATION : PORT5/6
219 ; ----------------------------------------------------------------------
221 ; PORT5 FastForth usage
224 SW1_IN .set P5IN ; port
225 SW1 .set 040h ; P5.6 bit position
226 SW2_IN .set P5IN ; port
227 SW2 .set 020h ; P5.5 bit position
230 IO_WIPE .equ 40h ; P5.6 = S1 = FORTH Deep_RST pin
232 ; PORT6 FastForth usage
235 ; PORTx default wanted state : pins as input with pullup resistor
237 MOV #-1,&PCOUT ; all pins output high
238 BIS #-1,&PCREN ; all pins with pull resistors
240 ; ----------------------------------------------------------------------
241 ; POWER ON RESET AND INITIALIZATION : PORT7/8
242 ; ----------------------------------------------------------------------
244 ; PORT7 FastForth usage
245 .IFDEF UCB2_TERM ; see device.inc
246 ; P7.1/UCB2SOMI/UCB2SCL ---> SCL I2C MASTER/SLAVE
247 ; P7.0/UCB2SIMO/UCB2SDA <--> SDA I2C MASTER/SLAVE
256 CD_SD .equ 4 ; P7.2 Card Detect
259 ; PORT8 FastForth usage
262 ; PORTx default wanted state : pins as input with pullup resistor
264 MOV #-1,&PDOUT ; all pins output high
265 BIS #-1,&PDREN ; all pins with pull resistors
267 ; ----------------------------------------------------------------------
268 ; POWER ON RESET AND INITIALIZATION : PORTJ
269 ; ----------------------------------------------------------------------
271 ; PORTJ FastForth usage
273 ; PORTx default wanted state : pins as input with pullup resistor
275 MOV.B #-1,&PJREN ; enable pullup/pulldown resistors
276 BIS.B #-1,&PJOUT ; pullup resistors
278 ; ----------------------------------------------------------------------
280 ; ----------------------------------------------------------------------
282 MOV.B #0A5h, &FRCTL0_H ; enable FRCTL0 access
283 MOV.B #10h, &FRCTL0 ; 1 waitstate @ 16 MHz
284 MOV.B #01h, &FRCTL0_H ; disable FRCTL0 access
286 ; ----------------------------------------------------------------------
287 ; POWER ON RESET AND INITIALIZATION : CLOCK SYSTEM
288 ; ----------------------------------------------------------------------
290 ; DCOCLK: Internal digitally controlled oscillator (DCO).
292 ; CS code for MSP430FR5948
293 MOV.B #CSKEY,&CSCTL0_H ; Unlock CS registers
296 ; MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 8MHZ DCO setting (default value)
297 MOV #DIVA_0 + DIVS_32 + DIVM_32,&CSCTL3
299 .ELSEIF FREQUENCY = 0.5
300 MOV #0,&CSCTL1 ; Set 1MHZ DCO setting
301 MOV #DIVA_0 + DIVS_2 + DIVM_2,&CSCTL3 ; set all dividers as 2
303 .ELSEIF FREQUENCY = 1
304 MOV #0,&CSCTL1 ; Set 1MHZ DCO setting
305 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
307 .ELSEIF FREQUENCY = 2
308 MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 4MHZ DCO setting
309 MOV #DIVA_0 + DIVS_2 + DIVM_2,&CSCTL3
311 .ELSEIF FREQUENCY = 4
312 MOV #DCOFSEL1+DCOFSEL0,&CSCTL1 ; Set 4MHZ DCO setting
313 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
315 .ELSEIF FREQUENCY = 8
316 ; MOV #DCOFSEL2+DCOFSEL1,&CSCTL1 ; Set 8MHZ DCO setting (default value)
317 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
319 .ELSEIF FREQUENCY = 16
320 MOV #DCORSEL+DCOFSEL2,&CSCTL1 ; Set 16MHZ DCO setting
321 MOV #DIVA_0 + DIVS_0 + DIVM_0,&CSCTL3 ; set all dividers as 0
324 .error "bad frequency setting, only 0.5,1,2,4,8,16 MHz"
328 MOV #SELA_LFXCLK+SELS_DCOCLK+SELM_DCOCLK,&CSCTL2
330 MOV #SELA_VLOCLK+SELS_DCOCLK+SELM_DCOCLK,&CSCTL2
332 MOV.B #1, &CSCTL0_H ; Lock CS Registers
334 BIS &SYSRSTIV,&SAVE_SYSRSTIV ; store volatile SYSRSTIV preserving a pending request for DEEP_RST
335 ; MOV &SAVE_SYSRSTIV,TOS ;
336 ; CMP #2,TOS ; POWER ON ?
337 ; JZ ClockWaitX ; yes
338 ; RRUM #2,X ; no: wait only 125 ms
339 ClockWaitX MOV #5209,Y ; wait 0.5s before starting after POWER ON
340 ClockWaitY SUB #1,Y ;1
341 JNZ ClockWaitY ;2 5209x3 = 15625 cycles delay = 15.625ms @ 1MHz
342 SUB #1,X ; x 32 @ 1 MHZ = 500ms
343 JNZ ClockWaitX ; time to stabilize power source ( 500ms )
345 ; ----------------------------------------------------------------------
346 ; POWER ON RESET AND INITIALIZATION : RTC_C REGISTERS
347 ; ----------------------------------------------------------------------
348 .IFDEF LF_XTAL ; see device.inc
349 ; LFXIN : PJ.4, LFXOUT : PJ.5
350 BIS.B #010h,&PJSEL0 ; SEL0 for only LFXIN
351 MOV.B #0A5h,&RTCCTL0_H ; unlock RTC_C
352 BIC.B #RTCHOLD,&RTCCTL1 ; Clear RTCHOLD = start RTC_C
354 ; ----------------------------------------------------------------------
355 ; POWER ON RESET AND INITIALIZATION : REF
356 ; ----------------------------------------------------------------------
358 ; ----------------------------------------------------------------------
359 ; POWER ON RESET AND INITIALIZATION next : see RESET in forthMSP430.asm
360 ; ----------------------------------------------------------------------