3 * @copy 2012 MinGW.org project
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
26 #pragma GCC system_header
30 * ParPort driver interface
40 #define DD_PARALLEL_PORT_BASE_NAME "ParallelPort"
41 #define DD_PARALLEL_PORT_BASE_NAME_U L"ParallelPort"
43 #define IOCTL_INTERNAL_DESELECT_DEVICE \
44 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS)
45 #define IOCTL_INTERNAL_GET_MORE_PARALLEL_PORT_INFO \
46 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS)
47 #define IOCTL_INTERNAL_GET_PARALLEL_PNP_INFO \
48 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS)
49 #define IOCTL_INTERNAL_GET_PARALLEL_PORT_INFO \
50 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS)
51 #define IOCTL_INTERNAL_INIT_1284_3_BUS \
52 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS)
53 #define IOCTL_INTERNAL_PARALLEL_CLEAR_CHIP_MODE \
54 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS)
55 #define IOCTL_INTERNAL_PARALLEL_CONNECT_INTERRUPT \
56 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS)
57 #define IOCTL_INTERNAL_PARALLEL_DISCONNECT_INTERRUPT \
58 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS)
59 #define IOCTL_INTERNAL_PARALLEL_PORT_ALLOCATE \
60 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS)
61 #define IOCTL_INTERNAL_PARALLEL_PORT_FREE \
62 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 40, METHOD_BUFFERED, FILE_ANY_ACCESS)
63 #define IOCTL_INTERNAL_PARALLEL_SET_CHIP_MODE \
64 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS)
65 #define IOCTL_INTERNAL_RELEASE_PARALLEL_PORT_INFO \
66 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS)
67 #define IOCTL_INTERNAL_SELECT_DEVICE \
68 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS)
71 typedef struct _PARALLEL_1284_COMMAND {
75 } PARALLEL_1284_COMMAND, *PPARALLEL_1284_COMMAND;
77 /* PARALLEL_1284_COMMAND.CommandFlags */
78 #define PAR_END_OF_CHAIN_DEVICE 0x00000001
79 #define PAR_HAVE_PORT_KEEP_PORT 0x00000002
81 typedef struct _MORE_PARALLEL_PORT_INFORMATION {
82 INTERFACE_TYPE InterfaceType;
85 ULONG InterruptVector;
86 KAFFINITY InterruptAffinity;
87 KINTERRUPT_MODE InterruptMode;
88 } MORE_PARALLEL_PORT_INFORMATION, *PMORE_PARALLEL_PORT_INFORMATION;
90 typedef NTSTATUS DDKAPI
91 (*PPARALLEL_SET_CHIP_MODE)(
92 /*IN*/ PVOID SetChipContext,
93 /*IN*/ UCHAR ChipMode);
95 typedef NTSTATUS DDKAPI
96 (*PPARALLEL_CLEAR_CHIP_MODE)(
97 /*IN*/ PVOID ClearChipContext,
98 /*IN*/ UCHAR ChipMode);
100 typedef NTSTATUS DDKAPI
101 (*PPARCHIP_CLEAR_CHIP_MODE)(
102 /*IN*/ PVOID ClearChipContext,
103 /*IN*/ UCHAR ChipMode);
105 typedef NTSTATUS DDKAPI
106 (*PPARALLEL_TRY_SELECT_ROUTINE)(
107 /*IN*/ PVOID TrySelectContext,
108 /*IN*/ PVOID TrySelectCommand);
110 typedef NTSTATUS DDKAPI
111 (*PPARALLEL_DESELECT_ROUTINE)(
112 /*IN*/ PVOID DeselectContext,
113 /*IN*/ PVOID DeselectCommand);
115 /* PARALLEL_PNP_INFORMATION.HardwareCapabilities */
116 #define PPT_NO_HARDWARE_PRESENT 0x00000000
117 #define PPT_ECP_PRESENT 0x00000001
118 #define PPT_EPP_PRESENT 0x00000002
119 #define PPT_EPP_32_PRESENT 0x00000004
120 #define PPT_BYTE_PRESENT 0x00000008
121 #define PPT_BIDI_PRESENT 0x00000008
122 #define PPT_1284_3_PRESENT 0x00000010
124 typedef struct _PARALLEL_PNP_INFORMATION {
125 PHYSICAL_ADDRESS OriginalEcpController;
126 PUCHAR EcpController;
127 ULONG SpanOfEcpController;
129 ULONG HardwareCapabilities;
130 PPARALLEL_SET_CHIP_MODE TrySetChipMode;
131 PPARALLEL_CLEAR_CHIP_MODE ClearChipMode;
134 PHYSICAL_ADDRESS EppControllerPhysicalAddress;
135 ULONG SpanOfEppController;
136 ULONG Ieee1284_3DeviceCount;
137 PPARALLEL_TRY_SELECT_ROUTINE TrySelectDevice;
138 PPARALLEL_DESELECT_ROUTINE DeselectDevice;
142 } PARALLEL_PNP_INFORMATION, *PPARALLEL_PNP_INFORMATION;
144 typedef BOOLEAN DDKAPI
145 (*PPARALLEL_TRY_ALLOCATE_ROUTINE)(
146 /*IN*/ PVOID TryAllocateContext);
149 (*PPARALLEL_FREE_ROUTINE)(
150 /*IN*/ PVOID FreeContext);
153 (*PPARALLEL_QUERY_WAITERS_ROUTINE)(
154 /*IN*/ PVOID QueryAllocsContext);
156 typedef struct _PARALLEL_PORT_INFORMATION {
157 PHYSICAL_ADDRESS OriginalController;
159 ULONG SpanOfController;
160 PPARALLEL_TRY_ALLOCATE_ROUTINE TryAllocatePort;
161 PPARALLEL_FREE_ROUTINE FreePort;
162 PPARALLEL_QUERY_WAITERS_ROUTINE QueryNumWaiters;
164 } PARALLEL_PORT_INFORMATION, *PPARALLEL_PORT_INFORMATION;
166 /* PARALLEL_CHIP_MODE.ModeFlags */
167 #define INITIAL_MODE 0x00
168 #define PARCHIP_ECR_ARBITRATOR 0x01
170 typedef struct _PARALLEL_CHIP_MODE {
173 } PARALLEL_CHIP_MODE, *PPARALLEL_CHIP_MODE;
176 (*PPARALLEL_DEFERRED_ROUTINE)(
177 /*IN*/ PVOID DeferredContext);
179 typedef struct _PARALLEL_INTERRUPT_SERVICE_ROUTINE {
180 PKSERVICE_ROUTINE InterruptServiceRoutine;
181 PVOID InterruptServiceContext;
182 PPARALLEL_DEFERRED_ROUTINE DeferredPortCheckRoutine;
183 PVOID DeferredPortCheckContext;
184 } PARALLEL_INTERRUPT_SERVICE_ROUTINE, *PPARALLEL_INTERRUPT_SERVICE_ROUTINE;
187 #define IOCTL_INTERNAL_DISCONNECT_IDLE \
188 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS)
189 #define IOCTL_INTERNAL_LOCK_PORT \
190 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS)
191 #define IOCTL_INTERNAL_LOCK_PORT_NO_SELECT \
192 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 52, METHOD_BUFFERED, FILE_ANY_ACCESS)
193 #define IOCTL_INTERNAL_PARCLASS_CONNECT \
194 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS)
195 #define IOCTL_INTERNAL_PARCLASS_DISCONNECT \
196 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS)
197 #define IOCTL_INTERNAL_UNLOCK_PORT \
198 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS)
199 #define IOCTL_INTERNAL_UNLOCK_PORT_NO_DESELECT \
200 CTL_CODE (FILE_DEVICE_PARALLEL_PORT, 53, METHOD_BUFFERED, FILE_ANY_ACCESS)
202 typedef USHORT DDKAPI
203 (*PDETERMINE_IEEE_MODES)(
204 /*IN*/ PVOID Context);
206 typedef enum _PARALLEL_SAFETY {
211 typedef NTSTATUS DDKAPI
212 (*PNEGOTIATE_IEEE_MODE)(
213 /*IN*/ PVOID Context,
214 /*IN*/ USHORT ModeMaskFwd,
215 /*IN*/ USHORT ModeMaskRev,
216 /*IN*/ PARALLEL_SAFETY ModeSafety,
217 /*IN*/ BOOLEAN IsForward);
219 typedef NTSTATUS DDKAPI
220 (*PTERMINATE_IEEE_MODE)(
221 /*IN*/ PVOID Context);
223 typedef NTSTATUS DDKAPI
224 (*PPARALLEL_IEEE_FWD_TO_REV)(
225 /*IN*/ PVOID Context);
227 typedef NTSTATUS DDKAPI
228 (*PPARALLEL_IEEE_REV_TO_FWD)(
229 /*IN*/ PVOID Context);
231 typedef NTSTATUS DDKAPI
233 /*IN*/ PVOID Context,
234 /*OUT*/ PVOID Buffer,
235 /*IN*/ ULONG NumBytesToRead,
236 /*OUT*/ PULONG NumBytesRead,
237 /*IN*/ UCHAR Channel);
239 typedef NTSTATUS DDKAPI
241 /*IN*/ PVOID Context,
242 /*OUT*/ PVOID Buffer,
243 /*IN*/ ULONG NumBytesToWrite,
244 /*OUT*/ PULONG NumBytesWritten,
245 /*IN*/ UCHAR Channel);
247 typedef NTSTATUS DDKAPI
248 (*PPARALLEL_TRYSELECT_DEVICE)(
249 /*IN*/ PVOID Context,
250 /*IN*/ PARALLEL_1284_COMMAND Command);
252 typedef NTSTATUS DDKAPI
253 (*PPARALLEL_DESELECT_DEVICE)(
254 /*IN*/ PVOID Context,
255 /*IN*/ PARALLEL_1284_COMMAND Command);
257 typedef struct _PARCLASS_INFORMATION {
259 PUCHAR EcrController;
260 ULONG SpanOfController;
261 PDETERMINE_IEEE_MODES DetermineIeeeModes;
262 PNEGOTIATE_IEEE_MODE NegotiateIeeeMode;
263 PTERMINATE_IEEE_MODE TerminateIeeeMode;
264 PPARALLEL_IEEE_FWD_TO_REV IeeeFwdToRevMode;
265 PPARALLEL_IEEE_REV_TO_FWD IeeeRevToFwdMode;
266 PPARALLEL_READ ParallelRead;
267 PPARALLEL_WRITE ParallelWrite;
268 PVOID ParclassContext;
269 ULONG HardwareCapabilities;
272 PPARALLEL_TRYSELECT_DEVICE ParallelTryselect;
273 PPARALLEL_DESELECT_DEVICE ParallelDeSelect;
274 } PARCLASS_INFORMATION, *PPARCLASS_INFORMATION;
280 #endif /* __PARALLEL_H */