2 * Copyright (c) 2015, Linaro Limited
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #ifndef __LINUX_ARM_SMCCC_H
15 #define __LINUX_ARM_SMCCC_H
18 * This file provides common defines for ARM SMC Calling Convention as
20 * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
23 #define ARM_SMCCC_STD_CALL 0
24 #define ARM_SMCCC_FAST_CALL 1
25 #define ARM_SMCCC_TYPE_SHIFT 31
27 #define ARM_SMCCC_SMC_32 0
28 #define ARM_SMCCC_SMC_64 1
29 #define ARM_SMCCC_CALL_CONV_SHIFT 30
31 #define ARM_SMCCC_OWNER_MASK 0x3F
32 #define ARM_SMCCC_OWNER_SHIFT 24
34 #define ARM_SMCCC_FUNC_MASK 0xFFFF
36 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
37 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
38 #define ARM_SMCCC_IS_64(smc_val) \
39 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
40 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
41 #define ARM_SMCCC_OWNER_NUM(smc_val) \
42 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
44 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
45 (((type) << ARM_SMCCC_TYPE_SHIFT) | \
46 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
47 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
48 ((func_num) & ARM_SMCCC_FUNC_MASK))
50 #define ARM_SMCCC_OWNER_ARCH 0
51 #define ARM_SMCCC_OWNER_CPU 1
52 #define ARM_SMCCC_OWNER_SIP 2
53 #define ARM_SMCCC_OWNER_OEM 3
54 #define ARM_SMCCC_OWNER_STANDARD 4
55 #define ARM_SMCCC_OWNER_TRUSTED_APP 48
56 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
57 #define ARM_SMCCC_OWNER_TRUSTED_OS 50
58 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
60 #define ARM_SMCCC_QUIRK_NONE 0
61 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
63 #define ARM_SMCCC_VERSION_1_0 0x10000
64 #define ARM_SMCCC_VERSION_1_1 0x10001
66 #define ARM_SMCCC_VERSION_FUNC_ID \
67 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
71 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \
72 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
76 #define ARM_SMCCC_ARCH_WORKAROUND_1 \
77 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
83 #include <linux/linkage.h>
84 #include <linux/types.h>
86 * struct arm_smccc_res - Result from SMC/HVC call
87 * @a0-a3 result values from registers 0 to 3
89 struct arm_smccc_res {
97 * struct arm_smccc_quirk - Contains quirk information
98 * @id: quirk identification
99 * @state: quirk specific information
100 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
102 struct arm_smccc_quirk {
110 * __arm_smccc_smc() - make SMC calls
111 * @a0-a7: arguments passed in registers 0 to 7
112 * @res: result values from registers 0 to 3
113 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
115 * This function is used to make SMC calls following SMC Calling Convention.
116 * The content of the supplied param are copied to registers 0 to 7 prior
117 * to the SMC instruction. The return values are updated with the content
118 * from register 0 to 3 on return from the SMC instruction. An optional
119 * quirk structure provides vendor specific behavior.
121 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
122 unsigned long a2, unsigned long a3, unsigned long a4,
123 unsigned long a5, unsigned long a6, unsigned long a7,
124 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
127 * __arm_smccc_hvc() - make HVC calls
128 * @a0-a7: arguments passed in registers 0 to 7
129 * @res: result values from registers 0 to 3
130 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
132 * This function is used to make HVC calls following SMC Calling
133 * Convention. The content of the supplied param are copied to registers 0
134 * to 7 prior to the HVC instruction. The return values are updated with
135 * the content from register 0 to 3 on return from the HVC instruction. An
136 * optional quirk structure provides vendor specific behavior.
138 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
139 unsigned long a2, unsigned long a3, unsigned long a4,
140 unsigned long a5, unsigned long a6, unsigned long a7,
141 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
143 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
145 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
147 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
149 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
151 #endif /*__ASSEMBLY__*/
152 #endif /*__LINUX_ARM_SMCCC_H*/