1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
13 #ifndef __MSM_EP_PCIE_H
14 #define __MSM_EP_PCIE_H
16 #include <linux/types.h>
18 enum ep_pcie_link_status {
19 EP_PCIE_LINK_DISABLED,
25 EP_PCIE_EVENT_INVALID = 0,
26 EP_PCIE_EVENT_PM_D0 = 0x1,
27 EP_PCIE_EVENT_PM_D3_HOT = 0x2,
28 EP_PCIE_EVENT_PM_D3_COLD = 0x4,
29 EP_PCIE_EVENT_PM_RST_DEAST = 0x8,
30 EP_PCIE_EVENT_LINKDOWN = 0x10,
31 EP_PCIE_EVENT_LINKUP = 0x20,
32 EP_PCIE_EVENT_MHI_A7 = 0x40,
33 EP_PCIE_EVENT_MMIO_WRITE = 0x80,
36 enum ep_pcie_irq_event {
37 EP_PCIE_INT_EVT_LINK_DOWN = 1,
39 EP_PCIE_INT_EVT_PM_TURNOFF,
40 EP_PCIE_INT_EVT_DEBUG,
42 EP_PCIE_INT_EVT_MHI_Q6,
43 EP_PCIE_INT_EVT_MHI_A7,
44 EP_PCIE_INT_EVT_DSTATE_CHANGE,
45 EP_PCIE_INT_EVT_L1SUB_TIMEOUT,
46 EP_PCIE_INT_EVT_MMIO_WRITE,
47 EP_PCIE_INT_EVT_CFG_WRITE,
48 EP_PCIE_INT_EVT_BRIDGE_FLUSH_N,
49 EP_PCIE_INT_EVT_LINK_UP,
50 EP_PCIE_INT_EVT_MAX = 13,
53 enum ep_pcie_trigger {
54 EP_PCIE_TRIGGER_CALLBACK,
55 EP_PCIE_TRIGGER_COMPLETION,
58 enum ep_pcie_options {
60 EP_PCIE_OPT_AST_WAKE = 0x1,
61 EP_PCIE_OPT_POWER_ON = 0x2,
62 EP_PCIE_OPT_ENUM = 0x4,
63 EP_PCIE_OPT_ALL = 0xFFFFFFFF,
66 struct ep_pcie_notify {
67 enum ep_pcie_event event;
73 struct ep_pcie_register_event {
76 enum ep_pcie_trigger mode;
77 void (*callback)(struct ep_pcie_notify *notify);
78 struct ep_pcie_notify notify;
79 struct completion *completion;
90 struct ep_pcie_msi_config {
97 struct ep_pcie_db_config {
104 struct list_head node;
107 int (*register_event)(struct ep_pcie_register_event *reg);
108 int (*deregister_event)(void);
109 enum ep_pcie_link_status (*get_linkstatus)(void);
110 int (*config_outbound_iatu)(struct ep_pcie_iatu entries[],
112 int (*get_msi_config)(struct ep_pcie_msi_config *cfg);
113 int (*trigger_msi)(u32 idx);
114 int (*wakeup_host)(void);
115 int (*enable_endpoint)(enum ep_pcie_options opt);
116 int (*disable_endpoint)(void);
117 int (*config_db_routing)(struct ep_pcie_db_config chdb_cfg,
118 struct ep_pcie_db_config erdb_cfg);
119 int (*mask_irq_event)(enum ep_pcie_irq_event event,
124 * ep_pcie_register_drv - register HW driver.
125 * @phandle: PCIe endpoint HW driver handle
127 * This function registers PCIe HW driver to PCIe endpoint service
130 * Return: 0 on success, negative value on error
132 int ep_pcie_register_drv(struct ep_pcie_hw *phandle);
135 * ep_pcie_deregister_drv - deregister HW driver.
136 * @phandle: PCIe endpoint HW driver handle
138 * This function deregisters PCIe HW driver to PCIe endpoint service
141 * Return: 0 on success, negative value on error
143 int ep_pcie_deregister_drv(struct ep_pcie_hw *phandle);
146 * ep_pcie_get_phandle - get PCIe endpoint HW driver handle.
147 * @id: PCIe endpoint device ID
149 * This function deregisters PCIe HW driver from PCIe endpoint service
152 * Return: PCIe endpoint HW driver handle
154 struct ep_pcie_hw *ep_pcie_get_phandle(u32 id);
157 * ep_pcie_register_event - register event with PCIe driver.
158 * @phandle: PCIe endpoint HW driver handle
159 * @reg: event structure
161 * This function gives PCIe client driver an option to register
162 * event with PCIe driver.
164 * Return: 0 on success, negative value on error
166 int ep_pcie_register_event(struct ep_pcie_hw *phandle,
167 struct ep_pcie_register_event *reg);
170 * ep_pcie_deregister_event - deregister event with PCIe driver.
171 * @phandle: PCIe endpoint HW driver handle
173 * This function gives PCIe client driver an option to deregister
174 * existing event with PCIe driver.
176 * Return: 0 on success, negative value on error
178 int ep_pcie_deregister_event(struct ep_pcie_hw *phandle);
181 * ep_pcie_get_linkstatus - indicate the status of PCIe link.
182 * @phandle: PCIe endpoint HW driver handle
184 * This function tells PCIe client about the status of PCIe link.
186 * Return: status of PCIe link
188 enum ep_pcie_link_status ep_pcie_get_linkstatus(struct ep_pcie_hw *phandle);
191 * ep_pcie_config_outbound_iatu - configure outbound iATU.
192 * @entries: iatu entries
193 * @num_entries: number of iatu entries
195 * This function configures the outbound iATU for PCIe
196 * client's access to the regions in the host memory which
197 * are specified by the SW on host side.
199 * Return: 0 on success, negative value on error
201 int ep_pcie_config_outbound_iatu(struct ep_pcie_hw *phandle,
202 struct ep_pcie_iatu entries[],
206 * ep_pcie_get_msi_config - get MSI config info.
207 * @phandle: PCIe endpoint HW driver handle
208 * @cfg: pointer to MSI config
210 * This function returns MSI config info.
212 * Return: 0 on success, negative value on error
214 int ep_pcie_get_msi_config(struct ep_pcie_hw *phandle,
215 struct ep_pcie_msi_config *cfg);
218 * ep_pcie_trigger_msi - trigger an MSI.
219 * @phandle: PCIe endpoint HW driver handle
220 * @idx: MSI index number
222 * This function allows PCIe client to trigger an MSI
225 * Return: 0 on success, negative value on error
227 int ep_pcie_trigger_msi(struct ep_pcie_hw *phandle, u32 idx);
230 * ep_pcie_wakeup_host - wake up the host.
231 * @phandle: PCIe endpoint HW driver handle
233 * This function asserts WAKE GPIO to wake up the host.
235 * Return: 0 on success, negative value on error
237 int ep_pcie_wakeup_host(struct ep_pcie_hw *phandle);
240 * ep_pcie_enable_endpoint - enable PCIe endpoint.
241 * @phandle: PCIe endpoint HW driver handle
242 * @opt: endpoint enable options
244 * This function is to enable the PCIe endpoint device.
246 * Return: 0 on success, negative value on error
248 int ep_pcie_enable_endpoint(struct ep_pcie_hw *phandle,
249 enum ep_pcie_options opt);
252 * ep_pcie_disable_endpoint - disable PCIe endpoint.
253 * @phandle: PCIe endpoint HW driver handle
255 * This function is to disable the PCIe endpoint device.
257 * Return: 0 on success, negative value on error
259 int ep_pcie_disable_endpoint(struct ep_pcie_hw *phandle);
262 * ep_pcie_config_db_routing - Configure routing of doorbells to another block.
263 * @phandle: PCIe endpoint HW driver handle
264 * @chdb_cfg: channel doorbell config
265 * @erdb_cfg: event ring doorbell config
267 * This function allows PCIe core to route the doorbells intended
268 * for another entity via a target address.
270 * Return: 0 on success, negative value on error
272 int ep_pcie_config_db_routing(struct ep_pcie_hw *phandle,
273 struct ep_pcie_db_config chdb_cfg,
274 struct ep_pcie_db_config erdb_cfg);
277 * ep_pcie_mask_irq_event - enable and disable IRQ event.
278 * @phandle: PCIe endpoint HW driver handle
280 * @enable: true to enable that IRQ event and false to disable
282 * This function is to enable and disable IRQ event.
284 * Return: 0 on success, negative value on error
286 int ep_pcie_mask_irq_event(struct ep_pcie_hw *phandle,
287 enum ep_pcie_irq_event event,