1 //===- llvm/CodeGen/LiveRegUnits.h - Register Unit Set ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// A set of register units. It is intended for register liveness tracking.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_LIVEREGUNITS_H
16 #define LLVM_CODEGEN_LIVEREGUNITS_H
18 #include "llvm/ADT/BitVector.h"
19 #include "llvm/Target/TargetRegisterInfo.h"
24 class MachineBasicBlock;
26 /// A set of register units used to track register liveness.
28 const TargetRegisterInfo *TRI;
32 /// Constructs a new empty LiveRegUnits set.
33 LiveRegUnits() : TRI(nullptr) {}
35 /// Constructs and initialize an empty LiveRegUnits set.
36 LiveRegUnits(const TargetRegisterInfo &TRI) {
40 /// Initialize and clear the set.
41 void init(const TargetRegisterInfo &TRI) {
44 Units.resize(TRI.getNumRegUnits());
48 void clear() { Units.reset(); }
50 /// Returns true if the set is empty.
51 bool empty() const { return Units.empty(); }
53 /// Adds register units covered by physical register \p Reg.
54 void addReg(unsigned Reg) {
55 for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit)
59 /// \brief Adds register units covered by physical register \p Reg that are
60 /// part of the lanemask \p Mask.
61 void addRegMasked(unsigned Reg, LaneBitmask Mask) {
62 for (MCRegUnitMaskIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
63 LaneBitmask UnitMask = (*Unit).second;
64 if (UnitMask.none() || (UnitMask & Mask).any())
65 Units.set((*Unit).first);
69 /// Removes all register units covered by physical register \p Reg.
70 void removeReg(unsigned Reg) {
71 for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit)
75 /// Removes register units not preserved by the regmask \p RegMask.
76 /// The regmask has the same format as the one in the RegMask machine operand.
77 void removeRegsNotPreserved(const uint32_t *RegMask);
79 /// Adds register units not preserved by the regmask \p RegMask.
80 /// The regmask has the same format as the one in the RegMask machine operand.
81 void addRegsInMask(const uint32_t *RegMask);
83 /// Returns true if no part of physical register \p Reg is live.
84 bool available(unsigned Reg) const {
85 for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
86 if (Units.test(*Unit))
92 /// Updates liveness when stepping backwards over the instruction \p MI.
93 void stepBackward(const MachineInstr &MI);
95 /// Mark all register units live during instruction \p MI.
96 /// This can be used to accumulate live/unoccupied registers over a range of
98 void accumulateBackward(const MachineInstr &MI);
100 /// Adds registers living out of block \p MBB.
101 /// Live out registers are the union of the live-in registers of the successor
102 /// blocks and pristine registers. Live out registers of the end block are the
103 /// callee saved registers.
104 void addLiveOuts(const MachineBasicBlock &MBB);
106 /// Adds registers living into block \p MBB.
107 void addLiveIns(const MachineBasicBlock &MBB);
109 /// Adds all register units marked in the bitvector \p RegUnits.
110 void addUnits(const BitVector &RegUnits) {
113 /// Removes all register units marked in the bitvector \p RegUnits.
114 void removeUnits(const BitVector &RegUnits) {
115 Units.reset(RegUnits);
117 /// Return the internal bitvector representation of the set.
118 const BitVector &getBitVector() const {