include/pci_ids/i965_pci_ids.h

   1 CHIPSET(0x29A2, I965_G, i965)
   2 CHIPSET(0x2992, I965_Q, i965)
   3 CHIPSET(0x2982, I965_G_1, i965)
   4 CHIPSET(0x2972, I946_GZ, i965)
   5 CHIPSET(0x2A02, I965_GM, i965)
   6 CHIPSET(0x2A12, I965_GME, i965)
   7 CHIPSET(0x2A42, GM45_GM, g4x)
   8 CHIPSET(0x2E02, IGD_E_G, g4x)
   9 CHIPSET(0x2E12, Q45_G, g4x)
  10 CHIPSET(0x2E22, G45_G, g4x)
  11 CHIPSET(0x2E32, G41_G, g4x)
  12 CHIPSET(0x2E42, B43_G, g4x)
  13 CHIPSET(0x2E92, B43_G1, g4x)
  14 CHIPSET(0x0042, ILD_G, ilk)
  15 CHIPSET(0x0046, ILM_G, ilk)
  16 CHIPSET(0x0102, SANDYBRIDGE_GT1, snb_gt1)
  17 CHIPSET(0x0112, SANDYBRIDGE_GT2, snb_gt2)
  18 CHIPSET(0x0122, SANDYBRIDGE_GT2_PLUS, snb_gt2)
  19 CHIPSET(0x0106, SANDYBRIDGE_M_GT1, snb_gt1)
  20 CHIPSET(0x0116, SANDYBRIDGE_M_GT2, snb_gt2)
  21 CHIPSET(0x0126, SANDYBRIDGE_M_GT2_PLUS, snb_gt2)
  22 CHIPSET(0x010A, SANDYBRIDGE_S, snb_gt1)
  23 CHIPSET(0x0152, IVYBRIDGE_GT1, ivb_gt1)
  24 CHIPSET(0x0162, IVYBRIDGE_GT2, ivb_gt2)
  25 CHIPSET(0x0156, IVYBRIDGE_M_GT1, ivb_gt1)
  26 CHIPSET(0x0166, IVYBRIDGE_M_GT2, ivb_gt2)
  27 CHIPSET(0x015a, IVYBRIDGE_S_GT1, ivb_gt1)
  28 CHIPSET(0x016a, IVYBRIDGE_S_GT2, ivb_gt2)
  29 CHIPSET(0x0402, HASWELL_GT1, hsw_gt1)
  30 CHIPSET(0x0412, HASWELL_GT2, hsw_gt2)
  31 CHIPSET(0x0422, HASWELL_GT3, hsw_gt3)
  32 CHIPSET(0x0406, HASWELL_M_GT1, hsw_gt1)
  33 CHIPSET(0x0416, HASWELL_M_GT2, hsw_gt2)
  34 CHIPSET(0x0426, HASWELL_M_GT3, hsw_gt3)
  35 CHIPSET(0x040A, HASWELL_S_GT1, hsw_gt1)
  36 CHIPSET(0x041A, HASWELL_S_GT2, hsw_gt2)
  37 CHIPSET(0x042A, HASWELL_S_GT3, hsw_gt3)
  38 CHIPSET(0x0C02, HASWELL_SDV_GT1, hsw_gt1)
  39 CHIPSET(0x0C12, HASWELL_SDV_GT2, hsw_gt2)
  40 CHIPSET(0x0C22, HASWELL_SDV_GT3, hsw_gt3)
  41 CHIPSET(0x0C06, HASWELL_SDV_M_GT1, hsw_gt1)
  42 CHIPSET(0x0C16, HASWELL_SDV_M_GT2, hsw_gt2)
  43 CHIPSET(0x0C26, HASWELL_SDV_M_GT3, hsw_gt3)
  44 CHIPSET(0x0C0A, HASWELL_SDV_S_GT1, hsw_gt1)
  45 CHIPSET(0x0C1A, HASWELL_SDV_S_GT2, hsw_gt2)
  46 CHIPSET(0x0C2A, HASWELL_SDV_S_GT3, hsw_gt3)
  47 CHIPSET(0x0A02, HASWELL_ULT_GT1, hsw_gt1)
  48 CHIPSET(0x0A12, HASWELL_ULT_GT2, hsw_gt2)
  49 CHIPSET(0x0A22, HASWELL_ULT_GT3, hsw_gt3)
  50 CHIPSET(0x0A06, HASWELL_ULT_M_GT1, hsw_gt1)
  51 CHIPSET(0x0A16, HASWELL_ULT_M_GT2, hsw_gt2)
  52 CHIPSET(0x0A26, HASWELL_ULT_M_GT3, hsw_gt3)
  53 CHIPSET(0x0A0A, HASWELL_ULT_S_GT1, hsw_gt1)
  54 CHIPSET(0x0A1A, HASWELL_ULT_S_GT2, hsw_gt2)
  55 CHIPSET(0x0A2A, HASWELL_ULT_S_GT3, hsw_gt3)
  56 CHIPSET(0x0D02, HASWELL_CRW_GT1, hsw_gt1)
  57 CHIPSET(0x0D12, HASWELL_CRW_GT2, hsw_gt2)
  58 CHIPSET(0x0D22, HASWELL_CRW_GT3, hsw_gt3)
  59 CHIPSET(0x0D06, HASWELL_CRW_M_GT1, hsw_gt1)
  60 CHIPSET(0x0D16, HASWELL_CRW_M_GT2, hsw_gt2)
  61 CHIPSET(0x0D26, HASWELL_CRW_M_GT3, hsw_gt3)
  62 CHIPSET(0x0D0A, HASWELL_CRW_S_GT1, hsw_gt1)
  63 CHIPSET(0x0D1A, HASWELL_CRW_S_GT2, hsw_gt2)
  64 CHIPSET(0x0D2A, HASWELL_CRW_S_GT3, hsw_gt3)
  65 CHIPSET(0x0F31, BAYTRAIL_M_1, byt)
  66 CHIPSET(0x0F32, BAYTRAIL_M_2, byt)
  67 CHIPSET(0x0F33, BAYTRAIL_M_3, byt)
  68 CHIPSET(0x0157, BAYTRAIL_M_4, byt)
  69 CHIPSET(0x0155, BAYTRAIL_D, byt)