1 //===-- AVRTargetMachine.cpp - Define TargetMachine for AVR ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the AVR specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #include "AVRTargetMachine.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/CodeGen/TargetPassConfig.h"
18 #include "llvm/IR/Module.h"
19 #include "llvm/IR/LegacyPassManager.h"
20 #include "llvm/Support/TargetRegistry.h"
22 #include "AVRTargetObjectFile.h"
24 #include "MCTargetDesc/AVRMCTargetDesc.h"
28 /// Processes a CPU name.
29 static StringRef getTargetCPU(StringRef CPU) {
30 if (CPU.empty() || CPU == "generic") {
37 AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
38 StringRef CPU, StringRef FS,
39 const TargetOptions &Options,
40 Reloc::Model RM, CodeModel::Model CM,
43 T, "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8", TT,
44 getTargetCPU(CPU), FS, Options, RM, CM, OL),
45 SubTarget(TT, GetTargetCPU(CPU), FS, *this) {
46 this->TLOF = make_unique<AVRTargetObjectFile>();
51 /// AVR Code Generator Pass Configuration Options.
52 class AVRPassConfig : public TargetPassConfig {
54 AVRPassConfig(AVRTargetMachine *TM, PassManagerBase &PM)
55 : TargetPassConfig(TM, PM) {}
57 AVRTargetMachine &getAVRTargetMachine() const {
58 return getTM<AVRTargetMachine>();
61 bool addInstSelector() override;
62 void addPreSched2() override;
63 void addPreRegAlloc() override;
64 void addPreEmitPass() override;
68 TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
69 return new AVRPassConfig(this, PM);
72 extern "C" void LLVMInitializeAVRTarget() {
73 // Register the target.
74 RegisterTargetMachine<AVRTargetMachine> X(TheAVRTarget);
77 const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const {
81 const AVRSubtarget *AVRTargetMachine::getSubtargetImpl(const Function &) const {
85 //===----------------------------------------------------------------------===//
86 // Pass Pipeline Configuration
87 //===----------------------------------------------------------------------===//
89 bool AVRPassConfig::addInstSelector() {
93 void AVRPassConfig::addPreRegAlloc() {
96 void AVRPassConfig::addPreSched2() { }
98 void AVRPassConfig::addPreEmitPass() {
101 } // end of namespace llvm