1 //===-- LanaiAsmBackend.cpp - Lanai Assembler Backend ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "LanaiFixupKinds.h"
11 #include "MCTargetDesc/LanaiMCTargetDesc.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCAssembler.h"
14 #include "llvm/MC/MCDirectives.h"
15 #include "llvm/MC/MCELFObjectWriter.h"
16 #include "llvm/MC/MCFixupKindInfo.h"
17 #include "llvm/MC/MCObjectWriter.h"
18 #include "llvm/MC/MCSubtargetInfo.h"
19 #include "llvm/Support/ErrorHandling.h"
20 #include "llvm/Support/raw_ostream.h"
24 // Prepare value for the target space
25 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
32 case Lanai::FIXUP_LANAI_21:
33 case Lanai::FIXUP_LANAI_21_F:
34 case Lanai::FIXUP_LANAI_25:
35 case Lanai::FIXUP_LANAI_32:
36 case Lanai::FIXUP_LANAI_HI16:
37 case Lanai::FIXUP_LANAI_LO16:
40 llvm_unreachable("Unknown fixup kind!");
45 class LanaiAsmBackend : public MCAsmBackend {
46 Triple::OSType OSType;
49 LanaiAsmBackend(const Target &T, Triple::OSType OST)
50 : MCAsmBackend(support::big), OSType(OST) {}
52 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
53 const MCValue &Target, MutableArrayRef<char> Data,
54 uint64_t Value, bool IsResolved) const override;
56 std::unique_ptr<MCObjectWriter>
57 createObjectWriter(raw_pwrite_stream &OS) const override;
59 // No instruction requires relaxation
60 bool fixupNeedsRelaxation(const MCFixup & /*Fixup*/, uint64_t /*Value*/,
61 const MCRelaxableFragment * /*DF*/,
62 const MCAsmLayout & /*Layout*/) const override {
66 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
68 unsigned getNumFixupKinds() const override {
69 return Lanai::NumTargetFixupKinds;
72 bool mayNeedRelaxation(const MCInst & /*Inst*/) const override {
76 void relaxInstruction(const MCInst & /*Inst*/,
77 const MCSubtargetInfo & /*STI*/,
78 MCInst & /*Res*/) const override {}
80 bool writeNopData(raw_ostream &OS, uint64_t Count) const override;
83 bool LanaiAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count) const {
87 for (uint64_t i = 0; i < Count; i += 4)
88 OS.write("\x15\0\0\0", 4);
93 void LanaiAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
94 const MCValue &Target,
95 MutableArrayRef<char> Data, uint64_t Value,
96 bool /*IsResolved*/) const {
97 MCFixupKind Kind = Fixup.getKind();
98 Value = adjustFixupValue(static_cast<unsigned>(Kind), Value);
101 return; // This value doesn't change the encoding
103 // Where in the object and where the number of bytes that need
105 unsigned Offset = Fixup.getOffset();
106 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
107 unsigned FullSize = 4;
109 // Grab current value, if any, from bits.
112 // Load instruction and apply value
113 for (unsigned i = 0; i != NumBytes; ++i) {
114 unsigned Idx = (FullSize - 1 - i);
115 CurVal |= static_cast<uint64_t>(static_cast<uint8_t>(Data[Offset + Idx]))
120 (static_cast<uint64_t>(-1) >> (64 - getFixupKindInfo(Kind).TargetSize));
121 CurVal |= Value & Mask;
123 // Write out the fixed up bytes back to the code/data bits.
124 for (unsigned i = 0; i != NumBytes; ++i) {
125 unsigned Idx = (FullSize - 1 - i);
126 Data[Offset + Idx] = static_cast<uint8_t>((CurVal >> (i * 8)) & 0xff);
130 std::unique_ptr<MCObjectWriter>
131 LanaiAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
132 return createLanaiELFObjectWriter(OS,
133 MCELFObjectTargetWriter::getOSABI(OSType));
136 const MCFixupKindInfo &
137 LanaiAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
138 static const MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds] = {
139 // This table *must* be in same the order of fixup_* kinds in
140 // LanaiFixupKinds.h.
141 // Note: The number of bits indicated here are assumed to be contiguous.
142 // This does not hold true for LANAI_21 and LANAI_21_F which are applied
143 // to bits 0x7cffff and 0x7cfffc, respectively. Since the 'bits' counts
144 // here are used only for cosmetic purposes, we set the size to 16 bits
145 // for these 21-bit relocation as llvm/lib/MC/MCAsmStreamer.cpp checks
146 // no bits are set in the fixup range.
148 // name offset bits flags
149 {"FIXUP_LANAI_NONE", 0, 32, 0},
150 {"FIXUP_LANAI_21", 16, 16 /*21*/, 0},
151 {"FIXUP_LANAI_21_F", 16, 16 /*21*/, 0},
152 {"FIXUP_LANAI_25", 7, 25, 0},
153 {"FIXUP_LANAI_32", 0, 32, 0},
154 {"FIXUP_LANAI_HI16", 16, 16, 0},
155 {"FIXUP_LANAI_LO16", 16, 16, 0}};
157 if (Kind < FirstTargetFixupKind)
158 return MCAsmBackend::getFixupKindInfo(Kind);
160 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
162 return Infos[Kind - FirstTargetFixupKind];
167 MCAsmBackend *llvm::createLanaiAsmBackend(const Target &T,
168 const MCSubtargetInfo &STI,
169 const MCRegisterInfo & /*MRI*/,
170 const MCTargetOptions & /*Options*/) {
171 const Triple &TT = STI.getTargetTriple();
172 if (!TT.isOSBinFormatELF())
173 llvm_unreachable("OS not supported");
175 return new LanaiAsmBackend(T, TT.getOS());