1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbolELF.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/ELF.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
30 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
31 : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
32 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
34 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
35 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetMips16() {}
37 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
38 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
39 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
40 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
41 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
42 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
43 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
44 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
45 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
46 forbidModuleDirective();
48 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
49 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
50 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
51 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
52 void MipsTargetStreamer::emitDirectiveNaN2008() {}
53 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
54 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
55 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
56 void MipsTargetStreamer::emitDirectiveInsn() { forbidModuleDirective(); }
57 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
58 unsigned ReturnReg) {}
59 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
60 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
62 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
63 forbidModuleDirective();
65 void MipsTargetStreamer::emitDirectiveSetMips0() { forbidModuleDirective(); }
66 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
67 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
68 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
69 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
70 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
71 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
72 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
73 void MipsTargetStreamer::emitDirectiveSetMips32R3() { forbidModuleDirective(); }
74 void MipsTargetStreamer::emitDirectiveSetMips32R5() { forbidModuleDirective(); }
75 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
76 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
77 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
78 void MipsTargetStreamer::emitDirectiveSetMips64R3() { forbidModuleDirective(); }
79 void MipsTargetStreamer::emitDirectiveSetMips64R5() { forbidModuleDirective(); }
80 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
81 void MipsTargetStreamer::emitDirectiveSetPop() { forbidModuleDirective(); }
82 void MipsTargetStreamer::emitDirectiveSetPush() { forbidModuleDirective(); }
83 void MipsTargetStreamer::emitDirectiveSetSoftFloat() {
84 forbidModuleDirective();
86 void MipsTargetStreamer::emitDirectiveSetHardFloat() {
87 forbidModuleDirective();
89 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
90 void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
91 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
92 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
93 const MCSymbol &Sym, bool IsReg) {
95 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
97 if (!Enabled && !IsO32ABI)
98 report_fatal_error("+nooddspreg is only valid for O32");
100 void MipsTargetStreamer::emitDirectiveSetFp(
101 MipsABIFlagsSection::FpABIKind Value) {
102 forbidModuleDirective();
105 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
106 formatted_raw_ostream &OS)
107 : MipsTargetStreamer(S), OS(OS) {}
109 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
110 OS << "\t.set\tmicromips\n";
111 forbidModuleDirective();
114 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
115 OS << "\t.set\tnomicromips\n";
116 forbidModuleDirective();
119 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
120 OS << "\t.set\tmips16\n";
121 forbidModuleDirective();
124 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
125 OS << "\t.set\tnomips16\n";
126 MipsTargetStreamer::emitDirectiveSetNoMips16();
129 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
130 OS << "\t.set\treorder\n";
131 MipsTargetStreamer::emitDirectiveSetReorder();
134 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
135 OS << "\t.set\tnoreorder\n";
136 forbidModuleDirective();
139 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
140 OS << "\t.set\tmacro\n";
141 MipsTargetStreamer::emitDirectiveSetMacro();
144 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
145 OS << "\t.set\tnomacro\n";
146 MipsTargetStreamer::emitDirectiveSetNoMacro();
149 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
150 OS << "\t.set\tmsa\n";
151 MipsTargetStreamer::emitDirectiveSetMsa();
154 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
155 OS << "\t.set\tnomsa\n";
156 MipsTargetStreamer::emitDirectiveSetNoMsa();
159 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
160 OS << "\t.set\tat\n";
161 MipsTargetStreamer::emitDirectiveSetAt();
164 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
165 OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
166 MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
169 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
170 OS << "\t.set\tnoat\n";
171 MipsTargetStreamer::emitDirectiveSetNoAt();
174 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
175 OS << "\t.end\t" << Name << '\n';
178 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
179 OS << "\t.ent\t" << Symbol.getName() << '\n';
182 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
184 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
186 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
187 OS << "\t.nan\tlegacy\n";
190 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
191 OS << "\t.option\tpic0\n";
194 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
195 OS << "\t.option\tpic2\n";
198 void MipsTargetAsmStreamer::emitDirectiveInsn() {
199 MipsTargetStreamer::emitDirectiveInsn();
203 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
204 unsigned ReturnReg) {
206 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
208 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
211 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
212 OS << "\t.set arch=" << Arch << "\n";
213 MipsTargetStreamer::emitDirectiveSetArch(Arch);
216 void MipsTargetAsmStreamer::emitDirectiveSetMips0() {
217 OS << "\t.set\tmips0\n";
218 MipsTargetStreamer::emitDirectiveSetMips0();
221 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
222 OS << "\t.set\tmips1\n";
223 MipsTargetStreamer::emitDirectiveSetMips1();
226 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
227 OS << "\t.set\tmips2\n";
228 MipsTargetStreamer::emitDirectiveSetMips2();
231 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
232 OS << "\t.set\tmips3\n";
233 MipsTargetStreamer::emitDirectiveSetMips3();
236 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
237 OS << "\t.set\tmips4\n";
238 MipsTargetStreamer::emitDirectiveSetMips4();
241 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
242 OS << "\t.set\tmips5\n";
243 MipsTargetStreamer::emitDirectiveSetMips5();
246 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
247 OS << "\t.set\tmips32\n";
248 MipsTargetStreamer::emitDirectiveSetMips32();
251 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
252 OS << "\t.set\tmips32r2\n";
253 MipsTargetStreamer::emitDirectiveSetMips32R2();
256 void MipsTargetAsmStreamer::emitDirectiveSetMips32R3() {
257 OS << "\t.set\tmips32r3\n";
258 MipsTargetStreamer::emitDirectiveSetMips32R3();
261 void MipsTargetAsmStreamer::emitDirectiveSetMips32R5() {
262 OS << "\t.set\tmips32r5\n";
263 MipsTargetStreamer::emitDirectiveSetMips32R5();
266 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
267 OS << "\t.set\tmips32r6\n";
268 MipsTargetStreamer::emitDirectiveSetMips32R6();
271 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
272 OS << "\t.set\tmips64\n";
273 MipsTargetStreamer::emitDirectiveSetMips64();
276 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
277 OS << "\t.set\tmips64r2\n";
278 MipsTargetStreamer::emitDirectiveSetMips64R2();
281 void MipsTargetAsmStreamer::emitDirectiveSetMips64R3() {
282 OS << "\t.set\tmips64r3\n";
283 MipsTargetStreamer::emitDirectiveSetMips64R3();
286 void MipsTargetAsmStreamer::emitDirectiveSetMips64R5() {
287 OS << "\t.set\tmips64r5\n";
288 MipsTargetStreamer::emitDirectiveSetMips64R5();
291 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
292 OS << "\t.set\tmips64r6\n";
293 MipsTargetStreamer::emitDirectiveSetMips64R6();
296 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
297 OS << "\t.set\tdsp\n";
298 MipsTargetStreamer::emitDirectiveSetDsp();
301 void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() {
302 OS << "\t.set\tnodsp\n";
303 MipsTargetStreamer::emitDirectiveSetNoDsp();
306 void MipsTargetAsmStreamer::emitDirectiveSetPop() {
307 OS << "\t.set\tpop\n";
308 MipsTargetStreamer::emitDirectiveSetPop();
311 void MipsTargetAsmStreamer::emitDirectiveSetPush() {
312 OS << "\t.set\tpush\n";
313 MipsTargetStreamer::emitDirectiveSetPush();
316 void MipsTargetAsmStreamer::emitDirectiveSetSoftFloat() {
317 OS << "\t.set\tsoftfloat\n";
318 MipsTargetStreamer::emitDirectiveSetSoftFloat();
321 void MipsTargetAsmStreamer::emitDirectiveSetHardFloat() {
322 OS << "\t.set\thardfloat\n";
323 MipsTargetStreamer::emitDirectiveSetHardFloat();
326 // Print a 32 bit hex number with all numbers.
327 static void printHex32(unsigned Value, raw_ostream &OS) {
329 for (int i = 7; i >= 0; i--)
330 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
333 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
334 int CPUTopSavedRegOff) {
336 printHex32(CPUBitmask, OS);
337 OS << ',' << CPUTopSavedRegOff << '\n';
340 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
341 int FPUTopSavedRegOff) {
343 printHex32(FPUBitmask, OS);
344 OS << "," << FPUTopSavedRegOff << '\n';
347 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
349 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
350 forbidModuleDirective();
353 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
357 OS << "\t.cpsetup\t$"
358 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
362 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
368 OS << Sym.getName() << "\n";
369 forbidModuleDirective();
372 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
373 MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
374 MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
376 OS << "\t.module\tfp=";
377 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
380 void MipsTargetAsmStreamer::emitDirectiveSetFp(
381 MipsABIFlagsSection::FpABIKind Value) {
382 MipsTargetStreamer::emitDirectiveSetFp(Value);
385 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
388 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
390 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
392 OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
395 // This part is for ELF object output.
396 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
397 const MCSubtargetInfo &STI)
398 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
399 MCAssembler &MCA = getStreamer().getAssembler();
400 Pic = MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_;
402 const FeatureBitset &Features = STI.getFeatureBits();
404 // Set the header flags that we can in the constructor.
405 // FIXME: This is a fairly terrible hack. We set the rest
406 // of these in the destructor. The problem here is two-fold:
408 // a: Some of the eflags can be set/reset by directives.
409 // b: There aren't any usage paths that initialize the ABI
410 // pointer until after we initialize either an assembler
411 // or the target machine.
412 // We can fix this by making the target streamer construct
413 // the ABI, but this is fraught with wide ranging dependency
415 unsigned EFlags = MCA.getELFHeaderEFlags();
418 if (Features[Mips::FeatureMips64r6])
419 EFlags |= ELF::EF_MIPS_ARCH_64R6;
420 else if (Features[Mips::FeatureMips64r2] ||
421 Features[Mips::FeatureMips64r3] ||
422 Features[Mips::FeatureMips64r5])
423 EFlags |= ELF::EF_MIPS_ARCH_64R2;
424 else if (Features[Mips::FeatureMips64])
425 EFlags |= ELF::EF_MIPS_ARCH_64;
426 else if (Features[Mips::FeatureMips5])
427 EFlags |= ELF::EF_MIPS_ARCH_5;
428 else if (Features[Mips::FeatureMips4])
429 EFlags |= ELF::EF_MIPS_ARCH_4;
430 else if (Features[Mips::FeatureMips3])
431 EFlags |= ELF::EF_MIPS_ARCH_3;
432 else if (Features[Mips::FeatureMips32r6])
433 EFlags |= ELF::EF_MIPS_ARCH_32R6;
434 else if (Features[Mips::FeatureMips32r2] ||
435 Features[Mips::FeatureMips32r3] ||
436 Features[Mips::FeatureMips32r5])
437 EFlags |= ELF::EF_MIPS_ARCH_32R2;
438 else if (Features[Mips::FeatureMips32])
439 EFlags |= ELF::EF_MIPS_ARCH_32;
440 else if (Features[Mips::FeatureMips2])
441 EFlags |= ELF::EF_MIPS_ARCH_2;
443 EFlags |= ELF::EF_MIPS_ARCH_1;
446 if (Features[Mips::FeatureNaN2008])
447 EFlags |= ELF::EF_MIPS_NAN2008;
449 // -mabicalls and -mplt are not implemented but we should act as if they were
451 EFlags |= ELF::EF_MIPS_CPIC;
453 MCA.setELFHeaderEFlags(EFlags);
456 void MipsTargetELFStreamer::emitLabel(MCSymbol *S) {
457 auto *Symbol = cast<MCSymbolELF>(S);
458 if (!isMicroMipsEnabled())
460 getStreamer().getAssembler().registerSymbol(*Symbol);
461 uint8_t Type = Symbol->getType();
462 if (Type != ELF::STT_FUNC)
465 Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
468 void MipsTargetELFStreamer::finish() {
469 MCAssembler &MCA = getStreamer().getAssembler();
470 const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
472 // .bss, .text and .data are always at least 16-byte aligned.
473 MCSection &TextSection = *OFI.getTextSection();
474 MCA.registerSection(TextSection);
475 MCSection &DataSection = *OFI.getDataSection();
476 MCA.registerSection(DataSection);
477 MCSection &BSSSection = *OFI.getBSSSection();
478 MCA.registerSection(BSSSection);
480 TextSection.setAlignment(std::max(16u, TextSection.getAlignment()));
481 DataSection.setAlignment(std::max(16u, DataSection.getAlignment()));
482 BSSSection.setAlignment(std::max(16u, BSSSection.getAlignment()));
484 const FeatureBitset &Features = STI.getFeatureBits();
486 // Update e_header flags. See the FIXME and comment above in
487 // the constructor for a full rundown on this.
488 unsigned EFlags = MCA.getELFHeaderEFlags();
491 // N64 does not require any ABI bits.
492 if (getABI().IsO32())
493 EFlags |= ELF::EF_MIPS_ABI_O32;
494 else if (getABI().IsN32())
495 EFlags |= ELF::EF_MIPS_ABI2;
497 if (Features[Mips::FeatureGP64Bit]) {
498 if (getABI().IsO32())
499 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
500 } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
501 EFlags |= ELF::EF_MIPS_32BITMODE;
503 // If we've set the cpic eflag and we're n64, go ahead and set the pic
505 if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64())
506 EFlags |= ELF::EF_MIPS_PIC;
508 MCA.setELFHeaderEFlags(EFlags);
510 // Emit all the option records.
511 // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
513 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
514 MEF.EmitMipsOptionRecords();
519 void MipsTargetELFStreamer::emitAssignment(MCSymbol *S, const MCExpr *Value) {
520 auto *Symbol = cast<MCSymbolELF>(S);
521 // If on rhs is micromips symbol then mark Symbol as microMips.
522 if (Value->getKind() != MCExpr::SymbolRef)
524 const auto &RhsSym = cast<MCSymbolELF>(
525 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol());
527 if (!(RhsSym.getOther() & ELF::STO_MIPS_MICROMIPS))
530 Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
533 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
534 return static_cast<MCELFStreamer &>(Streamer);
537 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
538 MicroMipsEnabled = true;
540 MCAssembler &MCA = getStreamer().getAssembler();
541 unsigned Flags = MCA.getELFHeaderEFlags();
542 Flags |= ELF::EF_MIPS_MICROMIPS;
543 MCA.setELFHeaderEFlags(Flags);
544 forbidModuleDirective();
547 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
548 MicroMipsEnabled = false;
549 forbidModuleDirective();
552 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
553 MCAssembler &MCA = getStreamer().getAssembler();
554 unsigned Flags = MCA.getELFHeaderEFlags();
555 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
556 MCA.setELFHeaderEFlags(Flags);
557 forbidModuleDirective();
560 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
561 MCAssembler &MCA = getStreamer().getAssembler();
562 unsigned Flags = MCA.getELFHeaderEFlags();
563 Flags |= ELF::EF_MIPS_NOREORDER;
564 MCA.setELFHeaderEFlags(Flags);
565 forbidModuleDirective();
568 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
569 MCAssembler &MCA = getStreamer().getAssembler();
570 MCContext &Context = MCA.getContext();
571 MCStreamer &OS = getStreamer();
573 MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS,
574 ELF::SHF_ALLOC | ELF::SHT_REL);
576 const MCSymbolRefExpr *ExprRef =
577 MCSymbolRefExpr::create(Name, MCSymbolRefExpr::VK_None, Context);
579 MCA.registerSection(*Sec);
580 Sec->setAlignment(4);
584 OS.SwitchSection(Sec);
586 OS.EmitValueImpl(ExprRef, 4);
588 OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
589 OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4); // reg_offset
591 OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
592 OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4); // fpreg_offset
594 OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
595 OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4); // frame_reg
596 OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg
598 // The .end directive marks the end of a procedure. Invalidate
599 // the information gathered up until this point.
600 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
605 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
606 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
609 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
610 MCAssembler &MCA = getStreamer().getAssembler();
611 unsigned Flags = MCA.getELFHeaderEFlags();
612 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
613 MCA.setELFHeaderEFlags(Flags);
616 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
617 MCAssembler &MCA = getStreamer().getAssembler();
618 unsigned Flags = MCA.getELFHeaderEFlags();
619 Flags |= ELF::EF_MIPS_NAN2008;
620 MCA.setELFHeaderEFlags(Flags);
623 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
624 MCAssembler &MCA = getStreamer().getAssembler();
625 unsigned Flags = MCA.getELFHeaderEFlags();
626 Flags &= ~ELF::EF_MIPS_NAN2008;
627 MCA.setELFHeaderEFlags(Flags);
630 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
631 MCAssembler &MCA = getStreamer().getAssembler();
632 unsigned Flags = MCA.getELFHeaderEFlags();
633 // This option overrides other PIC options like -KPIC.
635 Flags &= ~ELF::EF_MIPS_PIC;
636 MCA.setELFHeaderEFlags(Flags);
639 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
640 MCAssembler &MCA = getStreamer().getAssembler();
641 unsigned Flags = MCA.getELFHeaderEFlags();
643 // NOTE: We are following the GAS behaviour here which means the directive
644 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
645 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
646 // EF_MIPS_CPIC to be mutually exclusive.
647 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
648 MCA.setELFHeaderEFlags(Flags);
651 void MipsTargetELFStreamer::emitDirectiveInsn() {
652 MipsTargetStreamer::emitDirectiveInsn();
653 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
654 MEF.createPendingLabelRelocs();
657 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
658 unsigned ReturnReg_) {
659 MCContext &Context = getStreamer().getAssembler().getContext();
660 const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
663 FrameReg = RegInfo->getEncodingValue(StackReg);
664 FrameOffset = StackSize;
665 ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
668 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
669 int CPUTopSavedRegOff) {
671 GPRBitMask = CPUBitmask;
672 GPROffset = CPUTopSavedRegOff;
675 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
676 int FPUTopSavedRegOff) {
678 FPRBitMask = FPUBitmask;
679 FPROffset = FPUTopSavedRegOff;
682 void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
684 // This directive expands to:
685 // lui $gp, %hi(_gp_disp)
686 // addui $gp, $gp, %lo(_gp_disp)
687 // addu $gp, $gp, $reg
688 // when support for position independent code is enabled.
689 if (!Pic || (getABI().IsN32() || getABI().IsN64()))
692 // There's a GNU extension controlled by -mno-shared that allows
693 // locally-binding symbols to be accessed using absolute addresses.
694 // This is currently not supported. When supported -mno-shared makes
695 // .cpload expand to:
696 // lui $gp, %hi(__gnu_local_gp)
697 // addiu $gp, $gp, %lo(__gnu_local_gp)
699 StringRef SymName("_gp_disp");
700 MCAssembler &MCA = getStreamer().getAssembler();
701 MCSymbol *GP_Disp = MCA.getContext().getOrCreateSymbol(SymName);
702 MCA.registerSymbol(*GP_Disp);
705 TmpInst.setOpcode(Mips::LUi);
706 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
707 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::create(
708 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
709 TmpInst.addOperand(MCOperand::createExpr(HiSym));
710 getStreamer().EmitInstruction(TmpInst, STI);
714 TmpInst.setOpcode(Mips::ADDiu);
715 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
716 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
717 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::create(
718 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
719 TmpInst.addOperand(MCOperand::createExpr(LoSym));
720 getStreamer().EmitInstruction(TmpInst, STI);
724 TmpInst.setOpcode(Mips::ADDu);
725 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
726 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
727 TmpInst.addOperand(MCOperand::createReg(RegNo));
728 getStreamer().EmitInstruction(TmpInst, STI);
730 forbidModuleDirective();
733 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
737 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
738 if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
741 MCAssembler &MCA = getStreamer().getAssembler();
744 // Either store the old $gp in a register or on the stack
746 // move $save, $gpreg
747 Inst.setOpcode(Mips::DADDu);
748 Inst.addOperand(MCOperand::createReg(RegOrOffset));
749 Inst.addOperand(MCOperand::createReg(Mips::GP));
750 Inst.addOperand(MCOperand::createReg(Mips::ZERO));
752 // sd $gpreg, offset($sp)
753 Inst.setOpcode(Mips::SD);
754 Inst.addOperand(MCOperand::createReg(Mips::GP));
755 Inst.addOperand(MCOperand::createReg(Mips::SP));
756 Inst.addOperand(MCOperand::createImm(RegOrOffset));
758 getStreamer().EmitInstruction(Inst, STI);
761 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::create(
762 &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
763 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::create(
764 &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
766 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
767 Inst.setOpcode(Mips::LUi);
768 Inst.addOperand(MCOperand::createReg(Mips::GP));
769 Inst.addOperand(MCOperand::createExpr(HiExpr));
770 getStreamer().EmitInstruction(Inst, STI);
773 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
774 Inst.setOpcode(Mips::ADDiu);
775 Inst.addOperand(MCOperand::createReg(Mips::GP));
776 Inst.addOperand(MCOperand::createReg(Mips::GP));
777 Inst.addOperand(MCOperand::createExpr(LoExpr));
778 getStreamer().EmitInstruction(Inst, STI);
781 // daddu $gp, $gp, $funcreg
782 Inst.setOpcode(Mips::DADDu);
783 Inst.addOperand(MCOperand::createReg(Mips::GP));
784 Inst.addOperand(MCOperand::createReg(Mips::GP));
785 Inst.addOperand(MCOperand::createReg(RegNo));
786 getStreamer().EmitInstruction(Inst, STI);
788 forbidModuleDirective();
791 void MipsTargetELFStreamer::emitMipsAbiFlags() {
792 MCAssembler &MCA = getStreamer().getAssembler();
793 MCContext &Context = MCA.getContext();
794 MCStreamer &OS = getStreamer();
795 MCSectionELF *Sec = Context.getELFSection(
796 ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
797 MCA.registerSection(*Sec);
798 Sec->setAlignment(8);
799 OS.SwitchSection(Sec);
801 OS << ABIFlagsSection;
804 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
806 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
808 ABIFlagsSection.OddSPReg = Enabled;