lib/Target/R600/SIMachineFunctionInfo.cpp

   1 //===-- SIMachineFunctionInfo.cpp - SI Machine Function Info -------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 /// \file
   9 //===----------------------------------------------------------------------===//
  10
  11
  12 #include "SIMachineFunctionInfo.h"
  13 #include "SIRegisterInfo.h"
  14 #include "llvm/CodeGen/MachineRegisterInfo.h"
  15
  16 #define MAX_LANES 64
  17
  18 using namespace llvm;
  19
  20
  21 // Pin the vtable to this file.
  22 void SIMachineFunctionInfo::anchor() {}
  23
  24 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
  25   : AMDGPUMachineFunction(MF),
  26     PSInputAddr(0),
  27     SpillTracker() { }
  28
  29 static unsigned createLaneVGPR(MachineRegisterInfo &MRI) {
  30   return MRI.createVirtualRegister(&AMDGPU::VReg_32RegClass);
  31 }
  32
  33 unsigned SIMachineFunctionInfo::RegSpillTracker::getNextLane(MachineRegisterInfo &MRI) {
  34   if (!LaneVGPR) {
  35     LaneVGPR = createLaneVGPR(MRI);
  36   } else {
  37     CurrentLane++;
  38     if (CurrentLane == MAX_LANES) {
  39       CurrentLane = 0;
  40       LaneVGPR = createLaneVGPR(MRI);
  41     }
  42   }
  43   return CurrentLane;
  44 }
  45
  46 void SIMachineFunctionInfo::RegSpillTracker::addSpilledReg(unsigned FrameIndex,
  47                                                            unsigned Reg,
  48                                                            int Lane) {
  49   SpilledRegisters[FrameIndex] = SpilledReg(Reg, Lane);
  50 }
  51
  52 const SIMachineFunctionInfo::SpilledReg&
  53 SIMachineFunctionInfo::RegSpillTracker::getSpilledReg(unsigned FrameIndex) {
  54   return SpilledRegisters[FrameIndex];
  55 }