lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp

   1 //===-- RISCVELFObjectWriter.cpp - RISCV ELF Writer -----------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9
  10 #include "MCTargetDesc/RISCVFixupKinds.h"
  11 #include "MCTargetDesc/RISCVMCTargetDesc.h"
  12 #include "llvm/MC/MCELFObjectWriter.h"
  13 #include "llvm/MC/MCFixup.h"
  14 #include "llvm/MC/MCObjectWriter.h"
  15 #include "llvm/Support/ErrorHandling.h"
  16
  17 using namespace llvm;
  18
  19 namespace {
  20 class RISCVELFObjectWriter : public MCELFObjectTargetWriter {
  21 public:
  22   RISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit);
  23
  24   ~RISCVELFObjectWriter() override;
  25
  26 protected:
  27   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
  28                         const MCFixup &Fixup, bool IsPCRel) const override;
  29 };
  30 }
  31
  32 RISCVELFObjectWriter::RISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit)
  33     : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_RISCV,
  34                               /*HasRelocationAddend*/ true) {}
  35
  36 RISCVELFObjectWriter::~RISCVELFObjectWriter() {}
  37
  38 unsigned RISCVELFObjectWriter::getRelocType(MCContext &Ctx,
  39                                             const MCValue &Target,
  40                                             const MCFixup &Fixup,
  41                                             bool IsPCRel) const {
  42   // Determine the type of the relocation
  43   switch ((unsigned)Fixup.getKind()) {
  44   default:
  45     llvm_unreachable("invalid fixup kind!");
  46   case FK_Data_4:
  47     return ELF::R_RISCV_32;
  48   case FK_Data_8:
  49     return ELF::R_RISCV_64;
  50   case RISCV::fixup_riscv_hi20:
  51     return ELF::R_RISCV_HI20;
  52   case RISCV::fixup_riscv_lo12_i:
  53     return ELF::R_RISCV_LO12_I;
  54   case RISCV::fixup_riscv_lo12_s:
  55     return ELF::R_RISCV_LO12_S;
  56   case RISCV::fixup_riscv_pcrel_hi20:
  57     return ELF::R_RISCV_PCREL_HI20;
  58   case RISCV::fixup_riscv_pcrel_lo12_i:
  59     return ELF::R_RISCV_PCREL_LO12_I;
  60   case RISCV::fixup_riscv_pcrel_lo12_s:
  61     return ELF::R_RISCV_PCREL_LO12_S;
  62   case RISCV::fixup_riscv_jal:
  63     return ELF::R_RISCV_JAL;
  64   case RISCV::fixup_riscv_branch:
  65     return ELF::R_RISCV_BRANCH;
  66   case RISCV::fixup_riscv_rvc_jump:
  67     return ELF::R_RISCV_RVC_JUMP;
  68   case RISCV::fixup_riscv_rvc_branch:
  69     return ELF::R_RISCV_RVC_BRANCH;
  70   }
  71 }
  72
  73 std::unique_ptr<MCObjectWriter>
  74 llvm::createRISCVELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
  75                                  bool Is64Bit) {
  76   return createELFObjectWriter(
  77       llvm::make_unique<RISCVELFObjectWriter>(OSABI, Is64Bit), OS,
  78       /*IsLittleEndian=*/true);
  79 }