1 //===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Sparc implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "SparcFrameLowering.h"
15 #include "SparcInstrInfo.h"
16 #include "SparcMachineFunctionInfo.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineModuleInfo.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/IR/Function.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Target/TargetOptions.h"
30 DisableLeafProc("disable-sparc-leaf-proc",
32 cl::desc("Disable Sparc leaf procedure optimization."),
36 void SparcFrameLowering::emitPrologue(MachineFunction &MF) const {
37 SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
39 MachineBasicBlock &MBB = MF.front();
40 MachineFrameInfo *MFI = MF.getFrameInfo();
41 const SparcInstrInfo &TII =
42 *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
43 MachineBasicBlock::iterator MBBI = MBB.begin();
44 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
46 // Get the number of bytes to allocate from the FrameInfo
47 int NumBytes = (int) MFI->getStackSize();
49 unsigned SAVEri = SP::SAVEri;
50 unsigned SAVErr = SP::SAVErr;
51 if (FuncInfo->isLeafProc()) {
57 NumBytes = - SubTarget.getAdjustedFrameSize(NumBytes);
59 if (NumBytes >= -4096) {
60 BuildMI(MBB, MBBI, dl, TII.get(SAVEri), SP::O6)
61 .addReg(SP::O6).addImm(NumBytes);
63 // Emit this the hard way. This clobbers G1 which we always know is
65 unsigned OffHi = (unsigned)NumBytes >> 10U;
66 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
68 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
69 .addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
70 BuildMI(MBB, MBBI, dl, TII.get(SAVErr), SP::O6)
71 .addReg(SP::O6).addReg(SP::G1);
73 MachineModuleInfo &MMI = MF.getMMI();
74 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
75 MCSymbol *FrameLabel = MMI.getContext().CreateTempSymbol();
76 BuildMI(MBB, MBBI, dl, TII.get(SP::PROLOG_LABEL)).addSym(FrameLabel);
78 unsigned regFP = MRI->getDwarfRegNum(SP::I6, true);
80 // Emit ".cfi_def_cfa_register 30".
81 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(FrameLabel,
83 // Emit ".cfi_window_save".
84 MMI.addFrameInst(MCCFIInstruction::createWindowSave(FrameLabel));
86 unsigned regInRA = MRI->getDwarfRegNum(SP::I7, true);
87 unsigned regOutRA = MRI->getDwarfRegNum(SP::O7, true);
88 // Emit ".cfi_register 15, 31".
89 MMI.addFrameInst(MCCFIInstruction::createRegister(FrameLabel,
94 void SparcFrameLowering::
95 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
96 MachineBasicBlock::iterator I) const {
97 if (!hasReservedCallFrame(MF)) {
98 MachineInstr &MI = *I;
99 DebugLoc DL = MI.getDebugLoc();
100 int Size = MI.getOperand(0).getImm();
101 if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
103 const SparcInstrInfo &TII =
104 *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
106 BuildMI(MBB, I, DL, TII.get(SP::ADDri), SP::O6).addReg(SP::O6)
113 void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
114 MachineBasicBlock &MBB) const {
115 SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
116 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
117 const SparcInstrInfo &TII =
118 *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
119 DebugLoc dl = MBBI->getDebugLoc();
120 assert(MBBI->getOpcode() == SP::RETL &&
121 "Can only put epilog before 'retl' instruction!");
122 if (!FuncInfo->isLeafProc()) {
123 BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
127 MachineFrameInfo *MFI = MF.getFrameInfo();
129 int NumBytes = (int) MFI->getStackSize();
133 NumBytes = SubTarget.getAdjustedFrameSize(NumBytes);
135 if (NumBytes < 4096) {
136 BuildMI(MBB, MBBI, dl, TII.get(SP::ADDri), SP::O6)
137 .addReg(SP::O6).addImm(NumBytes);
139 // Emit this the hard way. This clobbers G1 which we always know is
141 unsigned OffHi = (unsigned)NumBytes >> 10U;
142 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
144 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
145 .addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
146 BuildMI(MBB, MBBI, dl, TII.get(SP::ADDrr), SP::O6)
147 .addReg(SP::O6).addReg(SP::G1);
151 bool SparcFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
152 // Reserve call frame if there are no variable sized objects on the stack.
153 return !MF.getFrameInfo()->hasVarSizedObjects();
156 // hasFP - Return true if the specified function should have a dedicated frame
157 // pointer register. This is true if the function has variable sized allocas or
158 // if frame pointer elimination is disabled.
159 bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
160 const MachineFrameInfo *MFI = MF.getFrameInfo();
161 return MF.getTarget().Options.DisableFramePointerElim(MF) ||
162 MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
166 static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI)
169 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
170 if (MRI->isPhysRegUsed(reg))
173 for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
174 if (MRI->isPhysRegUsed(reg))
180 bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
183 MachineRegisterInfo &MRI = MF.getRegInfo();
184 MachineFrameInfo *MFI = MF.getFrameInfo();
186 return !(MFI->hasCalls() // has calls
187 || MRI.isPhysRegUsed(SP::L0) // Too many registers needed
188 || MRI.isPhysRegUsed(SP::O6) // %SP is used
189 || hasFP(MF)); // need %FP
192 void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
194 MachineRegisterInfo &MRI = MF.getRegInfo();
196 // Remap %i[0-7] to %o[0-7].
197 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
198 if (!MRI.isPhysRegUsed(reg))
200 unsigned mapped_reg = (reg - SP::I0 + SP::O0);
201 assert(!MRI.isPhysRegUsed(mapped_reg));
203 // Replace I register with O register.
204 MRI.replaceRegWith(reg, mapped_reg);
206 // Mark the reg unused.
207 MRI.setPhysRegUnused(reg);
210 // Rewrite MBB's Live-ins.
211 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
213 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
214 if (!MBB->isLiveIn(reg))
216 MBB->removeLiveIn(reg);
217 MBB->addLiveIn(reg - SP::I0 + SP::O0);
221 assert(verifyLeafProcRegUse(&MRI));
223 MF.verify(0, "After LeafProc Remapping");
227 void SparcFrameLowering::processFunctionBeforeCalleeSavedScan
228 (MachineFunction &MF, RegScavenger *RS) const {
230 if (!DisableLeafProc && isLeafProc(MF)) {
231 SparcMachineFunctionInfo *MFI = MF.getInfo<SparcMachineFunctionInfo>();
232 MFI->setLeafProc(true);
234 remapRegsForLeafProc(MF);