libavcodec/vaapi_encode_h265.c

   1 /*
   2  * This file is part of FFmpeg.
   3  *
   4  * FFmpeg is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU Lesser General Public
   6  * License as published by the Free Software Foundation; either
   7  * version 2.1 of the License, or (at your option) any later version.
   8  *
   9  * FFmpeg is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * Lesser General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU Lesser General Public
  15  * License along with FFmpeg; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
  17  */
  18
  19 #include <va/va.h>
  20 #include <va/va_enc_hevc.h>
  21
  22 #include "libavutil/avassert.h"
  23 #include "libavutil/internal.h"
  24 #include "libavutil/opt.h"
  25 #include "libavutil/pixfmt.h"
  26
  27 #include "avcodec.h"
  28 #include "hevc.h"
  29 #include "internal.h"
  30 #include "put_bits.h"
  31 #include "vaapi_encode.h"
  32 #include "vaapi_encode_h26x.h"
  33
  34
  35 #define MAX_ST_REF_PIC_SETS  32
  36 #define MAX_DPB_PICS         16
  37 #define MAX_LAYERS            1
  38
  39
  40 typedef struct VAAPIEncodeH265STRPS {
  41     char inter_ref_pic_set_prediction_flag;
  42
  43     unsigned int num_negative_pics;
  44     unsigned int num_positive_pics;
  45
  46     unsigned int delta_poc_s0_minus1[MAX_DPB_PICS];
  47     char used_by_curr_pic_s0_flag[MAX_DPB_PICS];
  48
  49     unsigned int delta_poc_s1_minus1[MAX_DPB_PICS];
  50     char used_by_curr_pic_s1_flag[MAX_DPB_PICS];
  51 } VAAPIEncodeH265STRPS;
  52
  53 // This structure contains all possibly-useful per-sequence syntax elements
  54 // which are not already contained in the various VAAPI structures.
  55 typedef struct VAAPIEncodeH265MiscSequenceParams {
  56
  57     // Parameter set IDs.
  58     unsigned int video_parameter_set_id;
  59     unsigned int seq_parameter_set_id;
  60
  61     // Layering.
  62     unsigned int vps_max_layers_minus1;
  63     unsigned int vps_max_sub_layers_minus1;
  64     char vps_temporal_id_nesting_flag;
  65     unsigned int vps_max_layer_id;
  66     unsigned int vps_num_layer_sets_minus1;
  67     unsigned int sps_max_sub_layers_minus1;
  68     char sps_temporal_id_nesting_flag;
  69     char layer_id_included_flag[MAX_LAYERS][64];
  70
  71     // Profile/tier/level parameters.
  72     char general_profile_compatibility_flag[32];
  73     char general_progressive_source_flag;
  74     char general_interlaced_source_flag;
  75     char general_non_packed_constraint_flag;
  76     char general_frame_only_constraint_flag;
  77     char general_inbld_flag;
  78
  79     // Decode/display ordering parameters.
  80     unsigned int log2_max_pic_order_cnt_lsb_minus4;
  81     char vps_sub_layer_ordering_info_present_flag;
  82     unsigned int vps_max_dec_pic_buffering_minus1[MAX_LAYERS];
  83     unsigned int vps_max_num_reorder_pics[MAX_LAYERS];
  84     unsigned int vps_max_latency_increase_plus1[MAX_LAYERS];
  85     char sps_sub_layer_ordering_info_present_flag;
  86     unsigned int sps_max_dec_pic_buffering_minus1[MAX_LAYERS];
  87     unsigned int sps_max_num_reorder_pics[MAX_LAYERS];
  88     unsigned int sps_max_latency_increase_plus1[MAX_LAYERS];
  89
  90     // Timing information.
  91     char vps_timing_info_present_flag;
  92     unsigned int vps_num_units_in_tick;
  93     unsigned int vps_time_scale;
  94     char vps_poc_proportional_to_timing_flag;
  95     unsigned int vps_num_ticks_poc_diff_minus1;
  96
  97     // Cropping information.
  98     char conformance_window_flag;
  99     unsigned int conf_win_left_offset;
 100     unsigned int conf_win_right_offset;
 101     unsigned int conf_win_top_offset;
 102     unsigned int conf_win_bottom_offset;
 103
 104     // Short-term reference picture sets.
 105     unsigned int num_short_term_ref_pic_sets;
 106     VAAPIEncodeH265STRPS st_ref_pic_set[MAX_ST_REF_PIC_SETS];
 107
 108     // Long-term reference pictures.
 109     char long_term_ref_pics_present_flag;
 110     unsigned int num_long_term_ref_pics_sps;
 111     struct {
 112         unsigned int lt_ref_pic_poc_lsb_sps;
 113         char used_by_curr_pic_lt_sps_flag;
 114     } lt_ref_pic;
 115
 116     // Deblocking filter control.
 117     char deblocking_filter_control_present_flag;
 118     char deblocking_filter_override_enabled_flag;
 119     char pps_deblocking_filter_disabled_flag;
 120     int pps_beta_offset_div2;
 121     int pps_tc_offset_div2;
 122
 123     // Video Usability Information.
 124     char vui_parameters_present_flag;
 125     char aspect_ratio_info_present_flag;
 126     unsigned int aspect_ratio_idc;
 127     unsigned int sar_width;
 128     unsigned int sar_height;
 129     char video_signal_type_present_flag;
 130     unsigned int video_format;
 131     char video_full_range_flag;
 132     char colour_description_present_flag;
 133     unsigned int colour_primaries;
 134     unsigned int transfer_characteristics;
 135     unsigned int matrix_coeffs;
 136
 137     // Oddments.
 138     char uniform_spacing_flag;
 139     char output_flag_present_flag;
 140     char cabac_init_present_flag;
 141     unsigned int num_extra_slice_header_bits;
 142     char lists_modification_present_flag;
 143     char pps_slice_chroma_qp_offsets_present_flag;
 144     char pps_slice_chroma_offset_list_enabled_flag;
 145 } VAAPIEncodeH265MiscSequenceParams;
 146
 147 // This structure contains all possibly-useful per-slice syntax elements
 148 // which are not already contained in the various VAAPI structures.
 149 typedef struct VAAPIEncodeH265MiscSliceParams {
 150     // Slice segments.
 151     char first_slice_segment_in_pic_flag;
 152     unsigned int slice_segment_address;
 153
 154     // Short-term reference picture sets.
 155     char short_term_ref_pic_set_sps_flag;
 156     unsigned int short_term_ref_pic_idx;
 157     VAAPIEncodeH265STRPS st_ref_pic_set;
 158
 159     // Deblocking filter.
 160     char deblocking_filter_override_flag;
 161
 162     // Oddments.
 163     char slice_reserved_flag[8];
 164     char no_output_of_prior_pics_flag;
 165     char pic_output_flag;
 166 } VAAPIEncodeH265MiscSliceParams;
 167
 168 typedef struct VAAPIEncodeH265Slice {
 169     VAAPIEncodeH265MiscSliceParams misc_slice_params;
 170
 171     int64_t pic_order_cnt;
 172 } VAAPIEncodeH265Slice;
 173
 174 typedef struct VAAPIEncodeH265Context {
 175     VAAPIEncodeH265MiscSequenceParams misc_sequence_params;
 176
 177     unsigned int ctu_width;
 178     unsigned int ctu_height;
 179
 180     int fixed_qp_idr;
 181     int fixed_qp_p;
 182     int fixed_qp_b;
 183
 184     int64_t last_idr_frame;
 185
 186     // Rate control configuration.
 187     struct {
 188         VAEncMiscParameterBuffer misc;
 189         VAEncMiscParameterRateControl rc;
 190     } rc_params;
 191     struct {
 192         VAEncMiscParameterBuffer misc;
 193         VAEncMiscParameterHRD hrd;
 194     } hrd_params;
 195 } VAAPIEncodeH265Context;
 196
 197 typedef struct VAAPIEncodeH265Options {
 198     int qp;
 199 } VAAPIEncodeH265Options;
 200
 201
 202 #define vseq_var(name)     vseq->name, name
 203 #define vseq_field(name)   vseq->seq_fields.bits.name, name
 204 #define vpic_var(name)     vpic->name, name
 205 #define vpic_field(name)   vpic->pic_fields.bits.name, name
 206 #define vslice_var(name)   vslice->name, name
 207 #define vslice_field(name) vslice->slice_fields.bits.name, name
 208 #define mseq_var(name)     mseq->name, name
 209 #define mslice_var(name)   mslice->name, name
 210 #define mstrps_var(name)   mstrps->name, name
 211
 212 static void vaapi_encode_h265_write_nal_unit_header(PutBitContext *pbc,
 213                                                     int nal_unit_type)
 214 {
 215     u(1, 0, forbidden_zero_bit);
 216     u(6, nal_unit_type, nal_unit_type);
 217     u(6, 0, nuh_layer_id);
 218     u(3, 1, nuh_temporal_id_plus1);
 219 }
 220
 221 static void vaapi_encode_h265_write_rbsp_trailing_bits(PutBitContext *pbc)
 222 {
 223     u(1, 1, rbsp_stop_one_bit);
 224     while (put_bits_count(pbc) & 7)
 225         u(1, 0, rbsp_alignment_zero_bit);
 226 }
 227
 228 static void vaapi_encode_h265_write_profile_tier_level(PutBitContext *pbc,
 229                                                        VAAPIEncodeContext *ctx)
 230 {
 231     VAEncSequenceParameterBufferHEVC  *vseq = ctx->codec_sequence_params;
 232     VAAPIEncodeH265Context            *priv = ctx->priv_data;
 233     VAAPIEncodeH265MiscSequenceParams *mseq = &priv->misc_sequence_params;
 234     int j;
 235
 236     if (1) {
 237         u(2, 0, general_profile_space);
 238         u(1, vseq_var(general_tier_flag));
 239         u(5, vseq_var(general_profile_idc));
 240
 241         for (j = 0; j < 32; j++) {
 242             u(1, mseq_var(general_profile_compatibility_flag[j]));
 243         }
 244
 245         u(1, mseq_var(general_progressive_source_flag));
 246         u(1, mseq_var(general_interlaced_source_flag));
 247         u(1, mseq_var(general_non_packed_constraint_flag));
 248         u(1, mseq_var(general_frame_only_constraint_flag));
 249
 250         if (0) {
 251             // Not main profile.
 252             // Lots of extra constraint flags.
 253         } else {
 254             // put_bits only handles up to 31 bits.
 255             u(23, 0, general_reserved_zero_43bits);
 256             u(20, 0, general_reserved_zero_43bits);
 257         }
 258
 259         if (vseq->general_profile_idc >= 1 && vseq->general_profile_idc <= 5) {
 260             u(1, mseq_var(general_inbld_flag));
 261         } else {
 262             u(1, 0, general_reserved_zero_bit);
 263         }
 264     }
 265
 266     u(8, vseq_var(general_level_idc));
 267
 268     // No sublayers.
 269 }
 270
 271 static void vaapi_encode_h265_write_vps(PutBitContext *pbc,
 272                                         VAAPIEncodeContext *ctx)
 273 {
 274     VAAPIEncodeH265Context            *priv = ctx->priv_data;
 275     VAAPIEncodeH265MiscSequenceParams *mseq = &priv->misc_sequence_params;
 276     int i, j;
 277
 278     vaapi_encode_h265_write_nal_unit_header(pbc, HEVC_NAL_VPS);
 279
 280     u(4, mseq->video_parameter_set_id, vps_video_parameter_set_id);
 281
 282     u(1, 1, vps_base_layer_internal_flag);
 283     u(1, 1, vps_base_layer_available_flag);
 284     u(6, mseq_var(vps_max_layers_minus1));
 285     u(3, mseq_var(vps_max_sub_layers_minus1));
 286     u(1, mseq_var(vps_temporal_id_nesting_flag));
 287
 288     u(16, 0xffff, vps_reserved_0xffff_16bits);
 289
 290     vaapi_encode_h265_write_profile_tier_level(pbc, ctx);
 291
 292     u(1, mseq_var(vps_sub_layer_ordering_info_present_flag));
 293     for (i = (mseq->vps_sub_layer_ordering_info_present_flag ?
 294               0 : mseq->vps_max_sub_layers_minus1);
 295          i <= mseq->vps_max_sub_layers_minus1; i++) {
 296         ue(mseq_var(vps_max_dec_pic_buffering_minus1[i]));
 297         ue(mseq_var(vps_max_num_reorder_pics[i]));
 298         ue(mseq_var(vps_max_latency_increase_plus1[i]));
 299     }
 300
 301     u(6, mseq_var(vps_max_layer_id));
 302     ue(mseq_var(vps_num_layer_sets_minus1));
 303     for (i = 1; i <= mseq->vps_num_layer_sets_minus1; i++) {
 304         for (j = 0; j < mseq->vps_max_layer_id; j++)
 305             u(1, mseq_var(layer_id_included_flag[i][j]));
 306     }
 307
 308     u(1, mseq_var(vps_timing_info_present_flag));
 309     if (mseq->vps_timing_info_present_flag) {
 310         u(1, 0, put_bits_hack_zero_bit);
 311         u(31, mseq_var(vps_num_units_in_tick));
 312         u(1, 0, put_bits_hack_zero_bit);
 313         u(31, mseq_var(vps_time_scale));
 314         u(1, mseq_var(vps_poc_proportional_to_timing_flag));
 315         if (mseq->vps_poc_proportional_to_timing_flag) {
 316             ue(mseq_var(vps_num_ticks_poc_diff_minus1));
 317         }
 318         ue(0, vps_num_hrd_parameters);
 319     }
 320
 321     u(1, 0, vps_extension_flag);
 322
 323     vaapi_encode_h265_write_rbsp_trailing_bits(pbc);
 324 }
 325
 326 static void vaapi_encode_h265_write_st_ref_pic_set(PutBitContext *pbc,
 327                                                    int st_rps_idx,
 328                                                    VAAPIEncodeH265STRPS *mstrps)
 329 {
 330     int i;
 331
 332     if (st_rps_idx != 0)
 333        u(1, mstrps_var(inter_ref_pic_set_prediction_flag));
 334
 335     if (mstrps->inter_ref_pic_set_prediction_flag) {
 336         av_assert0(0 && "inter ref pic set prediction not supported");
 337     } else {
 338         ue(mstrps_var(num_negative_pics));
 339         ue(mstrps_var(num_positive_pics));
 340
 341         for (i = 0; i < mstrps->num_negative_pics; i++) {
 342             ue(mstrps_var(delta_poc_s0_minus1[i]));
 343             u(1, mstrps_var(used_by_curr_pic_s0_flag[i]));
 344         }
 345         for (i = 0; i < mstrps->num_positive_pics; i++) {
 346             ue(mstrps_var(delta_poc_s1_minus1[i]));
 347             u(1, mstrps_var(used_by_curr_pic_s1_flag[i]));
 348         }
 349     }
 350 }
 351
 352 static void vaapi_encode_h265_write_vui_parameters(PutBitContext *pbc,
 353                                                    VAAPIEncodeContext *ctx)
 354 {
 355     VAAPIEncodeH265Context            *priv = ctx->priv_data;
 356     VAAPIEncodeH265MiscSequenceParams *mseq = &priv->misc_sequence_params;
 357
 358     u(1, mseq_var(aspect_ratio_info_present_flag));
 359     if (mseq->aspect_ratio_info_present_flag) {
 360         u(8, mseq_var(aspect_ratio_idc));
 361         if (mseq->aspect_ratio_idc == 255) {
 362             u(16, mseq_var(sar_width));
 363             u(16, mseq_var(sar_height));
 364         }
 365     }
 366
 367     u(1, 0, overscan_info_present_flag);
 368
 369     u(1, mseq_var(video_signal_type_present_flag));
 370     if (mseq->video_signal_type_present_flag) {
 371         u(3, mseq_var(video_format));
 372         u(1, mseq_var(video_full_range_flag));
 373         u(1, mseq_var(colour_description_present_flag));
 374         if (mseq->colour_description_present_flag) {
 375             u(8, mseq_var(colour_primaries));
 376             u(8, mseq_var(transfer_characteristics));
 377             u(8, mseq_var(matrix_coeffs));
 378         }
 379     }
 380
 381     u(1, 0, chroma_loc_info_present_flag);
 382     u(1, 0, neutral_chroma_indication_flag);
 383     u(1, 0, field_seq_flag);
 384     u(1, 0, frame_field_info_present_flag);
 385     u(1, 0, default_display_window_flag);
 386     u(1, 0, vui_timing_info_present_flag);
 387     u(1, 0, bitstream_restriction_flag_flag);
 388 }
 389
 390 static void vaapi_encode_h265_write_sps(PutBitContext *pbc,
 391                                         VAAPIEncodeContext *ctx)
 392 {
 393     VAEncSequenceParameterBufferHEVC  *vseq = ctx->codec_sequence_params;
 394     VAAPIEncodeH265Context            *priv = ctx->priv_data;
 395     VAAPIEncodeH265MiscSequenceParams *mseq = &priv->misc_sequence_params;
 396     int i;
 397
 398     vaapi_encode_h265_write_nal_unit_header(pbc, HEVC_NAL_SPS);
 399
 400     u(4, mseq->video_parameter_set_id, sps_video_parameter_set_id);
 401
 402     u(3, mseq_var(sps_max_sub_layers_minus1));
 403     u(1, mseq_var(sps_temporal_id_nesting_flag));
 404
 405     vaapi_encode_h265_write_profile_tier_level(pbc, ctx);
 406
 407     ue(mseq->seq_parameter_set_id, sps_seq_parameter_set_id);
 408     ue(vseq_field(chroma_format_idc));
 409     if (vseq->seq_fields.bits.chroma_format_idc == 3)
 410         u(1, 0, separate_colour_plane_flag);
 411
 412     ue(vseq_var(pic_width_in_luma_samples));
 413     ue(vseq_var(pic_height_in_luma_samples));
 414
 415     u(1, mseq_var(conformance_window_flag));
 416     if (mseq->conformance_window_flag) {
 417         ue(mseq_var(conf_win_left_offset));
 418         ue(mseq_var(conf_win_right_offset));
 419         ue(mseq_var(conf_win_top_offset));
 420         ue(mseq_var(conf_win_bottom_offset));
 421     }
 422
 423     ue(vseq_field(bit_depth_luma_minus8));
 424     ue(vseq_field(bit_depth_chroma_minus8));
 425
 426     ue(mseq_var(log2_max_pic_order_cnt_lsb_minus4));
 427
 428     u(1, mseq_var(sps_sub_layer_ordering_info_present_flag));
 429     for (i = (mseq->sps_sub_layer_ordering_info_present_flag ?
 430               0 : mseq->sps_max_sub_layers_minus1);
 431          i <= mseq->sps_max_sub_layers_minus1; i++) {
 432         ue(mseq_var(sps_max_dec_pic_buffering_minus1[i]));
 433         ue(mseq_var(sps_max_num_reorder_pics[i]));
 434         ue(mseq_var(sps_max_latency_increase_plus1[i]));
 435     }
 436
 437     ue(vseq_var(log2_min_luma_coding_block_size_minus3));
 438     ue(vseq_var(log2_diff_max_min_luma_coding_block_size));
 439     ue(vseq_var(log2_min_transform_block_size_minus2));
 440     ue(vseq_var(log2_diff_max_min_transform_block_size));
 441     ue(vseq_var(max_transform_hierarchy_depth_inter));
 442     ue(vseq_var(max_transform_hierarchy_depth_intra));
 443
 444     u(1, vseq_field(scaling_list_enabled_flag));
 445     if (vseq->seq_fields.bits.scaling_list_enabled_flag) {
 446         u(1, 0, sps_scaling_list_data_present_flag);
 447     }
 448
 449     u(1, vseq_field(amp_enabled_flag));
 450     u(1, vseq_field(sample_adaptive_offset_enabled_flag));
 451
 452     u(1, vseq_field(pcm_enabled_flag));
 453     if (vseq->seq_fields.bits.pcm_enabled_flag) {
 454         u(4, vseq_var(pcm_sample_bit_depth_luma_minus1));
 455         u(4, vseq_var(pcm_sample_bit_depth_chroma_minus1));
 456         ue(vseq_var(log2_min_pcm_luma_coding_block_size_minus3));
 457         ue(vseq->log2_max_pcm_luma_coding_block_size_minus3 -
 458            vseq->log2_min_pcm_luma_coding_block_size_minus3,
 459            log2_diff_max_min_pcm_luma_coding_block_size);
 460         u(1, vseq_field(pcm_loop_filter_disabled_flag));
 461     }
 462
 463     ue(mseq_var(num_short_term_ref_pic_sets));
 464     for (i = 0; i < mseq->num_short_term_ref_pic_sets; i++)
 465         vaapi_encode_h265_write_st_ref_pic_set(pbc, i,
 466                                                &mseq->st_ref_pic_set[i]);
 467
 468     u(1, mseq_var(long_term_ref_pics_present_flag));
 469     if (mseq->long_term_ref_pics_present_flag) {
 470         ue(0, num_long_term_ref_pics_sps);
 471     }
 472
 473     u(1, vseq_field(sps_temporal_mvp_enabled_flag));
 474     u(1, vseq_field(strong_intra_smoothing_enabled_flag));
 475
 476     u(1, mseq_var(vui_parameters_present_flag));
 477     if (mseq->vui_parameters_present_flag) {
 478         vaapi_encode_h265_write_vui_parameters(pbc, ctx);
 479     }
 480
 481     u(1, 0, sps_extension_present_flag);
 482
 483     vaapi_encode_h265_write_rbsp_trailing_bits(pbc);
 484 }
 485
 486 static void vaapi_encode_h265_write_pps(PutBitContext *pbc,
 487                                         VAAPIEncodeContext *ctx)
 488 {
 489     VAEncPictureParameterBufferHEVC   *vpic = ctx->codec_picture_params;
 490     VAAPIEncodeH265Context            *priv = ctx->priv_data;
 491     VAAPIEncodeH265MiscSequenceParams *mseq = &priv->misc_sequence_params;
 492     int i;
 493
 494     vaapi_encode_h265_write_nal_unit_header(pbc, HEVC_NAL_PPS);
 495
 496     ue(vpic->slice_pic_parameter_set_id, pps_pic_parameter_set_id);
 497     ue(mseq->seq_parameter_set_id, pps_seq_parameter_set_id);
 498
 499     u(1, vpic_field(dependent_slice_segments_enabled_flag));
 500     u(1, mseq_var(output_flag_present_flag));
 501     u(3, mseq_var(num_extra_slice_header_bits));
 502     u(1, vpic_field(sign_data_hiding_enabled_flag));
 503     u(1, mseq_var(cabac_init_present_flag));
 504
 505     ue(vpic_var(num_ref_idx_l0_default_active_minus1));
 506     ue(vpic_var(num_ref_idx_l1_default_active_minus1));
 507
 508     se(vpic->pic_init_qp - 26, init_qp_minus26);
 509
 510     u(1, vpic_field(constrained_intra_pred_flag));
 511     u(1, vpic_field(transform_skip_enabled_flag));
 512
 513     u(1, vpic_field(cu_qp_delta_enabled_flag));
 514     if (vpic->pic_fields.bits.cu_qp_delta_enabled_flag)
 515         ue(vpic_var(diff_cu_qp_delta_depth));
 516
 517     se(vpic_var(pps_cb_qp_offset));
 518     se(vpic_var(pps_cr_qp_offset));
 519
 520     u(1, mseq_var(pps_slice_chroma_qp_offsets_present_flag));
 521     u(1, vpic_field(weighted_pred_flag));
 522     u(1, vpic_field(weighted_bipred_flag));
 523     u(1, vpic_field(transquant_bypass_enabled_flag));
 524     u(1, vpic_field(tiles_enabled_flag));
 525     u(1, vpic_field(entropy_coding_sync_enabled_flag));
 526
 527     if (vpic->pic_fields.bits.tiles_enabled_flag) {
 528         ue(vpic_var(num_tile_columns_minus1));
 529         ue(vpic_var(num_tile_rows_minus1));
 530         u(1, mseq_var(uniform_spacing_flag));
 531         if (!mseq->uniform_spacing_flag) {
 532             for (i = 0; i < vpic->num_tile_columns_minus1; i++)
 533                 ue(vpic_var(column_width_minus1[i]));
 534             for (i = 0; i < vpic->num_tile_rows_minus1; i++)
 535                 ue(vpic_var(row_height_minus1[i]));
 536         }
 537         u(1, vpic_field(loop_filter_across_tiles_enabled_flag));
 538     }
 539
 540     u(1, vpic_field(pps_loop_filter_across_slices_enabled_flag));
 541     u(1, mseq_var(deblocking_filter_control_present_flag));
 542     if (mseq->deblocking_filter_control_present_flag) {
 543         u(1, mseq_var(deblocking_filter_override_enabled_flag));
 544         u(1, mseq_var(pps_deblocking_filter_disabled_flag));
 545         if (!mseq->pps_deblocking_filter_disabled_flag) {
 546             se(mseq_var(pps_beta_offset_div2));
 547             se(mseq_var(pps_tc_offset_div2));
 548         }
 549     }
 550
 551     u(1, 0, pps_scaling_list_data_present_flag);
 552     // No scaling list data.
 553
 554     u(1, mseq_var(lists_modification_present_flag));
 555     ue(vpic_var(log2_parallel_merge_level_minus2));
 556     u(1, 0, slice_segment_header_extension_present_flag);
 557     u(1, 0, pps_extension_present_flag);
 558
 559     vaapi_encode_h265_write_rbsp_trailing_bits(pbc);
 560 }
 561
 562 static void vaapi_encode_h265_write_slice_header2(PutBitContext *pbc,
 563                                                   VAAPIEncodeContext *ctx,
 564                                                   VAAPIEncodePicture *pic,
 565                                                   VAAPIEncodeSlice *slice)
 566 {
 567     VAEncSequenceParameterBufferHEVC  *vseq = ctx->codec_sequence_params;
 568     VAEncPictureParameterBufferHEVC   *vpic = pic->codec_picture_params;
 569     VAEncSliceParameterBufferHEVC   *vslice = slice->codec_slice_params;
 570     VAAPIEncodeH265Context            *priv = ctx->priv_data;
 571     VAAPIEncodeH265MiscSequenceParams *mseq = &priv->misc_sequence_params;
 572     VAAPIEncodeH265Slice            *pslice = slice->priv_data;
 573     VAAPIEncodeH265MiscSliceParams  *mslice = &pslice->misc_slice_params;
 574     int i;
 575
 576     vaapi_encode_h265_write_nal_unit_header(pbc, vpic->nal_unit_type);
 577
 578     u(1, mslice_var(first_slice_segment_in_pic_flag));
 579     if (vpic->nal_unit_type >= HEVC_NAL_BLA_W_LP &&
 580        vpic->nal_unit_type <= 23)
 581         u(1, mslice_var(no_output_of_prior_pics_flag));
 582
 583     ue(vslice_var(slice_pic_parameter_set_id));
 584
 585     if (!mslice->first_slice_segment_in_pic_flag) {
 586         if (vpic->pic_fields.bits.dependent_slice_segments_enabled_flag)
 587             u(1, vslice_field(dependent_slice_segment_flag));
 588         u(av_log2((priv->ctu_width * priv->ctu_height) - 1) + 1,
 589           mslice_var(slice_segment_address));
 590     }
 591     if (!vslice->slice_fields.bits.dependent_slice_segment_flag) {
 592         for (i = 0; i < mseq->num_extra_slice_header_bits; i++)
 593             u(1, mslice_var(slice_reserved_flag[i]));
 594
 595         ue(vslice_var(slice_type));
 596         if (mseq->output_flag_present_flag)
 597             u(1, 1, pic_output_flag);
 598         if (vseq->seq_fields.bits.separate_colour_plane_flag)
 599             u(2, vslice_field(colour_plane_id));
 600         if (vpic->nal_unit_type != HEVC_NAL_IDR_W_RADL &&
 601            vpic->nal_unit_type != HEVC_NAL_IDR_N_LP) {
 602             u(4 + mseq->log2_max_pic_order_cnt_lsb_minus4,
 603               (pslice->pic_order_cnt &
 604                ((1 << (mseq->log2_max_pic_order_cnt_lsb_minus4 + 4)) - 1)),
 605               slice_pic_order_cnt_lsb);
 606
 607             u(1, mslice_var(short_term_ref_pic_set_sps_flag));
 608             if (!mslice->short_term_ref_pic_set_sps_flag) {
 609                 vaapi_encode_h265_write_st_ref_pic_set(pbc, mseq->num_short_term_ref_pic_sets,
 610                                                        &mslice->st_ref_pic_set);
 611             } else if (mseq->num_short_term_ref_pic_sets > 1) {
 612                 u(av_log2(mseq->num_short_term_ref_pic_sets - 1) + 1,
 613                   mslice_var(short_term_ref_pic_idx));
 614             }
 615
 616             if (mseq->long_term_ref_pics_present_flag) {
 617                 av_assert0(0);
 618             }
 619         }
 620
 621         if (vseq->seq_fields.bits.sps_temporal_mvp_enabled_flag) {
 622             u(1, vslice_field(slice_temporal_mvp_enabled_flag));
 623         }
 624
 625         if (vseq->seq_fields.bits.sample_adaptive_offset_enabled_flag) {
 626             u(1, vslice_field(slice_sao_luma_flag));
 627             if (!vseq->seq_fields.bits.separate_colour_plane_flag &&
 628                 vseq->seq_fields.bits.chroma_format_idc != 0) {
 629                 u(1, vslice_field(slice_sao_chroma_flag));
 630             }
 631         }
 632
 633         if (vslice->slice_type == HEVC_SLICE_P || vslice->slice_type == HEVC_SLICE_B) {
 634             u(1, vslice_field(num_ref_idx_active_override_flag));
 635             if (vslice->slice_fields.bits.num_ref_idx_active_override_flag) {
 636                 ue(vslice_var(num_ref_idx_l0_active_minus1));
 637                 if (vslice->slice_type == HEVC_SLICE_B) {
 638                     ue(vslice_var(num_ref_idx_l1_active_minus1));
 639                 }
 640             }
 641
 642             if (mseq->lists_modification_present_flag) {
 643                 av_assert0(0);
 644                 // ref_pic_lists_modification()
 645             }
 646             if (vslice->slice_type == HEVC_SLICE_B) {
 647                 u(1, vslice_field(mvd_l1_zero_flag));
 648             }
 649             if (mseq->cabac_init_present_flag) {
 650                 u(1, vslice_field(cabac_init_flag));
 651             }
 652             if (vslice->slice_fields.bits.slice_temporal_mvp_enabled_flag) {
 653                 if (vslice->slice_type == HEVC_SLICE_B)
 654                     u(1, vslice_field(collocated_from_l0_flag));
 655                 ue(vpic->collocated_ref_pic_index, collocated_ref_idx);
 656             }
 657             if ((vpic->pic_fields.bits.weighted_pred_flag &&
 658                  vslice->slice_type == HEVC_SLICE_P) ||
 659                 (vpic->pic_fields.bits.weighted_bipred_flag &&
 660                  vslice->slice_type == HEVC_SLICE_B)) {
 661                 av_assert0(0);
 662                 // pred_weight_table()
 663             }
 664             ue(5 - vslice->max_num_merge_cand, five_minus_max_num_merge_cand);
 665         }
 666
 667         se(vslice_var(slice_qp_delta));
 668         if (mseq->pps_slice_chroma_qp_offsets_present_flag) {
 669             se(vslice_var(slice_cb_qp_offset));
 670             se(vslice_var(slice_cr_qp_offset));
 671         }
 672         if (mseq->pps_slice_chroma_offset_list_enabled_flag) {
 673             u(1, 0, cu_chroma_qp_offset_enabled_flag);
 674         }
 675         if (mseq->deblocking_filter_override_enabled_flag) {
 676             u(1, mslice_var(deblocking_filter_override_flag));
 677         }
 678         if (mslice->deblocking_filter_override_flag) {
 679             u(1, vslice_field(slice_deblocking_filter_disabled_flag));
 680             if (!vslice->slice_fields.bits.slice_deblocking_filter_disabled_flag) {
 681                 se(vslice_var(slice_beta_offset_div2));
 682                 se(vslice_var(slice_tc_offset_div2));
 683             }
 684         }
 685         if (vpic->pic_fields.bits.pps_loop_filter_across_slices_enabled_flag &&
 686             (vslice->slice_fields.bits.slice_sao_luma_flag ||
 687              vslice->slice_fields.bits.slice_sao_chroma_flag ||
 688              vslice->slice_fields.bits.slice_deblocking_filter_disabled_flag)) {
 689             u(1, vslice_field(slice_loop_filter_across_slices_enabled_flag));
 690         }
 691
 692         if (vpic->pic_fields.bits.tiles_enabled_flag ||
 693             vpic->pic_fields.bits.entropy_coding_sync_enabled_flag) {
 694             // num_entry_point_offsets
 695         }
 696
 697         if (0) {
 698             // slice_segment_header_extension_length
 699         }
 700     }
 701
 702     u(1, 1, alignment_bit_equal_to_one);
 703     while (put_bits_count(pbc) & 7)
 704         u(1, 0, alignment_bit_equal_to_zero);
 705 }
 706
 707 static int vaapi_encode_h265_write_sequence_header(AVCodecContext *avctx,
 708                                                    char *data, size_t *data_len)
 709 {
 710     VAAPIEncodeContext *ctx = avctx->priv_data;
 711     PutBitContext pbc;
 712     char tmp[256];
 713     int err;
 714     size_t nal_len, bit_len, bit_pos, next_len;
 715
 716     bit_len = *data_len;
 717     bit_pos = 0;
 718
 719     init_put_bits(&pbc, tmp, sizeof(tmp));
 720     vaapi_encode_h265_write_vps(&pbc, ctx);
 721     nal_len = put_bits_count(&pbc);
 722     flush_put_bits(&pbc);
 723
 724     next_len = bit_len - bit_pos;
 725     err = ff_vaapi_encode_h26x_nal_unit_to_byte_stream(data + bit_pos / 8,
 726                                                        &next_len,
 727                                                        tmp, nal_len);
 728     if (err < 0)
 729         return err;
 730     bit_pos += next_len;
 731
 732     init_put_bits(&pbc, tmp, sizeof(tmp));
 733     vaapi_encode_h265_write_sps(&pbc, ctx);
 734     nal_len = put_bits_count(&pbc);
 735     flush_put_bits(&pbc);
 736
 737     next_len = bit_len - bit_pos;
 738     err = ff_vaapi_encode_h26x_nal_unit_to_byte_stream(data + bit_pos / 8,
 739                                                        &next_len,
 740                                                        tmp, nal_len);
 741     if (err < 0)
 742         return err;
 743     bit_pos += next_len;
 744
 745     init_put_bits(&pbc, tmp, sizeof(tmp));
 746     vaapi_encode_h265_write_pps(&pbc, ctx);
 747     nal_len = put_bits_count(&pbc);
 748     flush_put_bits(&pbc);
 749
 750     next_len = bit_len - bit_pos;
 751     err = ff_vaapi_encode_h26x_nal_unit_to_byte_stream(data + bit_pos / 8,
 752                                                        &next_len,
 753                                                        tmp, nal_len);
 754     if (err < 0)
 755         return err;
 756     bit_pos += next_len;
 757
 758     *data_len = bit_pos;
 759     return 0;
 760 }
 761
 762 static int vaapi_encode_h265_write_slice_header(AVCodecContext *avctx,
 763                                                 VAAPIEncodePicture *pic,
 764                                                 VAAPIEncodeSlice *slice,
 765                                                 char *data, size_t *data_len)
 766 {
 767     VAAPIEncodeContext *ctx = avctx->priv_data;
 768     PutBitContext pbc;
 769     char tmp[256];
 770     size_t header_len;
 771
 772     init_put_bits(&pbc, tmp, sizeof(tmp));
 773     vaapi_encode_h265_write_slice_header2(&pbc, ctx, pic, slice);
 774     header_len = put_bits_count(&pbc);
 775     flush_put_bits(&pbc);
 776
 777     return ff_vaapi_encode_h26x_nal_unit_to_byte_stream(data, data_len,
 778                                                         tmp, header_len);
 779 }
 780
 781 static int vaapi_encode_h265_init_sequence_params(AVCodecContext *avctx)
 782 {
 783     VAAPIEncodeContext                 *ctx = avctx->priv_data;
 784     VAEncSequenceParameterBufferHEVC  *vseq = ctx->codec_sequence_params;
 785     VAEncPictureParameterBufferHEVC   *vpic = ctx->codec_picture_params;
 786     VAAPIEncodeH265Context            *priv = ctx->priv_data;
 787     VAAPIEncodeH265MiscSequenceParams *mseq = &priv->misc_sequence_params;
 788     int i;
 789
 790     {
 791         // general_profile_space == 0.
 792         vseq->general_profile_idc = 1; // Main profile (ctx->codec_profile?)
 793         vseq->general_tier_flag = 0;
 794
 795         vseq->general_level_idc = avctx->level * 3;
 796
 797         vseq->intra_period = 0;
 798         vseq->intra_idr_period = 0;
 799         vseq->ip_period = 0;
 800
 801         vseq->pic_width_in_luma_samples  = ctx->surface_width;
 802         vseq->pic_height_in_luma_samples = ctx->surface_height;
 803
 804         vseq->seq_fields.bits.chroma_format_idc = 1; // 4:2:0.
 805         vseq->seq_fields.bits.separate_colour_plane_flag = 0;
 806         vseq->seq_fields.bits.bit_depth_luma_minus8 =
 807             avctx->profile == FF_PROFILE_HEVC_MAIN_10 ? 2 : 0;
 808         vseq->seq_fields.bits.bit_depth_chroma_minus8 =
 809             avctx->profile == FF_PROFILE_HEVC_MAIN_10 ? 2 : 0;
 810         // Other misc flags all zero.
 811
 812         // These have to come from the capabilities of the encoder.  We have
 813         // no way to query it, so just hardcode ones which worked for me...
 814         // CTB size from 8x8 to 32x32.
 815         vseq->log2_min_luma_coding_block_size_minus3 = 0;
 816         vseq->log2_diff_max_min_luma_coding_block_size = 2;
 817         // Transform size from 4x4 to 32x32.
 818         vseq->log2_min_transform_block_size_minus2 = 0;
 819         vseq->log2_diff_max_min_transform_block_size = 3;
 820         // Full transform hierarchy allowed (2-5).
 821         vseq->max_transform_hierarchy_depth_inter = 3;
 822         vseq->max_transform_hierarchy_depth_intra = 3;
 823
 824         vseq->vui_parameters_present_flag = 0;
 825
 826         vseq->bits_per_second = avctx->bit_rate;
 827         if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
 828             vseq->vui_num_units_in_tick = avctx->framerate.den;
 829             vseq->vui_time_scale        = avctx->framerate.num;
 830         } else {
 831             vseq->vui_num_units_in_tick = avctx->time_base.num;
 832             vseq->vui_time_scale        = avctx->time_base.den;
 833         }
 834
 835         vseq->intra_period     = ctx->p_per_i * (ctx->b_per_p + 1);
 836         vseq->intra_idr_period = vseq->intra_period;
 837         vseq->ip_period        = ctx->b_per_p + 1;
 838     }
 839
 840     {
 841         vpic->decoded_curr_pic.picture_id = VA_INVALID_ID;
 842         vpic->decoded_curr_pic.flags      = VA_PICTURE_HEVC_INVALID;
 843
 844         for (i = 0; i < FF_ARRAY_ELEMS(vpic->reference_frames); i++) {
 845             vpic->reference_frames[i].picture_id = VA_INVALID_ID;
 846             vpic->reference_frames[i].flags      = VA_PICTURE_HEVC_INVALID;
 847         }
 848
 849         vpic->collocated_ref_pic_index = 0xff;
 850
 851         vpic->last_picture = 0;
 852
 853         vpic->pic_init_qp = priv->fixed_qp_idr;
 854
 855         vpic->diff_cu_qp_delta_depth = 0;
 856         vpic->pps_cb_qp_offset = 0;
 857         vpic->pps_cr_qp_offset = 0;
 858
 859         // tiles_enabled_flag == 0, so ignore num_tile_(rows|columns)_minus1.
 860
 861         vpic->log2_parallel_merge_level_minus2 = 0;
 862
 863         // No limit on size.
 864         vpic->ctu_max_bitsize_allowed = 0;
 865
 866         vpic->num_ref_idx_l0_default_active_minus1 = 0;
 867         vpic->num_ref_idx_l1_default_active_minus1 = 0;
 868
 869         vpic->slice_pic_parameter_set_id = 0;
 870
 871         vpic->pic_fields.bits.screen_content_flag = 0;
 872         vpic->pic_fields.bits.enable_gpu_weighted_prediction = 0;
 873
 874         // Per-CU QP changes are required for non-constant-QP modes.
 875         vpic->pic_fields.bits.cu_qp_delta_enabled_flag =
 876             ctx->va_rc_mode != VA_RC_CQP;
 877     }
 878
 879     {
 880         mseq->video_parameter_set_id = 5;
 881         mseq->seq_parameter_set_id = 5;
 882
 883         mseq->vps_max_layers_minus1 = 0;
 884         mseq->vps_max_sub_layers_minus1 = 0;
 885         mseq->vps_temporal_id_nesting_flag = 1;
 886         mseq->sps_max_sub_layers_minus1 = 0;
 887         mseq->sps_temporal_id_nesting_flag = 1;
 888
 889         for (i = 0; i < 32; i++) {
 890             mseq->general_profile_compatibility_flag[i] =
 891                 (i == vseq->general_profile_idc);
 892         }
 893
 894         mseq->general_progressive_source_flag    = 1;
 895         mseq->general_interlaced_source_flag     = 0;
 896         mseq->general_non_packed_constraint_flag = 0;
 897         mseq->general_frame_only_constraint_flag = 1;
 898         mseq->general_inbld_flag = 0;
 899
 900         mseq->log2_max_pic_order_cnt_lsb_minus4 = 8;
 901         mseq->vps_sub_layer_ordering_info_present_flag = 0;
 902         mseq->vps_max_dec_pic_buffering_minus1[0] = (avctx->max_b_frames > 0) + 1;
 903         mseq->vps_max_num_reorder_pics[0]         = (avctx->max_b_frames > 0);
 904         mseq->vps_max_latency_increase_plus1[0]   = 0;
 905         mseq->sps_sub_layer_ordering_info_present_flag = 0;
 906         mseq->sps_max_dec_pic_buffering_minus1[0] = (avctx->max_b_frames > 0) + 1;
 907         mseq->sps_max_num_reorder_pics[0]         = (avctx->max_b_frames > 0);
 908         mseq->sps_max_latency_increase_plus1[0]   = 0;
 909
 910         mseq->vps_timing_info_present_flag = 1;
 911         mseq->vps_num_units_in_tick = avctx->time_base.num;
 912         mseq->vps_time_scale        = avctx->time_base.den;
 913         mseq->vps_poc_proportional_to_timing_flag = 1;
 914         mseq->vps_num_ticks_poc_diff_minus1 = 0;
 915
 916         if (avctx->width  != ctx->surface_width ||
 917             avctx->height != ctx->surface_height) {
 918             mseq->conformance_window_flag = 1;
 919             mseq->conf_win_left_offset   = 0;
 920             mseq->conf_win_right_offset  =
 921                 (ctx->surface_width - avctx->width) / 2;
 922             mseq->conf_win_top_offset    = 0;
 923             mseq->conf_win_bottom_offset =
 924                 (ctx->surface_height - avctx->height) / 2;
 925         } else {
 926             mseq->conformance_window_flag = 0;
 927         }
 928
 929         mseq->num_short_term_ref_pic_sets = 0;
 930         // STRPSs should ideally be here rather than repeated in each slice.
 931
 932         mseq->vui_parameters_present_flag = 1;
 933         if (avctx->sample_aspect_ratio.num != 0) {
 934             mseq->aspect_ratio_info_present_flag = 1;
 935             if (avctx->sample_aspect_ratio.num ==
 936                 avctx->sample_aspect_ratio.den) {
 937                 mseq->aspect_ratio_idc = 1;
 938             } else {
 939                 mseq->aspect_ratio_idc = 255; // Extended SAR.
 940                 mseq->sar_width  = avctx->sample_aspect_ratio.num;
 941                 mseq->sar_height = avctx->sample_aspect_ratio.den;
 942             }
 943         }
 944         if (1) {
 945             // Should this be conditional on some of these being set?
 946             mseq->video_signal_type_present_flag = 1;
 947             mseq->video_format = 5; // Unspecified.
 948             mseq->video_full_range_flag = 0;
 949             mseq->colour_description_present_flag = 1;
 950             mseq->colour_primaries = avctx->color_primaries;
 951             mseq->transfer_characteristics = avctx->color_trc;
 952             mseq->matrix_coeffs = avctx->colorspace;
 953         }
 954     }
 955
 956     return 0;
 957 }
 958
 959 static int vaapi_encode_h265_init_picture_params(AVCodecContext *avctx,
 960                                                  VAAPIEncodePicture *pic)
 961 {
 962     VAAPIEncodeContext               *ctx = avctx->priv_data;
 963     VAEncPictureParameterBufferHEVC *vpic = pic->codec_picture_params;
 964     VAAPIEncodeH265Context          *priv = ctx->priv_data;
 965     int i;
 966
 967     if (pic->type == PICTURE_TYPE_IDR) {
 968         av_assert0(pic->display_order == pic->encode_order);
 969         priv->last_idr_frame = pic->display_order;
 970     } else {
 971         av_assert0(pic->encode_order > priv->last_idr_frame);
 972         // Display order need not be if we have RA[SD]L pictures, though.
 973     }
 974
 975     vpic->decoded_curr_pic.picture_id    = pic->recon_surface;
 976     vpic->decoded_curr_pic.pic_order_cnt =
 977         pic->display_order - priv->last_idr_frame;
 978     vpic->decoded_curr_pic.flags         = 0;
 979
 980     for (i = 0; i < pic->nb_refs; i++) {
 981         VAAPIEncodePicture *ref = pic->refs[i];
 982         av_assert0(ref);
 983         vpic->reference_frames[i].picture_id    = ref->recon_surface;
 984         vpic->reference_frames[i].pic_order_cnt =
 985             ref->display_order - priv->last_idr_frame;
 986         vpic->reference_frames[i].flags =
 987             (ref->display_order < pic->display_order ?
 988              VA_PICTURE_HEVC_RPS_ST_CURR_BEFORE : 0) |
 989             (ref->display_order > pic->display_order ?
 990              VA_PICTURE_HEVC_RPS_ST_CURR_AFTER  : 0);
 991     }
 992     for (; i < FF_ARRAY_ELEMS(vpic->reference_frames); i++) {
 993         vpic->reference_frames[i].picture_id = VA_INVALID_ID;
 994         vpic->reference_frames[i].flags      = VA_PICTURE_HEVC_INVALID;
 995     }
 996
 997     vpic->coded_buf = pic->output_buffer;
 998
 999     switch (pic->type) {
1000     case PICTURE_TYPE_IDR:
1001         vpic->nal_unit_type = HEVC_NAL_IDR_W_RADL;
1002         vpic->pic_fields.bits.idr_pic_flag = 1;
1003         vpic->pic_fields.bits.coding_type  = 1;
1004         vpic->pic_fields.bits.reference_pic_flag = 1;
1005         break;
1006     case PICTURE_TYPE_I:
1007         vpic->nal_unit_type = HEVC_NAL_TRAIL_R;
1008         vpic->pic_fields.bits.idr_pic_flag = 0;
1009         vpic->pic_fields.bits.coding_type  = 1;
1010         vpic->pic_fields.bits.reference_pic_flag = 1;
1011         break;
1012     case PICTURE_TYPE_P:
1013         vpic->nal_unit_type = HEVC_NAL_TRAIL_R;
1014         vpic->pic_fields.bits.idr_pic_flag = 0;
1015         vpic->pic_fields.bits.coding_type  = 2;
1016         vpic->pic_fields.bits.reference_pic_flag = 1;
1017         break;
1018     case PICTURE_TYPE_B:
1019         vpic->nal_unit_type = HEVC_NAL_TRAIL_R;
1020         vpic->pic_fields.bits.idr_pic_flag = 0;
1021         vpic->pic_fields.bits.coding_type  = 3;
1022         vpic->pic_fields.bits.reference_pic_flag = 0;
1023         break;
1024     default:
1025         av_assert0(0 && "invalid picture type");
1026     }
1027
1028     pic->nb_slices = 1;
1029
1030     return 0;
1031 }
1032
1033 static int vaapi_encode_h265_init_slice_params(AVCodecContext *avctx,
1034                                                VAAPIEncodePicture *pic,
1035                                                VAAPIEncodeSlice *slice)
1036 {
1037     VAAPIEncodeContext                *ctx = avctx->priv_data;
1038     VAEncPictureParameterBufferHEVC  *vpic = pic->codec_picture_params;
1039     VAEncSliceParameterBufferHEVC  *vslice = slice->codec_slice_params;
1040     VAAPIEncodeH265Context           *priv = ctx->priv_data;
1041     VAAPIEncodeH265Slice           *pslice;
1042     VAAPIEncodeH265MiscSliceParams *mslice;
1043     int i;
1044
1045     slice->priv_data = av_mallocz(sizeof(*pslice));
1046     if (!slice->priv_data)
1047         return AVERROR(ENOMEM);
1048     pslice = slice->priv_data;
1049     mslice = &pslice->misc_slice_params;
1050
1051     // Currently we only support one slice per frame.
1052     vslice->slice_segment_address = 0;
1053     vslice->num_ctu_in_slice = priv->ctu_width * priv->ctu_height;
1054
1055     switch (pic->type) {
1056     case PICTURE_TYPE_IDR:
1057     case PICTURE_TYPE_I:
1058         vslice->slice_type = HEVC_SLICE_I;
1059         break;
1060     case PICTURE_TYPE_P:
1061         vslice->slice_type = HEVC_SLICE_P;
1062         break;
1063     case PICTURE_TYPE_B:
1064         vslice->slice_type = HEVC_SLICE_B;
1065         break;
1066     default:
1067         av_assert0(0 && "invalid picture type");
1068     }
1069
1070     vslice->slice_pic_parameter_set_id = vpic->slice_pic_parameter_set_id;
1071
1072     pslice->pic_order_cnt = pic->display_order - priv->last_idr_frame;
1073
1074     for (i = 0; i < FF_ARRAY_ELEMS(vslice->ref_pic_list0); i++) {
1075         vslice->ref_pic_list0[i].picture_id = VA_INVALID_ID;
1076         vslice->ref_pic_list0[i].flags      = VA_PICTURE_HEVC_INVALID;
1077         vslice->ref_pic_list1[i].picture_id = VA_INVALID_ID;
1078         vslice->ref_pic_list1[i].flags      = VA_PICTURE_HEVC_INVALID;
1079     }
1080
1081     av_assert0(pic->nb_refs <= 2);
1082     if (pic->nb_refs >= 1) {
1083         // Backward reference for P- or B-frame.
1084         av_assert0(pic->type == PICTURE_TYPE_P ||
1085                    pic->type == PICTURE_TYPE_B);
1086
1087         vslice->num_ref_idx_l0_active_minus1 = 0;
1088         vslice->ref_pic_list0[0] = vpic->reference_frames[0];
1089     }
1090     if (pic->nb_refs >= 2) {
1091         // Forward reference for B-frame.
1092         av_assert0(pic->type == PICTURE_TYPE_B);
1093
1094         vslice->num_ref_idx_l1_active_minus1 = 0;
1095         vslice->ref_pic_list1[0] = vpic->reference_frames[1];
1096     }
1097
1098     vslice->max_num_merge_cand = 5;
1099
1100     if (pic->type == PICTURE_TYPE_B)
1101         vslice->slice_qp_delta = priv->fixed_qp_b  - vpic->pic_init_qp;
1102     else if (pic->type == PICTURE_TYPE_P)
1103         vslice->slice_qp_delta = priv->fixed_qp_p - vpic->pic_init_qp;
1104     else
1105         vslice->slice_qp_delta = priv->fixed_qp_idr - vpic->pic_init_qp;
1106
1107     vslice->slice_fields.bits.last_slice_of_pic_flag = 1;
1108
1109     mslice->first_slice_segment_in_pic_flag = 1;
1110
1111     if (pic->type == PICTURE_TYPE_IDR) {
1112         // No reference pictures.
1113     } else if (0) {
1114         mslice->short_term_ref_pic_set_sps_flag = 1;
1115         mslice->short_term_ref_pic_idx = 0;
1116     } else {
1117         VAAPIEncodePicture *st;
1118         int used;
1119
1120         mslice->short_term_ref_pic_set_sps_flag = 0;
1121         mslice->st_ref_pic_set.inter_ref_pic_set_prediction_flag = 0;
1122
1123         for (st = ctx->pic_start; st; st = st->next) {
1124             if (st->encode_order >= pic->encode_order) {
1125                 // Not yet in DPB.
1126                 continue;
1127             }
1128             used = 0;
1129             for (i = 0; i < pic->nb_refs; i++) {
1130                 if (pic->refs[i] == st)
1131                     used = 1;
1132             }
1133             if (!used) {
1134                 // Currently true, but need not be.
1135                 continue;
1136             }
1137             // This only works for one instance of each (delta_poc_sN_minus1
1138             // is relative to the previous frame in the list, not relative to
1139             // the current frame directly).
1140             if (st->display_order < pic->display_order) {
1141                 i = mslice->st_ref_pic_set.num_negative_pics;
1142                 mslice->st_ref_pic_set.delta_poc_s0_minus1[i] =
1143                     pic->display_order - st->display_order - 1;
1144                 mslice->st_ref_pic_set.used_by_curr_pic_s0_flag[i] = used;
1145                 ++mslice->st_ref_pic_set.num_negative_pics;
1146             } else {
1147                 i = mslice->st_ref_pic_set.num_positive_pics;
1148                 mslice->st_ref_pic_set.delta_poc_s1_minus1[i] =
1149                     st->display_order - pic->display_order - 1;
1150                 mslice->st_ref_pic_set.used_by_curr_pic_s1_flag[i] = used;
1151                 ++mslice->st_ref_pic_set.num_positive_pics;
1152             }
1153         }
1154     }
1155
1156     return 0;
1157 }
1158
1159 static av_cold int vaapi_encode_h265_configure(AVCodecContext *avctx)
1160 {
1161     VAAPIEncodeContext      *ctx = avctx->priv_data;
1162     VAAPIEncodeH265Context *priv = ctx->priv_data;
1163     VAAPIEncodeH265Options  *opt = ctx->codec_options;
1164
1165     priv->ctu_width     = FFALIGN(ctx->surface_width,  32) / 32;
1166     priv->ctu_height    = FFALIGN(ctx->surface_height, 32) / 32;
1167
1168     av_log(avctx, AV_LOG_VERBOSE, "Input %ux%u -> Surface %ux%u -> CTU %ux%u.\n",
1169            avctx->width, avctx->height, ctx->surface_width,
1170            ctx->surface_height, priv->ctu_width, priv->ctu_height);
1171
1172     if (ctx->va_rc_mode == VA_RC_CQP) {
1173         priv->fixed_qp_p = opt->qp;
1174         if (avctx->i_quant_factor > 0.0)
1175             priv->fixed_qp_idr = (int)((priv->fixed_qp_p * avctx->i_quant_factor +
1176                                         avctx->i_quant_offset) + 0.5);
1177         else
1178             priv->fixed_qp_idr = priv->fixed_qp_p;
1179         if (avctx->b_quant_factor > 0.0)
1180             priv->fixed_qp_b = (int)((priv->fixed_qp_p * avctx->b_quant_factor +
1181                                       avctx->b_quant_offset) + 0.5);
1182         else
1183             priv->fixed_qp_b = priv->fixed_qp_p;
1184
1185         av_log(avctx, AV_LOG_DEBUG, "Using fixed QP = "
1186                "%d / %d / %d for IDR- / P- / B-frames.\n",
1187                priv->fixed_qp_idr, priv->fixed_qp_p, priv->fixed_qp_b);
1188
1189     } else if (ctx->va_rc_mode == VA_RC_CBR) {
1190         // These still need to be  set for pic_init_qp/slice_qp_delta.
1191         priv->fixed_qp_idr = 30;
1192         priv->fixed_qp_p   = 30;
1193         priv->fixed_qp_b   = 30;
1194
1195         av_log(avctx, AV_LOG_DEBUG, "Using constant-bitrate = %"PRId64" bps.\n",
1196                avctx->bit_rate);
1197
1198     } else {
1199         av_assert0(0 && "Invalid RC mode.");
1200     }
1201
1202     return 0;
1203 }
1204
1205 static const VAAPIEncodeType vaapi_encode_type_h265 = {
1206     .priv_data_size        = sizeof(VAAPIEncodeH265Context),
1207
1208     .configure             = &vaapi_encode_h265_configure,
1209
1210     .sequence_params_size  = sizeof(VAEncSequenceParameterBufferHEVC),
1211     .init_sequence_params  = &vaapi_encode_h265_init_sequence_params,
1212
1213     .picture_params_size   = sizeof(VAEncPictureParameterBufferHEVC),
1214     .init_picture_params   = &vaapi_encode_h265_init_picture_params,
1215
1216     .slice_params_size     = sizeof(VAEncSliceParameterBufferHEVC),
1217     .init_slice_params     = &vaapi_encode_h265_init_slice_params,
1218
1219     .sequence_header_type  = VAEncPackedHeaderSequence,
1220     .write_sequence_header = &vaapi_encode_h265_write_sequence_header,
1221
1222     .slice_header_type     = VAEncPackedHeaderHEVC_Slice,
1223     .write_slice_header    = &vaapi_encode_h265_write_slice_header,
1224 };
1225
1226 static av_cold int vaapi_encode_h265_init(AVCodecContext *avctx)
1227 {
1228     VAAPIEncodeContext *ctx = avctx->priv_data;
1229
1230     ctx->codec = &vaapi_encode_type_h265;
1231
1232     switch (avctx->profile) {
1233     case FF_PROFILE_HEVC_MAIN:
1234     case FF_PROFILE_UNKNOWN:
1235         ctx->va_profile = VAProfileHEVCMain;
1236         ctx->va_rt_format = VA_RT_FORMAT_YUV420;
1237         break;
1238     case FF_PROFILE_HEVC_MAIN_10:
1239 #ifdef VA_RT_FORMAT_YUV420_10BPP
1240         ctx->va_profile = VAProfileHEVCMain10;
1241         ctx->va_rt_format = VA_RT_FORMAT_YUV420_10BPP;
1242         break;
1243 #else
1244         av_log(avctx, AV_LOG_ERROR, "10-bit encoding is not "
1245                "supported with this VAAPI version.\n");
1246         return AVERROR(ENOSYS);
1247 #endif
1248     default:
1249         av_log(avctx, AV_LOG_ERROR, "Unknown H.265 profile %d.\n",
1250                avctx->profile);
1251         return AVERROR(EINVAL);
1252     }
1253     ctx->va_entrypoint = VAEntrypointEncSlice;
1254
1255     if (avctx->bit_rate > 0)
1256         ctx->va_rc_mode = VA_RC_CBR;
1257     else
1258         ctx->va_rc_mode = VA_RC_CQP;
1259
1260     ctx->va_packed_headers =
1261         VA_ENC_PACKED_HEADER_SEQUENCE | // VPS, SPS and PPS.
1262         VA_ENC_PACKED_HEADER_SLICE;     // Slice headers.
1263
1264     ctx->surface_width  = FFALIGN(avctx->width,  16);
1265     ctx->surface_height = FFALIGN(avctx->height, 16);
1266
1267     return ff_vaapi_encode_init(avctx);
1268 }
1269
1270 #define OFFSET(x) (offsetof(VAAPIEncodeContext, codec_options_data) + \
1271                    offsetof(VAAPIEncodeH265Options, x))
1272 #define FLAGS (AV_OPT_FLAG_VIDEO_PARAM | AV_OPT_FLAG_ENCODING_PARAM)
1273 static const AVOption vaapi_encode_h265_options[] = {
1274     { "qp", "Constant QP (for P-frames; scaled by qfactor/qoffset for I/B)",
1275       OFFSET(qp), AV_OPT_TYPE_INT, { .i64 = 25 }, 0, 52, FLAGS },
1276     { NULL },
1277 };
1278
1279 static const AVCodecDefault vaapi_encode_h265_defaults[] = {
1280     { "profile",        "1"   },
1281     { "level",          "51"  },
1282     { "b",              "0"   },
1283     { "bf",             "2"   },
1284     { "g",              "120" },
1285     { "i_qfactor",      "1"   },
1286     { "i_qoffset",      "0"   },
1287     { "b_qfactor",      "6/5" },
1288     { "b_qoffset",      "0"   },
1289     { NULL },
1290 };
1291
1292 static const AVClass vaapi_encode_h265_class = {
1293     .class_name = "h265_vaapi",
1294     .item_name  = av_default_item_name,
1295     .option     = vaapi_encode_h265_options,
1296     .version    = LIBAVUTIL_VERSION_INT,
1297 };
1298
1299 AVCodec ff_hevc_vaapi_encoder = {
1300     .name           = "hevc_vaapi",
1301     .long_name      = NULL_IF_CONFIG_SMALL("H.265/HEVC (VAAPI)"),
1302     .type           = AVMEDIA_TYPE_VIDEO,
1303     .id             = AV_CODEC_ID_HEVC,
1304     .priv_data_size = (sizeof(VAAPIEncodeContext) +
1305                        sizeof(VAAPIEncodeH265Options)),
1306     .init           = &vaapi_encode_h265_init,
1307     .encode2        = &ff_vaapi_encode2,
1308     .close          = &ff_vaapi_encode_close,
1309     .priv_class     = &vaapi_encode_h265_class,
1310     .capabilities   = AV_CODEC_CAP_DELAY,
1311     .defaults       = vaapi_encode_h265_defaults,
1312     .pix_fmts = (const enum AVPixelFormat[]) {
1313         AV_PIX_FMT_VAAPI,
1314         AV_PIX_FMT_NONE,
1315     },
1316 };