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[uclinux-h8/uClibc.git] / libc / sysdeps / linux / ia64 / bits / syscalls.h
1 /* Copyright (C) 1999, 2000, 2002, 2003, 2004, 2005, 2006
2    Free Software Foundation, Inc.
3    This file is part of the GNU C Library.
4    Written by Jes Sorensen, <Jes.Sorensen@cern.ch>, April 1999.
5    Based on code originally written by David Mosberger-Tang
6
7    The GNU C Library is free software; you can redistribute it and/or
8    modify it under the terms of the GNU Lesser General Public
9    License as published by the Free Software Foundation; either
10    version 2.1 of the License, or (at your option) any later version.
11
12    The GNU C Library is distributed in the hope that it will be useful,
13    but WITHOUT ANY WARRANTY; without even the implied warranty of
14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15    Lesser General Public License for more details.
16
17    You should have received a copy of the GNU Lesser General Public
18    License along with the GNU C Library; if not, see
19    <http://www.gnu.org/licenses/>.  */
20
21 #ifndef _BITS_SYSCALLS_H
22 #define _BITS_SYSCALLS_H
23
24 #ifndef _SYSCALL_H
25 # error "Never use <bits/syscalls.h> directly; include <sys/syscall.h> instead."
26 #endif
27
28 #ifndef __ASSEMBLER__
29
30 #include <errno.h>
31
32 #undef IA64_USE_NEW_STUB
33
34 #define __IA64_BREAK_SYSCALL    0x100000
35
36 /* mostly taken from glibc sysdeps/unix/sysv/linux/ia64/sysdep.h */
37 #define BREAK_INSN_1(num) "break " #num ";;\n\t"
38 #define BREAK_INSN(num) BREAK_INSN_1(num)
39
40 /* On IA-64 we have stacked registers for passing arguments.  The
41    "out" registers end up being the called function's "in"
42    registers.
43
44    Also, since we have plenty of registers we have two return values
45    from a syscall.  r10 is set to -1 on error, whilst r8 contains the
46    (non-negative) errno on error or the return value on success.
47  */
48
49 # define DO_INLINE_SYSCALL_NCS(name, nr, args...)               \
50     LOAD_ARGS_##nr (args)                                       \
51     register long _r8 __asm__ ("r8");                           \
52     register long _r10 __asm__ ("r10");                         \
53     register long _r15 __asm__ ("r15") = name;                  \
54     long _retval;                                               \
55     LOAD_REGS_##nr                                              \
56     __asm__ __volatile__ (BREAK_INSN (__IA64_BREAK_SYSCALL)     \
57                       : "=r" (_r8), "=r" (_r10), "=r" (_r15)    \
58                         ASM_OUTARGS_##nr                        \
59                       : "2" (_r15) ASM_ARGS_##nr                \
60                       : "memory" ASM_CLOBBERS_##nr);            \
61     _retval = _r8;
62
63 #define INLINE_SYSCALL_NCS(name, nr, args...)           \
64 (__extension__                                          \
65   ({                                                    \
66     DO_INLINE_SYSCALL_NCS (name, nr, args)              \
67     if (unlikely (_r10 == -1))                          \
68       {                                                 \
69         __set_errno (_retval);                          \
70         _retval = -1;                                   \
71       }                                                 \
72     _retval;                                            \
73    })                                                   \
74 )
75
76 #define INTERNAL_SYSCALL_DECL(err) long int err
77
78 #define INTERNAL_SYSCALL_NCS(name, err, nr, args...)    \
79 (__extension__ \
80   ({                                                    \
81     DO_INLINE_SYSCALL_NCS (name, nr, args)              \
82     err = _r10;                                         \
83     _retval;                                            \
84    }) \
85 )
86 #define INTERNAL_SYSCALL_ERROR_P(val, err)      (err == -1)
87
88 #define INTERNAL_SYSCALL_ERRNO(val, err)        (val)
89
90 #define LOAD_ARGS_0()
91 #define LOAD_REGS_0
92 #define LOAD_ARGS_1(a1)                                 \
93   long _arg1 = (long) (a1);                             \
94   LOAD_ARGS_0 ()
95 #define LOAD_REGS_1                                     \
96   register long _out0 __asm__ ("out0") = _arg1;         \
97   LOAD_REGS_0
98 #define LOAD_ARGS_2(a1, a2)                             \
99   long _arg2 = (long) (a2);                             \
100   LOAD_ARGS_1 (a1)
101 #define LOAD_REGS_2                                     \
102   register long _out1 __asm__ ("out1") = _arg2;         \
103   LOAD_REGS_1
104 #define LOAD_ARGS_3(a1, a2, a3)                         \
105   long _arg3 = (long) (a3);                             \
106   LOAD_ARGS_2 (a1, a2)
107 #define LOAD_REGS_3                                     \
108   register long _out2 __asm__ ("out2") = _arg3;         \
109   LOAD_REGS_2
110 #define LOAD_ARGS_4(a1, a2, a3, a4)                     \
111   long _arg4 = (long) (a4);                             \
112   LOAD_ARGS_3 (a1, a2, a3)
113 #define LOAD_REGS_4                                     \
114   register long _out3 __asm__ ("out3") = _arg4;         \
115   LOAD_REGS_3
116 #define LOAD_ARGS_5(a1, a2, a3, a4, a5)                 \
117   long _arg5 = (long) (a5);                             \
118   LOAD_ARGS_4 (a1, a2, a3, a4)
119 #define LOAD_REGS_5                                     \
120   register long _out4 __asm__ ("out4") = _arg5;         \
121   LOAD_REGS_4
122 #define LOAD_ARGS_6(a1, a2, a3, a4, a5, a6)             \
123   long _arg6 = (long) (a6);                             \
124   LOAD_ARGS_5 (a1, a2, a3, a4, a5)
125 #define LOAD_REGS_6                                     \
126   register long _out5 __asm__ ("out5") = _arg6;         \
127   LOAD_REGS_5
128
129 #define ASM_OUTARGS_0
130 #define ASM_OUTARGS_1   ASM_OUTARGS_0, "=r" (_out0)
131 #define ASM_OUTARGS_2   ASM_OUTARGS_1, "=r" (_out1)
132 #define ASM_OUTARGS_3   ASM_OUTARGS_2, "=r" (_out2)
133 #define ASM_OUTARGS_4   ASM_OUTARGS_3, "=r" (_out3)
134 #define ASM_OUTARGS_5   ASM_OUTARGS_4, "=r" (_out4)
135 #define ASM_OUTARGS_6   ASM_OUTARGS_5, "=r" (_out5)
136
137 #define ASM_ARGS_0
138 #define ASM_ARGS_1      ASM_ARGS_0, "3" (_out0)
139 #define ASM_ARGS_2      ASM_ARGS_1, "4" (_out1)
140 #define ASM_ARGS_3      ASM_ARGS_2, "5" (_out2)
141 #define ASM_ARGS_4      ASM_ARGS_3, "6" (_out3)
142 #define ASM_ARGS_5      ASM_ARGS_4, "7" (_out4)
143 #define ASM_ARGS_6      ASM_ARGS_5, "8" (_out5)
144
145 #define ASM_CLOBBERS_0  ASM_CLOBBERS_1, "out0"
146 #define ASM_CLOBBERS_1  ASM_CLOBBERS_2, "out1"
147 #define ASM_CLOBBERS_2  ASM_CLOBBERS_3, "out2"
148 #define ASM_CLOBBERS_3  ASM_CLOBBERS_4, "out3"
149 #define ASM_CLOBBERS_4  ASM_CLOBBERS_5, "out4"
150 #define ASM_CLOBBERS_5  ASM_CLOBBERS_6, "out5"
151 #define ASM_CLOBBERS_6  ASM_CLOBBERS_6_COMMON , "b7"
152 #define ASM_CLOBBERS_6_COMMON   , "out6", "out7",                       \
153   /* Non-stacked integer registers, minus r8, r10, r15.  */             \
154   "r2", "r3", "r9", "r11", "r12", "r13", "r14", "r16", "r17", "r18",    \
155   "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27",        \
156   "r28", "r29", "r30", "r31",                                           \
157   /* Predicate registers.  */                                           \
158   "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15",     \
159   /* Non-rotating fp registers.  */                                     \
160   "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",     \
161   /* Branch registers.  */                                              \
162   "b6"
163
164 #endif /* __ASSEMBLER__ */
165 #endif /* _BITS_SYSCALLS_H */