linux-core/radeon_combios.c

   1 /*
   2  * Copyright 2004 ATI Technologies Inc., Markham, Ontario
   3  * Copyright 2007-8 Advanced Micro Devices, Inc.
   4  * Copyright 2008 Red Hat Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  */
  27 #include "drmP.h"
  28 #include "radeon_drm.h"
  29 #include "radeon_drv.h"
  30
  31 /* old legacy ATI BIOS routines */
  32
  33 enum radeon_combios_ddc
  34 {
  35     DDC_NONE_DETECTED,
  36     DDC_MONID,
  37     DDC_DVI,
  38     DDC_VGA,
  39     DDC_CRT2,
  40     DDC_LCD,
  41     DDC_GPIO,
  42 };
  43
  44 enum radeon_combios_connector
  45 {
  46     CONNECTOR_NONE_LEGACY,
  47     CONNECTOR_PROPRIETARY_LEGACY,
  48     CONNECTOR_CRT_LEGACY,
  49     CONNECTOR_DVI_I_LEGACY,
  50     CONNECTOR_DVI_D_LEGACY,
  51     CONNECTOR_CTV_LEGACY,
  52     CONNECTOR_STV_LEGACY,
  53     CONNECTOR_UNSUPPORTED_LEGACY
  54 };
  55
  56 struct radeon_i2c_bus_rec combios_setup_i2c_bus(int ddc_line)
  57 {
  58         struct radeon_i2c_bus_rec i2c;
  59
  60         i2c.mask_clk_mask = RADEON_GPIO_EN_1 | RADEON_GPIO_Y_1;
  61         i2c.mask_data_mask =  RADEON_GPIO_EN_0 | RADEON_GPIO_Y_0;
  62         i2c.put_clk_mask = RADEON_GPIO_EN_1;
  63         i2c.put_data_mask = RADEON_GPIO_EN_0;
  64         i2c.get_clk_mask = RADEON_GPIO_Y_1;
  65         i2c.get_data_mask = RADEON_GPIO_Y_0;
  66         if ((ddc_line == RADEON_LCD_GPIO_MASK) ||
  67             (ddc_line == RADEON_MDGPIO_EN_REG)) {
  68                 i2c.mask_clk_reg = ddc_line;
  69                 i2c.mask_data_reg = ddc_line;
  70                 i2c.put_clk_reg = ddc_line;
  71                 i2c.put_data_reg = ddc_line;
  72                 i2c.get_clk_reg = ddc_line + 4;
  73                 i2c.get_data_reg = ddc_line + 4;
  74         } else {
  75                 i2c.mask_clk_reg = ddc_line;
  76                 i2c.mask_data_reg = ddc_line;
  77                 i2c.put_clk_reg = ddc_line;
  78                 i2c.put_data_reg = ddc_line;
  79                 i2c.get_clk_reg = ddc_line;
  80                 i2c.get_data_reg = ddc_line;
  81         }
  82
  83         if (ddc_line)
  84                 i2c.valid = true;
  85         else
  86                 i2c.valid = false;
  87
  88         return i2c;
  89 }
  90
  91 bool radeon_combios_get_clock_info(struct drm_device *dev)
  92 {
  93         struct drm_radeon_private *dev_priv = dev->dev_private;
  94         struct radeon_mode_info *mode_info = &dev_priv->mode_info;
  95         uint16_t pll_info_block;
  96         struct radeon_pll *pll = &mode_info->pll;
  97         int rev;
  98
  99         pll_info_block = radeon_bios16(dev_priv, dev_priv->bios_header_start + 0x30);
 100         rev = radeon_bios8(dev_priv, pll_info_block);
 101
 102         pll->reference_freq = radeon_bios16(dev_priv, pll_info_block + 0xe);
 103         pll->reference_div = radeon_bios16(dev_priv, pll_info_block + 0x10);
 104         pll->pll_out_min = radeon_bios32(dev_priv, pll_info_block + 0x12);
 105         pll->pll_out_max = radeon_bios32(dev_priv, pll_info_block + 0x16);
 106
 107         if (rev > 9) {
 108                 pll->pll_in_min = radeon_bios32(dev_priv, pll_info_block + 0x36);
 109                 pll->pll_in_max = radeon_bios32(dev_priv, pll_info_block + 0x3a);
 110         } else {
 111                 pll->pll_in_min = 40;
 112                 pll->pll_in_max = 500;
 113         }
 114
 115         pll->xclk = radeon_bios16(dev_priv, pll_info_block + 0x08);
 116
 117         // sclk/mclk use fixed point
 118
 119         return true;
 120
 121 }
 122
 123 bool radeon_combios_get_lvds_info(struct radeon_encoder *encoder)
 124 {
 125         struct drm_device *dev = encoder->base.dev;
 126         struct drm_radeon_private *dev_priv = dev->dev_private;
 127         uint16_t tmp;
 128         char stmp[30];
 129         int tmp0;
 130         int i;
 131
 132         tmp = radeon_bios16(dev_priv, dev_priv->bios_header_start + 0x40);
 133         if (!tmp) {
 134                 DRM_INFO("No panel info found in BIOS\n");
 135                 return false;
 136
 137         }
 138
 139         for (i = 0; i < 24; i++)
 140                 stmp[i] = radeon_bios8(dev_priv, tmp + i + 1);
 141         stmp[24] = 0;
 142
 143         DRM_INFO("Panel ID String: %s\n", stmp);
 144
 145         encoder->panel_xres = radeon_bios16(dev_priv, tmp + 25);
 146         encoder->panel_yres = radeon_bios16(dev_priv, tmp + 27);
 147
 148         DRM_INFO("Panel Size %dx%d\n", encoder->panel_xres, encoder->panel_yres);
 149
 150         encoder->panel_pwr_delay = radeon_bios16(dev_priv, tmp + 44);
 151         if (encoder->panel_pwr_delay > 2000 || encoder->panel_pwr_delay < 0)
 152                 encoder->panel_pwr_delay = 2000;
 153
 154         for (i = 0; i < 32; i++) {
 155                 tmp0 = radeon_bios16(dev_priv, tmp + 64 + i * 2);
 156                 if (tmp0 == 0) break;
 157
 158                 if ((radeon_bios16(dev_priv, tmp0) == encoder->panel_xres) &&
 159                     (radeon_bios16(dev_priv, tmp0 + 2) == encoder->panel_yres)) {
 160                         encoder->hblank = (radeon_bios16(dev_priv, tmp0 + 17) -
 161                                            radeon_bios16(dev_priv, tmp0 + 19)) * 8;
 162                         encoder->hoverplus = (radeon_bios16(dev_priv, tmp0 + 21) -
 163                                               radeon_bios16(dev_priv, tmp0 + 19) - 1) * 8;
 164                         encoder->hsync_width = radeon_bios8(dev_priv, tmp0 + 23) * 8;
 165
 166                         encoder->vblank = (radeon_bios16(dev_priv, tmp0 + 24) -
 167                                            radeon_bios16(dev_priv, tmp0 + 26));
 168                         encoder->voverplus = ((radeon_bios16(dev_priv, tmp0 + 28) & 0x7fff) -
 169                                               radeon_bios16(dev_priv, tmp0 + 26));
 170                         encoder->vsync_width = ((radeon_bios16(dev_priv, tmp0 + 28) & 0xf800) >> 11);
 171                         encoder->dotclock = radeon_bios16(dev_priv, tmp0 + 9) * 10;
 172                         encoder->flags = 0;
 173                 }
 174         }
 175         return true;
 176 }
 177
 178 static void radeon_apply_legacy_quirks(struct drm_device *dev, int bios_index)
 179 {
 180         struct drm_radeon_private *dev_priv = dev->dev_private;
 181         struct radeon_mode_info *mode_info = &dev_priv->mode_info;
 182
 183         /* on XPRESS chips, CRT2_DDC and MONID_DCC both use the
 184          * MONID gpio, but use different pins.
 185          * CRT2_DDC uses the standard pinout, MONID_DDC uses
 186          * something else.
 187          */
 188         if ((dev_priv->chip_family == CHIP_RS400 ||
 189              dev_priv->chip_family == CHIP_RS480) &&
 190             mode_info->bios_connector[bios_index].connector_type == CONNECTOR_VGA &&
 191             mode_info->bios_connector[bios_index].ddc_i2c.mask_clk_reg == RADEON_GPIO_CRT2_DDC) {
 192                 mode_info->bios_connector[bios_index].ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID);
 193         }
 194
 195         /* XPRESS desktop chips seem to have a proprietary connector listed for
 196          * DVI-D, try and do the right thing here.
 197          */
 198         if ((dev_priv->flags & RADEON_IS_MOBILITY) &&
 199             (mode_info->bios_connector[bios_index].connector_type == CONNECTOR_LVDS)) {
 200           DRM_INFO("proprietary connector found. assuming DVI-D\n");
 201           mode_info->bios_connector[bios_index].dac_type = DAC_NONE;
 202           mode_info->bios_connector[bios_index].tmds_type = TMDS_EXT;
 203           mode_info->bios_connector[bios_index].connector_type = CONNECTOR_DVI_D;
 204         }
 205
 206         /* Certain IBM chipset RN50s have a BIOS reporting two VGAs,
 207            one with VGA DDC and one with CRT2 DDC. - kill the CRT2 DDC one */
 208         if (dev->pdev->device == 0x515e &&
 209             dev->pdev->subsystem_vendor == 0x1014) {
 210                 if (mode_info->bios_connector[bios_index].connector_type == CONNECTOR_VGA &&
 211                     mode_info->bios_connector[bios_index].ddc_i2c.mask_clk_reg == RADEON_GPIO_CRT2_DDC) {
 212                         mode_info->bios_connector[bios_index].valid = false;
 213                 }
 214         }
 215
 216         /* Some RV100 cards with 2 VGA ports show up with DVI+VGA */
 217         if (dev->pdev->device == 0x5159 &&
 218             dev->pdev->subsystem_vendor == 0x1002 &&
 219             dev->pdev->subsystem_device == 0x013a) {
 220                 if (mode_info->bios_connector[bios_index].connector_type == CONNECTOR_DVI_I)
 221                         mode_info->bios_connector[bios_index].connector_type = CONNECTOR_VGA;
 222
 223         }
 224
 225 }
 226
 227 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
 228 {
 229         struct drm_radeon_private *dev_priv = dev->dev_private;
 230         struct radeon_mode_info *mode_info = &dev_priv->mode_info;
 231         uint32_t offset, entry;
 232         uint16_t tmp0, tmp1, tmp;
 233         enum radeon_combios_ddc ddctype;
 234         enum radeon_combios_connector connector_type;
 235         int i;
 236
 237         DRM_DEBUG("\n");
 238         offset = radeon_bios16(dev_priv, dev_priv->bios_header_start + 0x50);
 239         if (offset) {
 240                 for (i = 0; i < 4; i++) {
 241                         entry = offset + 2 + i * 2;
 242
 243                         if (!radeon_bios16(dev_priv, entry))
 244                                     break;
 245
 246                         mode_info->bios_connector[i].valid = true;
 247
 248                         tmp = radeon_bios16(dev_priv, entry);
 249
 250                         connector_type = (tmp >> 12) & 0xf;
 251                         mode_info->bios_connector[i].connector_type = connector_type;
 252
 253                         switch(connector_type) {
 254                         case CONNECTOR_PROPRIETARY_LEGACY:
 255                                 mode_info->bios_connector[i].connector_type = CONNECTOR_LVDS;
 256                                 break;
 257                         case CONNECTOR_CRT_LEGACY:
 258                                 mode_info->bios_connector[i].connector_type = CONNECTOR_VGA;
 259                                 break;
 260                         case CONNECTOR_DVI_I_LEGACY:
 261                                 mode_info->bios_connector[i].connector_type = CONNECTOR_DVI_I;
 262                                 break;
 263                         case CONNECTOR_DVI_D_LEGACY:
 264                                 mode_info->bios_connector[i].connector_type = CONNECTOR_DVI_D;
 265                                 break;
 266                         case CONNECTOR_CTV_LEGACY:
 267                                 mode_info->bios_connector[i].connector_type = CONNECTOR_CTV;
 268                                 break;
 269                         case CONNECTOR_STV_LEGACY:
 270                                 mode_info->bios_connector[i].connector_type = CONNECTOR_STV;
 271                                 break;
 272                         default:
 273                                 DRM_ERROR("Unknown connector type: %d\n", connector_type);
 274                                 mode_info->bios_connector[i].valid = false;
 275                                 break;
 276                         }
 277
 278                         mode_info->bios_connector[i].ddc_i2c.valid = false;
 279
 280                         ddctype = (tmp >> 8) & 0xf;
 281                         switch (ddctype) {
 282                         case DDC_MONID:
 283                                 mode_info->bios_connector[i].ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_MONID);
 284                                 break;
 285                         case DDC_DVI:
 286                                 mode_info->bios_connector[i].ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
 287                                 break;
 288                         case DDC_VGA:
 289                                 mode_info->bios_connector[i].ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
 290                                 break;
 291                         case DDC_CRT2:
 292                                 mode_info->bios_connector[i].ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
 293                                 break;
 294                         default:
 295                                 break;
 296                         }
 297
 298                         if (tmp & 0x1)
 299                                 mode_info->bios_connector[i].dac_type = DAC_TVDAC;
 300                         else
 301                                 mode_info->bios_connector[i].dac_type = DAC_PRIMARY;
 302
 303                         if ((dev_priv->chip_family == CHIP_RS300) ||
 304                             (dev_priv->chip_family == CHIP_RS400) ||
 305                             (dev_priv->chip_family == CHIP_RS480))
 306                                 mode_info->bios_connector[i].dac_type = DAC_TVDAC;
 307
 308                         if ((tmp >> 4) & 0x1)
 309                                 mode_info->bios_connector[i].tmds_type = TMDS_EXT;
 310                         else
 311                                 mode_info->bios_connector[i].tmds_type = TMDS_INT;
 312
 313                         radeon_apply_legacy_quirks(dev, i);
 314                 }
 315         } else {
 316                 DRM_INFO("no connector table found in BIOS\n");
 317                 offset = radeon_bios16(dev_priv, dev_priv->bios_header_start + 0x34);
 318                 if (offset) {
 319                         DRM_DEBUG("Found DFP table, assuming DVI connector\n");
 320
 321                         mode_info->bios_connector[0].valid = true;
 322                         mode_info->bios_connector[0].connector_type = CONNECTOR_DVI_I;
 323                         mode_info->bios_connector[0].dac_type = DAC_PRIMARY;
 324                         mode_info->bios_connector[0].tmds_type = TMDS_INT;
 325                         mode_info->bios_connector[0].ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
 326                 } else {
 327                         DRM_DEBUG("No table found\n");
 328                         return false;
 329                 }
 330         }
 331
 332         if (dev_priv->flags & RADEON_IS_MOBILITY) {
 333                 offset = radeon_bios16(dev_priv, dev_priv->bios_header_start + 0x40);
 334                 if (offset) {
 335                         mode_info->bios_connector[4].valid = true;
 336                         mode_info->bios_connector[4].connector_type = CONNECTOR_LVDS;
 337                         mode_info->bios_connector[4].dac_type = DAC_NONE;
 338                         mode_info->bios_connector[4].tmds_type = TMDS_NONE;
 339                         mode_info->bios_connector[4].ddc_i2c.valid = false;
 340
 341                         tmp = radeon_bios16(dev_priv, dev_priv->bios_header_start + 0x42);
 342                         if (tmp) {
 343                                 tmp0 = radeon_bios16(dev_priv, tmp + 0x15);
 344                                 if (tmp0) {
 345                                         tmp1 = radeon_bios8(dev_priv, tmp0 + 2) & 0x07;
 346                                         if (tmp1) {
 347                                                 ddctype = tmp1;
 348
 349                                                 switch(ddctype) {
 350                                                 case DDC_MONID:
 351                                                 case DDC_DVI:
 352                                                 case DDC_CRT2:
 353                                                 case DDC_LCD:
 354                                                 case DDC_GPIO:
 355                                                 default:
 356                                                         break;
 357                                                 }
 358                                                 DRM_DEBUG("LCD DDC Info Table found!\n");
 359                                         }
 360                                 }
 361                         } else
 362                                 mode_info->bios_connector[4].ddc_i2c.valid = false;
 363                 }
 364         }
 365
 366         DRM_DEBUG("BIOS Connector table\n");
 367         for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
 368                 if (!mode_info->bios_connector[i].valid)
 369                         continue;
 370
 371                 DRM_DEBUG("Port %d: ddc_type 0x%x, dac_type %d, tmds_type %d, connector type %d, hpd_mask %d\n",
 372                           i, mode_info->bios_connector[i].ddc_i2c.mask_clk_reg,
 373                           mode_info->bios_connector[i].dac_type,
 374                           mode_info->bios_connector[i].tmds_type,
 375                           mode_info->bios_connector[i].connector_type,
 376                           mode_info->bios_connector[i].hpd_mask);
 377         }
 378
 379         return true;
 380 }
 381