linux-core/radeon_display.c

   1 /*
   2  * Copyright 2007-8 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors: Dave Airlie
  24  *          Alex Deucher
  25  */
  26 #include "drmP.h"
  27 #include "radeon_drm.h"
  28 #include "radeon_drv.h"
  29
  30 #include "atom.h"
  31 #include <asm/div64.h>
  32
  33 #include "drm_crtc_helper.h"
  34
  35 #define CURSOR_WIDTH 64
  36 #define CURSOR_HEIGHT 64
  37
  38 int radeon_ddc_dump(struct drm_connector *connector);
  39
  40
  41
  42 static void avivo_crtc_load_lut(struct drm_crtc *crtc)
  43 {
  44         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
  45         struct drm_device *dev = crtc->dev;
  46         struct drm_radeon_private *dev_priv = dev->dev_private;
  47         int i;
  48
  49         DRM_DEBUG("%d\n", radeon_crtc->crtc_id);
  50         RADEON_WRITE(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0);
  51
  52         RADEON_WRITE(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);
  53         RADEON_WRITE(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0);
  54         RADEON_WRITE(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0);
  55
  56         RADEON_WRITE(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff);
  57         RADEON_WRITE(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff);
  58         RADEON_WRITE(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff);
  59
  60         RADEON_WRITE(AVIVO_DC_LUT_RW_SELECT, radeon_crtc->crtc_id);
  61         RADEON_WRITE(AVIVO_DC_LUT_RW_MODE, 0);
  62         RADEON_WRITE(AVIVO_DC_LUT_WRITE_EN_MASK, 0x0000003f);
  63
  64         for (i = 0; i < 256; i++) {
  65
  66                 RADEON_WRITE8(AVIVO_DC_LUT_RW_INDEX, i);
  67                 RADEON_WRITE(AVIVO_DC_LUT_30_COLOR,
  68                              (radeon_crtc->lut_r[i] << 22) |
  69                              (radeon_crtc->lut_g[i] << 12) |
  70                              (radeon_crtc->lut_b[i] << 2));
  71         }
  72
  73         RADEON_WRITE(AVIVO_D1GRPH_LUT_SEL + radeon_crtc->crtc_offset, radeon_crtc->crtc_id);
  74 }
  75
  76
  77 void radeon_crtc_load_lut(struct drm_crtc *crtc)
  78 {
  79         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
  80         struct drm_device *dev = crtc->dev;
  81         struct drm_radeon_private *dev_priv = dev->dev_private;
  82         u32 temp;
  83         int i;
  84         if (!crtc->enabled)
  85                 return;
  86
  87
  88         if (radeon_is_avivo(dev_priv)) {
  89                 avivo_crtc_load_lut(crtc);
  90                 return;
  91         }
  92
  93         temp = RADEON_READ(RADEON_DAC_CNTL2);
  94         if (radeon_crtc->crtc_id == 0)
  95                 temp &= (uint32_t)~RADEON_DAC2_PALETTE_ACC_CTL;
  96         else
  97                 temp |= RADEON_DAC2_PALETTE_ACC_CTL;
  98         RADEON_WRITE(RADEON_DAC_CNTL2, temp);
  99
 100         for (i = 0; i < 256; i++) {
 101 //              OUTPAL(i, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i], radeon_crtc->lut_b[i]);
 102         }
 103
 104 }
 105
 106 /** Sets the color ramps on behalf of RandR */
 107 void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 108                               u16 blue, int regno)
 109 {
 110         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 111
 112         if (regno==0)
 113                 DRM_DEBUG("gamma set %d\n", radeon_crtc->crtc_id);
 114         radeon_crtc->lut_r[regno] = red >> 8;
 115         radeon_crtc->lut_g[regno] = green >> 8;
 116         radeon_crtc->lut_b[regno] = blue >> 8;
 117 }
 118
 119
 120
 121 static void avivo_lock_cursor(struct drm_crtc *crtc, bool lock)
 122 {
 123         struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
 124         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 125
 126         uint32_t tmp;
 127
 128         tmp = RADEON_READ(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset);
 129         if (lock)
 130                 tmp |= AVIVO_D1CURSOR_UPDATE_LOCK;
 131         else
 132                 tmp &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
 133
 134         RADEON_WRITE(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, tmp);
 135 }
 136
 137 static int radeon_crtc_cursor_set(struct drm_crtc *crtc,
 138                                   struct drm_file *file_priv,
 139                                   uint32_t handle,
 140                                   uint32_t width,
 141                                   uint32_t height)
 142 {
 143         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 144         struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
 145         struct drm_gem_object *obj;
 146         struct drm_radeon_gem_object *obj_priv;
 147
 148         if (!handle) {
 149                 RADEON_WRITE(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, 0);
 150                 return 0;
 151                 /* turn off cursor */
 152         }
 153
 154         obj = drm_gem_object_lookup(crtc->dev, file_priv, handle);
 155         if (!obj) {
 156                 DRM_ERROR("Cannot find cursor object %x for crtc %d\n", handle, radeon_crtc->crtc_id);
 157                 return -EINVAL;
 158         }
 159
 160         obj_priv = obj->driver_private;
 161
 162         RADEON_WRITE(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, 0);
 163         if (radeon_is_avivo(dev_priv)) {
 164                 RADEON_WRITE(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
 165                              dev_priv->fb_location + obj_priv->bo->offset);
 166                 RADEON_WRITE(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,
 167                              (CURSOR_WIDTH - 1) << 16 | (CURSOR_HEIGHT - 1));
 168                 RADEON_WRITE(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
 169                              AVIVO_D1CURSOR_EN | (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
 170         }
 171
 172         mutex_lock(&crtc->dev->struct_mutex);
 173         drm_gem_object_unreference(obj);
 174         mutex_unlock(&crtc->dev->struct_mutex);
 175
 176         return 0;
 177 }
 178
 179 static int radeon_crtc_cursor_move(struct drm_crtc *crtc,
 180                                    int x, int y)
 181 {
 182         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 183         struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
 184         int xorigin = 0, yorigin = 0;
 185
 186         if (x < 0) xorigin = -x+1;
 187         if (y < 0) yorigin = -x+1;
 188         if (xorigin >= CURSOR_WIDTH) xorigin = CURSOR_WIDTH - 1;
 189         if (yorigin >= CURSOR_WIDTH) yorigin = CURSOR_WIDTH - 1;
 190
 191         if (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE)
 192                 y /= 2;
 193         else if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
 194                 y *= 2;
 195
 196         if (radeon_is_avivo(dev_priv)) {
 197                 avivo_lock_cursor(crtc, true);
 198
 199                 RADEON_WRITE(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset,
 200                              ((xorigin ? 0: x) << 16) |
 201                              (yorigin ? 0 : y));
 202                 RADEON_WRITE(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin);
 203                 avivo_lock_cursor(crtc, false);
 204         }
 205
 206         return 0;
 207 }
 208
 209 static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
 210                                   u16 *blue, uint32_t size)
 211 {
 212         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 213         int i;
 214
 215         if (size != 256)
 216                 return;
 217
 218         for (i = 0; i < 256; i++) {
 219                 radeon_crtc->lut_r[i] = red[i] >> 8;
 220                 radeon_crtc->lut_g[i] = green[i] >> 8;
 221                 radeon_crtc->lut_b[i] = blue[i] >> 8;
 222         }
 223
 224         radeon_crtc_load_lut(crtc);
 225 }
 226
 227 static void radeon_crtc_destroy(struct drm_crtc *crtc)
 228 {
 229         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 230
 231         drm_crtc_cleanup(crtc);
 232         kfree(radeon_crtc);
 233 }
 234
 235 static const struct drm_crtc_funcs radeon_crtc_funcs = {
 236         .cursor_set = radeon_crtc_cursor_set,
 237         .cursor_move = radeon_crtc_cursor_move,
 238         .gamma_set = radeon_crtc_gamma_set,
 239         .set_config = drm_crtc_helper_set_config,
 240         .destroy = radeon_crtc_destroy,
 241 };
 242
 243 static void radeon_crtc_init(struct drm_device *dev, int index)
 244 {
 245         struct drm_radeon_private *dev_priv = dev->dev_private;
 246         struct radeon_crtc *radeon_crtc;
 247         int i;
 248
 249         radeon_crtc = kzalloc(sizeof(struct radeon_crtc) + (RADEONFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
 250         //      radeon_crtc = kzalloc(sizeof(struct radeon_crtc), GFP_KERNEL);
 251         if (radeon_crtc == NULL)
 252                 return;
 253
 254         drm_crtc_init(dev, &radeon_crtc->base, &radeon_crtc_funcs);
 255
 256         drm_mode_crtc_set_gamma_size(&radeon_crtc->base, 256);
 257         radeon_crtc->crtc_id = index;
 258
 259         radeon_crtc->mode_set.crtc = &radeon_crtc->base;
 260         radeon_crtc->mode_set.connectors = (struct drm_connector **)(radeon_crtc + 1);
 261         radeon_crtc->mode_set.num_connectors = 0;
 262
 263         for (i = 0; i < 256; i++) {
 264                 radeon_crtc->lut_r[i] = i;
 265                 radeon_crtc->lut_g[i] = i;
 266                 radeon_crtc->lut_b[i] = i;
 267         }
 268
 269         if (dev_priv->is_atom_bios && dev_priv->chip_family > CHIP_RS690)
 270                 radeon_atombios_init_crtc(dev, radeon_crtc);
 271         else
 272                 radeon_legacy_init_crtc(dev, radeon_crtc);
 273 }
 274
 275 bool radeon_legacy_setup_enc_conn(struct drm_device *dev)
 276 {
 277
 278         radeon_get_legacy_connector_info_from_bios(dev);
 279         return false;
 280 }
 281
 282 bool radeon_setup_enc_conn(struct drm_device *dev)
 283 {
 284         struct drm_radeon_private *dev_priv = dev->dev_private;
 285         struct radeon_mode_info *mode_info = &dev_priv->mode_info;
 286         /* do all the mac and stuff */
 287         struct drm_connector *connector;
 288         struct drm_encoder *encoder;
 289         int i;
 290
 291         if (dev_priv->is_atom_bios)
 292                 radeon_get_atom_connector_info_from_bios_connector_table(dev);
 293         else
 294                 radeon_get_legacy_connector_info_from_bios(dev);
 295
 296         for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
 297                 if (!mode_info->bios_connector[i].valid)
 298                         continue;
 299
 300                 /* add a connector for this */
 301                 if (mode_info->bios_connector[i].connector_type == CONNECTOR_NONE)
 302                         continue;
 303
 304                 connector = radeon_connector_add(dev, i);
 305                 if (!connector)
 306                         continue;
 307
 308                 encoder = NULL;
 309                 /* if we find an LVDS connector */
 310                 if (mode_info->bios_connector[i].connector_type == CONNECTOR_LVDS) {
 311                         if (radeon_is_avivo(dev_priv))
 312                                 encoder = radeon_encoder_lvtma_add(dev, i);
 313                         else
 314                                 encoder = radeon_encoder_legacy_lvds_add(dev, i);
 315                         if (encoder)
 316                                 drm_mode_connector_attach_encoder(connector, encoder);
 317                 }
 318
 319                 /* DAC on DVI or VGA */
 320                 if ((mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_I) ||
 321                     (mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_A) ||
 322                     (mode_info->bios_connector[i].connector_type == CONNECTOR_VGA)) {
 323                         if (radeon_is_avivo(dev_priv)) {
 324                                 encoder = radeon_encoder_atom_dac_add(dev, i, mode_info->bios_connector[i].dac_type, 0);
 325                         } else {
 326                                 if (mode_info->bios_connector[i].dac_type == DAC_PRIMARY)
 327                                         encoder = radeon_encoder_legacy_primary_dac_add(dev, i, 0);
 328 //                              else if (mode_info->bios_connector[i].dac_type == DAC_TVDAC)
 329 //                                      encoder radeon_encoder_legacy_secondary_dac_add(dev, i, 0);
 330                         }
 331                         if (encoder)
 332                                 drm_mode_connector_attach_encoder(connector, encoder);
 333                 }
 334
 335                 /* TMDS on DVI */
 336                 if ((mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_I) ||
 337                     (mode_info->bios_connector[i].connector_type == CONNECTOR_DVI_D)) {
 338                         if (radeon_is_avivo(dev_priv))
 339                                 encoder = radeon_encoder_atom_tmds_add(dev, i, mode_info->bios_connector[i].dac_type);
 340                         else {
 341                                 if (mode_info->bios_connector[i].tmds_type == TMDS_INT)
 342                                         encoder = radeon_encoder_legacy_tmds_int_add(dev, i);
 343                         }
 344                         if (encoder)
 345                                 drm_mode_connector_attach_encoder(connector, encoder);
 346                 }
 347
 348                 /* TVDAC on DIN */
 349                 if (mode_info->bios_connector[i].connector_type == CONNECTOR_DIN) {
 350                         if (radeon_is_avivo(dev_priv))
 351                                 encoder = radeon_encoder_atom_dac_add(dev, i, mode_info->bios_connector[i].dac_type, 1);
 352                         if (encoder)
 353                                 drm_mode_connector_attach_encoder(connector, encoder);
 354                 }
 355         }
 356
 357         list_for_each_entry(connector, &dev->mode_config.connector_list, head)
 358                 radeon_ddc_dump(connector);
 359         return true;
 360 }
 361
 362
 363
 364 void avivo_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state)
 365 {
 366         struct drm_radeon_private *dev_priv = radeon_connector->base.dev->dev_private;
 367         uint32_t temp;
 368         struct radeon_i2c_bus_rec *rec = &radeon_connector->ddc_bus->rec;
 369
 370         temp = RADEON_READ(rec->mask_clk_reg);
 371         if (lock_state)
 372                 temp |= rec->put_clk_mask;
 373         else
 374                 temp &= ~rec->put_clk_mask;
 375         RADEON_WRITE(rec->mask_clk_reg, temp);
 376         temp = RADEON_READ(rec->mask_clk_reg);
 377
 378         temp = RADEON_READ(rec->mask_data_reg);
 379         if (lock_state)
 380                 temp |= rec->put_data_mask;
 381         else
 382                 temp &= ~rec->put_data_mask;
 383         RADEON_WRITE(rec->mask_data_reg, temp);
 384         temp = RADEON_READ(rec->mask_data_reg);
 385 }
 386
 387 int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
 388 {
 389         struct drm_radeon_private *dev_priv = radeon_connector->base.dev->dev_private;
 390         struct edid *edid;
 391         int ret = 0;
 392
 393         if (!radeon_connector->ddc_bus)
 394                 return -1;
 395
 396         if (radeon_is_avivo(dev_priv))
 397                 avivo_i2c_do_lock(radeon_connector, 1);
 398         edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
 399         if (radeon_is_avivo(dev_priv))
 400                 avivo_i2c_do_lock(radeon_connector, 0);
 401         if (edid) {
 402                 drm_mode_connector_update_edid_property(&radeon_connector->base, edid);
 403                 ret = drm_add_edid_modes(&radeon_connector->base, edid);
 404                 kfree(edid);
 405                 return ret;
 406         }
 407         return -1;
 408 }
 409
 410 int radeon_ddc_dump(struct drm_connector *connector)
 411 {
 412         struct edid *edid;
 413         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 414         int ret = 0;
 415
 416         if (!radeon_connector->ddc_bus)
 417                 return -1;
 418         edid = drm_get_edid(connector, &radeon_connector->ddc_bus->adapter);
 419         if (edid) {
 420                 kfree(edid);
 421         }
 422         return ret;
 423 }
 424
 425 static inline uint32_t radeon_div(uint64_t n, uint32_t d)
 426 {
 427         uint64_t x, y, result;
 428         uint64_t mod;
 429
 430         n += d / 2;
 431
 432         mod = do_div(n, d);
 433         return n;
 434 }
 435
 436 void radeon_compute_pll(struct radeon_pll *pll,
 437                         uint64_t freq,
 438                         uint32_t *dot_clock_p,
 439                         uint32_t *fb_div_p,
 440                         uint32_t *ref_div_p,
 441                         uint32_t *post_div_p,
 442                         int flags)
 443 {
 444         uint32_t min_ref_div = pll->min_ref_div;
 445         uint32_t max_ref_div = pll->max_ref_div;
 446         uint32_t best_vco = pll->best_vco;
 447         uint32_t best_post_div = 1;
 448         uint32_t best_ref_div = 1;
 449         uint32_t best_feedback_div = 1;
 450         uint32_t best_freq = -1;
 451         uint32_t best_error = 0xffffffff;
 452         uint32_t best_vco_diff = 1;
 453         uint32_t post_div;
 454
 455         DRM_DEBUG("PLL freq %llu\n", freq);
 456         freq = freq * 1000;
 457
 458         if (flags & RADEON_PLL_USE_REF_DIV)
 459                 min_ref_div = max_ref_div = pll->reference_div;
 460         else {
 461                 while (min_ref_div < max_ref_div-1) {
 462                         uint32_t mid=(min_ref_div+max_ref_div)/2;
 463                         uint32_t pll_in = pll->reference_freq / mid;
 464                         if (pll_in < pll->pll_in_min)
 465                                 max_ref_div = mid;
 466                         else if (pll_in > pll->pll_in_max)
 467                                 min_ref_div = mid;
 468                         else
 469                                 break;
 470                 }
 471         }
 472
 473         for (post_div = pll->min_post_div; post_div <= pll->max_post_div; ++post_div) {
 474                 uint32_t ref_div;
 475
 476                 if ((flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))
 477                         continue;
 478
 479                 /* legacy radeons only have a few post_divs */
 480                 if (flags & RADEON_PLL_LEGACY) {
 481                         if ((post_div == 5) ||
 482                             (post_div == 7) ||
 483                             (post_div == 9) ||
 484                             (post_div == 10) ||
 485                             (post_div == 11))
 486                                 continue;
 487                 }
 488
 489                 for (ref_div = min_ref_div; ref_div <= max_ref_div; ++ref_div) {
 490                         uint32_t feedback_div, current_freq, error, vco_diff;
 491                         uint32_t pll_in = pll->reference_freq / ref_div;
 492                         uint32_t min_feed_div = pll->min_feedback_div;
 493                         uint32_t max_feed_div = pll->max_feedback_div+1;
 494
 495                         if (pll_in < pll->pll_in_min || pll_in > pll->pll_in_max)
 496                                 continue;
 497
 498                         while (min_feed_div < max_feed_div) {
 499                                 uint32_t vco;
 500                                 feedback_div = (min_feed_div+max_feed_div)/2;
 501
 502                                 vco = radeon_div((uint64_t)pll->reference_freq * feedback_div,
 503                                                  ref_div);
 504
 505                                 if (vco < pll->pll_out_min) {
 506                                         min_feed_div = feedback_div+1;
 507                                         continue;
 508                                 } else if(vco > pll->pll_out_max) {
 509                                         max_feed_div = feedback_div;
 510                                         continue;
 511                                 }
 512
 513                                 current_freq = radeon_div((uint64_t)pll->reference_freq * 10000 * feedback_div,
 514                                                           ref_div * post_div);
 515
 516                                 error = abs(current_freq - freq);
 517                                 vco_diff = abs(vco - best_vco);
 518
 519                                 if ((best_vco == 0 && error < best_error) ||
 520                                     (best_vco != 0 &&
 521                                      (error < best_error - 100 ||
 522                                       (abs(error - best_error) < 100 && vco_diff < best_vco_diff )))) {
 523                                         best_post_div = post_div;
 524                                         best_ref_div = ref_div;
 525                                         best_feedback_div = feedback_div;
 526                                         best_freq = current_freq;
 527                                         best_error = error;
 528                                         best_vco_diff = vco_diff;
 529                                 } else if (current_freq == freq) {
 530                                         if (best_freq == -1) {
 531                                                 best_post_div = post_div;
 532                                                 best_ref_div = ref_div;
 533                                                 best_feedback_div = feedback_div;
 534                                                 best_freq = current_freq;
 535                                                 best_error = error;
 536                                                 best_vco_diff = vco_diff;
 537                                         } else if ((flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) {
 538                                                 best_post_div = post_div;
 539                                                 best_ref_div = ref_div;
 540                                                 best_feedback_div = feedback_div;
 541                                                 best_freq = current_freq;
 542                                                 best_error = error;
 543                                                 best_vco_diff = vco_diff;
 544                                         }
 545                                 }
 546
 547                                 if (current_freq < freq)
 548                                         min_feed_div = feedback_div+1;
 549                                 else
 550                                         max_feed_div = feedback_div;
 551                         }
 552                 }
 553         }
 554
 555         *dot_clock_p = best_freq / 10000;
 556         *fb_div_p = best_feedback_div;
 557         *ref_div_p = best_ref_div;
 558         *post_div_p = best_post_div;
 559 }
 560
 561 void radeon_get_clock_info(struct drm_device *dev)
 562 {
 563         drm_radeon_private_t *dev_priv = dev->dev_private;
 564         struct radeon_pll *pll = &dev_priv->mode_info.pll;
 565         int ret;
 566
 567         if (dev_priv->is_atom_bios)
 568                 ret = radeon_atom_get_clock_info(dev);
 569         else
 570                 ret = radeon_combios_get_clock_info(dev);
 571
 572         if (ret) {
 573
 574                 if (pll->reference_div < 2) pll->reference_div = 12;
 575         } else {
 576                 // TODO FALLBACK
 577         }
 578
 579         if (radeon_is_avivo(dev_priv)) {
 580                 pll->min_post_div = 2;
 581                 pll->max_post_div = 0x7f;
 582         } else {
 583                 pll->min_post_div = 1;
 584                 pll->max_post_div = 12; // 16 on crtc 0??
 585         }
 586
 587         pll->min_ref_div = 2;
 588         pll->max_ref_div = 0x3ff;
 589         pll->min_feedback_div = 4;
 590         pll->max_feedback_div = 0x7ff;
 591         pll->best_vco = 0;
 592
 593 }
 594
 595 static void radeon_user_framebuffer_destroy(struct drm_framebuffer *fb)
 596 {
 597         struct radeon_framebuffer *radeon_fb = to_radeon_framebuffer(fb);
 598         struct drm_device *dev = fb->dev;
 599
 600         if (fb->fbdev)
 601                 radeonfb_remove(dev, fb);
 602
 603         drm_framebuffer_cleanup(fb);
 604         kfree(radeon_fb);
 605 }
 606
 607 static const struct drm_framebuffer_funcs radeon_fb_funcs = {
 608         .destroy = radeon_user_framebuffer_destroy,
 609 };
 610
 611 struct drm_framebuffer *radeon_user_framebuffer_create(struct drm_device *dev,
 612                                                        struct drm_file *filp,
 613                                                        struct drm_mode_fb_cmd *mode_cmd)
 614 {
 615
 616         struct radeon_framebuffer *radeon_fb;
 617
 618         radeon_fb = kzalloc(sizeof(*radeon_fb), GFP_KERNEL);
 619         if (!radeon_fb)
 620                 return NULL;
 621
 622         drm_framebuffer_init(dev, &radeon_fb->base, &radeon_fb_funcs);
 623         drm_helper_mode_fill_fb_struct(&radeon_fb->base, mode_cmd);
 624
 625         if (filp) {
 626                 radeon_fb->obj = drm_gem_object_lookup(dev, filp,
 627                                                        mode_cmd->handle);
 628                 if (!radeon_fb->obj) {
 629                         kfree(radeon_fb);
 630                         return NULL;
 631                 }
 632                 drm_gem_object_unreference(radeon_fb->obj);
 633         }
 634         return &radeon_fb->base;
 635 }
 636
 637 static const struct drm_mode_config_funcs radeon_mode_funcs = {
 638         .fb_create = radeon_user_framebuffer_create,
 639         .fb_changed = radeonfb_probe,
 640 };
 641
 642
 643 int radeon_modeset_init(struct drm_device *dev)
 644 {
 645         drm_radeon_private_t *dev_priv = dev->dev_private;
 646         static struct card_info card;
 647         size_t size;
 648         int num_crtc = 2, i;
 649         int ret;
 650
 651         drm_mode_config_init(dev);
 652
 653         dev->mode_config.funcs = (void *)&radeon_mode_funcs;
 654
 655         if (radeon_is_avivo(dev_priv)) {
 656                     dev->mode_config.max_width = 8192;
 657                     dev->mode_config.max_height = 8192;
 658         } else {
 659                     dev->mode_config.max_width = 4096;
 660                     dev->mode_config.max_height = 4096;
 661         }
 662
 663         dev->mode_config.fb_base = dev_priv->fb_aper_offset;
 664
 665         /* allocate crtcs - TODO single crtc */
 666         for (i = 0; i < num_crtc; i++) {
 667                 radeon_crtc_init(dev, i);
 668         }
 669
 670         /* okay we should have all the bios connectors */
 671
 672         ret = radeon_setup_enc_conn(dev);
 673
 674         if (!ret)
 675                 return ret;
 676
 677         drm_helper_initial_config(dev, false);
 678
 679         return 0;
 680 }
 681
 682
 683 int radeon_load_modeset_init(struct drm_device *dev)
 684 {
 685         int ret;
 686         ret = radeon_modeset_init(dev);
 687
 688         return ret;
 689 }
 690
 691 void radeon_modeset_cleanup(struct drm_device *dev)
 692 {
 693         drm_mode_config_cleanup(dev);
 694 }
 695