linux-core/radeon_pm.c

   1 /*
   2  * Copyright 2007-8 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors: Dave Airlie
  24  *          Alex Deucher
  25  */
  26 #include "drmP.h"
  27 #include "radeon_drm.h"
  28 #include "radeon_drv.h"
  29
  30 #include "atom.h"
  31
  32 #include "drm_crtc_helper.h"
  33
  34 int radeon_suspend(struct drm_device *dev, pm_message_t state)
  35 {
  36         struct drm_radeon_private *dev_priv = dev->dev_private;
  37         struct drm_framebuffer *fb;
  38         int i;
  39
  40         if (!dev || !dev_priv) {
  41                 return -ENODEV;
  42         }
  43
  44         if (state.event == PM_EVENT_PRETHAW)
  45                 return 0;
  46
  47         if (!drm_core_check_feature(dev, DRIVER_MODESET))
  48                 return 0;
  49
  50         /* unpin the front buffers */
  51         list_for_each_entry(fb, &dev->mode_config.fb_kernel_list, filp_head) {
  52                 struct radeon_framebuffer *radeon_fb = to_radeon_framebuffer(fb);
  53
  54                 if (!radeon_fb)
  55                         continue;
  56
  57                 if (!radeon_fb->obj)
  58                         continue;
  59
  60                 radeon_gem_object_unpin(radeon_fb->obj);
  61         }
  62
  63         if (!(dev_priv->flags & RADEON_IS_IGP))
  64                 drm_bo_evict_mm(dev, DRM_BO_MEM_VRAM, 0);
  65
  66         if (dev_priv->flags & RADEON_IS_PCIE) {
  67                 memcpy_fromio(dev_priv->mm.pcie_table_backup, dev_priv->mm.pcie_table.kmap.virtual, RADEON_PCIGART_TABLE_SIZE);
  68         }
  69
  70         dev_priv->pmregs.crtc_ext_cntl = RADEON_READ(RADEON_CRTC_EXT_CNTL);
  71         for (i = 0; i < 8; i++)
  72                 dev_priv->pmregs.bios_scratch[i] = RADEON_READ(RADEON_BIOS_0_SCRATCH + (i * 4));
  73
  74         radeon_modeset_cp_suspend(dev);
  75
  76         pci_save_state(dev->pdev);
  77
  78         if (state.event == PM_EVENT_SUSPEND) {
  79                 /* Shut down the device */
  80                 pci_disable_device(dev->pdev);
  81                 pci_set_power_state(dev->pdev, PCI_D3hot);
  82         }
  83         return 0;
  84 }
  85
  86 int radeon_resume(struct drm_device *dev)
  87 {
  88         struct drm_radeon_private *dev_priv = dev->dev_private;
  89         struct drm_framebuffer *fb;
  90         int i;
  91         u32 tmp;
  92
  93         if (!drm_core_check_feature(dev, DRIVER_MODESET))
  94                 return 0;
  95
  96         pci_set_power_state(dev->pdev, PCI_D0);
  97         pci_restore_state(dev->pdev);
  98         if (pci_enable_device(dev->pdev))
  99                 return -1;
 100         pci_set_master(dev->pdev);
 101
 102         /* Turn on bus mastering */
 103         tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
 104         RADEON_WRITE(RADEON_BUS_CNTL, tmp);
 105
 106         /* on atom cards re init the whole card
 107            and set the modes again */
 108
 109         if (dev_priv->is_atom_bios) {
 110                 struct atom_context *ctx = dev_priv->mode_info.atom_context;
 111                 atom_asic_init(ctx);
 112         } else {
 113                 radeon_combios_asic_init(dev);
 114         }
 115
 116         for (i = 0; i < 8; i++)
 117                 RADEON_WRITE(RADEON_BIOS_0_SCRATCH + (i * 4), dev_priv->pmregs.bios_scratch[i]);
 118
 119         /* VGA render mayhaps */
 120         if (dev_priv->chip_family >= CHIP_RS600) {
 121                 uint32_t tmp;
 122
 123                 RADEON_WRITE(AVIVO_D1VGA_CONTROL, 0);
 124                 RADEON_WRITE(AVIVO_D2VGA_CONTROL, 0);
 125                 tmp = RADEON_READ(0x300);
 126                 tmp &= ~(3 << 16);
 127                 RADEON_WRITE(0x300, tmp);
 128                 RADEON_WRITE(0x308, (1 << 8));
 129                 RADEON_WRITE(0x310, dev_priv->fb_location);
 130                 RADEON_WRITE(0x594, 0);
 131         }
 132
 133         RADEON_WRITE(RADEON_CRTC_EXT_CNTL, dev_priv->pmregs.crtc_ext_cntl);
 134
 135         radeon_static_clocks_init(dev);
 136
 137         radeon_init_memory_map(dev);
 138
 139         if (dev_priv->flags & RADEON_IS_PCIE) {
 140                 memcpy_toio(dev_priv->mm.pcie_table.kmap.virtual, dev_priv->mm.pcie_table_backup, RADEON_PCIGART_TABLE_SIZE);
 141         }
 142
 143         if (dev_priv->mm.ring.kmap.virtual)
 144                 memset(dev_priv->mm.ring.kmap.virtual, 0, RADEON_DEFAULT_RING_SIZE);
 145
 146         if (dev_priv->mm.ring_read.kmap.virtual)
 147                 memset(dev_priv->mm.ring_read.kmap.virtual, 0, PAGE_SIZE);
 148
 149         radeon_modeset_cp_resume(dev);
 150
 151         /* reset swi reg */
 152         RADEON_WRITE(RADEON_LAST_SWI_REG, dev_priv->counter);
 153
 154 //      radeon_enable_interrupt(dev);
 155
 156         /* reset the context for userspace */
 157         if (dev->primary->master) {
 158                 struct drm_radeon_master_private *master_priv = dev->primary->master->driver_priv;
 159                 if (master_priv->sarea_priv)
 160                         master_priv->sarea_priv->ctx_owner = 0;
 161         }
 162
 163         /* unpin the front buffers */
 164         list_for_each_entry(fb, &dev->mode_config.fb_kernel_list, filp_head) {
 165
 166                 struct radeon_framebuffer *radeon_fb = to_radeon_framebuffer(fb);
 167
 168                 if (!radeon_fb)
 169                         continue;
 170
 171                 if (!radeon_fb->obj)
 172                         continue;
 173
 174                 radeon_gem_object_pin(radeon_fb->obj, PAGE_SIZE, RADEON_GEM_DOMAIN_VRAM);
 175         }
 176         /* blat the mode back in */
 177         drm_helper_resume_force_mode(dev);
 178
 179         return 0;
 180 }