linux-core/xgi_drv.c

   1 /****************************************************************************
   2  * Copyright (C) 2003-2006 by XGI Technology, Taiwan.
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation on the rights to use, copy, modify, merge,
  10  * publish, distribute, sublicense, and/or sell copies of the Software,
  11  * and to permit persons to whom the Software is furnished to do so,
  12  * subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
  21  * XGI AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  24  * DEALINGS IN THE SOFTWARE.
  25  ***************************************************************************/
  26
  27 #include "drmP.h"
  28 #include "drm.h"
  29 #include "xgi_drv.h"
  30 #include "xgi_regs.h"
  31 #include "xgi_misc.h"
  32 #include "xgi_cmdlist.h"
  33
  34 #include "drm_pciids.h"
  35
  36 static struct pci_device_id pciidlist[] = {
  37         xgi_PCI_IDS
  38 };
  39
  40 static struct drm_fence_driver xgi_fence_driver = {
  41         .num_classes = 1,
  42         .wrap_diff = BEGIN_BEGIN_IDENTIFICATION_MASK,
  43         .flush_diff = BEGIN_BEGIN_IDENTIFICATION_MASK - 1,
  44         .sequence_mask = BEGIN_BEGIN_IDENTIFICATION_MASK,
  45         .lazy_capable = 1,
  46         .emit = xgi_fence_emit_sequence,
  47         .poke_flush = xgi_poke_flush,
  48         .has_irq = xgi_fence_has_irq
  49 };
  50
  51 int xgi_bootstrap(struct drm_device *, void *, struct drm_file *);
  52
  53 static struct drm_ioctl_desc xgi_ioctls[] = {
  54         DRM_IOCTL_DEF(DRM_XGI_BOOTSTRAP, xgi_bootstrap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  55         DRM_IOCTL_DEF(DRM_XGI_ALLOC, xgi_alloc_ioctl, DRM_AUTH),
  56         DRM_IOCTL_DEF(DRM_XGI_FREE, xgi_free_ioctl, DRM_AUTH),
  57         DRM_IOCTL_DEF(DRM_XGI_SUBMIT_CMDLIST, xgi_submit_cmdlist, DRM_AUTH),
  58         DRM_IOCTL_DEF(DRM_XGI_STATE_CHANGE, xgi_state_change_ioctl, DRM_AUTH|DRM_MASTER),
  59 };
  60
  61 static const int xgi_max_ioctl = DRM_ARRAY_SIZE(xgi_ioctls);
  62
  63 static int probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  64 static int xgi_driver_load(struct drm_device *dev, unsigned long flags);
  65 static int xgi_driver_unload(struct drm_device *dev);
  66 static void xgi_driver_lastclose(struct drm_device * dev);
  67 static void xgi_reclaim_buffers_locked(struct drm_device * dev,
  68         struct drm_file * filp);
  69 static irqreturn_t xgi_kern_isr(DRM_IRQ_ARGS);
  70
  71
  72 static struct drm_driver driver = {
  73         .driver_features =
  74                 DRIVER_PCI_DMA | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ |
  75                 DRIVER_IRQ_SHARED | DRIVER_SG,
  76         .dev_priv_size = sizeof(struct xgi_info),
  77         .load = xgi_driver_load,
  78         .unload = xgi_driver_unload,
  79         .lastclose = xgi_driver_lastclose,
  80         .dma_quiescent = NULL,
  81         .irq_preinstall = NULL,
  82         .irq_postinstall = NULL,
  83         .irq_uninstall = NULL,
  84         .irq_handler = xgi_kern_isr,
  85         .reclaim_buffers = drm_core_reclaim_buffers,
  86         .reclaim_buffers_idlelocked = xgi_reclaim_buffers_locked,
  87         .get_map_ofs = drm_core_get_map_ofs,
  88         .get_reg_ofs = drm_core_get_reg_ofs,
  89         .ioctls = xgi_ioctls,
  90         .dma_ioctl = NULL,
  91
  92         .fops = {
  93                 .owner = THIS_MODULE,
  94                 .open = drm_open,
  95                 .release = drm_release,
  96                 .ioctl = drm_ioctl,
  97                 .mmap = drm_mmap,
  98                 .poll = drm_poll,
  99                 .fasync = drm_fasync,
 100 #if defined(CONFIG_COMPAT) && LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
 101                 .compat_ioctl = xgi_compat_ioctl,
 102 #endif
 103         },
 104
 105         .pci_driver = {
 106                 .name = DRIVER_NAME,
 107                 .id_table = pciidlist,
 108                 .probe = probe,
 109                 .remove = __devexit_p(drm_cleanup_pci),
 110         },
 111
 112         .fence_driver = &xgi_fence_driver,
 113
 114         .name = DRIVER_NAME,
 115         .desc = DRIVER_DESC,
 116         .date = DRIVER_DATE,
 117         .major = DRIVER_MAJOR,
 118         .minor = DRIVER_MINOR,
 119         .patchlevel = DRIVER_PATCHLEVEL,
 120
 121 };
 122
 123 static int probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 124 {
 125         return drm_get_dev(pdev, ent, &driver);
 126 }
 127
 128
 129 static int __init xgi_init(void)
 130 {
 131         driver.num_ioctls = xgi_max_ioctl;
 132         return drm_init(&driver, pciidlist);
 133 }
 134
 135 static void __exit xgi_exit(void)
 136 {
 137         drm_exit(&driver);
 138 }
 139
 140 module_init(xgi_init);
 141 module_exit(xgi_exit);
 142
 143 MODULE_AUTHOR(DRIVER_AUTHOR);
 144 MODULE_DESCRIPTION(DRIVER_DESC);
 145 MODULE_LICENSE("GPL and additional rights");
 146
 147
 148 void xgi_engine_init(struct xgi_info * info)
 149 {
 150         u8 temp;
 151
 152
 153         OUT3C5B(info->mmio_map, 0x11, 0x92);
 154
 155         /* -------> copy from OT2D
 156          * PCI Retry Control Register.
 157          * disable PCI read retry & enable write retry in mem. (10xx xxxx)b
 158          */
 159         temp = IN3X5B(info->mmio_map, 0x55);
 160         OUT3X5B(info->mmio_map, 0x55, (temp & 0xbf) | 0x80);
 161
 162         xgi_enable_ge(info);
 163
 164         /* Enable linear addressing of the card. */
 165         temp = IN3X5B(info->mmio_map, 0x21);
 166         OUT3X5B(info->mmio_map, 0x21, temp | 0x20);
 167
 168         /* Enable 32-bit internal data path */
 169         temp = IN3X5B(info->mmio_map, 0x2A);
 170         OUT3X5B(info->mmio_map, 0x2A, temp | 0x40);
 171
 172         /* Enable PCI burst write ,disable burst read and enable MMIO. */
 173         /*
 174          * 0x3D4.39 Enable PCI burst write, disable burst read and enable MMIO.
 175          * 7 ---- Pixel Data Format 1:  big endian 0:  little endian
 176          * 6 5 4 3---- Memory Data with Big Endian Format, BE[3:0]#  with Big Endian Format
 177          * 2 ---- PCI Burst Write Enable
 178          * 1 ---- PCI Burst Read Enable
 179          * 0 ---- MMIO Control
 180          */
 181         temp = IN3X5B(info->mmio_map, 0x39);
 182         OUT3X5B(info->mmio_map, 0x39, (temp | 0x05) & 0xfd);
 183
 184         /* enable GEIO decode */
 185         /* temp = IN3X5B(info->mmio_map, 0x29);
 186          * OUT3X5B(info->mmio_map, 0x29, temp | 0x08);
 187          */
 188
 189         /* Enable graphic engine I/O PCI retry function*/
 190         /* temp = IN3X5B(info->mmio_map, 0x62);
 191          * OUT3X5B(info->mmio_map, 0x62, temp | 0x50);
 192          */
 193
 194         /* protect all register except which protected by 3c5.0e.7 */
 195         /* OUT3C5B(info->mmio_map, 0x11, 0x87); */
 196 }
 197
 198
 199 int xgi_bootstrap(struct drm_device * dev, void * data,
 200                   struct drm_file * filp)
 201 {
 202         struct xgi_info *info = dev->dev_private;
 203         struct xgi_bootstrap * bs = (struct xgi_bootstrap *) data;
 204         struct drm_map_list *maplist;
 205         int err;
 206
 207
 208         DRM_SPININIT(&info->fence_lock, "fence lock");
 209         info->next_sequence = 0;
 210         info->complete_sequence = 0;
 211
 212         if (info->mmio_map == NULL) {
 213                 err = drm_addmap(dev, info->mmio.base, info->mmio.size,
 214                                  _DRM_REGISTERS, _DRM_KERNEL,
 215                                  &info->mmio_map);
 216                 if (err) {
 217                         DRM_ERROR("Unable to map MMIO region: %d\n", err);
 218                         return err;
 219                 }
 220
 221                 xgi_enable_mmio(info);
 222                 xgi_engine_init(info);
 223         }
 224
 225
 226         info->fb.size = IN3CFB(info->mmio_map, 0x54) * 8 * 1024 * 1024;
 227
 228         DRM_INFO("fb   base: 0x%lx, size: 0x%x (probed)\n",
 229                  (unsigned long) info->fb.base, info->fb.size);
 230
 231
 232         if ((info->fb.base == 0) || (info->fb.size == 0)) {
 233                 DRM_ERROR("framebuffer appears to be wrong: 0x%lx 0x%x\n",
 234                           (unsigned long) info->fb.base, info->fb.size);
 235                 return -EINVAL;
 236         }
 237
 238
 239         /* Init the resource manager */
 240         if (!info->fb_heap_initialized) {
 241                 err = xgi_fb_heap_init(info);
 242                 if (err) {
 243                         DRM_ERROR("Unable to initialize FB heap.\n");
 244                         return err;
 245                 }
 246         }
 247
 248
 249         info->pcie.size = bs->gart.size;
 250
 251         /* Init the resource manager */
 252         if (!info->pcie_heap_initialized) {
 253                 err = xgi_pcie_heap_init(info);
 254                 if (err) {
 255                         DRM_ERROR("Unable to initialize GART heap.\n");
 256                         return err;
 257                 }
 258
 259                 /* Alloc 1M bytes for cmdbuffer which is flush2D batch array */
 260                 err = xgi_cmdlist_initialize(info, 0x100000, filp);
 261                 if (err) {
 262                         DRM_ERROR("xgi_cmdlist_initialize() failed\n");
 263                         return err;
 264                 }
 265         }
 266
 267
 268         if (info->pcie_map == NULL) {
 269                 err = drm_addmap(info->dev, 0, info->pcie.size,
 270                                  _DRM_SCATTER_GATHER, _DRM_LOCKED,
 271                                  & info->pcie_map);
 272                 if (err) {
 273                         DRM_ERROR("Could not add map for GART backing "
 274                                   "store.\n");
 275                         return err;
 276                 }
 277         }
 278
 279
 280         maplist = drm_find_matching_map(dev, info->pcie_map);
 281         if (maplist == NULL) {
 282                 DRM_ERROR("Could not find GART backing store map.\n");
 283                 return -EINVAL;
 284         }
 285
 286         bs->gart = *info->pcie_map;
 287         bs->gart.handle = (void *)(unsigned long) maplist->user_token;
 288         return 0;
 289 }
 290
 291
 292 void xgi_driver_lastclose(struct drm_device * dev)
 293 {
 294         struct xgi_info * info = dev->dev_private;
 295
 296         if (info != NULL) {
 297                 if (info->mmio_map != NULL) {
 298                         xgi_cmdlist_cleanup(info);
 299                         xgi_disable_ge(info);
 300                         xgi_disable_mmio(info);
 301                 }
 302
 303                 /* The core DRM lastclose routine will destroy all of our
 304                  * mappings for us.  NULL out the pointers here so that
 305                  * xgi_bootstrap can do the right thing.
 306                  */
 307                 info->pcie_map = NULL;
 308                 info->mmio_map = NULL;
 309                 info->fb_map = NULL;
 310
 311                 if (info->pcie_heap_initialized) {
 312                         drm_ati_pcigart_cleanup(dev, &info->gart_info);
 313                 }
 314
 315                 if (info->fb_heap_initialized
 316                     || info->pcie_heap_initialized) {
 317                         drm_sman_cleanup(&info->sman);
 318
 319                         info->fb_heap_initialized = FALSE;
 320                         info->pcie_heap_initialized = FALSE;
 321                 }
 322         }
 323 }
 324
 325
 326 void xgi_reclaim_buffers_locked(struct drm_device * dev,
 327                                 struct drm_file * filp)
 328 {
 329         struct xgi_info * info = dev->dev_private;
 330
 331         mutex_lock(&info->dev->struct_mutex);
 332         if (drm_sman_owner_clean(&info->sman, (unsigned long) filp)) {
 333                 mutex_unlock(&info->dev->struct_mutex);
 334                 return;
 335         }
 336
 337         if (dev->driver->dma_quiescent) {
 338                 dev->driver->dma_quiescent(dev);
 339         }
 340
 341         drm_sman_owner_cleanup(&info->sman, (unsigned long) filp);
 342         mutex_unlock(&info->dev->struct_mutex);
 343         return;
 344 }
 345
 346
 347 /*
 348  * driver receives an interrupt if someone waiting, then hand it off.
 349  */
 350 irqreturn_t xgi_kern_isr(DRM_IRQ_ARGS)
 351 {
 352         struct drm_device *dev = (struct drm_device *) arg;
 353         struct xgi_info *info = dev->dev_private;
 354         const u32 irq_bits = le32_to_cpu(DRM_READ32(info->mmio_map,
 355                                         (0x2800
 356                                          + M2REG_AUTO_LINK_STATUS_ADDRESS)))
 357                 & (M2REG_ACTIVE_TIMER_INTERRUPT_MASK
 358                    | M2REG_ACTIVE_INTERRUPT_0_MASK
 359                    | M2REG_ACTIVE_INTERRUPT_2_MASK
 360                    | M2REG_ACTIVE_INTERRUPT_3_MASK);
 361
 362
 363         if (irq_bits != 0) {
 364                 DRM_WRITE32(info->mmio_map,
 365                             0x2800 + M2REG_AUTO_LINK_SETTING_ADDRESS,
 366                             cpu_to_le32(M2REG_AUTO_LINK_SETTING_COMMAND | irq_bits));
 367                 xgi_fence_handler(dev);
 368                 return IRQ_HANDLED;
 369         } else {
 370                 return IRQ_NONE;
 371         }
 372 }
 373
 374
 375 int xgi_driver_load(struct drm_device *dev, unsigned long flags)
 376 {
 377         struct xgi_info *info = drm_alloc(sizeof(*info), DRM_MEM_DRIVER);
 378         int err;
 379
 380         if (!info)
 381                 return -ENOMEM;
 382
 383         (void) memset(info, 0, sizeof(*info));
 384         dev->dev_private = info;
 385         info->dev = dev;
 386
 387         info->mmio.base = drm_get_resource_start(dev, 1);
 388         info->mmio.size = drm_get_resource_len(dev, 1);
 389
 390         DRM_INFO("mmio base: 0x%lx, size: 0x%x\n",
 391                  (unsigned long) info->mmio.base, info->mmio.size);
 392
 393
 394         if ((info->mmio.base == 0) || (info->mmio.size == 0)) {
 395                 DRM_ERROR("mmio appears to be wrong: 0x%lx 0x%x\n",
 396                           (unsigned long) info->mmio.base, info->mmio.size);
 397                 err = -EINVAL;
 398                 goto fail;
 399         }
 400
 401
 402         info->fb.base = drm_get_resource_start(dev, 0);
 403         info->fb.size = drm_get_resource_len(dev, 0);
 404
 405         DRM_INFO("fb   base: 0x%lx, size: 0x%x\n",
 406                  (unsigned long) info->fb.base, info->fb.size);
 407
 408
 409         err = drm_sman_init(&info->sman, 2, 12, 8);
 410         if (err) {
 411                 goto fail;
 412         }
 413
 414
 415         return 0;
 416
 417 fail:
 418         drm_free(info, sizeof(*info), DRM_MEM_DRIVER);
 419         return err;
 420 }
 421
 422 int xgi_driver_unload(struct drm_device *dev)
 423 {
 424         struct xgi_info * info = dev->dev_private;
 425
 426         drm_sman_takedown(&info->sman);
 427         drm_free(info, sizeof(*info), DRM_MEM_DRIVER);
 428         dev->dev_private = NULL;
 429
 430         return 0;
 431 }