4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
23 #include "cpu_loop-common.h"
24 #include "qemu/guest-random.h"
25 #include "hw/semihosting/common-semi.h"
26 #include "target/arm/syndrome.h"
28 #define get_user_code_u32(x, gaddr, env) \
29 ({ abi_long __r = get_user_u32((x), (gaddr)); \
30 if (!__r && bswap_code(arm_sctlr_b(env))) { \
36 #define get_user_code_u16(x, gaddr, env) \
37 ({ abi_long __r = get_user_u16((x), (gaddr)); \
38 if (!__r && bswap_code(arm_sctlr_b(env))) { \
44 #define get_user_data_u32(x, gaddr, env) \
45 ({ abi_long __r = get_user_u32((x), (gaddr)); \
46 if (!__r && arm_cpu_bswap_data(env)) { \
52 #define get_user_data_u16(x, gaddr, env) \
53 ({ abi_long __r = get_user_u16((x), (gaddr)); \
54 if (!__r && arm_cpu_bswap_data(env)) { \
60 #define put_user_data_u32(x, gaddr, env) \
61 ({ typeof(x) __x = (x); \
62 if (arm_cpu_bswap_data(env)) { \
65 put_user_u32(__x, (gaddr)); \
68 #define put_user_data_u16(x, gaddr, env) \
69 ({ typeof(x) __x = (x); \
70 if (arm_cpu_bswap_data(env)) { \
73 put_user_u16(__x, (gaddr)); \
76 /* AArch64 main loop */
77 void cpu_loop(CPUARMState *env)
79 CPUState *cs = env_cpu(env);
82 target_siginfo_t info;
86 trapnr = cpu_exec(cs);
88 process_queued_cpu_work(cs);
101 if (ret == -TARGET_ERESTARTSYS) {
103 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
108 /* just indicate that signals should be handled asap */
111 info.si_signo = TARGET_SIGILL;
113 info.si_code = TARGET_ILL_ILLOPN;
114 info._sifields._sigfault._addr = env->pc;
115 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
117 case EXCP_PREFETCH_ABORT:
118 case EXCP_DATA_ABORT:
119 info.si_signo = TARGET_SIGSEGV;
121 info._sifields._sigfault._addr = env->exception.vaddress;
123 /* We should only arrive here with EC in {DATAABORT, INSNABORT}. */
124 ec = syn_get_ec(env->exception.syndrome);
125 assert(ec == EC_DATAABORT || ec == EC_INSNABORT);
127 /* Both EC have the same format for FSC, or close enough. */
128 fsc = extract32(env->exception.syndrome, 0, 6);
130 case 0x04 ... 0x07: /* Translation fault, level {0-3} */
131 info.si_code = TARGET_SEGV_MAPERR;
133 case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */
134 case 0x0d ... 0x0f: /* Permission fault, level {1-3} */
135 info.si_code = TARGET_SEGV_ACCERR;
137 case 0x11: /* Synchronous Tag Check Fault */
138 info.si_code = TARGET_SEGV_MTESERR;
141 g_assert_not_reached();
144 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
148 info.si_signo = TARGET_SIGTRAP;
150 info.si_code = TARGET_TRAP_BRKPT;
151 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
154 env->xregs[0] = do_common_semihosting(cs);
158 /* nothing to do here for user-mode, just resume guest code */
161 cpu_exec_step_atomic(cs);
164 EXCP_DUMP(env, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
167 process_pending_signals(env);
168 /* Exception return on AArch64 always clears the exclusive monitor,
169 * so any return to running guest code implies this.
171 env->exclusive_addr = -1;
175 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
177 ARMCPU *cpu = env_archcpu(env);
178 CPUState *cs = env_cpu(env);
179 TaskState *ts = cs->opaque;
180 struct image_info *info = ts->info;
183 if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
185 "The selected ARM CPU does not support 64 bit mode\n");
189 for (i = 0; i < 31; i++) {
190 env->xregs[i] = regs->regs[i];
193 env->xregs[31] = regs->sp;
194 #ifdef TARGET_WORDS_BIGENDIAN
195 env->cp15.sctlr_el[1] |= SCTLR_E0E;
196 for (i = 1; i < 4; ++i) {
197 env->cp15.sctlr_el[i] |= SCTLR_EE;
199 arm_rebuild_hflags(env);
202 if (cpu_isar_feature(aa64_pauth, cpu)) {
203 qemu_guest_getrandom_nofail(&env->keys, sizeof(env->keys));
206 ts->stack_base = info->start_stack;
207 ts->heap_base = info->brk;
208 /* This will be filled in on the first SYS_HEAPINFO call. */