4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
22 #include "user-internals.h"
23 #include "cpu_loop-common.h"
24 #include "signal-common.h"
27 static int get_pgm_data_si_code(int dxc_code)
30 /* Non-simulated IEEE exceptions */
32 return TARGET_FPE_FLTINV;
34 return TARGET_FPE_FLTDIV;
38 return TARGET_FPE_FLTOVF;
42 return TARGET_FPE_FLTUND;
45 return TARGET_FPE_FLTRES;
48 * Non-IEEE and simulated IEEE:
49 * Includes compare-and-trap, quantum exception, etc.
50 * Simulated IEEE are included here to match current
56 void cpu_loop(CPUS390XState *env)
58 CPUState *cs = env_cpu(env);
65 trapnr = cpu_exec(cs);
67 process_queued_cpu_work(cs);
71 /* Just indicate that signals should be handled asap. */
75 n = env->int_svc_code;
80 env->psw.addr += env->int_svc_ilen;
81 ret = do_syscall(env, n, env->regs[2], env->regs[3],
82 env->regs[4], env->regs[5],
83 env->regs[6], env->regs[7], 0, 0);
84 if (ret == -QEMU_ERESTARTSYS) {
85 env->psw.addr -= env->int_svc_ilen;
86 } else if (ret != -QEMU_ESIGRETURN) {
90 if (unlikely(cs->singlestep_enabled)) {
92 * cpu_tb_exec() did not raise EXCP_DEBUG, because it has seen
93 * that EXCP_SVC was already pending.
95 cs->exception_index = EXCP_DEBUG;
101 sig = TARGET_SIGTRAP;
102 n = TARGET_TRAP_BRKPT;
104 * For SIGTRAP the PSW must point after the instruction, which it
105 * already does thanks to s390x_tr_tb_stop(). si_addr doesn't need
111 n = env->int_pgm_code;
116 n = TARGET_ILL_ILLOPC;
119 force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_ACCERR,
123 force_sig_fault(TARGET_SIGSEGV, TARGET_SEGV_MAPERR,
127 case PGM_SPECIFICATION:
132 n = TARGET_ILL_ILLOPN;
135 case PGM_FIXPT_OVERFLOW:
137 n = TARGET_FPE_INTOVF;
139 case PGM_FIXPT_DIVIDE:
141 n = TARGET_FPE_INTDIV;
145 n = (env->fpc >> 8) & 0xff;
151 n = get_pgm_data_si_code(n);
155 fprintf(stderr, "Unhandled program exception: %#x\n", n);
156 cpu_dump_state(cs, stderr, 0);
162 addr = env->psw.addr;
164 * For SIGILL and SIGFPE the PSW must point after the instruction.
166 env->psw.addr += env->int_pgm_ilen;
168 force_sig_fault(sig, n, addr);
172 cpu_exec_step_atomic(cs);
175 fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
176 cpu_dump_state(cs, stderr, 0);
179 process_pending_signals (env);
183 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
186 for (i = 0; i < 16; i++) {
187 env->regs[i] = regs->gprs[i];
189 env->psw.mask = regs->psw.mask;
190 env->psw.addr = regs->psw.addr;