1 .\" Copyright (c) International Business Machines Corp., 2006
3 .\" This program is free software; you can redistribute it and/or
4 .\" modify it under the terms of the GNU General Public License as
5 .\" published by the Free Software Foundation; either version 2 of
6 .\" the License, or (at your option) any later version.
8 .\" This program is distributed in the hope that it will be useful,
9 .\" but WITHOUT ANY WARRANTY; without even the implied warranty of
10 .\" MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
11 .\" the GNU General Public License for more details.
13 .\" You should have received a copy of the GNU General Public License
14 .\" along with this program; if not, write to the Free Software
15 .\" Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 .\" 2005-09-28, created by Arnd Bergmann <arndb@de.ibm.com>
20 .\" 2006-06-16, revised by Eduardo M. Fleury <efleury@br.ibm.com>
21 .\" 2007-07-10, some polishing by mtk
22 .\" 2007-09-28, updates for newer kernels, added example
23 .\" by Jeremy Kerr <jk@ozlabs.org>
25 .\" Japanese Version Copyright (c) 2007 Akihiro MOTOKI
26 .\" all rights reserved.
27 .\" Translated 2007-10-19, Akihiro MOTOKI <amotoki@dd.iij4u.or.jp>
28 .\" Updated 2008-11-10, Akihiro MOTOKI <amotoki@dd.iij4u.or.jp>, LDP v3.04
30 .TH SPU_RUN 2 2007-11-25 Linux "Linux Programmer's Manual"
33 .\"O spu_run \- execute an SPU context
34 spu_run \- SPU ¥³¥ó¥Æ¥¥¹¥È¤ò¼Â¹Ô¤¹¤ë
38 .B #include <sys/spu.h>
40 .BI "int spu_run(int " fd ", unsigned int *" npc \
41 ", unsigned int *" event ");"
47 .\"O system call is used on PowerPC machines that implement the
48 .\"O Cell Broadband Engine Architecture in order to access Synergistic
49 .\"O Processor Units (SPUs).
52 .\"O argument is a file descriptor returned by
53 .\"O .BR spu_create (2)
54 .\"O that refers to a specific SPU context.
55 .\"O When the context gets scheduled to a physical SPU,
56 .\"O it starts execution at the instruction pointer passed in
59 ¥·¥¹¥Æ¥à¥³¡¼¥ë¤Ï¡¢Cell Broadband Engine ¥¢¡¼¥¥Æ¥¯¥Á¥ã¤ò¼ÂÁõ¤·¤¿
60 PowerPC ¥Þ¥·¥ó¤Ç Synergistic Processor Units (SPU) ¤Ë¥¢¥¯¥»¥¹¤¹¤ë¤¿¤á¤Ë
65 ¤¬ÊÖ¤¹¥Õ¥¡¥¤¥ë¥Ç¥£¥¹¥¯¥ê¥×¥¿¤Ç¡¢
66 ÆÃÄê¤Î SPU ¥³¥ó¥Æ¥¥¹¥È¤ò»²¾È¤¹¤ë¡£
67 ¤½¤Î¥³¥ó¥Æ¥¥¹¥È¤¬ÊªÍý SPU ¤Ë³ä¤êÅö¤Æ¤é¤ì¤ë¤È¡¢
69 ¤ÇÅϤµ¤ì¤¿Ì¿Îá¥Ý¥¤¥ó¥¿ (instruction pointer) ¤«¤é¼Â¹Ô¤¬³«»Ï¤µ¤ì¤ë¡£
71 .\"O Execution of SPU code happens synchronously, meaning that
73 .\"O blocks while the SPU is still running.
74 .\"O If there is a need
75 .\"O to execute SPU code in parallel with other code on either the
76 .\"O main CPU or other SPUs, a new thread of execution must be created
77 .\"O first (e.g., using
78 .\"O .BR pthread_create (3)).
79 SPU ¥³¡¼¥É¤Î¼Â¹Ô¤ÏƱ´üŪ (synchronously) ¤Ë¹Ô¤ï¤ì¤ë¡¢¤Ä¤Þ¤ê
83 SPU ¥³¡¼¥É¤Î¼Â¹Ô¤ò¥á¥¤¥ó CPU ¤ä¾¤Î SPU ¤ÈʹԤ·¤Æ¹Ô¤¦É¬Íפ¬¤¢¤ë¾ì¹ç¤Ï¡¢
84 ºÇ½é¤Ë¡¢¤½¤Î SPU ¥³¡¼¥É¤ò¼Â¹Ô¤¹¤ë¿·¤·¤¤¥¹¥ì¥Ã¥É¤ò¡¢(Î㤨¤Ð
85 .BR pthread_create (3)
86 ¤Ê¤É¤ò»È¤Ã¤Æ) À¸À®¤·¤Ê¤±¤ì¤Ð¤Ê¤é¤Ê¤¤¡£
90 .\"O returns, the current value of the SPU program counter is written to
92 .\"O so successive calls to
98 ¤¬ÊÖ¤ë¤È¤¤Ë¤Ï¡¢SPU ¤Î¥×¥í¥°¥é¥à¥«¥¦¥ó¥¿¤Î¸½ºßÃͤ¬
105 ¥Ý¥¤¥ó¥¿¤ò»È¤¦¤³¤È¤¬¤Ç¤¤ë¡£
109 .\"O argument provides a buffer for an extended status code.
111 .\"O context was created with the
112 .\"O .B SPU_CREATE_EVENTS_ENABLED
113 .\"O flag, then this buffer is populated by the Linux kernel before
117 °ú¤¿ô¤Ë¤Ï¡¢³ÈÄ¥¥¹¥Æ¡¼¥¿¥¹¥³¡¼¥ÉÍѤΥХåե¡¤ò»ØÄꤹ¤ë¡£
118 .B SPU_CREATE_EVENTS_ENABLED
119 ¥Õ¥é¥°ÉÕ¤¤Ç SPU ¥³¥ó¥Æ¥¥¹¥È¤¬ºîÀ®¤µ¤ì¤ë¤È¡¢
121 ¤¬ÊÖ¤ëÁ°¤Ë Linux ¥«¡¼¥Í¥ë¤Ë¤è¤ê¤³¤Î¥Ð¥Ã¥Õ¥¡¤Ë
122 ³ÈÄ¥¥¹¥Æ¡¼¥¿¥¹¥³¡¼¥É¤¬³ÊǼ¤µ¤ì¤ë¡£
124 .\"O The status code may be one (or more) of the following constants:
125 ¥¹¥Æ¡¼¥¿¥¹¥³¡¼¥É¤Ë¤Ï°Ê²¼¤ÎÄê¿ô¤¬°ì¤Ä°Ê¾åÆþ¤ë¡£
127 .B SPE_EVENT_DMA_ALIGNMENT
128 .\"O A DMA alignment error occurred.
129 DMA (direct memory access) ¤Î¥¢¥é¥¤¥á¥ó¥È¡¦¥¨¥é¡¼¤¬È¯À¸¤·¤¿¡£
131 .B SPE_EVENT_INVALID_DMA
132 .\"O An invalid MFC DMA command was attempted.
133 ̵¸ú¤Ê MFC (Memory Flow Controller) DMA ¥³¥Þ¥ó¥É¤ò¹Ô¤ª¤¦¤È¤·¤¿¡£
135 .B SPE_EVENT_SPE_DATA_STORAGE
136 .\"O A DMA storage error occurred.
137 DMA ¥¹¥È¥ì¡¼¥¸¡¦¥¨¥é¡¼¤¬È¯À¸¤·¤¿¡£
139 .B SPE_EVENT_SPE_ERROR
140 .\"O An illegal instruction was executed.
141 ÉÔÀµ¤ÊÌ¿Î᤬¼Â¹Ô¤µ¤ì¤¿¡£
144 .\"O is a valid value for the
147 .\"O In this case, the events will not be reported to the calling process.
150 °ú¤¿ô¤È¤·¤Æ͸ú¤ÊÃͤǤ¢¤ë¡£
151 ¤³¤Î¾ì¹ç¡¢¥¤¥Ù¥ó¥È¤Ï¸Æ¤Ó½Ð¤·¸µ¤Î¥×¥í¥»¥¹¤ËÊó¹ð¤µ¤ì¤Ê¤¤¡£
152 .\"O .SH RETURN VALUE
156 .\"O returns the value of the
159 .\"O On error it returns \-1 and sets
161 .\"O to one of the error codes listed below.
167 ¥¨¥é¡¼¤Î¾ì¹ç¡¢\-1 ¤òÊÖ¤·¡¢
169 ¤ò²¼µ¤Î¥¨¥é¡¼¥³¡¼¥É¤Î¤¤¤º¤ì¤«¤ËÀßÄꤹ¤ë¡£
173 .\"O register value is a bit mask of status codes and
174 .\"O optionally a 14-bit code returned from the
175 .\"O .BR stop-and-signal
176 .\"O instruction on the SPU.
177 .\"O The bit masks for the status codes
180 ¥ì¥¸¥¹¥¿¤ÎÃͤϡ¢¥¹¥Æ¡¼¥¿¥¹¥³¡¼¥É¤È SPU ¤Î
182 Ì¿Î᤬ÊÖ¤¹ 14 ¥Ó¥Ã¥È¤Î¥³¡¼¥É¤Î
183 ¥Ó¥Ã¥È¥Þ¥¹¥¯¤Ç¹½À®¤µ¤ì¤ë¡£
184 ¸å¼Ô¤Î 14 ¥Ó¥Ã¥È¤Î¥³¡¼¥É¤Ï¥ª¥×¥·¥ç¥ó¤Ç¤¢¤ë¡£
185 ¥¹¥Æ¡¼¥¿¥¹¥³¡¼¥É¤Î¥Ó¥Ã¥È¥Þ¥¹¥¯¤Ï²¼µ¤ÎÄ̤ê¤Ç¤¢¤ë¡£
188 .\"O SPU was stopped by a
189 .\"O .BR stop-and-signal
196 .\"O SPU was stopped by a
204 .\"O SPU is waiting for a channel.
205 SPU ¤Ï¥Á¥ã¥ó¥Í¥ë¤Î¥¦¥§¥¤¥ÈÃæ¤Ç¤¢¤ë¡£
208 .\"O SPU is in single-step mode.
209 SPU ¤Ï¥·¥ó¥°¥ë¥¹¥Æ¥Ã¥×¥â¡¼¥É¤Ç¤¢¤Ã¤¿¡£
212 .\"O SPU has tried to execute an invalid instruction.
213 SPU ¤¬ÉÔÀµ¤ÊÌ¿Îá¤ò¼Â¹Ô¤·¤è¤¦¤È¤·¤¿¡£
216 .\"O SPU has tried to access an invalid channel.
217 SPU ¤¬ÉÔÀµ¤Ê¥Á¥ã¥ó¥Í¥ë¤Ë¥¢¥¯¥»¥¹¤·¤è¤¦¤È¤·¤¿¡£
220 .\"O The bits masked with this value contain the code returned from a
221 .\"O .BR stop-and-signal
223 .\"O These bits are only valid if the 0x02 bit is set.
224 ¤³¤ÎÃͤΥޥ¹¥¯¤òŬÍѤ·¤ÆÆÀ¤é¤ì¤¿¥Ó¥Ã¥ÈÃͤˤϡ¢
225 stop-and-signal Ì¿Îᤫ¤éÊÖ¤µ¤ì¤¿¥³¡¼¥É¤¬Æþ¤Ã¤Æ¤¤¤ë¡£
226 ¤³¤ì¤é¤Î¥Ó¥Ã¥È¤Ï 0x02 ¥Ó¥Ã¥È¤¬¥»¥Ã¥È¤µ¤ì¤Æ¤¤¤ë¾ì¹ç¤Ë¤Î¤ß͸ú¤Ç¤¢¤ë¡£
230 .\"O has not returned an error, one or more bits among the lower eight
231 .\"O ones are always set.
233 ¤¬¥¨¥é¡¼¤òÊÖ¤µ¤Ê¤«¤Ã¤¿¾ì¹ç¡¢²¼°Ì 8 ¥Ó¥Ã¥È¤Î¤¦¤Á 1 ¤Ä°Ê¾å¤Ï
240 .\"O is not a valid file descriptor.
242 ¤¬Í¸ú¤Ê¥Õ¥¡¥¤¥ë¥Ç¥£¥¹¥¯¥ê¥×¥¿¤Ç¤Ê¤¤¡£
246 .\"O is not a valid pointer, or
248 .\"O is non-NULL and an invalid pointer.
250 ¤¬Í¸ú¤Ê¥Ý¥¤¥ó¥¿¤Ç¤Ê¤¤¡£¤Þ¤¿¤Ï
252 ¤¬ NULL °Ê³°¤Ç¡¢¤·¤«¤â̵¸ú¤Ê¥Ý¥¤¥ó¥¿¤Ç¤¢¤ë¡£
255 .\"O A signal occurred while
257 .\"O was in progress; see
261 .\"O value has been updated to the new program counter value if
264 ¤Î¼Â¹ÔÃæ¤Ë¥·¥°¥Ê¥ë¤¬È¯À¸¤·¤¿¡£
269 ¤ÎÃͤϿ·¤·¤¤¥×¥í¥°¥é¥à¥«¥¦¥ó¥¿¤ÎÃͤ˹¹¿·¤µ¤ì¤ë¡£
273 .\"O is not a valid file descriptor returned from
274 .\"O .BR spu_create (2).
278 ¤¬ÊÖ¤·¤¿Í¸ú¤Ê¥Õ¥¡¥¤¥ë¥Ç¥£¥¹¥¯¥ê¥×¥¿¤Ç¤Ê¤¤¡£
281 .\"O There was not enough memory available to handle a page fault
282 .\"O resulting from a Memory Flow Controller (MFC) direct memory access.
283 Memory Flow Controller (MFC) DMA ¤Ë¤è¤êȯÀ¸¤·¤¿¥Ú¡¼¥¸¥Õ¥©¡¼¥ë¥È¤ò
284 ½èÍý¤¹¤ë¤Î¤ËɬÍפʥá¥â¥ê¤¬¤Ê¤«¤Ã¤¿¡£
287 .\"O The functionality is not provided by the current system, because
288 .\"O either the hardware does not provide SPUs or the spufs module is not
290 µ¡Ç½¤¬Æ°ºîÃæ¤Î¥·¥¹¥Æ¥à¤ÇÄ󶡤µ¤ì¤Æ¤¤¤Ê¤¤¡£Íýͳ¤Ï¡¢
291 ¥Ï¡¼¥É¥¦¥§¥¢¤Ç SPU ¤¬Ä󶡤µ¤ì¤Æ¤¤¤Ê¤¤¤«¡¢
292 spufs ¥â¥¸¥å¡¼¥ë¤¬¥í¡¼¥É¤µ¤ì¤Æ¤¤¤Ê¤¤¤«¡¢¤Î¤É¤Á¤é¤«¤Ç¤¢¤ë¡£
297 .\"O system call was added to Linux in kernel 2.6.16.
299 ¥·¥¹¥Æ¥à¥³¡¼¥ë¤Ï¥«¡¼¥Í¥ë 2.6.16 ¤Ç Linux ¤ËÄɲ䵤줿¡£
300 .\"O .SH CONFORMING TO
302 .\"O This call is Linux-specific and only implemented by the PowerPC
304 .\"O Programs using this system call are not portable.
305 ¤³¤Î¥·¥¹¥Æ¥à¥³¡¼¥ë¤Ï Linux ¸ÇͤǤ¢¤ê¡¢
306 PowerPC ¥¢¡¼¥¥Æ¥¯¥Á¥ã¤Ç¤Î¤ß¼ÂÁõ¤µ¤ì¤Æ¤¤¤ë¡£
307 ¤³¤Î¥·¥¹¥Æ¥à¥³¡¼¥ë¤ò»È¤Ã¤¿¥×¥í¥°¥é¥à¤Ï°Ü¿¢À¤¬¤Ê¤¤¡£
310 .\"O Glibc does not provide a wrapper for this system call; call it using
311 .\"O .BR syscall (2).
312 .\"O Note however, that
314 .\"O is meant to be used from libraries that implement a more abstract
315 .\"O interface to SPUs, not to be used from regular applications.
317 .\"O .I http://www.bsc.es/projects/deepcomputing/linuxoncell/
318 .\"O for the recommended libraries.
319 glibc ¤Ï¤³¤Î¥·¥¹¥Æ¥à¥³¡¼¥ë¤ËÂФ¹¤ë¥é¥Ã¥Ñ¡¼´Ø¿ô¤òÄ󶡤·¤Æ¤¤¤Ê¤¤¡£
323 ¤Ï ¤è¤êÃê¾ÝÅ٤ι⤤ SPU ¤Ø¤Î¥¤¥ó¥¿¥Õ¥§¡¼¥¹¤ò¼ÂÁõ¤¹¤ë¥é¥¤¥Ö¥é¥ê¤«¤é
324 ÍøÍѤµ¤ì¤ë¤³¤È¤ò°Õ¿Þ¤·¤¿¤â¤Î¤Ç¤¢¤ê¡¢Ä̾ï¤Î¥¢¥×¥ê¥±¡¼¥·¥ç¥ó¤«¤é
325 »ÈÍѤϰտޤµ¤ì¤Æ¤¤¤Ê¤¤¡£¿ä¾©¤Î¥é¥¤¥Ö¥é¥ê¤Ë¤Ä¤¤¤Æ¤Ï
326 .I http://www.bsc.es/projects/deepcomputing/linuxoncell/
330 .\"O The following is an example of running a simple, one-instruction SPU
331 .\"O program with the
334 °Ê²¼¤Ï¡¢´Êñ¤Ê 1 Ì¿Îá¤Î SPU ¥×¥í¥°¥é¥à¤ò
336 ¥·¥¹¥Æ¥à¥³¡¼¥ë¤ò»È¤Ã¤Æ¼Â¹Ô¤µ¤»¤ëÎã¤Ç¤¢¤ë¡£
343 #include <sys/types.h>
346 #define handle_error(msg) \\
347 do { perror(msg); exit(EXIT_FAILURE); } while (0)
351 int context, fd, spu_status;
352 uint32_t instruction, npc;
354 context = spu_create("/spu/example\-context", 0, 0755);
356 handle_error("spu_create");
358 /* write a \(aqstop 0x1234\(aq instruction to the SPU\(aqs
361 instruction = 0x00001234;
363 fd = open("/spu/example\-context/mem", O_RDWR);
365 handle_error("open");
366 write(fd, &instruction, sizeof(instruction));
368 /* set npc to the starting instruction address of the
369 * SPU program. Since we wrote the instruction at the
370 * start of the mem file, the entry point will be 0x0
374 spu_status = spu_run(context, &npc, NULL);
375 if (spu_status == -1)
376 handle_error("open");
378 /* we should see a status code of 0x1234002:
379 * 0x00000002 (spu was stopped due to stop\-and\-signal)
380 * | 0x12340000 (the stop\-and\-signal code)
382 printf("SPU Status: 0x%08x\\n", spu_status);
388 .\" Arnd Bergmann <arndb@de.ibm.com>, Jeremy Kerr <jk@ozlabs.org>
393 .BR capabilities (7),