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hw/SSD1803.h: corrected, PREF() macro added
[stock/stock.osdn.git] / netlist / PCM4220.txt
1     NAME          PIN             I/O     DESCRIPTION
2     AGND            1           Ground    Analog ground
3     VINR–           2            Input    Right channel inverting, 2.8VPP nominal full-scale
4     VINR+           3            Input    Right channel noninverting, 2.8VPP nominal full-scale
5     VCC1            4           Power     Analog supply, +4.0V nominal
6     AGND            5           Ground    Analog ground
7     AGND            6           Ground    Analog ground
8     AGND            7           Ground    Analog ground
9     AGND            8           Ground    Analog ground
10     VCC2            9           Power     Analog supply, +4.0V nominal
11     VINL–          10            Input    Left channel inverting, 2.8VPP nominal full-scale
12     VINL+          11            Input    Left channel noninverting, 2.8VPP nominal full-scale
13     AGND           12           Ground    Analog ground
14    VCOML           13           Output    Left channel common-mode voltage, (0.4875 × VCC2) nominal
15   REFGNDL          14           Ground    Left channel reference ground, connect to analog ground
16     VREFL          15           Output    Left channel reference output for decoupling purposes only
17    PCMEN           16            Input    PCM output enable (active high)
18    HPFDR           17            Input    Right channel high-pass filter disable (active high)
19     HPFDL          18            Input    Left channel high-pass filter disable (active high)
20                                           Sampling modes:
21                                           FS0 = 0 and FS1 = 0:                  Normal mode
22      FS0           19
23                                  Input    FS0 = 1 and FS1 = 0:                  Double Speed mode
24      FS1           20
25                                           FS0 = 0 and FS1 = 1:                  Quad Speed mode
26                                           FS0 = 1 and FS1 = 1:                  Reserved Sampling mode
27                                           Digital decimation filter response:
28       DF           21            Input    DF = 0: Classic filter response
29                                           DF = 1: Low Group Delay response
30     DGND           22           Ground    Digital ground
31     DGND           23           Ground    Digital ground
32     DGND           24           Ground    Digital ground
33                                           TDM active sub-frame:
34                                           SUB0 = 0 and SUB1 = 0:                      Sub-frame 0
35     SUB1           25
36                                  Input    SUB0 = 1 and SUB1 = 0:                      Sub-frame 1
37     SUB0           26
38                                           SUB0 = 0 and SUB1 = 1:                      Sub-frame 2
39                                           SUB0 = 1 and SUB1 = 1:                      Sub-frame 3
40       NC           27              —      No external connection, internally bonded to ESD pad
41       NC           28              —      No external connection, internally bonded to ESD pad
42       NC           29              —      No external connection, internally bonded to ESD pad
43     DGND           30           Ground    Digital ground
44      VDD           31            Power    Digital supply, +3.3V nominal
45     DATA           32           Output    Audio serial port data
46      BCK           33             I/O     Audio serial port bit clock
47     LRCK           34             I/O     Audio serial port left/right word clock
48     MCKI           35            Input    Master clock
49      RST           36            Input    Reset and power-down (active low)
50     OVFL           37           Output    Left channel overflow flag (active high)
51     OVFR           38           Output    Right channel overflow flag (active high)
52                                           Audio serial port Slave/Master mode:
53      S/M           39            Input    S/M = 0: Master mode
54                                           S/M = 1: Slave mode
55     DGND           40           Output    Digital ground
56                                           Output word length:
57                                           OWL0 = 0 and OWL1                     = 0:    24-bits
58     OWL1           41
59                                  Input    OWL0 = 1 and OWL1                     = 0:    18-bits
60     OWL0           42
61                                           OWL0 = 0 and OWL1                     = 1:    20-bits
62                                           OWL0 = 1 and OWL1                     = 1:    16-bits
63                                           Audio data format:
64                                           FMT0 = 0 and FMT1                   = 0:    Left-justified
65     FMT1           43
66                                                                                       I2S
67                                  Input    FMT0 = 1 and FMT1                   = 0:
68     FMT0           44
69                                           FMT0 = 0 and FMT1                   = 1:    TDM
70                                           FMT0 = 1 and FMT1                   = 1:    TDM with one BCK delay
71     DGND           45           Ground    Digital ground
72    VREFR           46           Output    Right channel reference output for decoupling purposes only
73   REFGNDR          47           Ground    Right channel reference ground, connect to analog ground
74    VCOMR           48           Output    Right channel common-mode voltage (0.4875 × VCC1 nominal)