1 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
3 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
6 2005-10-18 Nick Clifton <nickc@redhat.com>
8 * m32r-asm.c: Regenerate after updating m32r.opc.
10 2005-10-18 Jie Zhang <jie.zhang@analog.com>
12 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
13 reading instruction from memory.
15 2005-10-18 Nick Clifton <nickc@redhat.com>
17 * m32r-asm.c: Regenerate after updating m32r.opc.
19 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
21 * m32r-asm.c: Regenerate after updating m32r.opc.
23 2005-10-08 James Lemke <jim@wasabisystems.com>
25 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
28 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
30 * ppc-dis.c (struct dis_private): Remove.
31 (powerpc_dialect): Avoid aliasing warnings.
32 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
34 2005-09-30 Nick Clifton <nickc@redhat.com>
36 * po/ga.po: New Irish translation.
37 * configure.in (ALL_LINGUAS): Add "ga".
38 * configure: Regenerate.
40 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
42 * Makefile.am: Run "make dep-am".
43 * Makefile.in: Regenerated.
44 * aclocal.m4: Likewise.
45 * configure: Likewise.
47 2005-09-30 Catherine Moore <clm@cm00re.com>
49 * Makefile.am: Bfin support.
50 * Makefile.in: Regenerated.
51 * aclocal.m4: Regenerated.
52 * bfin-dis.c: New file.
53 * configure.in: Bfin support.
54 * configure: Regenerated.
55 * disassemble.c (ARCH_bfin): Define.
56 (disassembler): Add case for bfd_arch_bfin.
58 2005-09-28 Jan Beulich <jbeulich@novell.com>
60 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
63 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
64 (dis386): Document and use new 'V' meta character. Use it for
65 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
66 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
67 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
68 data prefix as used whenever DFLAG was examined. Handle 'V'.
69 (intel_operand_size): Use stack_v_mode.
70 (OP_E): Use stack_v_mode, but handle only the special case of
71 64-bit mode without operand size override here; fall through to
72 v_mode case otherwise.
73 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
74 and no operand size override is present.
75 (OP_J): Use get32s for obtaining the displacement also when rex64
78 2005-09-08 Paul Brook <paul@codesourcery.com>
80 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
82 2005-09-06 Chao-ying Fu <fu@mips.com>
84 * mips-opc.c (MT32): New define.
85 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
86 bottom to avoid opcode collision with "mftr" and "mttr".
88 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
89 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
92 2005-09-02 Paul Brook <paul@codesourcery.com>
94 * arm-dis.c (coprocessor_opcodes): Add null terminator.
96 2005-09-02 Paul Brook <paul@codesourcery.com>
98 * arm-dis.c (coprocessor_opcodes): New.
99 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
100 (print_insn_coprocessor): New function.
101 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
103 (print_insn_thumb32): Use print_insn_coprocessor.
105 2005-08-30 Paul Brook <paul@codesourcery.com>
107 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
109 2005-08-26 Jan Beulich <jbeulich@novell.com>
111 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
113 (OP_E): Call intel_operand_size, move call site out of mode
115 (OP_OFF): Call intel_operand_size if suffix_always. Remove
116 ATTRIBUTE_UNUSED from parameters.
117 (OP_OFF64): Likewise.
118 (OP_ESreg): Call intel_operand_size.
119 (OP_DSreg): Likewise.
120 (OP_DIR): Use colon rather than semicolon as separator of far
123 2005-08-25 Chao-ying Fu <fu@mips.com>
125 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
126 (mips_builtin_opcodes): Add DSP instructions.
127 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
129 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
132 2005-08-23 David Ung <davidu@mips.com>
134 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
135 instructions to the table.
137 2005-08-18 Alan Modra <amodra@bigpond.net.au>
139 * a29k-dis.c: Delete.
140 * Makefile.am: Remove a29k support.
141 * configure.in: Likewise.
142 * disassemble.c: Likewise.
143 * Makefile.in: Regenerate.
144 * configure: Regenerate.
145 * po/POTFILES.in: Regenerate.
147 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
149 * ppc-dis.c (powerpc_dialect): Handle e300.
150 (print_ppc_disassembler_options): Likewise.
151 * ppc-opc.c (PPCE300): Define.
152 (powerpc_opcodes): Mark icbt as available for the e300.
154 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
156 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
157 Use "rp" instead of "%r2" in "b,l" insns.
159 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
161 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
162 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
164 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
165 and 4 bit optional masks.
166 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
167 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
168 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
169 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
170 (s390_opformats): Likewise.
171 * s390-opc.txt: Add new instructions for cpu type z9-109.
173 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
175 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
177 2005-07-29 Paul Brook <paul@codesourcery.com>
179 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
181 2005-07-29 Paul Brook <paul@codesourcery.com>
183 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
184 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
186 2005-07-25 DJ Delorie <dj@redhat.com>
188 * m32c-asm.c Regenerate.
189 * m32c-dis.c Regenerate.
191 2005-07-20 DJ Delorie <dj@redhat.com>
193 * disassemble.c (disassemble_init_for_target): M32C ISAs are
194 enums, so convert them to bit masks, which attributes are.
196 2005-07-18 Nick Clifton <nickc@redhat.com>
198 * configure.in: Restore alpha ordering to list of arches.
199 * configure: Regenerate.
200 * disassemble.c: Restore alpha ordering to list of arches.
202 2005-07-18 Nick Clifton <nickc@redhat.com>
204 * m32c-asm.c: Regenerate.
205 * m32c-desc.c: Regenerate.
206 * m32c-desc.h: Regenerate.
207 * m32c-dis.c: Regenerate.
208 * m32c-ibld.h: Regenerate.
209 * m32c-opc.c: Regenerate.
210 * m32c-opc.h: Regenerate.
212 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
214 * i386-dis.c (PNI_Fixup): Update comment.
215 (VMX_Fixup): Properly handle the suffix check.
217 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
219 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
222 2005-07-16 Alan Modra <amodra@bigpond.net.au>
224 * Makefile.am: Run "make dep-am".
225 (stamp-m32c): Fix cpu dependencies.
226 * Makefile.in: Regenerate.
227 * ip2k-dis.c: Regenerate.
229 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
231 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
232 (VMX_Fixup): New. Fix up Intel VMX Instructions.
236 (dis386_twobyte): Updated entries 0x78 and 0x79.
237 (twobyte_has_modrm): Likewise.
238 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
239 (OP_G): Handle m_mode.
241 2005-07-14 Jim Blandy <jimb@redhat.com>
243 Add support for the Renesas M32C and M16C.
244 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
245 * m32c-desc.h, m32c-opc.h: New.
246 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
247 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
249 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
250 m32c-ibld.lo, m32c-opc.lo.
251 (CLEANFILES): List stamp-m32c.
252 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
253 (CGEN_CPUS): Add m32c.
254 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
255 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
256 (m32c_opc_h): New variable.
257 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
258 (m32c-opc.lo): New rules.
259 * Makefile.in: Regenerated.
260 * configure.in: Add case for bfd_m32c_arch.
261 * configure: Regenerated.
262 * disassemble.c (ARCH_m32c): New.
263 [ARCH_m32c]: #include "m32c-desc.h".
264 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
265 (disassemble_init_for_target) [ARCH_m32c]: Same.
267 * cgen-ops.h, cgen-types.h: New files.
268 * Makefile.am (HFILES): List them.
269 * Makefile.in: Regenerated.
271 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
273 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
274 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
275 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
276 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
277 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
278 v850-dis.c: Fix format bugs.
279 * ia64-gen.c (fail, warn): Add format attribute.
280 * or32-opc.c (debug): Likewise.
282 2005-07-07 Khem Raj <kraj@mvista.com>
284 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
287 2005-07-06 Alan Modra <amodra@bigpond.net.au>
289 * Makefile.am (stamp-m32r): Fix path to cpu files.
290 (stamp-m32r, stamp-iq2000): Likewise.
291 * Makefile.in: Regenerate.
292 * m32r-asm.c: Regenerate.
293 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
294 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
296 2005-07-05 Nick Clifton <nickc@redhat.com>
298 * iq2000-asm.c: Regenerate.
299 * ms1-asm.c: Regenerate.
301 2005-07-05 Jan Beulich <jbeulich@novell.com>
303 * i386-dis.c (SVME_Fixup): New.
304 (grps): Use it for the lidt entry.
305 (PNI_Fixup): Call OP_M rather than OP_E.
306 (INVLPG_Fixup): Likewise.
308 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
310 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
312 2005-07-01 Nick Clifton <nickc@redhat.com>
314 * a29k-dis.c: Update to ISO C90 style function declarations and
316 * alpha-opc.c: Likewise.
317 * arc-dis.c: Likewise.
318 * arc-opc.c: Likewise.
319 * avr-dis.c: Likewise.
320 * cgen-asm.in: Likewise.
321 * cgen-dis.in: Likewise.
322 * cgen-ibld.in: Likewise.
323 * cgen-opc.c: Likewise.
324 * cris-dis.c: Likewise.
325 * d10v-dis.c: Likewise.
326 * d30v-dis.c: Likewise.
327 * d30v-opc.c: Likewise.
328 * dis-buf.c: Likewise.
329 * dlx-dis.c: Likewise.
330 * h8300-dis.c: Likewise.
331 * h8500-dis.c: Likewise.
332 * hppa-dis.c: Likewise.
333 * i370-dis.c: Likewise.
334 * i370-opc.c: Likewise.
335 * m10200-dis.c: Likewise.
336 * m10300-dis.c: Likewise.
337 * m68k-dis.c: Likewise.
338 * m88k-dis.c: Likewise.
339 * mips-dis.c: Likewise.
340 * mmix-dis.c: Likewise.
341 * msp430-dis.c: Likewise.
342 * ns32k-dis.c: Likewise.
343 * or32-dis.c: Likewise.
344 * or32-opc.c: Likewise.
345 * pdp11-dis.c: Likewise.
346 * pj-dis.c: Likewise.
347 * s390-dis.c: Likewise.
348 * sh-dis.c: Likewise.
349 * sh64-dis.c: Likewise.
350 * sparc-dis.c: Likewise.
351 * sparc-opc.c: Likewise.
352 * sysdep.h: Likewise.
353 * tic30-dis.c: Likewise.
354 * tic4x-dis.c: Likewise.
355 * tic80-dis.c: Likewise.
356 * v850-dis.c: Likewise.
357 * v850-opc.c: Likewise.
358 * vax-dis.c: Likewise.
359 * w65-dis.c: Likewise.
360 * z8kgen.c: Likewise.
362 * fr30-*: Regenerate.
364 * ip2k-*: Regenerate.
365 * iq2000-*: Regenerate.
366 * m32r-*: Regenerate.
368 * openrisc-*: Regenerate.
369 * xstormy16-*: Regenerate.
371 2005-06-23 Ben Elliston <bje@gnu.org>
373 * m68k-dis.c: Use ISC C90.
374 * m68k-opc.c: Formatting fixes.
376 2005-06-16 David Ung <davidu@mips.com>
378 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
379 instructions to the table; seb/seh/sew/zeb/zeh/zew.
381 2005-06-15 Dave Brolley <brolley@redhat.com>
383 Contribute Morpho ms1 on behalf of Red Hat
384 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
385 ms1-opc.h: New files, Morpho ms1 target.
387 2004-05-14 Stan Cox <scox@redhat.com>
389 * disassemble.c (ARCH_ms1): Define.
390 (disassembler): Handle bfd_arch_ms1
392 2004-05-13 Michael Snyder <msnyder@redhat.com>
394 * Makefile.am, Makefile.in: Add ms1 target.
395 * configure.in: Ditto.
397 2005-06-08 Zack Weinberg <zack@codesourcery.com>
399 * arm-opc.h: Delete; fold contents into ...
400 * arm-dis.c: ... here. Move includes of internal COFF headers
401 next to includes of internal ELF headers.
402 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
403 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
404 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
405 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
406 (iwmmxt_wwnames, iwmmxt_wwssnames):
408 (regnames): Remove iWMMXt coprocessor register sets.
409 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
410 (get_arm_regnames): Adjust fourth argument to match above changes.
411 (set_iwmmxt_regnames): Delete.
412 (print_insn_arm): Constify 'c'. Use ISO syntax for function
413 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
414 and iwmmxt_cregnames, not set_iwmmxt_regnames.
415 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
416 ISO syntax for function pointer calls.
418 2005-06-07 Zack Weinberg <zack@codesourcery.com>
420 * arm-dis.c: Split up the comments describing the format codes, so
421 that the ARM and 16-bit Thumb opcode tables each have comments
422 preceding them that describe all the codes, and only the codes,
423 valid in those tables. (32-bit Thumb table is already like this.)
424 Reorder the lists in all three comments to match the order in
425 which the codes are implemented.
426 Remove all forward declarations of static functions. Convert all
427 function definitions to ISO C format.
428 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
430 (print_insn_thumb16): Remove unused case 'I'.
431 (print_insn): Update for changed calling convention of subroutines.
433 2005-05-25 Jan Beulich <jbeulich@novell.com>
435 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
436 hex (but retain it being displayed as signed). Remove redundant
437 checks. Add handling of displacements for 16-bit addressing in Intel
440 2005-05-25 Jan Beulich <jbeulich@novell.com>
442 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
443 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
444 masking of 'rm' in 16-bit memory address handling.
446 2005-05-19 Anton Blanchard <anton@samba.org>
448 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
449 (print_ppc_disassembler_options): Document it.
450 * ppc-opc.c (SVC_LEV): Define.
451 (LEV): Allow optional operand.
453 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
454 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
456 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
458 * Makefile.in: Regenerate.
460 2005-05-17 Zack Weinberg <zack@codesourcery.com>
462 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
463 instructions. Adjust disassembly of some opcodes to match
465 (thumb32_opcodes): New table.
466 (print_insn_thumb): Rename print_insn_thumb16; don't handle
467 two-halfword branches here.
468 (print_insn_thumb32): New function.
469 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
470 and print_insn_thumb32. Be consistent about order of
471 halfwords when printing 32-bit instructions.
473 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
476 * i386-dis.c (branch_v_mode): New.
477 (indirEv): Use branch_v_mode instead of v_mode.
478 (OP_E): Handle branch_v_mode.
480 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
482 * d10v-dis.c (dis_2_short): Support 64bit host.
484 2005-05-07 Nick Clifton <nickc@redhat.com>
486 * po/nl.po: Updated translation.
488 2005-05-07 Nick Clifton <nickc@redhat.com>
490 * Update the address and phone number of the FSF organization in
491 the GPL notices in the following files:
492 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
493 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
494 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
495 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
496 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
497 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
498 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
499 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
500 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
501 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
502 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
503 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
504 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
505 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
506 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
507 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
508 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
509 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
510 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
511 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
512 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
513 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
514 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
515 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
516 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
517 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
518 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
519 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
520 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
521 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
522 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
523 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
524 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
526 2005-05-05 James E Wilson <wilson@specifixinc.com>
528 * ia64-opc.c: Include sysdep.h before libiberty.h.
530 2005-05-05 Nick Clifton <nickc@redhat.com>
532 * configure.in (ALL_LINGUAS): Add vi.
533 * configure: Regenerate.
536 2005-04-26 Jerome Guitton <guitton@gnat.com>
538 * configure.in: Fix the check for basename declaration.
539 * configure: Regenerate.
541 2005-04-19 Alan Modra <amodra@bigpond.net.au>
543 * ppc-opc.c (RTO): Define.
544 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
545 entries to suit PPC440.
547 2005-04-18 Mark Kettenis <kettenis@gnu.org>
549 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
552 2005-04-14 Nick Clifton <nickc@redhat.com>
554 * po/fi.po: New translation: Finnish.
555 * configure.in (ALL_LINGUAS): Add fi.
556 * configure: Regenerate.
558 2005-04-14 Alan Modra <amodra@bigpond.net.au>
560 * Makefile.am (NO_WERROR): Define.
561 * configure.in: Invoke AM_BINUTILS_WARNINGS.
562 * Makefile.in: Regenerate.
563 * aclocal.m4: Regenerate.
564 * configure: Regenerate.
566 2005-04-04 Nick Clifton <nickc@redhat.com>
568 * fr30-asm.c: Regenerate.
569 * frv-asm.c: Regenerate.
570 * iq2000-asm.c: Regenerate.
571 * m32r-asm.c: Regenerate.
572 * openrisc-asm.c: Regenerate.
574 2005-04-01 Jan Beulich <jbeulich@novell.com>
576 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
577 visible operands in Intel mode. The first operand of monitor is
580 2005-04-01 Jan Beulich <jbeulich@novell.com>
582 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
583 easier future additions.
585 2005-03-31 Jerome Guitton <guitton@gnat.com>
587 * configure.in: Check for basename.
588 * configure: Regenerate.
591 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
593 * i386-dis.c (SEG_Fixup): New.
595 (dis386): Use "Sv" for 0x8c and 0x8e.
597 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
598 Nick Clifton <nickc@redhat.com>
600 * vax-dis.c: (entry_addr): New varible: An array of user supplied
601 function entry mask addresses.
602 (entry_addr_occupied_slots): New variable: The number of occupied
603 elements in entry_addr.
604 (entry_addr_total_slots): New variable: The total number of
605 elements in entry_addr.
606 (parse_disassembler_options): New function. Fills in the entry_addr
608 (free_entry_array): New function. Release the memory used by the
609 entry addr array. Suppressed because there is no way to call it.
610 (is_function_entry): Check if a given address is a function's
611 start address by looking at supplied entry mask addresses and
612 symbol information, if available.
613 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
615 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
617 * cris-dis.c (print_with_operands): Use ~31L for long instead
620 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
622 * mmix-opc.c (O): Revert the last change.
625 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
627 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
630 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
632 * mmix-opc.c (O, Z): Force expression as unsigned long.
634 2005-03-18 Nick Clifton <nickc@redhat.com>
636 * ip2k-asm.c: Regenerate.
637 * op/opcodes.pot: Regenerate.
639 2005-03-16 Nick Clifton <nickc@redhat.com>
640 Ben Elliston <bje@au.ibm.com>
642 * configure.in (werror): New switch: Add -Werror to the
643 compiler command line. Enabled by default. Disable via
645 * configure: Regenerate.
647 2005-03-16 Alan Modra <amodra@bigpond.net.au>
649 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
652 2005-03-15 Alan Modra <amodra@bigpond.net.au>
654 * po/es.po: Commit new Spanish translation.
656 * po/fr.po: Commit new French translation.
658 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
660 * vax-dis.c: Fix spelling error
661 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
662 of just "Entry mask: < r1 ... >"
664 2005-03-12 Zack Weinberg <zack@codesourcery.com>
666 * arm-dis.c (arm_opcodes): Document %E and %V.
667 Add entries for v6T2 ARM instructions:
668 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
669 (print_insn_arm): Add support for %E and %V.
670 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
672 2005-03-10 Jeff Baker <jbaker@qnx.com>
673 Alan Modra <amodra@bigpond.net.au>
675 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
676 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
678 (XSPRG_MASK): Mask off extra bits now part of sprg field.
679 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
680 mfsprg4..7 after msprg and consolidate.
682 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
684 * vax-dis.c (entry_mask_bit): New array.
685 (print_insn_vax): Decode function entry mask.
687 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
689 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
691 2005-03-05 Alan Modra <amodra@bigpond.net.au>
693 * po/opcodes.pot: Regenerate.
695 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
697 * arc-dis.c (a4_decoding_class): New enum.
698 (dsmOneArcInst): Use the enum values for the decoding class.
699 Remove redundant case in the switch for decodingClass value 11.
701 2005-03-02 Jan Beulich <jbeulich@novell.com>
703 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
705 (OP_C): Consider lock prefix in non-64-bit modes.
707 2005-02-24 Alan Modra <amodra@bigpond.net.au>
709 * cris-dis.c (format_hex): Remove ineffective warning fix.
710 * crx-dis.c (make_instruction): Warning fix.
711 * frv-asm.c: Regenerate.
713 2005-02-23 Nick Clifton <nickc@redhat.com>
715 * cgen-dis.in: Use bfd_byte for buffers that are passed to
718 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
720 * crx-dis.c (make_instruction): Move argument structure into inner
721 scope and ensure that all of its fields are initialised before
724 * fr30-asm.c: Regenerate.
725 * fr30-dis.c: Regenerate.
726 * frv-asm.c: Regenerate.
727 * frv-dis.c: Regenerate.
728 * ip2k-asm.c: Regenerate.
729 * ip2k-dis.c: Regenerate.
730 * iq2000-asm.c: Regenerate.
731 * iq2000-dis.c: Regenerate.
732 * m32r-asm.c: Regenerate.
733 * m32r-dis.c: Regenerate.
734 * openrisc-asm.c: Regenerate.
735 * openrisc-dis.c: Regenerate.
736 * xstormy16-asm.c: Regenerate.
737 * xstormy16-dis.c: Regenerate.
739 2005-02-22 Alan Modra <amodra@bigpond.net.au>
741 * arc-ext.c: Warning fixes.
742 * arc-ext.h: Likewise.
743 * cgen-opc.c: Likewise.
744 * ia64-gen.c: Likewise.
745 * maxq-dis.c: Likewise.
746 * ns32k-dis.c: Likewise.
747 * w65-dis.c: Likewise.
748 * ia64-asmtab.c: Regenerate.
750 2005-02-22 Alan Modra <amodra@bigpond.net.au>
752 * fr30-desc.c: Regenerate.
753 * fr30-desc.h: Regenerate.
754 * fr30-opc.c: Regenerate.
755 * fr30-opc.h: Regenerate.
756 * frv-desc.c: Regenerate.
757 * frv-desc.h: Regenerate.
758 * frv-opc.c: Regenerate.
759 * frv-opc.h: Regenerate.
760 * ip2k-desc.c: Regenerate.
761 * ip2k-desc.h: Regenerate.
762 * ip2k-opc.c: Regenerate.
763 * ip2k-opc.h: Regenerate.
764 * iq2000-desc.c: Regenerate.
765 * iq2000-desc.h: Regenerate.
766 * iq2000-opc.c: Regenerate.
767 * iq2000-opc.h: Regenerate.
768 * m32r-desc.c: Regenerate.
769 * m32r-desc.h: Regenerate.
770 * m32r-opc.c: Regenerate.
771 * m32r-opc.h: Regenerate.
772 * m32r-opinst.c: Regenerate.
773 * openrisc-desc.c: Regenerate.
774 * openrisc-desc.h: Regenerate.
775 * openrisc-opc.c: Regenerate.
776 * openrisc-opc.h: Regenerate.
777 * xstormy16-desc.c: Regenerate.
778 * xstormy16-desc.h: Regenerate.
779 * xstormy16-opc.c: Regenerate.
780 * xstormy16-opc.h: Regenerate.
782 2005-02-21 Alan Modra <amodra@bigpond.net.au>
784 * Makefile.am: Run "make dep-am"
785 * Makefile.in: Regenerate.
787 2005-02-15 Nick Clifton <nickc@redhat.com>
789 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
790 compile time warnings.
791 (print_keyword): Likewise.
792 (default_print_insn): Likewise.
794 * fr30-desc.c: Regenerated.
795 * fr30-desc.h: Regenerated.
796 * fr30-dis.c: Regenerated.
797 * fr30-opc.c: Regenerated.
798 * fr30-opc.h: Regenerated.
799 * frv-desc.c: Regenerated.
800 * frv-dis.c: Regenerated.
801 * frv-opc.c: Regenerated.
802 * ip2k-asm.c: Regenerated.
803 * ip2k-desc.c: Regenerated.
804 * ip2k-desc.h: Regenerated.
805 * ip2k-dis.c: Regenerated.
806 * ip2k-opc.c: Regenerated.
807 * ip2k-opc.h: Regenerated.
808 * iq2000-desc.c: Regenerated.
809 * iq2000-dis.c: Regenerated.
810 * iq2000-opc.c: Regenerated.
811 * m32r-asm.c: Regenerated.
812 * m32r-desc.c: Regenerated.
813 * m32r-desc.h: Regenerated.
814 * m32r-dis.c: Regenerated.
815 * m32r-opc.c: Regenerated.
816 * m32r-opc.h: Regenerated.
817 * m32r-opinst.c: Regenerated.
818 * openrisc-desc.c: Regenerated.
819 * openrisc-desc.h: Regenerated.
820 * openrisc-dis.c: Regenerated.
821 * openrisc-opc.c: Regenerated.
822 * openrisc-opc.h: Regenerated.
823 * xstormy16-desc.c: Regenerated.
824 * xstormy16-desc.h: Regenerated.
825 * xstormy16-dis.c: Regenerated.
826 * xstormy16-opc.c: Regenerated.
827 * xstormy16-opc.h: Regenerated.
829 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
831 * dis-buf.c (perror_memory): Use sprintf_vma to print out
834 2005-02-11 Nick Clifton <nickc@redhat.com>
836 * iq2000-asm.c: Regenerate.
838 * frv-dis.c: Regenerate.
840 2005-02-07 Jim Blandy <jimb@redhat.com>
842 * Makefile.am (CGEN): Load guile.scm before calling the main
844 * Makefile.in: Regenerated.
845 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
846 Simply pass the cgen-opc.scm path to ${cgen} as its first
847 argument; ${cgen} itself now contains the '-s', or whatever is
848 appropriate for the Scheme being used.
850 2005-01-31 Andrew Cagney <cagney@gnu.org>
852 * configure: Regenerate to track ../gettext.m4.
854 2005-01-31 Jan Beulich <jbeulich@novell.com>
856 * ia64-gen.c (NELEMS): Define.
857 (shrink): Generate alias with missing second predicate register when
858 opcode has two outputs and these are both predicates.
859 * ia64-opc-i.c (FULL17): Define.
860 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
861 here to generate output template.
862 (TBITCM, TNATCM): Undefine after use.
863 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
864 first input. Add ld16 aliases without ar.csd as second output. Add
865 st16 aliases without ar.csd as second input. Add cmpxchg aliases
866 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
867 ar.ccv as third/fourth inputs. Consolidate through...
868 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
869 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
870 * ia64-asmtab.c: Regenerate.
872 2005-01-27 Andrew Cagney <cagney@gnu.org>
874 * configure: Regenerate to track ../gettext.m4 change.
876 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
878 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
879 * frv-asm.c: Rebuilt.
880 * frv-desc.c: Rebuilt.
881 * frv-desc.h: Rebuilt.
882 * frv-dis.c: Rebuilt.
883 * frv-ibld.c: Rebuilt.
884 * frv-opc.c: Rebuilt.
885 * frv-opc.h: Rebuilt.
887 2005-01-24 Andrew Cagney <cagney@gnu.org>
889 * configure: Regenerate, ../gettext.m4 was updated.
891 2005-01-21 Fred Fish <fnf@specifixinc.com>
893 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
894 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
895 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
898 2005-01-20 Alan Modra <amodra@bigpond.net.au>
900 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
902 2005-01-19 Fred Fish <fnf@specifixinc.com>
904 * mips-dis.c (no_aliases): New disassembly option flag.
905 (set_default_mips_dis_options): Init no_aliases to zero.
906 (parse_mips_dis_option): Handle no-aliases option.
907 (print_insn_mips): Ignore table entries that are aliases
908 if no_aliases is set.
909 (print_insn_mips16): Ditto.
910 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
911 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
912 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
913 * mips16-opc.c (mips16_opcodes): Ditto.
915 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
917 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
918 (inheritance diagram): Add missing edge.
919 (arch_sh1_up): Rename arch_sh_up to match external name to make life
920 easier for the testsuite.
921 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
922 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
923 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
924 arch_sh2a_or_sh4_up child.
925 (sh_table): Do renaming as above.
926 Correct comment for ldc.l for gas testsuite to read.
927 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
928 Correct comments for movy.w and movy.l for gas testsuite to read.
929 Correct comments for fmov.d and fmov.s for gas testsuite to read.
931 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
933 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
935 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
937 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
939 2005-01-10 Andreas Schwab <schwab@suse.de>
941 * disassemble.c (disassemble_init_for_target) <case
942 bfd_arch_ia64>: Set skip_zeroes to 16.
943 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
945 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
947 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
949 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
951 * avr-dis.c: Prettyprint. Added printing of symbol names in all
952 memory references. Convert avr_operand() to C90 formatting.
954 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
956 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
958 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
960 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
961 (no_op_insn): Initialize array with instructions that have no
963 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
965 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
967 * arm-dis.c: Correct top-level comment.
969 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
971 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
972 architecuture defining the insn.
973 (arm_opcodes, thumb_opcodes): Delete. Move to ...
974 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
976 Also include opcode/arm.h.
977 * Makefile.am (arm-dis.lo): Update dependency list.
978 * Makefile.in: Regenerate.
980 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
982 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
983 reflect the change to the short immediate syntax.
985 2004-11-19 Alan Modra <amodra@bigpond.net.au>
987 * or32-opc.c (debug): Warning fix.
988 * po/POTFILES.in: Regenerate.
990 * maxq-dis.c: Formatting.
991 (print_insn): Warning fix.
993 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
995 * arm-dis.c (WORD_ADDRESS): Define.
996 (print_insn): Use it. Correct big-endian end-of-section handling.
998 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
999 Vineet Sharma <vineets@noida.hcltech.com>
1001 * maxq-dis.c: New file.
1002 * disassemble.c (ARCH_maxq): Define.
1003 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1005 * configure.in: Add case for bfd_maxq_arch.
1006 * configure: Regenerate.
1007 * Makefile.am: Add support for maxq-dis.c
1008 * Makefile.in: Regenerate.
1009 * aclocal.m4: Regenerate.
1011 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1013 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1015 * crx-dis.c: Likewise.
1017 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1019 Generally, handle CRISv32.
1020 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1021 (struct cris_disasm_data): New type.
1022 (format_reg, format_hex, cris_constraint, print_flags)
1023 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1025 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1026 (print_insn_crisv32_without_register_prefix)
1027 (print_insn_crisv10_v32_with_register_prefix)
1028 (print_insn_crisv10_v32_without_register_prefix)
1029 (cris_parse_disassembler_options): New functions.
1030 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1031 parameter. All callers changed.
1032 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1034 (cris_constraint) <case 'Y', 'U'>: New cases.
1035 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1037 (print_with_operands) <case 'Y'>: New case.
1038 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1039 <case 'N', 'Y', 'Q'>: New cases.
1040 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1041 (print_insn_cris_with_register_prefix)
1042 (print_insn_cris_without_register_prefix): Call
1043 cris_parse_disassembler_options.
1044 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1045 for CRISv32 and the size of immediate operands. New v32-only
1046 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1047 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1048 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1049 Change brp to be v3..v10.
1050 (cris_support_regs): New vector.
1051 (cris_opcodes): Update head comment. New format characters '[',
1052 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1053 Add new opcodes for v32 and adjust existing opcodes to accommodate
1054 differences to earlier variants.
1055 (cris_cond15s): New vector.
1057 2004-11-04 Jan Beulich <jbeulich@novell.com>
1059 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1061 (Mp): Use f_mode rather than none at all.
1062 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1063 replaces what previously was x_mode; x_mode now means 128-bit SSE
1065 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1066 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1067 pinsrw's second operand is Edqw.
1068 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1069 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1070 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1071 mode when an operand size override is present or always suffixing.
1072 More instructions will need to be added to this group.
1073 (putop): Handle new macro chars 'C' (short/long suffix selector),
1074 'I' (Intel mode override for following macro char), and 'J' (for
1075 adding the 'l' prefix to far branches in AT&T mode). When an
1076 alternative was specified in the template, honor macro character when
1077 specified for Intel mode.
1078 (OP_E): Handle new *_mode values. Correct pointer specifications for
1079 memory operands. Consolidate output of index register.
1080 (OP_G): Handle new *_mode values.
1081 (OP_I): Handle const_1_mode.
1082 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1083 respective opcode prefix bits have been consumed.
1084 (OP_EM, OP_EX): Provide some default handling for generating pointer
1087 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1089 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1092 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1094 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1095 (getregliststring): Support HI/LO and user registers.
1096 * crx-opc.c (crx_instruction): Update data structure according to the
1097 rearrangement done in CRX opcode header file.
1098 (crx_regtab): Likewise.
1099 (crx_optab): Likewise.
1100 (crx_instruction): Reorder load/stor instructions, remove unsupported
1102 support new Co-Processor instruction 'cpi'.
1104 2004-10-27 Nick Clifton <nickc@redhat.com>
1106 * opcodes/iq2000-asm.c: Regenerate.
1107 * opcodes/iq2000-desc.c: Regenerate.
1108 * opcodes/iq2000-desc.h: Regenerate.
1109 * opcodes/iq2000-dis.c: Regenerate.
1110 * opcodes/iq2000-ibld.c: Regenerate.
1111 * opcodes/iq2000-opc.c: Regenerate.
1112 * opcodes/iq2000-opc.h: Regenerate.
1114 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1116 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1117 us4, us5 (respectively).
1118 Remove unsupported 'popa' instruction.
1119 Reverse operands order in store co-processor instructions.
1121 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1123 * Makefile.am: Run "make dep-am"
1124 * Makefile.in: Regenerate.
1126 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1128 * xtensa-dis.c: Use ISO C90 formatting.
1130 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1132 * ppc-opc.c: Revert 2004-09-09 change.
1134 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1136 * xtensa-dis.c (state_names): Delete.
1137 (fetch_data): Use xtensa_isa_maxlength.
1138 (print_xtensa_operand): Replace operand parameter with opcode/operand
1139 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1140 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1141 instruction bundles. Use xmalloc instead of malloc.
1143 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1145 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1148 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1150 * crx-opc.c (crx_instruction): Support Co-processor insns.
1151 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1152 (getregliststring): Change function to use the above enum.
1153 (print_arg): Handle CO-Processor insns.
1154 (crx_cinvs): Add 'b' option to invalidate the branch-target
1157 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1159 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1160 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1161 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1162 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1163 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1165 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1167 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1170 2004-09-30 Paul Brook <paul@codesourcery.com>
1172 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1173 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1175 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1177 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1178 (CONFIG_STATUS_DEPENDENCIES): New.
1179 (Makefile): Removed.
1180 (config.status): Likewise.
1181 * Makefile.in: Regenerated.
1183 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1185 * Makefile.am: Run "make dep-am".
1186 * Makefile.in: Regenerate.
1187 * aclocal.m4: Regenerate.
1188 * configure: Regenerate.
1189 * po/POTFILES.in: Regenerate.
1190 * po/opcodes.pot: Regenerate.
1192 2004-09-11 Andreas Schwab <schwab@suse.de>
1194 * configure: Rebuild.
1196 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1198 * ppc-opc.c (L): Make this field not optional.
1200 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1202 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1203 Fix parameter to 'm[t|f]csr' insns.
1205 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1207 * configure.in: Autoupdate to autoconf 2.59.
1208 * aclocal.m4: Rebuild with aclocal 1.4p6.
1209 * configure: Rebuild with autoconf 2.59.
1210 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1211 bfd changes for autoconf 2.59 on the way).
1212 * config.in: Rebuild with autoheader 2.59.
1214 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1216 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1218 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1220 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1221 (GRPPADLCK2): New define.
1222 (twobyte_has_modrm): True for 0xA6.
1223 (grps): GRPPADLCK2 for opcode 0xA6.
1225 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1227 Introduce SH2a support.
1228 * sh-opc.h (arch_sh2a_base): Renumber.
1229 (arch_sh2a_nofpu_base): Remove.
1230 (arch_sh_base_mask): Adjust.
1231 (arch_opann_mask): New.
1232 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1233 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1234 (sh_table): Adjust whitespace.
1235 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1236 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1237 instruction list throughout.
1238 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1239 of arch_sh2a in instruction list throughout.
1240 (arch_sh2e_up): Accomodate above changes.
1241 (arch_sh2_up): Ditto.
1242 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1243 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1244 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1245 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1246 * sh-opc.h (arch_sh2a_nofpu): New.
1247 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1248 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1250 2004-01-20 DJ Delorie <dj@redhat.com>
1251 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1252 2003-12-29 DJ Delorie <dj@redhat.com>
1253 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1254 sh_opcode_info, sh_table): Add sh2a support.
1255 (arch_op32): New, to tag 32-bit opcodes.
1256 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1257 2003-12-02 Michael Snyder <msnyder@redhat.com>
1258 * sh-opc.h (arch_sh2a): Add.
1259 * sh-dis.c (arch_sh2a): Handle.
1260 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1262 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1264 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1266 2004-07-22 Nick Clifton <nickc@redhat.com>
1269 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1270 insns - this is done by objdump itself.
1271 * h8500-dis.c (print_insn_h8500): Likewise.
1273 2004-07-21 Jan Beulich <jbeulich@novell.com>
1275 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1276 regardless of address size prefix in effect.
1277 (ptr_reg): Size or address registers does not depend on rex64, but
1278 on the presence of an address size override.
1279 (OP_MMX): Use rex.x only for xmm registers.
1280 (OP_EM): Use rex.z only for xmm registers.
1282 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1284 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1285 move/branch operations to the bottom so that VR5400 multimedia
1286 instructions take precedence in disassembly.
1288 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1290 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1291 ISA-specific "break" encoding.
1293 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1295 * arm-opc.h: Fix typo in comment.
1297 2004-07-11 Andreas Schwab <schwab@suse.de>
1299 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1301 2004-07-09 Andreas Schwab <schwab@suse.de>
1303 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1305 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1307 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1308 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1309 (crx-dis.lo): New target.
1310 (crx-opc.lo): Likewise.
1311 * Makefile.in: Regenerate.
1312 * configure.in: Handle bfd_crx_arch.
1313 * configure: Regenerate.
1314 * crx-dis.c: New file.
1315 * crx-opc.c: New file.
1316 * disassemble.c (ARCH_crx): Define.
1317 (disassembler): Handle ARCH_crx.
1319 2004-06-29 James E Wilson <wilson@specifixinc.com>
1321 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1322 * ia64-asmtab.c: Regnerate.
1324 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1326 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1327 (extract_fxm): Don't test dialect.
1328 (XFXFXM_MASK): Include the power4 bit.
1329 (XFXM): Add p4 param.
1330 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1332 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1334 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1335 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1337 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1339 * ppc-opc.c (BH, XLBH_MASK): Define.
1340 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1342 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1344 * i386-dis.c (x_mode): Comment.
1345 (two_source_ops): File scope.
1346 (float_mem): Correct fisttpll and fistpll.
1347 (float_mem_mode): New table.
1349 (OP_E): Correct intel mode PTR output.
1350 (ptr_reg): Use open_char and close_char.
1351 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1352 operands. Set two_source_ops.
1354 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1356 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1357 instead of _raw_size.
1359 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1361 * ia64-gen.c (in_iclass): Handle more postinc st
1363 * ia64-asmtab.c: Rebuilt.
1365 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1367 * s390-opc.txt: Correct architecture mask for some opcodes.
1368 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1369 in the esa mode as well.
1371 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1373 * sh-dis.c (target_arch): Make unsigned.
1374 (print_insn_sh): Replace (most of) switch with a call to
1375 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1376 * sh-opc.h: Redefine architecture flags values.
1377 Add sh3-nommu architecture.
1378 Reorganise <arch>_up macros so they make more visual sense.
1379 (SH_MERGE_ARCH_SET): Define new macro.
1380 (SH_VALID_BASE_ARCH_SET): Likewise.
1381 (SH_VALID_MMU_ARCH_SET): Likewise.
1382 (SH_VALID_CO_ARCH_SET): Likewise.
1383 (SH_VALID_ARCH_SET): Likewise.
1384 (SH_MERGE_ARCH_SET_VALID): Likewise.
1385 (SH_ARCH_SET_HAS_FPU): Likewise.
1386 (SH_ARCH_SET_HAS_DSP): Likewise.
1387 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1388 (sh_get_arch_from_bfd_mach): Add prototype.
1389 (sh_get_arch_up_from_bfd_mach): Likewise.
1390 (sh_get_bfd_mach_from_arch_set): Likewise.
1391 (sh_merge_bfd_arc): Likewise.
1393 2004-05-24 Peter Barada <peter@the-baradas.com>
1395 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1396 into new match_insn_m68k function. Loop over canidate
1397 matches and select first that completely matches.
1398 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1399 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1400 to verify addressing for MAC/EMAC.
1401 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1402 reigster halves since 'fpu' and 'spl' look misleading.
1403 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1404 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1405 first, tighten up match masks.
1406 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1407 'size' from special case code in print_insn_m68k to
1408 determine decode size of insns.
1410 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1412 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1413 well as when -mpower4.
1415 2004-05-13 Nick Clifton <nickc@redhat.com>
1417 * po/fr.po: Updated French translation.
1419 2004-05-05 Peter Barada <peter@the-baradas.com>
1421 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1422 variants in arch_mask. Only set m68881/68851 for 68k chips.
1423 * m68k-op.c: Switch from ColdFire chips to core variants.
1425 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1428 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1430 2004-04-29 Ben Elliston <bje@au.ibm.com>
1432 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1433 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1435 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1437 * sh-dis.c (print_insn_sh): Print the value in constant pool
1438 as a symbol if it looks like a symbol.
1440 2004-04-22 Peter Barada <peter@the-baradas.com>
1442 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1443 appropriate ColdFire architectures.
1444 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1446 Add EMAC instructions, fix MAC instructions. Remove
1447 macmw/macml/msacmw/msacml instructions since mask addressing now
1450 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1452 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1453 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1454 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1455 macro. Adjust all users.
1457 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1459 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1462 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1464 * m32r-asm.c: Regenerate.
1466 2004-03-29 Stan Shebs <shebs@apple.com>
1468 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1471 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1473 * aclocal.m4: Regenerate.
1474 * config.in: Regenerate.
1475 * configure: Regenerate.
1476 * po/POTFILES.in: Regenerate.
1477 * po/opcodes.pot: Regenerate.
1479 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1481 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1483 * ppc-opc.c (RA0): Define.
1484 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1485 (RAOPT): Rename from RAO. Update all uses.
1486 (powerpc_opcodes): Use RA0 as appropriate.
1488 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1490 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1492 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1494 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1496 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1498 * i386-dis.c (GRPPLOCK): Delete.
1499 (grps): Delete GRPPLOCK entry.
1501 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1503 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1505 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1506 (GRPPADLCK): Define.
1507 (dis386): Use NOP_Fixup on "nop".
1508 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1509 (twobyte_has_modrm): Set for 0xa7.
1510 (padlock_table): Delete. Move to..
1511 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1513 (print_insn): Revert PADLOCK_SPECIAL code.
1514 (OP_E): Delete sfence, lfence, mfence checks.
1516 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1518 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1519 (INVLPG_Fixup): New function.
1520 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1522 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1524 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1525 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1526 (padlock_table): New struct with PadLock instructions.
1527 (print_insn): Handle PADLOCK_SPECIAL.
1529 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1531 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1532 (OP_E): Twiddle clflush to sfence here.
1534 2004-03-08 Nick Clifton <nickc@redhat.com>
1536 * po/de.po: Updated German translation.
1538 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1540 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1541 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1542 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1545 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1547 * frv-asm.c: Regenerate.
1548 * frv-desc.c: Regenerate.
1549 * frv-desc.h: Regenerate.
1550 * frv-dis.c: Regenerate.
1551 * frv-ibld.c: Regenerate.
1552 * frv-opc.c: Regenerate.
1553 * frv-opc.h: Regenerate.
1555 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1557 * frv-desc.c, frv-opc.c: Regenerate.
1559 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1561 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1563 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1565 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1566 Also correct mistake in the comment.
1568 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1570 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1571 ensure that double registers have even numbers.
1572 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1573 that reserved instruction 0xfffd does not decode the same
1575 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1576 REG_N refers to a double register.
1577 Add REG_N_B01 nibble type and use it instead of REG_NM
1579 Adjust the bit patterns in a few comments.
1581 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1583 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1585 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1587 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1589 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1591 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1593 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1595 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1596 mtivor32, mtivor33, mtivor34.
1598 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1600 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1602 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1604 * arm-opc.h Maverick accumulator register opcode fixes.
1606 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1608 * m32r-dis.c: Regenerate.
1610 2004-01-27 Michael Snyder <msnyder@redhat.com>
1612 * sh-opc.h (sh_table): "fsrra", not "fssra".
1614 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1616 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1619 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1621 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1623 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1625 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1626 1. Don't print scale factor on AT&T mode when index missing.
1628 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1630 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1631 when loaded into XR registers.
1633 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1635 * frv-desc.h: Regenerate.
1636 * frv-desc.c: Regenerate.
1637 * frv-opc.c: Regenerate.
1639 2004-01-13 Michael Snyder <msnyder@redhat.com>
1641 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1643 2004-01-09 Paul Brook <paul@codesourcery.com>
1645 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1648 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1650 * Makefile.am (libopcodes_la_DEPENDENCIES)
1651 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1652 comment about the problem.
1653 * Makefile.in: Regenerate.
1655 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1657 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1658 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1659 cut&paste errors in shifting/truncating numerical operands.
1660 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1661 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1662 (parse_uslo16): Likewise.
1663 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1664 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1665 (parse_s12): Likewise.
1666 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1667 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1668 (parse_uslo16): Likewise.
1669 (parse_uhi16): Parse gothi and gotfuncdeschi.
1670 (parse_d12): Parse got12 and gotfuncdesc12.
1671 (parse_s12): Likewise.
1673 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1675 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1676 instruction which looks similar to an 'rla' instruction.
1678 For older changes see ChangeLog-0203
1684 version-control: never