1 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
3 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
6 2005-07-16 Alan Modra <amodra@bigpond.net.au>
8 * Makefile.am: Run "make dep-am".
9 (stamp-m32c): Fix cpu dependencies.
10 * Makefile.in: Regenerate.
11 * ip2k-dis.c: Regenerate.
13 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
15 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
16 (VMX_Fixup): New. Fix up Intel VMX Instructions.
20 (dis386_twobyte): Updated entries 0x78 and 0x79.
21 (twobyte_has_modrm): Likewise.
22 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
23 (OP_G): Handle m_mode.
25 2005-07-14 Jim Blandy <jimb@redhat.com>
27 Add support for the Renesas M32C and M16C.
28 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
29 * m32c-desc.h, m32c-opc.h: New.
30 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
31 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
33 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
34 m32c-ibld.lo, m32c-opc.lo.
35 (CLEANFILES): List stamp-m32c.
36 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
37 (CGEN_CPUS): Add m32c.
38 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
39 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
40 (m32c_opc_h): New variable.
41 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
42 (m32c-opc.lo): New rules.
43 * Makefile.in: Regenerated.
44 * configure.in: Add case for bfd_m32c_arch.
45 * configure: Regenerated.
46 * disassemble.c (ARCH_m32c): New.
47 [ARCH_m32c]: #include "m32c-desc.h".
48 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
49 (disassemble_init_for_target) [ARCH_m32c]: Same.
51 * cgen-ops.h, cgen-types.h: New files.
52 * Makefile.am (HFILES): List them.
53 * Makefile.in: Regenerated.
55 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
57 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
58 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
59 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
60 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
61 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
62 v850-dis.c: Fix format bugs.
63 * ia64-gen.c (fail, warn): Add format attribute.
64 * or32-opc.c (debug): Likewise.
66 2005-07-07 Khem Raj <kraj@mvista.com>
68 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
71 2005-07-06 Alan Modra <amodra@bigpond.net.au>
73 * Makefile.am (stamp-m32r): Fix path to cpu files.
74 (stamp-m32r, stamp-iq2000): Likewise.
75 * Makefile.in: Regenerate.
76 * m32r-asm.c: Regenerate.
77 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
78 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
80 2005-07-05 Nick Clifton <nickc@redhat.com>
82 * iq2000-asm.c: Regenerate.
83 * ms1-asm.c: Regenerate.
85 2005-07-05 Jan Beulich <jbeulich@novell.com>
87 * i386-dis.c (SVME_Fixup): New.
88 (grps): Use it for the lidt entry.
89 (PNI_Fixup): Call OP_M rather than OP_E.
90 (INVLPG_Fixup): Likewise.
92 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
94 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
96 2005-07-01 Nick Clifton <nickc@redhat.com>
98 * a29k-dis.c: Update to ISO C90 style function declarations and
100 * alpha-opc.c: Likewise.
101 * arc-dis.c: Likewise.
102 * arc-opc.c: Likewise.
103 * avr-dis.c: Likewise.
104 * cgen-asm.in: Likewise.
105 * cgen-dis.in: Likewise.
106 * cgen-ibld.in: Likewise.
107 * cgen-opc.c: Likewise.
108 * cris-dis.c: Likewise.
109 * d10v-dis.c: Likewise.
110 * d30v-dis.c: Likewise.
111 * d30v-opc.c: Likewise.
112 * dis-buf.c: Likewise.
113 * dlx-dis.c: Likewise.
114 * h8300-dis.c: Likewise.
115 * h8500-dis.c: Likewise.
116 * hppa-dis.c: Likewise.
117 * i370-dis.c: Likewise.
118 * i370-opc.c: Likewise.
119 * m10200-dis.c: Likewise.
120 * m10300-dis.c: Likewise.
121 * m68k-dis.c: Likewise.
122 * m88k-dis.c: Likewise.
123 * mips-dis.c: Likewise.
124 * mmix-dis.c: Likewise.
125 * msp430-dis.c: Likewise.
126 * ns32k-dis.c: Likewise.
127 * or32-dis.c: Likewise.
128 * or32-opc.c: Likewise.
129 * pdp11-dis.c: Likewise.
130 * pj-dis.c: Likewise.
131 * s390-dis.c: Likewise.
132 * sh-dis.c: Likewise.
133 * sh64-dis.c: Likewise.
134 * sparc-dis.c: Likewise.
135 * sparc-opc.c: Likewise.
136 * sysdep.h: Likewise.
137 * tic30-dis.c: Likewise.
138 * tic4x-dis.c: Likewise.
139 * tic80-dis.c: Likewise.
140 * v850-dis.c: Likewise.
141 * v850-opc.c: Likewise.
142 * vax-dis.c: Likewise.
143 * w65-dis.c: Likewise.
144 * z8kgen.c: Likewise.
146 * fr30-*: Regenerate.
148 * ip2k-*: Regenerate.
149 * iq2000-*: Regenerate.
150 * m32r-*: Regenerate.
152 * openrisc-*: Regenerate.
153 * xstormy16-*: Regenerate.
155 2005-06-23 Ben Elliston <bje@gnu.org>
157 * m68k-dis.c: Use ISC C90.
158 * m68k-opc.c: Formatting fixes.
160 2005-06-16 David Ung <davidu@mips.com>
162 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
163 instructions to the table; seb/seh/sew/zeb/zeh/zew.
165 2005-06-15 Dave Brolley <brolley@redhat.com>
167 Contribute Morpho ms1 on behalf of Red Hat
168 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
169 ms1-opc.h: New files, Morpho ms1 target.
171 2004-05-14 Stan Cox <scox@redhat.com>
173 * disassemble.c (ARCH_ms1): Define.
174 (disassembler): Handle bfd_arch_ms1
176 2004-05-13 Michael Snyder <msnyder@redhat.com>
178 * Makefile.am, Makefile.in: Add ms1 target.
179 * configure.in: Ditto.
181 2005-06-08 Zack Weinberg <zack@codesourcery.com>
183 * arm-opc.h: Delete; fold contents into ...
184 * arm-dis.c: ... here. Move includes of internal COFF headers
185 next to includes of internal ELF headers.
186 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
187 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
188 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
189 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
190 (iwmmxt_wwnames, iwmmxt_wwssnames):
192 (regnames): Remove iWMMXt coprocessor register sets.
193 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
194 (get_arm_regnames): Adjust fourth argument to match above changes.
195 (set_iwmmxt_regnames): Delete.
196 (print_insn_arm): Constify 'c'. Use ISO syntax for function
197 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
198 and iwmmxt_cregnames, not set_iwmmxt_regnames.
199 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
200 ISO syntax for function pointer calls.
202 2005-06-07 Zack Weinberg <zack@codesourcery.com>
204 * arm-dis.c: Split up the comments describing the format codes, so
205 that the ARM and 16-bit Thumb opcode tables each have comments
206 preceding them that describe all the codes, and only the codes,
207 valid in those tables. (32-bit Thumb table is already like this.)
208 Reorder the lists in all three comments to match the order in
209 which the codes are implemented.
210 Remove all forward declarations of static functions. Convert all
211 function definitions to ISO C format.
212 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
214 (print_insn_thumb16): Remove unused case 'I'.
215 (print_insn): Update for changed calling convention of subroutines.
217 2005-05-25 Jan Beulich <jbeulich@novell.com>
219 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
220 hex (but retain it being displayed as signed). Remove redundant
221 checks. Add handling of displacements for 16-bit addressing in Intel
224 2005-05-25 Jan Beulich <jbeulich@novell.com>
226 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
227 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
228 masking of 'rm' in 16-bit memory address handling.
230 2005-05-19 Anton Blanchard <anton@samba.org>
232 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
233 (print_ppc_disassembler_options): Document it.
234 * ppc-opc.c (SVC_LEV): Define.
235 (LEV): Allow optional operand.
237 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
238 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
240 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
242 * Makefile.in: Regenerate.
244 2005-05-17 Zack Weinberg <zack@codesourcery.com>
246 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
247 instructions. Adjust disassembly of some opcodes to match
249 (thumb32_opcodes): New table.
250 (print_insn_thumb): Rename print_insn_thumb16; don't handle
251 two-halfword branches here.
252 (print_insn_thumb32): New function.
253 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
254 and print_insn_thumb32. Be consistent about order of
255 halfwords when printing 32-bit instructions.
257 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
260 * i386-dis.c (branch_v_mode): New.
261 (indirEv): Use branch_v_mode instead of v_mode.
262 (OP_E): Handle branch_v_mode.
264 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
266 * d10v-dis.c (dis_2_short): Support 64bit host.
268 2005-05-07 Nick Clifton <nickc@redhat.com>
270 * po/nl.po: Updated translation.
272 2005-05-07 Nick Clifton <nickc@redhat.com>
274 * Update the address and phone number of the FSF organization in
275 the GPL notices in the following files:
276 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
277 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
278 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
279 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
280 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
281 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
282 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
283 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
284 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
285 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
286 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
287 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
288 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
289 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
290 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
291 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
292 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
293 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
294 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
295 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
296 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
297 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
298 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
299 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
300 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
301 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
302 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
303 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
304 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
305 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
306 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
307 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
308 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
310 2005-05-05 James E Wilson <wilson@specifixinc.com>
312 * ia64-opc.c: Include sysdep.h before libiberty.h.
314 2005-05-05 Nick Clifton <nickc@redhat.com>
316 * configure.in (ALL_LINGUAS): Add vi.
317 * configure: Regenerate.
320 2005-04-26 Jerome Guitton <guitton@gnat.com>
322 * configure.in: Fix the check for basename declaration.
323 * configure: Regenerate.
325 2005-04-19 Alan Modra <amodra@bigpond.net.au>
327 * ppc-opc.c (RTO): Define.
328 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
329 entries to suit PPC440.
331 2005-04-18 Mark Kettenis <kettenis@gnu.org>
333 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
336 2005-04-14 Nick Clifton <nickc@redhat.com>
338 * po/fi.po: New translation: Finnish.
339 * configure.in (ALL_LINGUAS): Add fi.
340 * configure: Regenerate.
342 2005-04-14 Alan Modra <amodra@bigpond.net.au>
344 * Makefile.am (NO_WERROR): Define.
345 * configure.in: Invoke AM_BINUTILS_WARNINGS.
346 * Makefile.in: Regenerate.
347 * aclocal.m4: Regenerate.
348 * configure: Regenerate.
350 2005-04-04 Nick Clifton <nickc@redhat.com>
352 * fr30-asm.c: Regenerate.
353 * frv-asm.c: Regenerate.
354 * iq2000-asm.c: Regenerate.
355 * m32r-asm.c: Regenerate.
356 * openrisc-asm.c: Regenerate.
358 2005-04-01 Jan Beulich <jbeulich@novell.com>
360 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
361 visible operands in Intel mode. The first operand of monitor is
364 2005-04-01 Jan Beulich <jbeulich@novell.com>
366 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
367 easier future additions.
369 2005-03-31 Jerome Guitton <guitton@gnat.com>
371 * configure.in: Check for basename.
372 * configure: Regenerate.
375 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
377 * i386-dis.c (SEG_Fixup): New.
379 (dis386): Use "Sv" for 0x8c and 0x8e.
381 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
382 Nick Clifton <nickc@redhat.com>
384 * vax-dis.c: (entry_addr): New varible: An array of user supplied
385 function entry mask addresses.
386 (entry_addr_occupied_slots): New variable: The number of occupied
387 elements in entry_addr.
388 (entry_addr_total_slots): New variable: The total number of
389 elements in entry_addr.
390 (parse_disassembler_options): New function. Fills in the entry_addr
392 (free_entry_array): New function. Release the memory used by the
393 entry addr array. Suppressed because there is no way to call it.
394 (is_function_entry): Check if a given address is a function's
395 start address by looking at supplied entry mask addresses and
396 symbol information, if available.
397 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
399 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
401 * cris-dis.c (print_with_operands): Use ~31L for long instead
404 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
406 * mmix-opc.c (O): Revert the last change.
409 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
411 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
414 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
416 * mmix-opc.c (O, Z): Force expression as unsigned long.
418 2005-03-18 Nick Clifton <nickc@redhat.com>
420 * ip2k-asm.c: Regenerate.
421 * op/opcodes.pot: Regenerate.
423 2005-03-16 Nick Clifton <nickc@redhat.com>
424 Ben Elliston <bje@au.ibm.com>
426 * configure.in (werror): New switch: Add -Werror to the
427 compiler command line. Enabled by default. Disable via
429 * configure: Regenerate.
431 2005-03-16 Alan Modra <amodra@bigpond.net.au>
433 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
436 2005-03-15 Alan Modra <amodra@bigpond.net.au>
438 * po/es.po: Commit new Spanish translation.
440 * po/fr.po: Commit new French translation.
442 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
444 * vax-dis.c: Fix spelling error
445 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
446 of just "Entry mask: < r1 ... >"
448 2005-03-12 Zack Weinberg <zack@codesourcery.com>
450 * arm-dis.c (arm_opcodes): Document %E and %V.
451 Add entries for v6T2 ARM instructions:
452 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
453 (print_insn_arm): Add support for %E and %V.
454 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
456 2005-03-10 Jeff Baker <jbaker@qnx.com>
457 Alan Modra <amodra@bigpond.net.au>
459 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
460 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
462 (XSPRG_MASK): Mask off extra bits now part of sprg field.
463 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
464 mfsprg4..7 after msprg and consolidate.
466 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
468 * vax-dis.c (entry_mask_bit): New array.
469 (print_insn_vax): Decode function entry mask.
471 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
473 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
475 2005-03-05 Alan Modra <amodra@bigpond.net.au>
477 * po/opcodes.pot: Regenerate.
479 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
481 * arc-dis.c (a4_decoding_class): New enum.
482 (dsmOneArcInst): Use the enum values for the decoding class.
483 Remove redundant case in the switch for decodingClass value 11.
485 2005-03-02 Jan Beulich <jbeulich@novell.com>
487 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
489 (OP_C): Consider lock prefix in non-64-bit modes.
491 2005-02-24 Alan Modra <amodra@bigpond.net.au>
493 * cris-dis.c (format_hex): Remove ineffective warning fix.
494 * crx-dis.c (make_instruction): Warning fix.
495 * frv-asm.c: Regenerate.
497 2005-02-23 Nick Clifton <nickc@redhat.com>
499 * cgen-dis.in: Use bfd_byte for buffers that are passed to
502 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
504 * crx-dis.c (make_instruction): Move argument structure into inner
505 scope and ensure that all of its fields are initialised before
508 * fr30-asm.c: Regenerate.
509 * fr30-dis.c: Regenerate.
510 * frv-asm.c: Regenerate.
511 * frv-dis.c: Regenerate.
512 * ip2k-asm.c: Regenerate.
513 * ip2k-dis.c: Regenerate.
514 * iq2000-asm.c: Regenerate.
515 * iq2000-dis.c: Regenerate.
516 * m32r-asm.c: Regenerate.
517 * m32r-dis.c: Regenerate.
518 * openrisc-asm.c: Regenerate.
519 * openrisc-dis.c: Regenerate.
520 * xstormy16-asm.c: Regenerate.
521 * xstormy16-dis.c: Regenerate.
523 2005-02-22 Alan Modra <amodra@bigpond.net.au>
525 * arc-ext.c: Warning fixes.
526 * arc-ext.h: Likewise.
527 * cgen-opc.c: Likewise.
528 * ia64-gen.c: Likewise.
529 * maxq-dis.c: Likewise.
530 * ns32k-dis.c: Likewise.
531 * w65-dis.c: Likewise.
532 * ia64-asmtab.c: Regenerate.
534 2005-02-22 Alan Modra <amodra@bigpond.net.au>
536 * fr30-desc.c: Regenerate.
537 * fr30-desc.h: Regenerate.
538 * fr30-opc.c: Regenerate.
539 * fr30-opc.h: Regenerate.
540 * frv-desc.c: Regenerate.
541 * frv-desc.h: Regenerate.
542 * frv-opc.c: Regenerate.
543 * frv-opc.h: Regenerate.
544 * ip2k-desc.c: Regenerate.
545 * ip2k-desc.h: Regenerate.
546 * ip2k-opc.c: Regenerate.
547 * ip2k-opc.h: Regenerate.
548 * iq2000-desc.c: Regenerate.
549 * iq2000-desc.h: Regenerate.
550 * iq2000-opc.c: Regenerate.
551 * iq2000-opc.h: Regenerate.
552 * m32r-desc.c: Regenerate.
553 * m32r-desc.h: Regenerate.
554 * m32r-opc.c: Regenerate.
555 * m32r-opc.h: Regenerate.
556 * m32r-opinst.c: Regenerate.
557 * openrisc-desc.c: Regenerate.
558 * openrisc-desc.h: Regenerate.
559 * openrisc-opc.c: Regenerate.
560 * openrisc-opc.h: Regenerate.
561 * xstormy16-desc.c: Regenerate.
562 * xstormy16-desc.h: Regenerate.
563 * xstormy16-opc.c: Regenerate.
564 * xstormy16-opc.h: Regenerate.
566 2005-02-21 Alan Modra <amodra@bigpond.net.au>
568 * Makefile.am: Run "make dep-am"
569 * Makefile.in: Regenerate.
571 2005-02-15 Nick Clifton <nickc@redhat.com>
573 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
574 compile time warnings.
575 (print_keyword): Likewise.
576 (default_print_insn): Likewise.
578 * fr30-desc.c: Regenerated.
579 * fr30-desc.h: Regenerated.
580 * fr30-dis.c: Regenerated.
581 * fr30-opc.c: Regenerated.
582 * fr30-opc.h: Regenerated.
583 * frv-desc.c: Regenerated.
584 * frv-dis.c: Regenerated.
585 * frv-opc.c: Regenerated.
586 * ip2k-asm.c: Regenerated.
587 * ip2k-desc.c: Regenerated.
588 * ip2k-desc.h: Regenerated.
589 * ip2k-dis.c: Regenerated.
590 * ip2k-opc.c: Regenerated.
591 * ip2k-opc.h: Regenerated.
592 * iq2000-desc.c: Regenerated.
593 * iq2000-dis.c: Regenerated.
594 * iq2000-opc.c: Regenerated.
595 * m32r-asm.c: Regenerated.
596 * m32r-desc.c: Regenerated.
597 * m32r-desc.h: Regenerated.
598 * m32r-dis.c: Regenerated.
599 * m32r-opc.c: Regenerated.
600 * m32r-opc.h: Regenerated.
601 * m32r-opinst.c: Regenerated.
602 * openrisc-desc.c: Regenerated.
603 * openrisc-desc.h: Regenerated.
604 * openrisc-dis.c: Regenerated.
605 * openrisc-opc.c: Regenerated.
606 * openrisc-opc.h: Regenerated.
607 * xstormy16-desc.c: Regenerated.
608 * xstormy16-desc.h: Regenerated.
609 * xstormy16-dis.c: Regenerated.
610 * xstormy16-opc.c: Regenerated.
611 * xstormy16-opc.h: Regenerated.
613 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
615 * dis-buf.c (perror_memory): Use sprintf_vma to print out
618 2005-02-11 Nick Clifton <nickc@redhat.com>
620 * iq2000-asm.c: Regenerate.
622 * frv-dis.c: Regenerate.
624 2005-02-07 Jim Blandy <jimb@redhat.com>
626 * Makefile.am (CGEN): Load guile.scm before calling the main
628 * Makefile.in: Regenerated.
629 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
630 Simply pass the cgen-opc.scm path to ${cgen} as its first
631 argument; ${cgen} itself now contains the '-s', or whatever is
632 appropriate for the Scheme being used.
634 2005-01-31 Andrew Cagney <cagney@gnu.org>
636 * configure: Regenerate to track ../gettext.m4.
638 2005-01-31 Jan Beulich <jbeulich@novell.com>
640 * ia64-gen.c (NELEMS): Define.
641 (shrink): Generate alias with missing second predicate register when
642 opcode has two outputs and these are both predicates.
643 * ia64-opc-i.c (FULL17): Define.
644 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
645 here to generate output template.
646 (TBITCM, TNATCM): Undefine after use.
647 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
648 first input. Add ld16 aliases without ar.csd as second output. Add
649 st16 aliases without ar.csd as second input. Add cmpxchg aliases
650 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
651 ar.ccv as third/fourth inputs. Consolidate through...
652 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
653 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
654 * ia64-asmtab.c: Regenerate.
656 2005-01-27 Andrew Cagney <cagney@gnu.org>
658 * configure: Regenerate to track ../gettext.m4 change.
660 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
662 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
663 * frv-asm.c: Rebuilt.
664 * frv-desc.c: Rebuilt.
665 * frv-desc.h: Rebuilt.
666 * frv-dis.c: Rebuilt.
667 * frv-ibld.c: Rebuilt.
668 * frv-opc.c: Rebuilt.
669 * frv-opc.h: Rebuilt.
671 2005-01-24 Andrew Cagney <cagney@gnu.org>
673 * configure: Regenerate, ../gettext.m4 was updated.
675 2005-01-21 Fred Fish <fnf@specifixinc.com>
677 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
678 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
679 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
682 2005-01-20 Alan Modra <amodra@bigpond.net.au>
684 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
686 2005-01-19 Fred Fish <fnf@specifixinc.com>
688 * mips-dis.c (no_aliases): New disassembly option flag.
689 (set_default_mips_dis_options): Init no_aliases to zero.
690 (parse_mips_dis_option): Handle no-aliases option.
691 (print_insn_mips): Ignore table entries that are aliases
692 if no_aliases is set.
693 (print_insn_mips16): Ditto.
694 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
695 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
696 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
697 * mips16-opc.c (mips16_opcodes): Ditto.
699 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
701 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
702 (inheritance diagram): Add missing edge.
703 (arch_sh1_up): Rename arch_sh_up to match external name to make life
704 easier for the testsuite.
705 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
706 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
707 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
708 arch_sh2a_or_sh4_up child.
709 (sh_table): Do renaming as above.
710 Correct comment for ldc.l for gas testsuite to read.
711 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
712 Correct comments for movy.w and movy.l for gas testsuite to read.
713 Correct comments for fmov.d and fmov.s for gas testsuite to read.
715 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
717 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
719 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
721 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
723 2005-01-10 Andreas Schwab <schwab@suse.de>
725 * disassemble.c (disassemble_init_for_target) <case
726 bfd_arch_ia64>: Set skip_zeroes to 16.
727 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
729 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
731 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
733 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
735 * avr-dis.c: Prettyprint. Added printing of symbol names in all
736 memory references. Convert avr_operand() to C90 formatting.
738 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
740 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
742 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
744 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
745 (no_op_insn): Initialize array with instructions that have no
747 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
749 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
751 * arm-dis.c: Correct top-level comment.
753 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
755 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
756 architecuture defining the insn.
757 (arm_opcodes, thumb_opcodes): Delete. Move to ...
758 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
760 Also include opcode/arm.h.
761 * Makefile.am (arm-dis.lo): Update dependency list.
762 * Makefile.in: Regenerate.
764 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
766 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
767 reflect the change to the short immediate syntax.
769 2004-11-19 Alan Modra <amodra@bigpond.net.au>
771 * or32-opc.c (debug): Warning fix.
772 * po/POTFILES.in: Regenerate.
774 * maxq-dis.c: Formatting.
775 (print_insn): Warning fix.
777 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
779 * arm-dis.c (WORD_ADDRESS): Define.
780 (print_insn): Use it. Correct big-endian end-of-section handling.
782 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
783 Vineet Sharma <vineets@noida.hcltech.com>
785 * maxq-dis.c: New file.
786 * disassemble.c (ARCH_maxq): Define.
787 (disassembler): Add 'print_insn_maxq_little' for handling maxq
789 * configure.in: Add case for bfd_maxq_arch.
790 * configure: Regenerate.
791 * Makefile.am: Add support for maxq-dis.c
792 * Makefile.in: Regenerate.
793 * aclocal.m4: Regenerate.
795 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
797 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
799 * crx-dis.c: Likewise.
801 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
803 Generally, handle CRISv32.
804 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
805 (struct cris_disasm_data): New type.
806 (format_reg, format_hex, cris_constraint, print_flags)
807 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
809 (format_sup_reg, print_insn_crisv32_with_register_prefix)
810 (print_insn_crisv32_without_register_prefix)
811 (print_insn_crisv10_v32_with_register_prefix)
812 (print_insn_crisv10_v32_without_register_prefix)
813 (cris_parse_disassembler_options): New functions.
814 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
815 parameter. All callers changed.
816 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
818 (cris_constraint) <case 'Y', 'U'>: New cases.
819 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
821 (print_with_operands) <case 'Y'>: New case.
822 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
823 <case 'N', 'Y', 'Q'>: New cases.
824 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
825 (print_insn_cris_with_register_prefix)
826 (print_insn_cris_without_register_prefix): Call
827 cris_parse_disassembler_options.
828 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
829 for CRISv32 and the size of immediate operands. New v32-only
830 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
831 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
832 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
833 Change brp to be v3..v10.
834 (cris_support_regs): New vector.
835 (cris_opcodes): Update head comment. New format characters '[',
836 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
837 Add new opcodes for v32 and adjust existing opcodes to accommodate
838 differences to earlier variants.
839 (cris_cond15s): New vector.
841 2004-11-04 Jan Beulich <jbeulich@novell.com>
843 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
845 (Mp): Use f_mode rather than none at all.
846 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
847 replaces what previously was x_mode; x_mode now means 128-bit SSE
849 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
850 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
851 pinsrw's second operand is Edqw.
852 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
853 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
854 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
855 mode when an operand size override is present or always suffixing.
856 More instructions will need to be added to this group.
857 (putop): Handle new macro chars 'C' (short/long suffix selector),
858 'I' (Intel mode override for following macro char), and 'J' (for
859 adding the 'l' prefix to far branches in AT&T mode). When an
860 alternative was specified in the template, honor macro character when
861 specified for Intel mode.
862 (OP_E): Handle new *_mode values. Correct pointer specifications for
863 memory operands. Consolidate output of index register.
864 (OP_G): Handle new *_mode values.
865 (OP_I): Handle const_1_mode.
866 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
867 respective opcode prefix bits have been consumed.
868 (OP_EM, OP_EX): Provide some default handling for generating pointer
871 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
873 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
876 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
878 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
879 (getregliststring): Support HI/LO and user registers.
880 * crx-opc.c (crx_instruction): Update data structure according to the
881 rearrangement done in CRX opcode header file.
882 (crx_regtab): Likewise.
883 (crx_optab): Likewise.
884 (crx_instruction): Reorder load/stor instructions, remove unsupported
886 support new Co-Processor instruction 'cpi'.
888 2004-10-27 Nick Clifton <nickc@redhat.com>
890 * opcodes/iq2000-asm.c: Regenerate.
891 * opcodes/iq2000-desc.c: Regenerate.
892 * opcodes/iq2000-desc.h: Regenerate.
893 * opcodes/iq2000-dis.c: Regenerate.
894 * opcodes/iq2000-ibld.c: Regenerate.
895 * opcodes/iq2000-opc.c: Regenerate.
896 * opcodes/iq2000-opc.h: Regenerate.
898 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
900 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
901 us4, us5 (respectively).
902 Remove unsupported 'popa' instruction.
903 Reverse operands order in store co-processor instructions.
905 2004-10-15 Alan Modra <amodra@bigpond.net.au>
907 * Makefile.am: Run "make dep-am"
908 * Makefile.in: Regenerate.
910 2004-10-12 Bob Wilson <bob.wilson@acm.org>
912 * xtensa-dis.c: Use ISO C90 formatting.
914 2004-10-09 Alan Modra <amodra@bigpond.net.au>
916 * ppc-opc.c: Revert 2004-09-09 change.
918 2004-10-07 Bob Wilson <bob.wilson@acm.org>
920 * xtensa-dis.c (state_names): Delete.
921 (fetch_data): Use xtensa_isa_maxlength.
922 (print_xtensa_operand): Replace operand parameter with opcode/operand
923 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
924 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
925 instruction bundles. Use xmalloc instead of malloc.
927 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
929 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
932 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
934 * crx-opc.c (crx_instruction): Support Co-processor insns.
935 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
936 (getregliststring): Change function to use the above enum.
937 (print_arg): Handle CO-Processor insns.
938 (crx_cinvs): Add 'b' option to invalidate the branch-target
941 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
943 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
944 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
945 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
946 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
947 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
949 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
951 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
954 2004-09-30 Paul Brook <paul@codesourcery.com>
956 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
957 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
959 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
961 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
962 (CONFIG_STATUS_DEPENDENCIES): New.
964 (config.status): Likewise.
965 * Makefile.in: Regenerated.
967 2004-09-17 Alan Modra <amodra@bigpond.net.au>
969 * Makefile.am: Run "make dep-am".
970 * Makefile.in: Regenerate.
971 * aclocal.m4: Regenerate.
972 * configure: Regenerate.
973 * po/POTFILES.in: Regenerate.
974 * po/opcodes.pot: Regenerate.
976 2004-09-11 Andreas Schwab <schwab@suse.de>
978 * configure: Rebuild.
980 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
982 * ppc-opc.c (L): Make this field not optional.
984 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
986 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
987 Fix parameter to 'm[t|f]csr' insns.
989 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
991 * configure.in: Autoupdate to autoconf 2.59.
992 * aclocal.m4: Rebuild with aclocal 1.4p6.
993 * configure: Rebuild with autoconf 2.59.
994 * Makefile.in: Rebuild with automake 1.4p6 (picking up
995 bfd changes for autoconf 2.59 on the way).
996 * config.in: Rebuild with autoheader 2.59.
998 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1000 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1002 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1004 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1005 (GRPPADLCK2): New define.
1006 (twobyte_has_modrm): True for 0xA6.
1007 (grps): GRPPADLCK2 for opcode 0xA6.
1009 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1011 Introduce SH2a support.
1012 * sh-opc.h (arch_sh2a_base): Renumber.
1013 (arch_sh2a_nofpu_base): Remove.
1014 (arch_sh_base_mask): Adjust.
1015 (arch_opann_mask): New.
1016 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1017 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1018 (sh_table): Adjust whitespace.
1019 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1020 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1021 instruction list throughout.
1022 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1023 of arch_sh2a in instruction list throughout.
1024 (arch_sh2e_up): Accomodate above changes.
1025 (arch_sh2_up): Ditto.
1026 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1027 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1028 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1029 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1030 * sh-opc.h (arch_sh2a_nofpu): New.
1031 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1032 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1034 2004-01-20 DJ Delorie <dj@redhat.com>
1035 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1036 2003-12-29 DJ Delorie <dj@redhat.com>
1037 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1038 sh_opcode_info, sh_table): Add sh2a support.
1039 (arch_op32): New, to tag 32-bit opcodes.
1040 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1041 2003-12-02 Michael Snyder <msnyder@redhat.com>
1042 * sh-opc.h (arch_sh2a): Add.
1043 * sh-dis.c (arch_sh2a): Handle.
1044 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1046 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1048 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1050 2004-07-22 Nick Clifton <nickc@redhat.com>
1053 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1054 insns - this is done by objdump itself.
1055 * h8500-dis.c (print_insn_h8500): Likewise.
1057 2004-07-21 Jan Beulich <jbeulich@novell.com>
1059 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1060 regardless of address size prefix in effect.
1061 (ptr_reg): Size or address registers does not depend on rex64, but
1062 on the presence of an address size override.
1063 (OP_MMX): Use rex.x only for xmm registers.
1064 (OP_EM): Use rex.z only for xmm registers.
1066 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1068 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1069 move/branch operations to the bottom so that VR5400 multimedia
1070 instructions take precedence in disassembly.
1072 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1074 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1075 ISA-specific "break" encoding.
1077 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1079 * arm-opc.h: Fix typo in comment.
1081 2004-07-11 Andreas Schwab <schwab@suse.de>
1083 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1085 2004-07-09 Andreas Schwab <schwab@suse.de>
1087 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1089 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1091 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1092 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1093 (crx-dis.lo): New target.
1094 (crx-opc.lo): Likewise.
1095 * Makefile.in: Regenerate.
1096 * configure.in: Handle bfd_crx_arch.
1097 * configure: Regenerate.
1098 * crx-dis.c: New file.
1099 * crx-opc.c: New file.
1100 * disassemble.c (ARCH_crx): Define.
1101 (disassembler): Handle ARCH_crx.
1103 2004-06-29 James E Wilson <wilson@specifixinc.com>
1105 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1106 * ia64-asmtab.c: Regnerate.
1108 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1110 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1111 (extract_fxm): Don't test dialect.
1112 (XFXFXM_MASK): Include the power4 bit.
1113 (XFXM): Add p4 param.
1114 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1116 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1118 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1119 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1121 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1123 * ppc-opc.c (BH, XLBH_MASK): Define.
1124 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1126 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1128 * i386-dis.c (x_mode): Comment.
1129 (two_source_ops): File scope.
1130 (float_mem): Correct fisttpll and fistpll.
1131 (float_mem_mode): New table.
1133 (OP_E): Correct intel mode PTR output.
1134 (ptr_reg): Use open_char and close_char.
1135 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1136 operands. Set two_source_ops.
1138 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1140 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1141 instead of _raw_size.
1143 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1145 * ia64-gen.c (in_iclass): Handle more postinc st
1147 * ia64-asmtab.c: Rebuilt.
1149 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1151 * s390-opc.txt: Correct architecture mask for some opcodes.
1152 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1153 in the esa mode as well.
1155 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1157 * sh-dis.c (target_arch): Make unsigned.
1158 (print_insn_sh): Replace (most of) switch with a call to
1159 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1160 * sh-opc.h: Redefine architecture flags values.
1161 Add sh3-nommu architecture.
1162 Reorganise <arch>_up macros so they make more visual sense.
1163 (SH_MERGE_ARCH_SET): Define new macro.
1164 (SH_VALID_BASE_ARCH_SET): Likewise.
1165 (SH_VALID_MMU_ARCH_SET): Likewise.
1166 (SH_VALID_CO_ARCH_SET): Likewise.
1167 (SH_VALID_ARCH_SET): Likewise.
1168 (SH_MERGE_ARCH_SET_VALID): Likewise.
1169 (SH_ARCH_SET_HAS_FPU): Likewise.
1170 (SH_ARCH_SET_HAS_DSP): Likewise.
1171 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1172 (sh_get_arch_from_bfd_mach): Add prototype.
1173 (sh_get_arch_up_from_bfd_mach): Likewise.
1174 (sh_get_bfd_mach_from_arch_set): Likewise.
1175 (sh_merge_bfd_arc): Likewise.
1177 2004-05-24 Peter Barada <peter@the-baradas.com>
1179 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1180 into new match_insn_m68k function. Loop over canidate
1181 matches and select first that completely matches.
1182 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1183 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1184 to verify addressing for MAC/EMAC.
1185 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1186 reigster halves since 'fpu' and 'spl' look misleading.
1187 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1188 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1189 first, tighten up match masks.
1190 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1191 'size' from special case code in print_insn_m68k to
1192 determine decode size of insns.
1194 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1196 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1197 well as when -mpower4.
1199 2004-05-13 Nick Clifton <nickc@redhat.com>
1201 * po/fr.po: Updated French translation.
1203 2004-05-05 Peter Barada <peter@the-baradas.com>
1205 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1206 variants in arch_mask. Only set m68881/68851 for 68k chips.
1207 * m68k-op.c: Switch from ColdFire chips to core variants.
1209 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1212 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1214 2004-04-29 Ben Elliston <bje@au.ibm.com>
1216 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1217 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1219 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1221 * sh-dis.c (print_insn_sh): Print the value in constant pool
1222 as a symbol if it looks like a symbol.
1224 2004-04-22 Peter Barada <peter@the-baradas.com>
1226 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1227 appropriate ColdFire architectures.
1228 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1230 Add EMAC instructions, fix MAC instructions. Remove
1231 macmw/macml/msacmw/msacml instructions since mask addressing now
1234 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1236 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1237 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1238 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1239 macro. Adjust all users.
1241 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1243 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1246 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1248 * m32r-asm.c: Regenerate.
1250 2004-03-29 Stan Shebs <shebs@apple.com>
1252 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1255 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1257 * aclocal.m4: Regenerate.
1258 * config.in: Regenerate.
1259 * configure: Regenerate.
1260 * po/POTFILES.in: Regenerate.
1261 * po/opcodes.pot: Regenerate.
1263 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1265 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1267 * ppc-opc.c (RA0): Define.
1268 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1269 (RAOPT): Rename from RAO. Update all uses.
1270 (powerpc_opcodes): Use RA0 as appropriate.
1272 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1274 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1276 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1278 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1280 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1282 * i386-dis.c (GRPPLOCK): Delete.
1283 (grps): Delete GRPPLOCK entry.
1285 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1287 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1289 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1290 (GRPPADLCK): Define.
1291 (dis386): Use NOP_Fixup on "nop".
1292 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1293 (twobyte_has_modrm): Set for 0xa7.
1294 (padlock_table): Delete. Move to..
1295 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1297 (print_insn): Revert PADLOCK_SPECIAL code.
1298 (OP_E): Delete sfence, lfence, mfence checks.
1300 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1302 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1303 (INVLPG_Fixup): New function.
1304 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1306 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1308 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1309 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1310 (padlock_table): New struct with PadLock instructions.
1311 (print_insn): Handle PADLOCK_SPECIAL.
1313 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1315 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1316 (OP_E): Twiddle clflush to sfence here.
1318 2004-03-08 Nick Clifton <nickc@redhat.com>
1320 * po/de.po: Updated German translation.
1322 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1324 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1325 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1326 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1329 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1331 * frv-asm.c: Regenerate.
1332 * frv-desc.c: Regenerate.
1333 * frv-desc.h: Regenerate.
1334 * frv-dis.c: Regenerate.
1335 * frv-ibld.c: Regenerate.
1336 * frv-opc.c: Regenerate.
1337 * frv-opc.h: Regenerate.
1339 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1341 * frv-desc.c, frv-opc.c: Regenerate.
1343 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1345 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1347 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1349 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1350 Also correct mistake in the comment.
1352 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1354 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1355 ensure that double registers have even numbers.
1356 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1357 that reserved instruction 0xfffd does not decode the same
1359 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1360 REG_N refers to a double register.
1361 Add REG_N_B01 nibble type and use it instead of REG_NM
1363 Adjust the bit patterns in a few comments.
1365 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1367 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1369 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1371 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1373 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1375 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1377 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1379 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1380 mtivor32, mtivor33, mtivor34.
1382 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1384 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1386 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1388 * arm-opc.h Maverick accumulator register opcode fixes.
1390 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1392 * m32r-dis.c: Regenerate.
1394 2004-01-27 Michael Snyder <msnyder@redhat.com>
1396 * sh-opc.h (sh_table): "fsrra", not "fssra".
1398 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1400 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1403 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1405 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1407 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1409 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1410 1. Don't print scale factor on AT&T mode when index missing.
1412 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1414 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1415 when loaded into XR registers.
1417 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1419 * frv-desc.h: Regenerate.
1420 * frv-desc.c: Regenerate.
1421 * frv-opc.c: Regenerate.
1423 2004-01-13 Michael Snyder <msnyder@redhat.com>
1425 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1427 2004-01-09 Paul Brook <paul@codesourcery.com>
1429 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1432 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1434 * Makefile.am (libopcodes_la_DEPENDENCIES)
1435 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1436 comment about the problem.
1437 * Makefile.in: Regenerate.
1439 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1441 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1442 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1443 cut&paste errors in shifting/truncating numerical operands.
1444 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1445 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1446 (parse_uslo16): Likewise.
1447 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1448 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1449 (parse_s12): Likewise.
1450 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1451 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1452 (parse_uslo16): Likewise.
1453 (parse_uhi16): Parse gothi and gotfuncdeschi.
1454 (parse_d12): Parse got12 and gotfuncdesc12.
1455 (parse_s12): Likewise.
1457 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1459 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1460 instruction which looks similar to an 'rla' instruction.
1462 For older changes see ChangeLog-0203
1468 version-control: never