1 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
3 Second part of ms1 to mt renaming.
4 * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
5 (stamp-mt): Adjust rule.
6 (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
8 * Makefile.in: Rebuilt.
10 * configure.in (bfd_mt_arch): Rename & adjust.
11 * disassemble.c (ARCH_mt): Renamed.
12 (disassembler): Adjust.
13 * mt-asm.c: Renamed, rebuilt.
14 * mt-desc.c: Renamed, rebuilt.
15 * mt-desc.h: Renamed, rebuilt.
16 * mt-dis.c: Renamed, rebuilt.
17 * mt-ibld.c: Renamed, rebuilt.
18 * mt-opc.c: Renamed, rebuilt.
19 * mt-opc.h: Renamed, rebuilt.
21 2005-12-13 DJ Delorie <dj@redhat.com>
23 * m32c-desc.c: Regenerate.
24 * m32c-opc.c: Regenerate.
25 * m32c-opc.h: Regenerate.
27 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
29 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
30 * Makefile.in: Rebuilt.
31 * configure.in: Replace ms1 files with mt files.
34 2005-12-08 Jan Beulich <jbeulich@novell.com>
36 * i386-dis.c (MAXLEN): Reduce to architectural limit.
37 (fetch_data): Check for sufficient buffer size.
39 2005-12-08 Jan Beulich <jbeulich@novell.com>
41 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
43 2005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
45 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
47 2005-12-07 Hans-Peter Nilsson <hp@axis.com>
49 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
50 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
52 2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
55 * i386-dis.c (address_mode): New enum type.
56 (address_mode): New variable.
57 (mode_64bit): Removed.
58 (ckprefix): Updated to check address_mode instead of mode_64bit.
59 (prefix_name): Likewise.
60 (print_insn): Likewise.
62 (print_operand_value): Likewise.
63 (intel_operand_size): Likewise.
74 (SVME_Fixup): Likewise.
75 (print_insn): Set address_mode.
76 (PNI_Fixup): Add 64bit and address size override support for
79 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
81 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
82 (print_with_operands): Check for prefix when [PC+] is seen.
84 2005-12-02 Dave Brolley <brolley@redhat.com>
86 * configure.in (cgen_files): Add cgen-bitset.lo.
87 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
88 * Makefile.am (CFILES): Add cgen-bitset.c.
89 (ALL_MACHINES): Add cgen-bitset.lo.
90 (cgen-bitset.lo): New target.
91 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
92 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
93 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
94 (cgen_bitset_union): Moved from here ...
95 * cgen-bitset.c: ... to here. New file.
96 * Makefile.in: Regenerated.
97 * configure: Regenerated.
99 2005-11-22 James E Wilson <wilson@specifix.com>
101 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
102 opcode_fprintf_vma): New.
103 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
105 2005-11-16 Alan Modra <amodra@bigpond.net.au>
107 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
110 2005-11-14 David Ung <davidu@mips.com>
112 * mips16-opc.c: Add MIPS16e save/restore opcodes.
113 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
114 codes for save/restore.
116 2005-11-10 Andreas Schwab <schwab@suse.de>
118 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
121 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
123 * m32c-desc.c: Regenerated.
125 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
128 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
129 ms1-opc.c, ms1-opc.h: Regenerated.
131 2005-11-07 Steve Ellcey <sje@cup.hp.com>
133 * configure: Regenerate after modifying bfd/warning.m4.
135 2005-11-07 Alan Modra <amodra@bigpond.net.au>
137 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
138 ignored rex prefixes here.
139 (print_insn): Instead, handle them similarly to fwait followed
142 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
144 * iq2000-desc.c: Regenerated.
145 * iq2000-desc.h: Likewise.
146 * iq2000-dis.c: Likewise.
147 * iq2000-opc.c: Likewise.
149 2005-11-02 Paul Brook <paul@codesourcery.com>
151 * arm-dis.c (print_insn_thumb32): Word align blx target address.
153 2005-10-31 Alan Modra <amodra@bigpond.net.au>
155 * arm-dis.c (print_insn): Warning fix.
157 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
159 * Makefile.am: Run "make dep-am".
160 * Makefile.in: Regenerated.
162 * dep-in.sed: Replace " ./" with " ".
164 2005-10-28 Dave Brolley <brolley@redhat.com>
166 * All CGEN-generated sources: Regenerate.
168 Contribute the following changes:
169 2005-09-19 Dave Brolley <brolley@redhat.com>
171 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
172 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
175 2005-02-16 Dave Brolley <brolley@redhat.com>
177 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
178 cgen_isa_mask_* to cgen_bitset_*.
179 * cgen-opc.c: Likewise.
181 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
183 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
184 * *-dis.c: Regenerate.
186 2003-06-05 DJ Delorie <dj@redhat.com>
188 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
189 it, as it may point to a reused buffer. Set prev_isas when we
192 2002-12-13 Dave Brolley <brolley@redhat.com>
194 * cgen-opc.c (cgen_isa_mask_create): New support function for
196 (cgen_isa_mask_init): Ditto.
197 (cgen_isa_mask_clear): Ditto.
198 (cgen_isa_mask_add): Ditto.
199 (cgen_isa_mask_set): Ditto.
200 (cgen_isa_supported): Ditto.
201 (cgen_isa_mask_compare): Ditto.
202 (cgen_isa_mask_intersection): Ditto.
203 (cgen_isa_mask_copy): Ditto.
204 (cgen_isa_mask_combine): Ditto.
205 * cgen-dis.in (libiberty.h): #include it.
206 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
207 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
208 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
209 * Makefile.in: Regenerated.
211 2005-10-27 DJ Delorie <dj@redhat.com>
213 * m32c-asm.c: Regenerate.
214 * m32c-desc.c: Regenerate.
215 * m32c-desc.h: Regenerate.
216 * m32c-dis.c: Regenerate.
217 * m32c-ibld.c: Regenerate.
218 * m32c-opc.c: Regenerate.
219 * m32c-opc.h: Regenerate.
221 2005-10-26 DJ Delorie <dj@redhat.com>
223 * m32c-asm.c: Regenerate.
224 * m32c-desc.c: Regenerate.
225 * m32c-desc.h: Regenerate.
226 * m32c-dis.c: Regenerate.
227 * m32c-ibld.c: Regenerate.
228 * m32c-opc.c: Regenerate.
229 * m32c-opc.h: Regenerate.
231 2005-10-26 Paul Brook <paul@codesourcery.com>
233 * arm-dis.c (arm_opcodes): Correct "sel" entry.
235 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
237 * m32r-asm.c: Regenerate.
239 2005-10-25 DJ Delorie <dj@redhat.com>
241 * m32c-asm.c: Regenerate.
242 * m32c-desc.c: Regenerate.
243 * m32c-desc.h: Regenerate.
244 * m32c-dis.c: Regenerate.
245 * m32c-ibld.c: Regenerate.
246 * m32c-opc.c: Regenerate.
247 * m32c-opc.h: Regenerate.
249 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
251 * configure.in: Add target architecture bfd_arch_z80.
252 * configure: Regenerated.
253 * disassemble.c (disassembler)<ARCH_z80>: Add case
255 * z80-dis.c: New file.
257 2005-10-25 Alan Modra <amodra@bigpond.net.au>
259 * po/POTFILES.in: Regenerate.
260 * po/opcodes.pot: Regenerate.
262 2005-10-24 Jan Beulich <jbeulich@novell.com>
264 * ia64-asmtab.c: Regenerate.
266 2005-10-21 DJ Delorie <dj@redhat.com>
268 * m32c-asm.c: Regenerate.
269 * m32c-desc.c: Regenerate.
270 * m32c-desc.h: Regenerate.
271 * m32c-dis.c: Regenerate.
272 * m32c-ibld.c: Regenerate.
273 * m32c-opc.c: Regenerate.
274 * m32c-opc.h: Regenerate.
276 2005-10-21 Nick Clifton <nickc@redhat.com>
278 * bfin-dis.c: Tidy up code, removing redundant constructs.
280 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
282 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
285 2005-10-18 Nick Clifton <nickc@redhat.com>
287 * m32r-asm.c: Regenerate after updating m32r.opc.
289 2005-10-18 Jie Zhang <jie.zhang@analog.com>
291 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
292 reading instruction from memory.
294 2005-10-18 Nick Clifton <nickc@redhat.com>
296 * m32r-asm.c: Regenerate after updating m32r.opc.
298 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
300 * m32r-asm.c: Regenerate after updating m32r.opc.
302 2005-10-08 James Lemke <jim@wasabisystems.com>
304 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
307 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
309 * ppc-dis.c (struct dis_private): Remove.
310 (powerpc_dialect): Avoid aliasing warnings.
311 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
313 2005-09-30 Nick Clifton <nickc@redhat.com>
315 * po/ga.po: New Irish translation.
316 * configure.in (ALL_LINGUAS): Add "ga".
317 * configure: Regenerate.
319 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
321 * Makefile.am: Run "make dep-am".
322 * Makefile.in: Regenerated.
323 * aclocal.m4: Likewise.
324 * configure: Likewise.
326 2005-09-30 Catherine Moore <clm@cm00re.com>
328 * Makefile.am: Bfin support.
329 * Makefile.in: Regenerated.
330 * aclocal.m4: Regenerated.
331 * bfin-dis.c: New file.
332 * configure.in: Bfin support.
333 * configure: Regenerated.
334 * disassemble.c (ARCH_bfin): Define.
335 (disassembler): Add case for bfd_arch_bfin.
337 2005-09-28 Jan Beulich <jbeulich@novell.com>
339 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
342 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
343 (dis386): Document and use new 'V' meta character. Use it for
344 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
345 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
346 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
347 data prefix as used whenever DFLAG was examined. Handle 'V'.
348 (intel_operand_size): Use stack_v_mode.
349 (OP_E): Use stack_v_mode, but handle only the special case of
350 64-bit mode without operand size override here; fall through to
351 v_mode case otherwise.
352 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
353 and no operand size override is present.
354 (OP_J): Use get32s for obtaining the displacement also when rex64
357 2005-09-08 Paul Brook <paul@codesourcery.com>
359 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
361 2005-09-06 Chao-ying Fu <fu@mips.com>
363 * mips-opc.c (MT32): New define.
364 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
365 bottom to avoid opcode collision with "mftr" and "mttr".
367 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
368 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
371 2005-09-02 Paul Brook <paul@codesourcery.com>
373 * arm-dis.c (coprocessor_opcodes): Add null terminator.
375 2005-09-02 Paul Brook <paul@codesourcery.com>
377 * arm-dis.c (coprocessor_opcodes): New.
378 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
379 (print_insn_coprocessor): New function.
380 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
382 (print_insn_thumb32): Use print_insn_coprocessor.
384 2005-08-30 Paul Brook <paul@codesourcery.com>
386 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
388 2005-08-26 Jan Beulich <jbeulich@novell.com>
390 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
392 (OP_E): Call intel_operand_size, move call site out of mode
394 (OP_OFF): Call intel_operand_size if suffix_always. Remove
395 ATTRIBUTE_UNUSED from parameters.
396 (OP_OFF64): Likewise.
397 (OP_ESreg): Call intel_operand_size.
398 (OP_DSreg): Likewise.
399 (OP_DIR): Use colon rather than semicolon as separator of far
402 2005-08-25 Chao-ying Fu <fu@mips.com>
404 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
405 (mips_builtin_opcodes): Add DSP instructions.
406 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
408 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
411 2005-08-23 David Ung <davidu@mips.com>
413 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
414 instructions to the table.
416 2005-08-18 Alan Modra <amodra@bigpond.net.au>
418 * a29k-dis.c: Delete.
419 * Makefile.am: Remove a29k support.
420 * configure.in: Likewise.
421 * disassemble.c: Likewise.
422 * Makefile.in: Regenerate.
423 * configure: Regenerate.
424 * po/POTFILES.in: Regenerate.
426 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
428 * ppc-dis.c (powerpc_dialect): Handle e300.
429 (print_ppc_disassembler_options): Likewise.
430 * ppc-opc.c (PPCE300): Define.
431 (powerpc_opcodes): Mark icbt as available for the e300.
433 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
435 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
436 Use "rp" instead of "%r2" in "b,l" insns.
438 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
440 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
441 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
443 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
444 and 4 bit optional masks.
445 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
446 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
447 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
448 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
449 (s390_opformats): Likewise.
450 * s390-opc.txt: Add new instructions for cpu type z9-109.
452 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
454 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
456 2005-07-29 Paul Brook <paul@codesourcery.com>
458 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
460 2005-07-29 Paul Brook <paul@codesourcery.com>
462 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
463 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
465 2005-07-25 DJ Delorie <dj@redhat.com>
467 * m32c-asm.c Regenerate.
468 * m32c-dis.c Regenerate.
470 2005-07-20 DJ Delorie <dj@redhat.com>
472 * disassemble.c (disassemble_init_for_target): M32C ISAs are
473 enums, so convert them to bit masks, which attributes are.
475 2005-07-18 Nick Clifton <nickc@redhat.com>
477 * configure.in: Restore alpha ordering to list of arches.
478 * configure: Regenerate.
479 * disassemble.c: Restore alpha ordering to list of arches.
481 2005-07-18 Nick Clifton <nickc@redhat.com>
483 * m32c-asm.c: Regenerate.
484 * m32c-desc.c: Regenerate.
485 * m32c-desc.h: Regenerate.
486 * m32c-dis.c: Regenerate.
487 * m32c-ibld.h: Regenerate.
488 * m32c-opc.c: Regenerate.
489 * m32c-opc.h: Regenerate.
491 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
493 * i386-dis.c (PNI_Fixup): Update comment.
494 (VMX_Fixup): Properly handle the suffix check.
496 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
498 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
501 2005-07-16 Alan Modra <amodra@bigpond.net.au>
503 * Makefile.am: Run "make dep-am".
504 (stamp-m32c): Fix cpu dependencies.
505 * Makefile.in: Regenerate.
506 * ip2k-dis.c: Regenerate.
508 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
510 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
511 (VMX_Fixup): New. Fix up Intel VMX Instructions.
515 (dis386_twobyte): Updated entries 0x78 and 0x79.
516 (twobyte_has_modrm): Likewise.
517 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
518 (OP_G): Handle m_mode.
520 2005-07-14 Jim Blandy <jimb@redhat.com>
522 Add support for the Renesas M32C and M16C.
523 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
524 * m32c-desc.h, m32c-opc.h: New.
525 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
526 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
528 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
529 m32c-ibld.lo, m32c-opc.lo.
530 (CLEANFILES): List stamp-m32c.
531 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
532 (CGEN_CPUS): Add m32c.
533 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
534 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
535 (m32c_opc_h): New variable.
536 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
537 (m32c-opc.lo): New rules.
538 * Makefile.in: Regenerated.
539 * configure.in: Add case for bfd_m32c_arch.
540 * configure: Regenerated.
541 * disassemble.c (ARCH_m32c): New.
542 [ARCH_m32c]: #include "m32c-desc.h".
543 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
544 (disassemble_init_for_target) [ARCH_m32c]: Same.
546 * cgen-ops.h, cgen-types.h: New files.
547 * Makefile.am (HFILES): List them.
548 * Makefile.in: Regenerated.
550 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
552 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
553 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
554 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
555 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
556 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
557 v850-dis.c: Fix format bugs.
558 * ia64-gen.c (fail, warn): Add format attribute.
559 * or32-opc.c (debug): Likewise.
561 2005-07-07 Khem Raj <kraj@mvista.com>
563 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
566 2005-07-06 Alan Modra <amodra@bigpond.net.au>
568 * Makefile.am (stamp-m32r): Fix path to cpu files.
569 (stamp-m32r, stamp-iq2000): Likewise.
570 * Makefile.in: Regenerate.
571 * m32r-asm.c: Regenerate.
572 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
573 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
575 2005-07-05 Nick Clifton <nickc@redhat.com>
577 * iq2000-asm.c: Regenerate.
578 * ms1-asm.c: Regenerate.
580 2005-07-05 Jan Beulich <jbeulich@novell.com>
582 * i386-dis.c (SVME_Fixup): New.
583 (grps): Use it for the lidt entry.
584 (PNI_Fixup): Call OP_M rather than OP_E.
585 (INVLPG_Fixup): Likewise.
587 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
589 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
591 2005-07-01 Nick Clifton <nickc@redhat.com>
593 * a29k-dis.c: Update to ISO C90 style function declarations and
595 * alpha-opc.c: Likewise.
596 * arc-dis.c: Likewise.
597 * arc-opc.c: Likewise.
598 * avr-dis.c: Likewise.
599 * cgen-asm.in: Likewise.
600 * cgen-dis.in: Likewise.
601 * cgen-ibld.in: Likewise.
602 * cgen-opc.c: Likewise.
603 * cris-dis.c: Likewise.
604 * d10v-dis.c: Likewise.
605 * d30v-dis.c: Likewise.
606 * d30v-opc.c: Likewise.
607 * dis-buf.c: Likewise.
608 * dlx-dis.c: Likewise.
609 * h8300-dis.c: Likewise.
610 * h8500-dis.c: Likewise.
611 * hppa-dis.c: Likewise.
612 * i370-dis.c: Likewise.
613 * i370-opc.c: Likewise.
614 * m10200-dis.c: Likewise.
615 * m10300-dis.c: Likewise.
616 * m68k-dis.c: Likewise.
617 * m88k-dis.c: Likewise.
618 * mips-dis.c: Likewise.
619 * mmix-dis.c: Likewise.
620 * msp430-dis.c: Likewise.
621 * ns32k-dis.c: Likewise.
622 * or32-dis.c: Likewise.
623 * or32-opc.c: Likewise.
624 * pdp11-dis.c: Likewise.
625 * pj-dis.c: Likewise.
626 * s390-dis.c: Likewise.
627 * sh-dis.c: Likewise.
628 * sh64-dis.c: Likewise.
629 * sparc-dis.c: Likewise.
630 * sparc-opc.c: Likewise.
631 * sysdep.h: Likewise.
632 * tic30-dis.c: Likewise.
633 * tic4x-dis.c: Likewise.
634 * tic80-dis.c: Likewise.
635 * v850-dis.c: Likewise.
636 * v850-opc.c: Likewise.
637 * vax-dis.c: Likewise.
638 * w65-dis.c: Likewise.
639 * z8kgen.c: Likewise.
641 * fr30-*: Regenerate.
643 * ip2k-*: Regenerate.
644 * iq2000-*: Regenerate.
645 * m32r-*: Regenerate.
647 * openrisc-*: Regenerate.
648 * xstormy16-*: Regenerate.
650 2005-06-23 Ben Elliston <bje@gnu.org>
652 * m68k-dis.c: Use ISC C90.
653 * m68k-opc.c: Formatting fixes.
655 2005-06-16 David Ung <davidu@mips.com>
657 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
658 instructions to the table; seb/seh/sew/zeb/zeh/zew.
660 2005-06-15 Dave Brolley <brolley@redhat.com>
662 Contribute Morpho ms1 on behalf of Red Hat
663 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
664 ms1-opc.h: New files, Morpho ms1 target.
666 2004-05-14 Stan Cox <scox@redhat.com>
668 * disassemble.c (ARCH_ms1): Define.
669 (disassembler): Handle bfd_arch_ms1
671 2004-05-13 Michael Snyder <msnyder@redhat.com>
673 * Makefile.am, Makefile.in: Add ms1 target.
674 * configure.in: Ditto.
676 2005-06-08 Zack Weinberg <zack@codesourcery.com>
678 * arm-opc.h: Delete; fold contents into ...
679 * arm-dis.c: ... here. Move includes of internal COFF headers
680 next to includes of internal ELF headers.
681 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
682 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
683 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
684 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
685 (iwmmxt_wwnames, iwmmxt_wwssnames):
687 (regnames): Remove iWMMXt coprocessor register sets.
688 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
689 (get_arm_regnames): Adjust fourth argument to match above changes.
690 (set_iwmmxt_regnames): Delete.
691 (print_insn_arm): Constify 'c'. Use ISO syntax for function
692 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
693 and iwmmxt_cregnames, not set_iwmmxt_regnames.
694 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
695 ISO syntax for function pointer calls.
697 2005-06-07 Zack Weinberg <zack@codesourcery.com>
699 * arm-dis.c: Split up the comments describing the format codes, so
700 that the ARM and 16-bit Thumb opcode tables each have comments
701 preceding them that describe all the codes, and only the codes,
702 valid in those tables. (32-bit Thumb table is already like this.)
703 Reorder the lists in all three comments to match the order in
704 which the codes are implemented.
705 Remove all forward declarations of static functions. Convert all
706 function definitions to ISO C format.
707 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
709 (print_insn_thumb16): Remove unused case 'I'.
710 (print_insn): Update for changed calling convention of subroutines.
712 2005-05-25 Jan Beulich <jbeulich@novell.com>
714 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
715 hex (but retain it being displayed as signed). Remove redundant
716 checks. Add handling of displacements for 16-bit addressing in Intel
719 2005-05-25 Jan Beulich <jbeulich@novell.com>
721 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
722 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
723 masking of 'rm' in 16-bit memory address handling.
725 2005-05-19 Anton Blanchard <anton@samba.org>
727 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
728 (print_ppc_disassembler_options): Document it.
729 * ppc-opc.c (SVC_LEV): Define.
730 (LEV): Allow optional operand.
732 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
733 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
735 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
737 * Makefile.in: Regenerate.
739 2005-05-17 Zack Weinberg <zack@codesourcery.com>
741 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
742 instructions. Adjust disassembly of some opcodes to match
744 (thumb32_opcodes): New table.
745 (print_insn_thumb): Rename print_insn_thumb16; don't handle
746 two-halfword branches here.
747 (print_insn_thumb32): New function.
748 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
749 and print_insn_thumb32. Be consistent about order of
750 halfwords when printing 32-bit instructions.
752 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
755 * i386-dis.c (branch_v_mode): New.
756 (indirEv): Use branch_v_mode instead of v_mode.
757 (OP_E): Handle branch_v_mode.
759 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
761 * d10v-dis.c (dis_2_short): Support 64bit host.
763 2005-05-07 Nick Clifton <nickc@redhat.com>
765 * po/nl.po: Updated translation.
767 2005-05-07 Nick Clifton <nickc@redhat.com>
769 * Update the address and phone number of the FSF organization in
770 the GPL notices in the following files:
771 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
772 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
773 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
774 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
775 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
776 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
777 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
778 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
779 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
780 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
781 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
782 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
783 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
784 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
785 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
786 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
787 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
788 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
789 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
790 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
791 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
792 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
793 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
794 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
795 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
796 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
797 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
798 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
799 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
800 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
801 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
802 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
803 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
805 2005-05-05 James E Wilson <wilson@specifixinc.com>
807 * ia64-opc.c: Include sysdep.h before libiberty.h.
809 2005-05-05 Nick Clifton <nickc@redhat.com>
811 * configure.in (ALL_LINGUAS): Add vi.
812 * configure: Regenerate.
815 2005-04-26 Jerome Guitton <guitton@gnat.com>
817 * configure.in: Fix the check for basename declaration.
818 * configure: Regenerate.
820 2005-04-19 Alan Modra <amodra@bigpond.net.au>
822 * ppc-opc.c (RTO): Define.
823 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
824 entries to suit PPC440.
826 2005-04-18 Mark Kettenis <kettenis@gnu.org>
828 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
831 2005-04-14 Nick Clifton <nickc@redhat.com>
833 * po/fi.po: New translation: Finnish.
834 * configure.in (ALL_LINGUAS): Add fi.
835 * configure: Regenerate.
837 2005-04-14 Alan Modra <amodra@bigpond.net.au>
839 * Makefile.am (NO_WERROR): Define.
840 * configure.in: Invoke AM_BINUTILS_WARNINGS.
841 * Makefile.in: Regenerate.
842 * aclocal.m4: Regenerate.
843 * configure: Regenerate.
845 2005-04-04 Nick Clifton <nickc@redhat.com>
847 * fr30-asm.c: Regenerate.
848 * frv-asm.c: Regenerate.
849 * iq2000-asm.c: Regenerate.
850 * m32r-asm.c: Regenerate.
851 * openrisc-asm.c: Regenerate.
853 2005-04-01 Jan Beulich <jbeulich@novell.com>
855 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
856 visible operands in Intel mode. The first operand of monitor is
859 2005-04-01 Jan Beulich <jbeulich@novell.com>
861 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
862 easier future additions.
864 2005-03-31 Jerome Guitton <guitton@gnat.com>
866 * configure.in: Check for basename.
867 * configure: Regenerate.
870 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
872 * i386-dis.c (SEG_Fixup): New.
874 (dis386): Use "Sv" for 0x8c and 0x8e.
876 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
877 Nick Clifton <nickc@redhat.com>
879 * vax-dis.c: (entry_addr): New varible: An array of user supplied
880 function entry mask addresses.
881 (entry_addr_occupied_slots): New variable: The number of occupied
882 elements in entry_addr.
883 (entry_addr_total_slots): New variable: The total number of
884 elements in entry_addr.
885 (parse_disassembler_options): New function. Fills in the entry_addr
887 (free_entry_array): New function. Release the memory used by the
888 entry addr array. Suppressed because there is no way to call it.
889 (is_function_entry): Check if a given address is a function's
890 start address by looking at supplied entry mask addresses and
891 symbol information, if available.
892 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
894 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
896 * cris-dis.c (print_with_operands): Use ~31L for long instead
899 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
901 * mmix-opc.c (O): Revert the last change.
904 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
906 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
909 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
911 * mmix-opc.c (O, Z): Force expression as unsigned long.
913 2005-03-18 Nick Clifton <nickc@redhat.com>
915 * ip2k-asm.c: Regenerate.
916 * op/opcodes.pot: Regenerate.
918 2005-03-16 Nick Clifton <nickc@redhat.com>
919 Ben Elliston <bje@au.ibm.com>
921 * configure.in (werror): New switch: Add -Werror to the
922 compiler command line. Enabled by default. Disable via
924 * configure: Regenerate.
926 2005-03-16 Alan Modra <amodra@bigpond.net.au>
928 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
931 2005-03-15 Alan Modra <amodra@bigpond.net.au>
933 * po/es.po: Commit new Spanish translation.
935 * po/fr.po: Commit new French translation.
937 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
939 * vax-dis.c: Fix spelling error
940 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
941 of just "Entry mask: < r1 ... >"
943 2005-03-12 Zack Weinberg <zack@codesourcery.com>
945 * arm-dis.c (arm_opcodes): Document %E and %V.
946 Add entries for v6T2 ARM instructions:
947 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
948 (print_insn_arm): Add support for %E and %V.
949 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
951 2005-03-10 Jeff Baker <jbaker@qnx.com>
952 Alan Modra <amodra@bigpond.net.au>
954 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
955 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
957 (XSPRG_MASK): Mask off extra bits now part of sprg field.
958 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
959 mfsprg4..7 after msprg and consolidate.
961 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
963 * vax-dis.c (entry_mask_bit): New array.
964 (print_insn_vax): Decode function entry mask.
966 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
968 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
970 2005-03-05 Alan Modra <amodra@bigpond.net.au>
972 * po/opcodes.pot: Regenerate.
974 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
976 * arc-dis.c (a4_decoding_class): New enum.
977 (dsmOneArcInst): Use the enum values for the decoding class.
978 Remove redundant case in the switch for decodingClass value 11.
980 2005-03-02 Jan Beulich <jbeulich@novell.com>
982 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
984 (OP_C): Consider lock prefix in non-64-bit modes.
986 2005-02-24 Alan Modra <amodra@bigpond.net.au>
988 * cris-dis.c (format_hex): Remove ineffective warning fix.
989 * crx-dis.c (make_instruction): Warning fix.
990 * frv-asm.c: Regenerate.
992 2005-02-23 Nick Clifton <nickc@redhat.com>
994 * cgen-dis.in: Use bfd_byte for buffers that are passed to
997 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
999 * crx-dis.c (make_instruction): Move argument structure into inner
1000 scope and ensure that all of its fields are initialised before
1003 * fr30-asm.c: Regenerate.
1004 * fr30-dis.c: Regenerate.
1005 * frv-asm.c: Regenerate.
1006 * frv-dis.c: Regenerate.
1007 * ip2k-asm.c: Regenerate.
1008 * ip2k-dis.c: Regenerate.
1009 * iq2000-asm.c: Regenerate.
1010 * iq2000-dis.c: Regenerate.
1011 * m32r-asm.c: Regenerate.
1012 * m32r-dis.c: Regenerate.
1013 * openrisc-asm.c: Regenerate.
1014 * openrisc-dis.c: Regenerate.
1015 * xstormy16-asm.c: Regenerate.
1016 * xstormy16-dis.c: Regenerate.
1018 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1020 * arc-ext.c: Warning fixes.
1021 * arc-ext.h: Likewise.
1022 * cgen-opc.c: Likewise.
1023 * ia64-gen.c: Likewise.
1024 * maxq-dis.c: Likewise.
1025 * ns32k-dis.c: Likewise.
1026 * w65-dis.c: Likewise.
1027 * ia64-asmtab.c: Regenerate.
1029 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1031 * fr30-desc.c: Regenerate.
1032 * fr30-desc.h: Regenerate.
1033 * fr30-opc.c: Regenerate.
1034 * fr30-opc.h: Regenerate.
1035 * frv-desc.c: Regenerate.
1036 * frv-desc.h: Regenerate.
1037 * frv-opc.c: Regenerate.
1038 * frv-opc.h: Regenerate.
1039 * ip2k-desc.c: Regenerate.
1040 * ip2k-desc.h: Regenerate.
1041 * ip2k-opc.c: Regenerate.
1042 * ip2k-opc.h: Regenerate.
1043 * iq2000-desc.c: Regenerate.
1044 * iq2000-desc.h: Regenerate.
1045 * iq2000-opc.c: Regenerate.
1046 * iq2000-opc.h: Regenerate.
1047 * m32r-desc.c: Regenerate.
1048 * m32r-desc.h: Regenerate.
1049 * m32r-opc.c: Regenerate.
1050 * m32r-opc.h: Regenerate.
1051 * m32r-opinst.c: Regenerate.
1052 * openrisc-desc.c: Regenerate.
1053 * openrisc-desc.h: Regenerate.
1054 * openrisc-opc.c: Regenerate.
1055 * openrisc-opc.h: Regenerate.
1056 * xstormy16-desc.c: Regenerate.
1057 * xstormy16-desc.h: Regenerate.
1058 * xstormy16-opc.c: Regenerate.
1059 * xstormy16-opc.h: Regenerate.
1061 2005-02-21 Alan Modra <amodra@bigpond.net.au>
1063 * Makefile.am: Run "make dep-am"
1064 * Makefile.in: Regenerate.
1066 2005-02-15 Nick Clifton <nickc@redhat.com>
1068 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1069 compile time warnings.
1070 (print_keyword): Likewise.
1071 (default_print_insn): Likewise.
1073 * fr30-desc.c: Regenerated.
1074 * fr30-desc.h: Regenerated.
1075 * fr30-dis.c: Regenerated.
1076 * fr30-opc.c: Regenerated.
1077 * fr30-opc.h: Regenerated.
1078 * frv-desc.c: Regenerated.
1079 * frv-dis.c: Regenerated.
1080 * frv-opc.c: Regenerated.
1081 * ip2k-asm.c: Regenerated.
1082 * ip2k-desc.c: Regenerated.
1083 * ip2k-desc.h: Regenerated.
1084 * ip2k-dis.c: Regenerated.
1085 * ip2k-opc.c: Regenerated.
1086 * ip2k-opc.h: Regenerated.
1087 * iq2000-desc.c: Regenerated.
1088 * iq2000-dis.c: Regenerated.
1089 * iq2000-opc.c: Regenerated.
1090 * m32r-asm.c: Regenerated.
1091 * m32r-desc.c: Regenerated.
1092 * m32r-desc.h: Regenerated.
1093 * m32r-dis.c: Regenerated.
1094 * m32r-opc.c: Regenerated.
1095 * m32r-opc.h: Regenerated.
1096 * m32r-opinst.c: Regenerated.
1097 * openrisc-desc.c: Regenerated.
1098 * openrisc-desc.h: Regenerated.
1099 * openrisc-dis.c: Regenerated.
1100 * openrisc-opc.c: Regenerated.
1101 * openrisc-opc.h: Regenerated.
1102 * xstormy16-desc.c: Regenerated.
1103 * xstormy16-desc.h: Regenerated.
1104 * xstormy16-dis.c: Regenerated.
1105 * xstormy16-opc.c: Regenerated.
1106 * xstormy16-opc.h: Regenerated.
1108 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1110 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1113 2005-02-11 Nick Clifton <nickc@redhat.com>
1115 * iq2000-asm.c: Regenerate.
1117 * frv-dis.c: Regenerate.
1119 2005-02-07 Jim Blandy <jimb@redhat.com>
1121 * Makefile.am (CGEN): Load guile.scm before calling the main
1123 * Makefile.in: Regenerated.
1124 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1125 Simply pass the cgen-opc.scm path to ${cgen} as its first
1126 argument; ${cgen} itself now contains the '-s', or whatever is
1127 appropriate for the Scheme being used.
1129 2005-01-31 Andrew Cagney <cagney@gnu.org>
1131 * configure: Regenerate to track ../gettext.m4.
1133 2005-01-31 Jan Beulich <jbeulich@novell.com>
1135 * ia64-gen.c (NELEMS): Define.
1136 (shrink): Generate alias with missing second predicate register when
1137 opcode has two outputs and these are both predicates.
1138 * ia64-opc-i.c (FULL17): Define.
1139 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1140 here to generate output template.
1141 (TBITCM, TNATCM): Undefine after use.
1142 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1143 first input. Add ld16 aliases without ar.csd as second output. Add
1144 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1145 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1146 ar.ccv as third/fourth inputs. Consolidate through...
1147 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1148 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1149 * ia64-asmtab.c: Regenerate.
1151 2005-01-27 Andrew Cagney <cagney@gnu.org>
1153 * configure: Regenerate to track ../gettext.m4 change.
1155 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1157 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1158 * frv-asm.c: Rebuilt.
1159 * frv-desc.c: Rebuilt.
1160 * frv-desc.h: Rebuilt.
1161 * frv-dis.c: Rebuilt.
1162 * frv-ibld.c: Rebuilt.
1163 * frv-opc.c: Rebuilt.
1164 * frv-opc.h: Rebuilt.
1166 2005-01-24 Andrew Cagney <cagney@gnu.org>
1168 * configure: Regenerate, ../gettext.m4 was updated.
1170 2005-01-21 Fred Fish <fnf@specifixinc.com>
1172 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1173 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1174 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1175 * mips-dis.c: Ditto.
1177 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1179 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1181 2005-01-19 Fred Fish <fnf@specifixinc.com>
1183 * mips-dis.c (no_aliases): New disassembly option flag.
1184 (set_default_mips_dis_options): Init no_aliases to zero.
1185 (parse_mips_dis_option): Handle no-aliases option.
1186 (print_insn_mips): Ignore table entries that are aliases
1187 if no_aliases is set.
1188 (print_insn_mips16): Ditto.
1189 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1190 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1191 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1192 * mips16-opc.c (mips16_opcodes): Ditto.
1194 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1196 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1197 (inheritance diagram): Add missing edge.
1198 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1199 easier for the testsuite.
1200 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1201 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1202 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1203 arch_sh2a_or_sh4_up child.
1204 (sh_table): Do renaming as above.
1205 Correct comment for ldc.l for gas testsuite to read.
1206 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1207 Correct comments for movy.w and movy.l for gas testsuite to read.
1208 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1210 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1212 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1214 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1216 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1218 2005-01-10 Andreas Schwab <schwab@suse.de>
1220 * disassemble.c (disassemble_init_for_target) <case
1221 bfd_arch_ia64>: Set skip_zeroes to 16.
1222 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1224 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1226 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1228 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1230 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1231 memory references. Convert avr_operand() to C90 formatting.
1233 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1235 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1237 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1239 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1240 (no_op_insn): Initialize array with instructions that have no
1242 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1244 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1246 * arm-dis.c: Correct top-level comment.
1248 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1250 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1251 architecuture defining the insn.
1252 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1253 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1255 Also include opcode/arm.h.
1256 * Makefile.am (arm-dis.lo): Update dependency list.
1257 * Makefile.in: Regenerate.
1259 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1261 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1262 reflect the change to the short immediate syntax.
1264 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1266 * or32-opc.c (debug): Warning fix.
1267 * po/POTFILES.in: Regenerate.
1269 * maxq-dis.c: Formatting.
1270 (print_insn): Warning fix.
1272 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1274 * arm-dis.c (WORD_ADDRESS): Define.
1275 (print_insn): Use it. Correct big-endian end-of-section handling.
1277 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1278 Vineet Sharma <vineets@noida.hcltech.com>
1280 * maxq-dis.c: New file.
1281 * disassemble.c (ARCH_maxq): Define.
1282 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1284 * configure.in: Add case for bfd_maxq_arch.
1285 * configure: Regenerate.
1286 * Makefile.am: Add support for maxq-dis.c
1287 * Makefile.in: Regenerate.
1288 * aclocal.m4: Regenerate.
1290 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1292 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1294 * crx-dis.c: Likewise.
1296 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1298 Generally, handle CRISv32.
1299 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1300 (struct cris_disasm_data): New type.
1301 (format_reg, format_hex, cris_constraint, print_flags)
1302 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1304 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1305 (print_insn_crisv32_without_register_prefix)
1306 (print_insn_crisv10_v32_with_register_prefix)
1307 (print_insn_crisv10_v32_without_register_prefix)
1308 (cris_parse_disassembler_options): New functions.
1309 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1310 parameter. All callers changed.
1311 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1313 (cris_constraint) <case 'Y', 'U'>: New cases.
1314 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1316 (print_with_operands) <case 'Y'>: New case.
1317 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1318 <case 'N', 'Y', 'Q'>: New cases.
1319 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1320 (print_insn_cris_with_register_prefix)
1321 (print_insn_cris_without_register_prefix): Call
1322 cris_parse_disassembler_options.
1323 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1324 for CRISv32 and the size of immediate operands. New v32-only
1325 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1326 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1327 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1328 Change brp to be v3..v10.
1329 (cris_support_regs): New vector.
1330 (cris_opcodes): Update head comment. New format characters '[',
1331 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1332 Add new opcodes for v32 and adjust existing opcodes to accommodate
1333 differences to earlier variants.
1334 (cris_cond15s): New vector.
1336 2004-11-04 Jan Beulich <jbeulich@novell.com>
1338 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1340 (Mp): Use f_mode rather than none at all.
1341 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1342 replaces what previously was x_mode; x_mode now means 128-bit SSE
1344 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1345 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1346 pinsrw's second operand is Edqw.
1347 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1348 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1349 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1350 mode when an operand size override is present or always suffixing.
1351 More instructions will need to be added to this group.
1352 (putop): Handle new macro chars 'C' (short/long suffix selector),
1353 'I' (Intel mode override for following macro char), and 'J' (for
1354 adding the 'l' prefix to far branches in AT&T mode). When an
1355 alternative was specified in the template, honor macro character when
1356 specified for Intel mode.
1357 (OP_E): Handle new *_mode values. Correct pointer specifications for
1358 memory operands. Consolidate output of index register.
1359 (OP_G): Handle new *_mode values.
1360 (OP_I): Handle const_1_mode.
1361 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1362 respective opcode prefix bits have been consumed.
1363 (OP_EM, OP_EX): Provide some default handling for generating pointer
1366 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1368 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1371 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1373 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1374 (getregliststring): Support HI/LO and user registers.
1375 * crx-opc.c (crx_instruction): Update data structure according to the
1376 rearrangement done in CRX opcode header file.
1377 (crx_regtab): Likewise.
1378 (crx_optab): Likewise.
1379 (crx_instruction): Reorder load/stor instructions, remove unsupported
1381 support new Co-Processor instruction 'cpi'.
1383 2004-10-27 Nick Clifton <nickc@redhat.com>
1385 * opcodes/iq2000-asm.c: Regenerate.
1386 * opcodes/iq2000-desc.c: Regenerate.
1387 * opcodes/iq2000-desc.h: Regenerate.
1388 * opcodes/iq2000-dis.c: Regenerate.
1389 * opcodes/iq2000-ibld.c: Regenerate.
1390 * opcodes/iq2000-opc.c: Regenerate.
1391 * opcodes/iq2000-opc.h: Regenerate.
1393 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1395 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1396 us4, us5 (respectively).
1397 Remove unsupported 'popa' instruction.
1398 Reverse operands order in store co-processor instructions.
1400 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1402 * Makefile.am: Run "make dep-am"
1403 * Makefile.in: Regenerate.
1405 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1407 * xtensa-dis.c: Use ISO C90 formatting.
1409 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1411 * ppc-opc.c: Revert 2004-09-09 change.
1413 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1415 * xtensa-dis.c (state_names): Delete.
1416 (fetch_data): Use xtensa_isa_maxlength.
1417 (print_xtensa_operand): Replace operand parameter with opcode/operand
1418 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1419 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1420 instruction bundles. Use xmalloc instead of malloc.
1422 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1424 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1427 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1429 * crx-opc.c (crx_instruction): Support Co-processor insns.
1430 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1431 (getregliststring): Change function to use the above enum.
1432 (print_arg): Handle CO-Processor insns.
1433 (crx_cinvs): Add 'b' option to invalidate the branch-target
1436 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1438 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1439 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1440 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1441 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1442 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1444 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1446 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1449 2004-09-30 Paul Brook <paul@codesourcery.com>
1451 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1452 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1454 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1456 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1457 (CONFIG_STATUS_DEPENDENCIES): New.
1458 (Makefile): Removed.
1459 (config.status): Likewise.
1460 * Makefile.in: Regenerated.
1462 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1464 * Makefile.am: Run "make dep-am".
1465 * Makefile.in: Regenerate.
1466 * aclocal.m4: Regenerate.
1467 * configure: Regenerate.
1468 * po/POTFILES.in: Regenerate.
1469 * po/opcodes.pot: Regenerate.
1471 2004-09-11 Andreas Schwab <schwab@suse.de>
1473 * configure: Rebuild.
1475 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1477 * ppc-opc.c (L): Make this field not optional.
1479 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1481 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1482 Fix parameter to 'm[t|f]csr' insns.
1484 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1486 * configure.in: Autoupdate to autoconf 2.59.
1487 * aclocal.m4: Rebuild with aclocal 1.4p6.
1488 * configure: Rebuild with autoconf 2.59.
1489 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1490 bfd changes for autoconf 2.59 on the way).
1491 * config.in: Rebuild with autoheader 2.59.
1493 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1495 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1497 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1499 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1500 (GRPPADLCK2): New define.
1501 (twobyte_has_modrm): True for 0xA6.
1502 (grps): GRPPADLCK2 for opcode 0xA6.
1504 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1506 Introduce SH2a support.
1507 * sh-opc.h (arch_sh2a_base): Renumber.
1508 (arch_sh2a_nofpu_base): Remove.
1509 (arch_sh_base_mask): Adjust.
1510 (arch_opann_mask): New.
1511 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1512 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1513 (sh_table): Adjust whitespace.
1514 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1515 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1516 instruction list throughout.
1517 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1518 of arch_sh2a in instruction list throughout.
1519 (arch_sh2e_up): Accomodate above changes.
1520 (arch_sh2_up): Ditto.
1521 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1522 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1523 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1524 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1525 * sh-opc.h (arch_sh2a_nofpu): New.
1526 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1527 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1529 2004-01-20 DJ Delorie <dj@redhat.com>
1530 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1531 2003-12-29 DJ Delorie <dj@redhat.com>
1532 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1533 sh_opcode_info, sh_table): Add sh2a support.
1534 (arch_op32): New, to tag 32-bit opcodes.
1535 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1536 2003-12-02 Michael Snyder <msnyder@redhat.com>
1537 * sh-opc.h (arch_sh2a): Add.
1538 * sh-dis.c (arch_sh2a): Handle.
1539 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1541 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1543 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1545 2004-07-22 Nick Clifton <nickc@redhat.com>
1548 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1549 insns - this is done by objdump itself.
1550 * h8500-dis.c (print_insn_h8500): Likewise.
1552 2004-07-21 Jan Beulich <jbeulich@novell.com>
1554 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1555 regardless of address size prefix in effect.
1556 (ptr_reg): Size or address registers does not depend on rex64, but
1557 on the presence of an address size override.
1558 (OP_MMX): Use rex.x only for xmm registers.
1559 (OP_EM): Use rex.z only for xmm registers.
1561 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1563 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1564 move/branch operations to the bottom so that VR5400 multimedia
1565 instructions take precedence in disassembly.
1567 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1569 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1570 ISA-specific "break" encoding.
1572 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1574 * arm-opc.h: Fix typo in comment.
1576 2004-07-11 Andreas Schwab <schwab@suse.de>
1578 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1580 2004-07-09 Andreas Schwab <schwab@suse.de>
1582 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1584 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1586 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1587 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1588 (crx-dis.lo): New target.
1589 (crx-opc.lo): Likewise.
1590 * Makefile.in: Regenerate.
1591 * configure.in: Handle bfd_crx_arch.
1592 * configure: Regenerate.
1593 * crx-dis.c: New file.
1594 * crx-opc.c: New file.
1595 * disassemble.c (ARCH_crx): Define.
1596 (disassembler): Handle ARCH_crx.
1598 2004-06-29 James E Wilson <wilson@specifixinc.com>
1600 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1601 * ia64-asmtab.c: Regnerate.
1603 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1605 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1606 (extract_fxm): Don't test dialect.
1607 (XFXFXM_MASK): Include the power4 bit.
1608 (XFXM): Add p4 param.
1609 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1611 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1613 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1614 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1616 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1618 * ppc-opc.c (BH, XLBH_MASK): Define.
1619 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1621 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1623 * i386-dis.c (x_mode): Comment.
1624 (two_source_ops): File scope.
1625 (float_mem): Correct fisttpll and fistpll.
1626 (float_mem_mode): New table.
1628 (OP_E): Correct intel mode PTR output.
1629 (ptr_reg): Use open_char and close_char.
1630 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1631 operands. Set two_source_ops.
1633 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1635 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1636 instead of _raw_size.
1638 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1640 * ia64-gen.c (in_iclass): Handle more postinc st
1642 * ia64-asmtab.c: Rebuilt.
1644 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1646 * s390-opc.txt: Correct architecture mask for some opcodes.
1647 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1648 in the esa mode as well.
1650 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1652 * sh-dis.c (target_arch): Make unsigned.
1653 (print_insn_sh): Replace (most of) switch with a call to
1654 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1655 * sh-opc.h: Redefine architecture flags values.
1656 Add sh3-nommu architecture.
1657 Reorganise <arch>_up macros so they make more visual sense.
1658 (SH_MERGE_ARCH_SET): Define new macro.
1659 (SH_VALID_BASE_ARCH_SET): Likewise.
1660 (SH_VALID_MMU_ARCH_SET): Likewise.
1661 (SH_VALID_CO_ARCH_SET): Likewise.
1662 (SH_VALID_ARCH_SET): Likewise.
1663 (SH_MERGE_ARCH_SET_VALID): Likewise.
1664 (SH_ARCH_SET_HAS_FPU): Likewise.
1665 (SH_ARCH_SET_HAS_DSP): Likewise.
1666 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1667 (sh_get_arch_from_bfd_mach): Add prototype.
1668 (sh_get_arch_up_from_bfd_mach): Likewise.
1669 (sh_get_bfd_mach_from_arch_set): Likewise.
1670 (sh_merge_bfd_arc): Likewise.
1672 2004-05-24 Peter Barada <peter@the-baradas.com>
1674 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1675 into new match_insn_m68k function. Loop over canidate
1676 matches and select first that completely matches.
1677 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1678 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1679 to verify addressing for MAC/EMAC.
1680 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1681 reigster halves since 'fpu' and 'spl' look misleading.
1682 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1683 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1684 first, tighten up match masks.
1685 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1686 'size' from special case code in print_insn_m68k to
1687 determine decode size of insns.
1689 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1691 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1692 well as when -mpower4.
1694 2004-05-13 Nick Clifton <nickc@redhat.com>
1696 * po/fr.po: Updated French translation.
1698 2004-05-05 Peter Barada <peter@the-baradas.com>
1700 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1701 variants in arch_mask. Only set m68881/68851 for 68k chips.
1702 * m68k-op.c: Switch from ColdFire chips to core variants.
1704 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1707 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1709 2004-04-29 Ben Elliston <bje@au.ibm.com>
1711 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1712 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1714 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1716 * sh-dis.c (print_insn_sh): Print the value in constant pool
1717 as a symbol if it looks like a symbol.
1719 2004-04-22 Peter Barada <peter@the-baradas.com>
1721 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1722 appropriate ColdFire architectures.
1723 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1725 Add EMAC instructions, fix MAC instructions. Remove
1726 macmw/macml/msacmw/msacml instructions since mask addressing now
1729 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1731 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1732 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1733 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1734 macro. Adjust all users.
1736 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1738 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1741 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1743 * m32r-asm.c: Regenerate.
1745 2004-03-29 Stan Shebs <shebs@apple.com>
1747 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1750 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1752 * aclocal.m4: Regenerate.
1753 * config.in: Regenerate.
1754 * configure: Regenerate.
1755 * po/POTFILES.in: Regenerate.
1756 * po/opcodes.pot: Regenerate.
1758 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1760 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1762 * ppc-opc.c (RA0): Define.
1763 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1764 (RAOPT): Rename from RAO. Update all uses.
1765 (powerpc_opcodes): Use RA0 as appropriate.
1767 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1769 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1771 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1773 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1775 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1777 * i386-dis.c (GRPPLOCK): Delete.
1778 (grps): Delete GRPPLOCK entry.
1780 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1782 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1784 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1785 (GRPPADLCK): Define.
1786 (dis386): Use NOP_Fixup on "nop".
1787 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1788 (twobyte_has_modrm): Set for 0xa7.
1789 (padlock_table): Delete. Move to..
1790 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1792 (print_insn): Revert PADLOCK_SPECIAL code.
1793 (OP_E): Delete sfence, lfence, mfence checks.
1795 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1797 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1798 (INVLPG_Fixup): New function.
1799 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1801 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1803 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1804 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1805 (padlock_table): New struct with PadLock instructions.
1806 (print_insn): Handle PADLOCK_SPECIAL.
1808 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1810 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1811 (OP_E): Twiddle clflush to sfence here.
1813 2004-03-08 Nick Clifton <nickc@redhat.com>
1815 * po/de.po: Updated German translation.
1817 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1819 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1820 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1821 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1824 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1826 * frv-asm.c: Regenerate.
1827 * frv-desc.c: Regenerate.
1828 * frv-desc.h: Regenerate.
1829 * frv-dis.c: Regenerate.
1830 * frv-ibld.c: Regenerate.
1831 * frv-opc.c: Regenerate.
1832 * frv-opc.h: Regenerate.
1834 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1836 * frv-desc.c, frv-opc.c: Regenerate.
1838 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1840 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1842 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1844 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1845 Also correct mistake in the comment.
1847 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1849 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1850 ensure that double registers have even numbers.
1851 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1852 that reserved instruction 0xfffd does not decode the same
1854 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1855 REG_N refers to a double register.
1856 Add REG_N_B01 nibble type and use it instead of REG_NM
1858 Adjust the bit patterns in a few comments.
1860 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1862 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1864 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1866 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1868 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1870 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1872 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1874 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1875 mtivor32, mtivor33, mtivor34.
1877 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1879 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1881 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1883 * arm-opc.h Maverick accumulator register opcode fixes.
1885 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1887 * m32r-dis.c: Regenerate.
1889 2004-01-27 Michael Snyder <msnyder@redhat.com>
1891 * sh-opc.h (sh_table): "fsrra", not "fssra".
1893 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1895 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1898 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1900 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1902 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1904 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1905 1. Don't print scale factor on AT&T mode when index missing.
1907 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1909 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1910 when loaded into XR registers.
1912 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1914 * frv-desc.h: Regenerate.
1915 * frv-desc.c: Regenerate.
1916 * frv-opc.c: Regenerate.
1918 2004-01-13 Michael Snyder <msnyder@redhat.com>
1920 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1922 2004-01-09 Paul Brook <paul@codesourcery.com>
1924 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1927 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1929 * Makefile.am (libopcodes_la_DEPENDENCIES)
1930 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1931 comment about the problem.
1932 * Makefile.in: Regenerate.
1934 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1936 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1937 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1938 cut&paste errors in shifting/truncating numerical operands.
1939 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1940 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1941 (parse_uslo16): Likewise.
1942 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1943 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1944 (parse_s12): Likewise.
1945 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1946 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1947 (parse_uslo16): Likewise.
1948 (parse_uhi16): Parse gothi and gotfuncdeschi.
1949 (parse_d12): Parse got12 and gotfuncdesc12.
1950 (parse_s12): Likewise.
1952 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1954 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1955 instruction which looks similar to an 'rla' instruction.
1957 For older changes see ChangeLog-0203
1963 version-control: never