opcodes/rl78-decode.c

   1 #line 1 "rl78-decode.opc"
   2 /* -*- c -*- */
   3 #include <stdio.h>
   4 #include <stdlib.h>
   5 #include <string.h>
   6
   7 #include "config.h"
   8 #include "ansidecl.h"
   9 #include "opcode/rl78.h"
  10
  11 static int trace = 0;
  12
  13 typedef struct
  14 {
  15   RL78_Opcode_Decoded * rl78;
  16   int (* getbyte)(void *);
  17   void * ptr;
  18   unsigned char * op;
  19 } LocalData;
  20
  21 #define ID(x) rl78->id = RLO_##x, rl78->lineno = __LINE__
  22 #define OP(n,t,r,a) (rl78->op[n].type = t, \
  23                      rl78->op[n].reg = r,            \
  24                      rl78->op[n].addend = a )
  25 #define OPX(n,t,r1,r2,a) \
  26         (rl78->op[n].type = t, \
  27         rl78->op[n].reg = r1, \
  28         rl78->op[n].reg2 = r2, \
  29         rl78->op[n].addend = a )
  30
  31 #define W() rl78->size = RL78_Word
  32
  33 #define AU ATTRIBUTE_UNUSED
  34 #define GETBYTE() (ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr))
  35 #define B ((unsigned long) GETBYTE())
  36
  37 #define SYNTAX(x) rl78->syntax = x
  38
  39 #define UNSUPPORTED() \
  40   rl78->syntax = "*unknown*"
  41
  42 #define RB(x) ((x)+RL78_Reg_X)
  43 #define RW(x) ((x)+RL78_Reg_AX)
  44
  45 #define Fz      rl78->flags = RL78_PSW_Z
  46 #define Fza     rl78->flags = RL78_PSW_Z | RL78_PSW_AC
  47 #define Fzc     rl78->flags = RL78_PSW_Z | RL78_PSW_CY
  48 #define Fzac    rl78->flags = RL78_PSW_Z | RL78_PSW_AC | RL78_PSW_CY
  49 #define Fa      rl78->flags = RL78_PSW_AC
  50 #define Fc      rl78->flags = RL78_PSW_CY
  51 #define Fac     rl78->flags = RL78_PSW_AC | RL78_PSW_CY
  52
  53 #define IMMU(bytes)   immediate (bytes, 0, ld)
  54 #define IMMS(bytes)   immediate (bytes, 1, ld)
  55
  56 static int
  57 immediate (int bytes, int sign_extend, LocalData * ld)
  58 {
  59   unsigned long i = 0;
  60
  61   switch (bytes)
  62     {
  63     case 1:
  64       i |= B;
  65       if (sign_extend && (i & 0x80))
  66         i -= 0x100;
  67       break;
  68     case 2:
  69       i |= B;
  70       i |= B << 8;
  71       if (sign_extend && (i & 0x8000))
  72         i -= 0x10000;
  73       break;
  74     case 3:
  75       i |= B;
  76       i |= B << 8;
  77       i |= B << 16;
  78       if (sign_extend && (i & 0x800000))
  79         i -= 0x1000000;
  80       break;
  81     default:
  82       fprintf (stderr, "Programmer error: immediate() called with invalid byte count %d\n", bytes);
  83       abort();
  84     }
  85   return i;
  86 }
  87
  88 #define DC(c)           OP (0, RL78_Operand_Immediate, 0, c)
  89 #define DR(r)           OP (0, RL78_Operand_Register, RL78_Reg_##r, 0)
  90 #define DRB(r)          OP (0, RL78_Operand_Register, RB(r), 0)
  91 #define DRW(r)          OP (0, RL78_Operand_Register, RW(r), 0)
  92 #define DM(r,a)         OP (0, RL78_Operand_Indirect, RL78_Reg_##r, a)
  93 #define DM2(r1,r2,a)    OPX (0, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
  94 #define DE()            rl78->op[0].use_es = 1
  95 #define DB(b)           set_bit (rl78->op, b)
  96 #define DCY()           DR(PSW); DB(0)
  97 #define DPUSH()         OP (0, RL78_Operand_PreDec, RL78_Reg_SP, 0);
  98
  99 #define SC(c)           OP (1, RL78_Operand_Immediate, 0, c)
 100 #define SR(r)           OP (1, RL78_Operand_Register, RL78_Reg_##r, 0)
 101 #define SRB(r)          OP (1, RL78_Operand_Register, RB(r), 0)
 102 #define SRW(r)          OP (1, RL78_Operand_Register, RW(r), 0)
 103 #define SM(r,a)         OP (1, RL78_Operand_Indirect, RL78_Reg_##r, a)
 104 #define SM2(r1,r2,a)    OPX (1, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a)
 105 #define SE()            rl78->op[1].use_es = 1
 106 #define SB(b)           set_bit (rl78->op+1, b)
 107 #define SCY()           SR(PSW); SB(0)
 108 #define COND(c)         rl78->op[1].condition = RL78_Condition_##c
 109 #define SPOP()          OP (1, RL78_Operand_PostInc, RL78_Reg_SP, 0);
 110
 111 static void
 112 set_bit (RL78_Opcode_Operand *op, int bit)
 113 {
 114   op->bit_number = bit;
 115   switch (op->type) {
 116   case RL78_Operand_Register:
 117     op->type = RL78_Operand_Bit;
 118     break;
 119   case RL78_Operand_Indirect:
 120     op->type = RL78_Operand_BitIndirect;
 121     break;
 122   default:
 123     break;
 124   }
 125 }
 126
 127 static int
 128 saddr (int x)
 129 {
 130   if (x < 0x20)
 131     return 0xfff00 + x;
 132   return 0xffe00 + x;
 133 }
 134
 135 static int
 136 sfr (int x)
 137 {
 138   return 0xfff00 + x;
 139 }
 140
 141 #define SADDR saddr (IMMU (1))
 142 #define SFR sfr (IMMU (1))
 143
 144 int
 145 rl78_decode_opcode (unsigned long pc AU,
 146                   RL78_Opcode_Decoded * rl78,
 147                   int (* getbyte)(void *),
 148                   void * ptr)
 149 {
 150   LocalData lds, * ld = &lds;
 151   unsigned char op_buf[20] = {0};
 152   unsigned char *op = op_buf;
 153   int op0, op1;
 154
 155   lds.rl78 = rl78;
 156   lds.getbyte = getbyte;
 157   lds.ptr = ptr;
 158   lds.op = op;
 159
 160   memset (rl78, 0, sizeof (*rl78));
 161
 162  start_again:
 163
 164 /* Byte registers, not including A.  */
 165 /* Word registers, not including AX.  */
 166
 167 /*----------------------------------------------------------------------*/
 168 /* ES: prefix                                                           */
 169
 170   GETBYTE ();
 171   switch (op[0] & 0xff)
 172   {
 173     case 0x00:
 174         {
 175           /** 0000 0000                 nop                                     */
 176           if (trace)
 177             {
 178               printf ("\033[33m%s\033[0m  %02x\n",
 179                      "/** 0000 0000                     nop                                     */",
 180                      op[0]);
 181             }
 182           SYNTAX("nop");
 183 #line 887 "rl78-decode.opc"
 184           ID(nop);
 185
 186         /*----------------------------------------------------------------------*/
 187
 188         }
 189       break;
 190     case 0x01:
 191     case 0x03:
 192     case 0x05:
 193     case 0x07:
 194         {
 195           /** 0000 0rw1                 addw    %0, %1                          */
 196 #line 253 "rl78-decode.opc"
 197           int rw AU = (op[0] >> 1) & 0x03;
 198           if (trace)
 199             {
 200               printf ("\033[33m%s\033[0m  %02x\n",
 201                      "/** 0000 0rw1                     addw    %0, %1                          */",
 202                      op[0]);
 203               printf ("  rw = 0x%x\n", rw);
 204             }
 205           SYNTAX("addw  %0, %1");
 206 #line 253 "rl78-decode.opc"
 207           ID(add); W(); DR(AX); SRW(rw); Fzac;
 208
 209         }
 210       break;
 211     case 0x02:
 212         {
 213           /** 0000 0010                 addw    %0, %e1%!1                      */
 214           if (trace)
 215             {
 216               printf ("\033[33m%s\033[0m  %02x\n",
 217                      "/** 0000 0010                     addw    %0, %e1%!1                      */",
 218                      op[0]);
 219             }
 220           SYNTAX("addw  %0, %e1%!1");
 221 #line 244 "rl78-decode.opc"
 222           ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
 223
 224         }
 225       break;
 226     case 0x04:
 227         {
 228           /** 0000 0100                 addw    %0, #%1                         */
 229           if (trace)
 230             {
 231               printf ("\033[33m%s\033[0m  %02x\n",
 232                      "/** 0000 0100                     addw    %0, #%1                         */",
 233                      op[0]);
 234             }
 235           SYNTAX("addw  %0, #%1");
 236 #line 250 "rl78-decode.opc"
 237           ID(add); W(); DR(AX); SC(IMMU(2)); Fzac;
 238
 239         }
 240       break;
 241     case 0x06:
 242         {
 243           /** 0000 0110                 addw    %0, %1                          */
 244           if (trace)
 245             {
 246               printf ("\033[33m%s\033[0m  %02x\n",
 247                      "/** 0000 0110                     addw    %0, %1                          */",
 248                      op[0]);
 249             }
 250           SYNTAX("addw  %0, %1");
 251 #line 256 "rl78-decode.opc"
 252           ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
 253
 254         }
 255       break;
 256     case 0x08:
 257         {
 258           /** 0000 1000                 xch     a, x                            */
 259           if (trace)
 260             {
 261               printf ("\033[33m%s\033[0m  %02x\n",
 262                      "/** 0000 1000                     xch     a, x                            */",
 263                      op[0]);
 264             }
 265           SYNTAX("xch   a, x");
 266 #line 1205 "rl78-decode.opc"
 267           ID(xch); DR(A); SR(X);
 268
 269         /*----------------------------------------------------------------------*/
 270
 271         }
 272       break;
 273     case 0x09:
 274         {
 275           /** 0000 1001                 mov     %0, %e1%1                       */
 276           if (trace)
 277             {
 278               printf ("\033[33m%s\033[0m  %02x\n",
 279                      "/** 0000 1001                     mov     %0, %e1%1                       */",
 280                      op[0]);
 281             }
 282           SYNTAX("mov   %0, %e1%1");
 283 #line 657 "rl78-decode.opc"
 284           ID(mov); DR(A); SM(B, IMMU(2));
 285
 286         }
 287       break;
 288     case 0x0a:
 289         {
 290           /** 0000 1010                 add     %0, #%1                         */
 291           if (trace)
 292             {
 293               printf ("\033[33m%s\033[0m  %02x\n",
 294                      "/** 0000 1010                     add     %0, #%1                         */",
 295                      op[0]);
 296             }
 297           SYNTAX("add   %0, #%1");
 298 #line 207 "rl78-decode.opc"
 299           ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac;
 300
 301         /*----------------------------------------------------------------------*/
 302
 303         }
 304       break;
 305     case 0x0b:
 306         {
 307           /** 0000 1011                 add     %0, %1                          */
 308           if (trace)
 309             {
 310               printf ("\033[33m%s\033[0m  %02x\n",
 311                      "/** 0000 1011                     add     %0, %1                          */",
 312                      op[0]);
 313             }
 314           SYNTAX("add   %0, %1");
 315 #line 201 "rl78-decode.opc"
 316           ID(add); DR(A); SM(None, SADDR); Fzac;
 317
 318         }
 319       break;
 320     case 0x0c:
 321         {
 322           /** 0000 1100                 add     %0, #%1                         */
 323           if (trace)
 324             {
 325               printf ("\033[33m%s\033[0m  %02x\n",
 326                      "/** 0000 1100                     add     %0, #%1                         */",
 327                      op[0]);
 328             }
 329           SYNTAX("add   %0, #%1");
 330 #line 195 "rl78-decode.opc"
 331           ID(add); DR(A); SC(IMMU(1)); Fzac;
 332
 333         }
 334       break;
 335     case 0x0d:
 336         {
 337           /** 0000 1101                 add     %0, %e1%1                       */
 338           if (trace)
 339             {
 340               printf ("\033[33m%s\033[0m  %02x\n",
 341                      "/** 0000 1101                     add     %0, %e1%1                       */",
 342                      op[0]);
 343             }
 344           SYNTAX("add   %0, %e1%1");
 345 #line 183 "rl78-decode.opc"
 346           ID(add); DR(A); SM(HL, 0); Fzac;
 347
 348         }
 349       break;
 350     case 0x0e:
 351         {
 352           /** 0000 1110                 add     %0, %e1%1                       */
 353           if (trace)
 354             {
 355               printf ("\033[33m%s\033[0m  %02x\n",
 356                      "/** 0000 1110                     add     %0, %e1%1                       */",
 357                      op[0]);
 358             }
 359           SYNTAX("add   %0, %e1%1");
 360 #line 189 "rl78-decode.opc"
 361           ID(add); DR(A); SM(HL, IMMU(1)); Fzac;
 362
 363         }
 364       break;
 365     case 0x0f:
 366         {
 367           /** 0000 1111                 add     %0, %e1%!1                      */
 368           if (trace)
 369             {
 370               printf ("\033[33m%s\033[0m  %02x\n",
 371                      "/** 0000 1111                     add     %0, %e1%!1                      */",
 372                      op[0]);
 373             }
 374           SYNTAX("add   %0, %e1%!1");
 375 #line 180 "rl78-decode.opc"
 376           ID(add); DR(A); SM(None, IMMU(2)); Fzac;
 377
 378         }
 379       break;
 380     case 0x10:
 381         {
 382           /** 0001 0000                 addw    %0, #%1                         */
 383           if (trace)
 384             {
 385               printf ("\033[33m%s\033[0m  %02x\n",
 386                      "/** 0001 0000                     addw    %0, #%1                         */",
 387                      op[0]);
 388             }
 389           SYNTAX("addw  %0, #%1");
 390 #line 259 "rl78-decode.opc"
 391           ID(add); W(); DR(SP); SC(IMMU(1)); Fzac;
 392
 393         /*----------------------------------------------------------------------*/
 394
 395         }
 396       break;
 397     case 0x11:
 398         {
 399           /** 0001 0001                 es:                                     */
 400           if (trace)
 401             {
 402               printf ("\033[33m%s\033[0m  %02x\n",
 403                      "/** 0001 0001                     es:                                     */",
 404                      op[0]);
 405             }
 406           SYNTAX("es:");
 407 #line 172 "rl78-decode.opc"
 408           DE(); SE();
 409           op ++;
 410           pc ++;
 411           goto start_again;
 412
 413         /*----------------------------------------------------------------------*/
 414
 415         }
 416       break;
 417     case 0x12:
 418     case 0x14:
 419     case 0x16:
 420         {
 421           /** 0001 0ra0                 movw    %0, %1                          */
 422 #line 835 "rl78-decode.opc"
 423           int ra AU = (op[0] >> 1) & 0x03;
 424           if (trace)
 425             {
 426               printf ("\033[33m%s\033[0m  %02x\n",
 427                      "/** 0001 0ra0                     movw    %0, %1                          */",
 428                      op[0]);
 429               printf ("  ra = 0x%x\n", ra);
 430             }
 431           SYNTAX("movw  %0, %1");
 432 #line 835 "rl78-decode.opc"
 433           ID(mov); W(); DRW(ra); SR(AX);
 434
 435         }
 436       break;
 437     case 0x13:
 438     case 0x15:
 439     case 0x17:
 440         {
 441           /** 0001 0ra1                 movw    %0, %1                          */
 442 #line 832 "rl78-decode.opc"
 443           int ra AU = (op[0] >> 1) & 0x03;
 444           if (trace)
 445             {
 446               printf ("\033[33m%s\033[0m  %02x\n",
 447                      "/** 0001 0ra1                     movw    %0, %1                          */",
 448                      op[0]);
 449               printf ("  ra = 0x%x\n", ra);
 450             }
 451           SYNTAX("movw  %0, %1");
 452 #line 832 "rl78-decode.opc"
 453           ID(mov); W(); DR(AX); SRW(ra);
 454
 455         }
 456       break;
 457     case 0x18:
 458         {
 459           /** 0001 1000                 mov     %e0%0, %1                       */
 460           if (trace)
 461             {
 462               printf ("\033[33m%s\033[0m  %02x\n",
 463                      "/** 0001 1000                     mov     %e0%0, %1                       */",
 464                      op[0]);
 465             }
 466           SYNTAX("mov   %e0%0, %1");
 467 #line 708 "rl78-decode.opc"
 468           ID(mov); DM(B, IMMU(2)); SR(A);
 469
 470         }
 471       break;
 472     case 0x19:
 473         {
 474           /** 0001 1001                 mov     %e0%0, #%1                      */
 475           if (trace)
 476             {
 477               printf ("\033[33m%s\033[0m  %02x\n",
 478                      "/** 0001 1001                     mov     %e0%0, #%1                      */",
 479                      op[0]);
 480             }
 481           SYNTAX("mov   %e0%0, #%1");
 482 #line 705 "rl78-decode.opc"
 483           ID(mov); DM(B, IMMU(2)); SC(IMMU(1));
 484
 485         }
 486       break;
 487     case 0x1a:
 488         {
 489           /** 0001 1010                 addc    %0, #%1                         */
 490           if (trace)
 491             {
 492               printf ("\033[33m%s\033[0m  %02x\n",
 493                      "/** 0001 1010                     addc    %0, #%1                         */",
 494                      op[0]);
 495             }
 496           SYNTAX("addc  %0, #%1");
 497 #line 239 "rl78-decode.opc"
 498           ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac;
 499
 500         /*----------------------------------------------------------------------*/
 501
 502         }
 503       break;
 504     case 0x1b:
 505         {
 506           /** 0001 1011                 addc    %0, %1                          */
 507           if (trace)
 508             {
 509               printf ("\033[33m%s\033[0m  %02x\n",
 510                      "/** 0001 1011                     addc    %0, %1                          */",
 511                      op[0]);
 512             }
 513           SYNTAX("addc  %0, %1");
 514 #line 236 "rl78-decode.opc"
 515           ID(addc); DR(A); SM(None, SADDR); Fzac;
 516
 517         }
 518       break;
 519     case 0x1c:
 520         {
 521           /** 0001 1100                 addc    %0, #%1                         */
 522           if (trace)
 523             {
 524               printf ("\033[33m%s\033[0m  %02x\n",
 525                      "/** 0001 1100                     addc    %0, #%1                         */",
 526                      op[0]);
 527             }
 528           SYNTAX("addc  %0, #%1");
 529 #line 227 "rl78-decode.opc"
 530           ID(addc); DR(A); SC(IMMU(1)); Fzac;
 531
 532         }
 533       break;
 534     case 0x1d:
 535         {
 536           /** 0001 1101                 addc    %0, %e1%1                       */
 537           if (trace)
 538             {
 539               printf ("\033[33m%s\033[0m  %02x\n",
 540                      "/** 0001 1101                     addc    %0, %e1%1                       */",
 541                      op[0]);
 542             }
 543           SYNTAX("addc  %0, %e1%1");
 544 #line 215 "rl78-decode.opc"
 545           ID(addc); DR(A); SM(HL, 0); Fzac;
 546
 547         }
 548       break;
 549     case 0x1e:
 550         {
 551           /** 0001 1110                 addc    %0, %e1%1                       */
 552           if (trace)
 553             {
 554               printf ("\033[33m%s\033[0m  %02x\n",
 555                      "/** 0001 1110                     addc    %0, %e1%1                       */",
 556                      op[0]);
 557             }
 558           SYNTAX("addc  %0, %e1%1");
 559 #line 224 "rl78-decode.opc"
 560           ID(addc); DR(A); SM(HL, IMMU(1)); Fzac;
 561
 562         }
 563       break;
 564     case 0x1f:
 565         {
 566           /** 0001 1111                 addc    %0, %e1%!1                      */
 567           if (trace)
 568             {
 569               printf ("\033[33m%s\033[0m  %02x\n",
 570                      "/** 0001 1111                     addc    %0, %e1%!1                      */",
 571                      op[0]);
 572             }
 573           SYNTAX("addc  %0, %e1%!1");
 574 #line 212 "rl78-decode.opc"
 575           ID(addc); DR(A); SM(None, IMMU(2)); Fzac;
 576
 577         }
 578       break;
 579     case 0x20:
 580         {
 581           /** 0010 0000                 subw    %0, #%1                         */
 582           if (trace)
 583             {
 584               printf ("\033[33m%s\033[0m  %02x\n",
 585                      "/** 0010 0000                     subw    %0, #%1                         */",
 586                      op[0]);
 587             }
 588           SYNTAX("subw  %0, #%1");
 589 #line 1169 "rl78-decode.opc"
 590           ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac;
 591
 592         /*----------------------------------------------------------------------*/
 593
 594         }
 595       break;
 596     case 0x21:
 597     case 0x23:
 598     case 0x25:
 599     case 0x27:
 600         {
 601           /** 0010 0rw1                 subw    %0, %1                          */
 602 #line 1163 "rl78-decode.opc"
 603           int rw AU = (op[0] >> 1) & 0x03;
 604           if (trace)
 605             {
 606               printf ("\033[33m%s\033[0m  %02x\n",
 607                      "/** 0010 0rw1                     subw    %0, %1                          */",
 608                      op[0]);
 609               printf ("  rw = 0x%x\n", rw);
 610             }
 611           SYNTAX("subw  %0, %1");
 612 #line 1163 "rl78-decode.opc"
 613           ID(sub); W(); DR(AX); SRW(rw); Fzac;
 614
 615         }
 616       break;
 617     case 0x22:
 618         {
 619           /** 0010 0010                 subw    %0, %e1%!1                      */
 620           if (trace)
 621             {
 622               printf ("\033[33m%s\033[0m  %02x\n",
 623                      "/** 0010 0010                     subw    %0, %e1%!1                      */",
 624                      op[0]);
 625             }
 626           SYNTAX("subw  %0, %e1%!1");
 627 #line 1154 "rl78-decode.opc"
 628           ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac;
 629
 630         }
 631       break;
 632     case 0x24:
 633         {
 634           /** 0010 0100                 subw    %0, #%1                         */
 635           if (trace)
 636             {
 637               printf ("\033[33m%s\033[0m  %02x\n",
 638                      "/** 0010 0100                     subw    %0, #%1                         */",
 639                      op[0]);
 640             }
 641           SYNTAX("subw  %0, #%1");
 642 #line 1160 "rl78-decode.opc"
 643           ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac;
 644
 645         }
 646       break;
 647     case 0x26:
 648         {
 649           /** 0010 0110                 subw    %0, %1                          */
 650           if (trace)
 651             {
 652               printf ("\033[33m%s\033[0m  %02x\n",
 653                      "/** 0010 0110                     subw    %0, %1                          */",
 654                      op[0]);
 655             }
 656           SYNTAX("subw  %0, %1");
 657 #line 1166 "rl78-decode.opc"
 658           ID(sub); W(); DR(AX); SM(None, SADDR); Fzac;
 659
 660         }
 661       break;
 662     case 0x28:
 663         {
 664           /** 0010 1000                 mov     %e0%0, %1                       */
 665           if (trace)
 666             {
 667               printf ("\033[33m%s\033[0m  %02x\n",
 668                      "/** 0010 1000                     mov     %e0%0, %1                       */",
 669                      op[0]);
 670             }
 671           SYNTAX("mov   %e0%0, %1");
 672 #line 720 "rl78-decode.opc"
 673           ID(mov); DM(C, IMMU(2)); SR(A);
 674
 675         }
 676       break;
 677     case 0x29:
 678         {
 679           /** 0010 1001                 mov     %0, %e1%1                       */
 680           if (trace)
 681             {
 682               printf ("\033[33m%s\033[0m  %02x\n",
 683                      "/** 0010 1001                     mov     %0, %e1%1                       */",
 684                      op[0]);
 685             }
 686           SYNTAX("mov   %0, %e1%1");
 687 #line 663 "rl78-decode.opc"
 688           ID(mov); DR(A); SM(C, IMMU(2));
 689
 690         }
 691       break;
 692     case 0x2a:
 693         {
 694           /** 0010 1010                 sub     %0, #%1                         */
 695           if (trace)
 696             {
 697               printf ("\033[33m%s\033[0m  %02x\n",
 698                      "/** 0010 1010                     sub     %0, #%1                         */",
 699                      op[0]);
 700             }
 701           SYNTAX("sub   %0, #%1");
 702 #line 1117 "rl78-decode.opc"
 703           ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac;
 704
 705         /*----------------------------------------------------------------------*/
 706
 707         }
 708       break;
 709     case 0x2b:
 710         {
 711           /** 0010 1011                 sub     %0, %1                          */
 712           if (trace)
 713             {
 714               printf ("\033[33m%s\033[0m  %02x\n",
 715                      "/** 0010 1011                     sub     %0, %1                          */",
 716                      op[0]);
 717             }
 718           SYNTAX("sub   %0, %1");
 719 #line 1111 "rl78-decode.opc"
 720           ID(sub); DR(A); SM(None, SADDR); Fzac;
 721
 722         }
 723       break;
 724     case 0x2c:
 725         {
 726           /** 0010 1100                 sub     %0, #%1                         */
 727           if (trace)
 728             {
 729               printf ("\033[33m%s\033[0m  %02x\n",
 730                      "/** 0010 1100                     sub     %0, #%1                         */",
 731                      op[0]);
 732             }
 733           SYNTAX("sub   %0, #%1");
 734 #line 1105 "rl78-decode.opc"
 735           ID(sub); DR(A); SC(IMMU(1)); Fzac;
 736
 737         }
 738       break;
 739     case 0x2d:
 740         {
 741           /** 0010 1101                 sub     %0, %e1%1                       */
 742           if (trace)
 743             {
 744               printf ("\033[33m%s\033[0m  %02x\n",
 745                      "/** 0010 1101                     sub     %0, %e1%1                       */",
 746                      op[0]);
 747             }
 748           SYNTAX("sub   %0, %e1%1");
 749 #line 1093 "rl78-decode.opc"
 750           ID(sub); DR(A); SM(HL, 0); Fzac;
 751
 752         }
 753       break;
 754     case 0x2e:
 755         {
 756           /** 0010 1110                 sub     %0, %e1%1                       */
 757           if (trace)
 758             {
 759               printf ("\033[33m%s\033[0m  %02x\n",
 760                      "/** 0010 1110                     sub     %0, %e1%1                       */",
 761                      op[0]);
 762             }
 763           SYNTAX("sub   %0, %e1%1");
 764 #line 1099 "rl78-decode.opc"
 765           ID(sub); DR(A); SM(HL, IMMU(1)); Fzac;
 766
 767         }
 768       break;
 769     case 0x2f:
 770         {
 771           /** 0010 1111                 sub     %0, %e1%!1                      */
 772           if (trace)
 773             {
 774               printf ("\033[33m%s\033[0m  %02x\n",
 775                      "/** 0010 1111                     sub     %0, %e1%!1                      */",
 776                      op[0]);
 777             }
 778           SYNTAX("sub   %0, %e1%!1");
 779 #line 1090 "rl78-decode.opc"
 780           ID(sub); DR(A); SM(None, IMMU(2)); Fzac;
 781
 782         }
 783       break;
 784     case 0x30:
 785     case 0x32:
 786     case 0x34:
 787     case 0x36:
 788         {
 789           /** 0011 0rg0                 movw    %0, #%1                         */
 790 #line 829 "rl78-decode.opc"
 791           int rg AU = (op[0] >> 1) & 0x03;
 792           if (trace)
 793             {
 794               printf ("\033[33m%s\033[0m  %02x\n",
 795                      "/** 0011 0rg0                     movw    %0, #%1                         */",
 796                      op[0]);
 797               printf ("  rg = 0x%x\n", rg);
 798             }
 799           SYNTAX("movw  %0, #%1");
 800 #line 829 "rl78-decode.opc"
 801           ID(mov); W(); DRW(rg); SC(IMMU(2));
 802
 803         }
 804       break;
 805     case 0x31:
 806         GETBYTE ();
 807         switch (op[1] & 0x8f)
 808         {
 809           case 0x00:
 810               {
 811                 /** 0011 0001 0bit 0000         btclr   %s1, $%a0                       */
 812 #line 395 "rl78-decode.opc"
 813                 int bit AU = (op[1] >> 4) & 0x07;
 814                 if (trace)
 815                   {
 816                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 817                            "/** 0011 0001 0bit 0000             btclr   %s1, $%a0                       */",
 818                            op[0], op[1]);
 819                     printf ("  bit = 0x%x\n", bit);
 820                   }
 821                 SYNTAX("btclr   %s1, $%a0");
 822 #line 395 "rl78-decode.opc"
 823                 ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
 824
 825               /*----------------------------------------------------------------------*/
 826
 827               }
 828             break;
 829           case 0x01:
 830               {
 831                 /** 0011 0001 0bit 0001         btclr   %1, $%a0                        */
 832 #line 389 "rl78-decode.opc"
 833                 int bit AU = (op[1] >> 4) & 0x07;
 834                 if (trace)
 835                   {
 836                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 837                            "/** 0011 0001 0bit 0001             btclr   %1, $%a0                        */",
 838                            op[0], op[1]);
 839                     printf ("  bit = 0x%x\n", bit);
 840                   }
 841                 SYNTAX("btclr   %1, $%a0");
 842 #line 389 "rl78-decode.opc"
 843                 ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
 844
 845               }
 846             break;
 847           case 0x02:
 848               {
 849                 /** 0011 0001 0bit 0010         bt      %s1, $%a0                       */
 850 #line 381 "rl78-decode.opc"
 851                 int bit AU = (op[1] >> 4) & 0x07;
 852                 if (trace)
 853                   {
 854                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 855                            "/** 0011 0001 0bit 0010             bt      %s1, $%a0                       */",
 856                            op[0], op[1]);
 857                     printf ("  bit = 0x%x\n", bit);
 858                   }
 859                 SYNTAX("bt      %s1, $%a0");
 860 #line 381 "rl78-decode.opc"
 861                 ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
 862
 863               /*----------------------------------------------------------------------*/
 864
 865               }
 866             break;
 867           case 0x03:
 868               {
 869                 /** 0011 0001 0bit 0011         bt      %1, $%a0                        */
 870 #line 375 "rl78-decode.opc"
 871                 int bit AU = (op[1] >> 4) & 0x07;
 872                 if (trace)
 873                   {
 874                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 875                            "/** 0011 0001 0bit 0011             bt      %1, $%a0                        */",
 876                            op[0], op[1]);
 877                     printf ("  bit = 0x%x\n", bit);
 878                   }
 879                 SYNTAX("bt      %1, $%a0");
 880 #line 375 "rl78-decode.opc"
 881                 ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T);
 882
 883               }
 884             break;
 885           case 0x04:
 886               {
 887                 /** 0011 0001 0bit 0100         bf      %s1, $%a0                       */
 888 #line 342 "rl78-decode.opc"
 889                 int bit AU = (op[1] >> 4) & 0x07;
 890                 if (trace)
 891                   {
 892                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 893                            "/** 0011 0001 0bit 0100             bf      %s1, $%a0                       */",
 894                            op[0], op[1]);
 895                     printf ("  bit = 0x%x\n", bit);
 896                   }
 897                 SYNTAX("bf      %s1, $%a0");
 898 #line 342 "rl78-decode.opc"
 899                 ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
 900
 901               /*----------------------------------------------------------------------*/
 902
 903               }
 904             break;
 905           case 0x05:
 906               {
 907                 /** 0011 0001 0bit 0101         bf      %1, $%a0                        */
 908 #line 336 "rl78-decode.opc"
 909                 int bit AU = (op[1] >> 4) & 0x07;
 910                 if (trace)
 911                   {
 912                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 913                            "/** 0011 0001 0bit 0101             bf      %1, $%a0                        */",
 914                            op[0], op[1]);
 915                     printf ("  bit = 0x%x\n", bit);
 916                   }
 917                 SYNTAX("bf      %1, $%a0");
 918 #line 336 "rl78-decode.opc"
 919                 ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F);
 920
 921               }
 922             break;
 923           case 0x07:
 924               {
 925                 /** 0011 0001 0cnt 0111         shl     %0, %1                          */
 926 #line 1046 "rl78-decode.opc"
 927                 int cnt AU = (op[1] >> 4) & 0x07;
 928                 if (trace)
 929                   {
 930                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 931                            "/** 0011 0001 0cnt 0111             shl     %0, %1                          */",
 932                            op[0], op[1]);
 933                     printf ("  cnt = 0x%x\n", cnt);
 934                   }
 935                 SYNTAX("shl     %0, %1");
 936 #line 1046 "rl78-decode.opc"
 937                 ID(shl); DR(C); SC(cnt);
 938
 939               }
 940             break;
 941           case 0x08:
 942               {
 943                 /** 0011 0001 0cnt 1000         shl     %0, %1                          */
 944 #line 1043 "rl78-decode.opc"
 945                 int cnt AU = (op[1] >> 4) & 0x07;
 946                 if (trace)
 947                   {
 948                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 949                            "/** 0011 0001 0cnt 1000             shl     %0, %1                          */",
 950                            op[0], op[1]);
 951                     printf ("  cnt = 0x%x\n", cnt);
 952                   }
 953                 SYNTAX("shl     %0, %1");
 954 #line 1043 "rl78-decode.opc"
 955                 ID(shl); DR(B); SC(cnt);
 956
 957               }
 958             break;
 959           case 0x09:
 960               {
 961                 /** 0011 0001 0cnt 1001         shl     %0, %1                          */
 962 #line 1040 "rl78-decode.opc"
 963                 int cnt AU = (op[1] >> 4) & 0x07;
 964                 if (trace)
 965                   {
 966                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 967                            "/** 0011 0001 0cnt 1001             shl     %0, %1                          */",
 968                            op[0], op[1]);
 969                     printf ("  cnt = 0x%x\n", cnt);
 970                   }
 971                 SYNTAX("shl     %0, %1");
 972 #line 1040 "rl78-decode.opc"
 973                 ID(shl); DR(A); SC(cnt);
 974
 975               }
 976             break;
 977           case 0x0a:
 978               {
 979                 /** 0011 0001 0cnt 1010         shr     %0, %1                          */
 980 #line 1057 "rl78-decode.opc"
 981                 int cnt AU = (op[1] >> 4) & 0x07;
 982                 if (trace)
 983                   {
 984                     printf ("\033[33m%s\033[0m  %02x %02x\n",
 985                            "/** 0011 0001 0cnt 1010             shr     %0, %1                          */",
 986                            op[0], op[1]);
 987                     printf ("  cnt = 0x%x\n", cnt);
 988                   }
 989                 SYNTAX("shr     %0, %1");
 990 #line 1057 "rl78-decode.opc"
 991                 ID(shr); DR(A); SC(cnt);
 992
 993               }
 994             break;
 995           case 0x0b:
 996               {
 997                 /** 0011 0001 0cnt 1011         sar     %0, %1                          */
 998 #line 1004 "rl78-decode.opc"
 999                 int cnt AU = (op[1] >> 4) & 0x07;
1000                 if (trace)
1001                   {
1002                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1003                            "/** 0011 0001 0cnt 1011             sar     %0, %1                          */",
1004                            op[0], op[1]);
1005                     printf ("  cnt = 0x%x\n", cnt);
1006                   }
1007                 SYNTAX("sar     %0, %1");
1008 #line 1004 "rl78-decode.opc"
1009                 ID(sar); DR(A); SC(cnt);
1010
1011               }
1012             break;
1013           case 0x0c:
1014           case 0x8c:
1015               {
1016                 /** 0011 0001 wcnt 1100         shlw    %0, %1                          */
1017 #line 1052 "rl78-decode.opc"
1018                 int wcnt AU = (op[1] >> 4) & 0x0f;
1019                 if (trace)
1020                   {
1021                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1022                            "/** 0011 0001 wcnt 1100             shlw    %0, %1                          */",
1023                            op[0], op[1]);
1024                     printf ("  wcnt = 0x%x\n", wcnt);
1025                   }
1026                 SYNTAX("shlw    %0, %1");
1027 #line 1052 "rl78-decode.opc"
1028                 ID(shl); W(); DR(BC); SC(wcnt);
1029
1030               /*----------------------------------------------------------------------*/
1031
1032               }
1033             break;
1034           case 0x0d:
1035           case 0x8d:
1036               {
1037                 /** 0011 0001 wcnt 1101         shlw    %0, %1                          */
1038 #line 1049 "rl78-decode.opc"
1039                 int wcnt AU = (op[1] >> 4) & 0x0f;
1040                 if (trace)
1041                   {
1042                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1043                            "/** 0011 0001 wcnt 1101             shlw    %0, %1                          */",
1044                            op[0], op[1]);
1045                     printf ("  wcnt = 0x%x\n", wcnt);
1046                   }
1047                 SYNTAX("shlw    %0, %1");
1048 #line 1049 "rl78-decode.opc"
1049                 ID(shl); W(); DR(AX); SC(wcnt);
1050
1051               }
1052             break;
1053           case 0x0e:
1054           case 0x8e:
1055               {
1056                 /** 0011 0001 wcnt 1110         shrw    %0, %1                          */
1057 #line 1060 "rl78-decode.opc"
1058                 int wcnt AU = (op[1] >> 4) & 0x0f;
1059                 if (trace)
1060                   {
1061                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1062                            "/** 0011 0001 wcnt 1110             shrw    %0, %1                          */",
1063                            op[0], op[1]);
1064                     printf ("  wcnt = 0x%x\n", wcnt);
1065                   }
1066                 SYNTAX("shrw    %0, %1");
1067 #line 1060 "rl78-decode.opc"
1068                 ID(shr); W(); DR(AX); SC(wcnt);
1069
1070               /*----------------------------------------------------------------------*/
1071
1072               }
1073             break;
1074           case 0x0f:
1075           case 0x8f:
1076               {
1077                 /** 0011 0001 wcnt 1111         sarw    %0, %1                          */
1078 #line 1007 "rl78-decode.opc"
1079                 int wcnt AU = (op[1] >> 4) & 0x0f;
1080                 if (trace)
1081                   {
1082                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1083                            "/** 0011 0001 wcnt 1111             sarw    %0, %1                          */",
1084                            op[0], op[1]);
1085                     printf ("  wcnt = 0x%x\n", wcnt);
1086                   }
1087                 SYNTAX("sarw    %0, %1");
1088 #line 1007 "rl78-decode.opc"
1089                 ID(sar); W(); DR(AX); SC(wcnt);
1090
1091               /*----------------------------------------------------------------------*/
1092
1093               }
1094             break;
1095           case 0x80:
1096               {
1097                 /** 0011 0001 1bit 0000         btclr   %s1, $%a0                       */
1098 #line 392 "rl78-decode.opc"
1099                 int bit AU = (op[1] >> 4) & 0x07;
1100                 if (trace)
1101                   {
1102                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1103                            "/** 0011 0001 1bit 0000             btclr   %s1, $%a0                       */",
1104                            op[0], op[1]);
1105                     printf ("  bit = 0x%x\n", bit);
1106                   }
1107                 SYNTAX("btclr   %s1, $%a0");
1108 #line 392 "rl78-decode.opc"
1109                 ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1110
1111               }
1112             break;
1113           case 0x81:
1114               {
1115                 /** 0011 0001 1bit 0001         btclr   %e1%1, $%a0                     */
1116 #line 386 "rl78-decode.opc"
1117                 int bit AU = (op[1] >> 4) & 0x07;
1118                 if (trace)
1119                   {
1120                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1121                            "/** 0011 0001 1bit 0001             btclr   %e1%1, $%a0                     */",
1122                            op[0], op[1]);
1123                     printf ("  bit = 0x%x\n", bit);
1124                   }
1125                 SYNTAX("btclr   %e1%1, $%a0");
1126 #line 386 "rl78-decode.opc"
1127                 ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1128
1129               }
1130             break;
1131           case 0x82:
1132               {
1133                 /** 0011 0001 1bit 0010         bt      %s1, $%a0                       */
1134 #line 378 "rl78-decode.opc"
1135                 int bit AU = (op[1] >> 4) & 0x07;
1136                 if (trace)
1137                   {
1138                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1139                            "/** 0011 0001 1bit 0010             bt      %s1, $%a0                       */",
1140                            op[0], op[1]);
1141                     printf ("  bit = 0x%x\n", bit);
1142                   }
1143                 SYNTAX("bt      %s1, $%a0");
1144 #line 378 "rl78-decode.opc"
1145                 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
1146
1147               }
1148             break;
1149           case 0x83:
1150               {
1151                 /** 0011 0001 1bit 0011         bt      %e1%1, $%a0                     */
1152 #line 372 "rl78-decode.opc"
1153                 int bit AU = (op[1] >> 4) & 0x07;
1154                 if (trace)
1155                   {
1156                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1157                            "/** 0011 0001 1bit 0011             bt      %e1%1, $%a0                     */",
1158                            op[0], op[1]);
1159                     printf ("  bit = 0x%x\n", bit);
1160                   }
1161                 SYNTAX("bt      %e1%1, $%a0");
1162 #line 372 "rl78-decode.opc"
1163                 ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T);
1164
1165               }
1166             break;
1167           case 0x84:
1168               {
1169                 /** 0011 0001 1bit 0100         bf      %s1, $%a0                       */
1170 #line 339 "rl78-decode.opc"
1171                 int bit AU = (op[1] >> 4) & 0x07;
1172                 if (trace)
1173                   {
1174                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1175                            "/** 0011 0001 1bit 0100             bf      %s1, $%a0                       */",
1176                            op[0], op[1]);
1177                     printf ("  bit = 0x%x\n", bit);
1178                   }
1179                 SYNTAX("bf      %s1, $%a0");
1180 #line 339 "rl78-decode.opc"
1181                 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
1182
1183               }
1184             break;
1185           case 0x85:
1186               {
1187                 /** 0011 0001 1bit 0101         bf      %e1%1, $%a0                     */
1188 #line 333 "rl78-decode.opc"
1189                 int bit AU = (op[1] >> 4) & 0x07;
1190                 if (trace)
1191                   {
1192                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1193                            "/** 0011 0001 1bit 0101             bf      %e1%1, $%a0                     */",
1194                            op[0], op[1]);
1195                     printf ("  bit = 0x%x\n", bit);
1196                   }
1197                 SYNTAX("bf      %e1%1, $%a0");
1198 #line 333 "rl78-decode.opc"
1199                 ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F);
1200
1201               }
1202             break;
1203           default: UNSUPPORTED(); break;
1204         }
1205       break;
1206     case 0x33:
1207     case 0x35:
1208     case 0x37:
1209         {
1210           /** 0011 0ra1                 xchw    %0, %1                          */
1211 #line 1210 "rl78-decode.opc"
1212           int ra AU = (op[0] >> 1) & 0x03;
1213           if (trace)
1214             {
1215               printf ("\033[33m%s\033[0m  %02x\n",
1216                      "/** 0011 0ra1                     xchw    %0, %1                          */",
1217                      op[0]);
1218               printf ("  ra = 0x%x\n", ra);
1219             }
1220           SYNTAX("xchw  %0, %1");
1221 #line 1210 "rl78-decode.opc"
1222           ID(xch); W(); DR(AX); SRW(ra);
1223
1224         /*----------------------------------------------------------------------*/
1225
1226         }
1227       break;
1228     case 0x38:
1229         {
1230           /** 0011 1000                 mov     %e0%0, #%1                      */
1231           if (trace)
1232             {
1233               printf ("\033[33m%s\033[0m  %02x\n",
1234                      "/** 0011 1000                     mov     %e0%0, #%1                      */",
1235                      op[0]);
1236             }
1237           SYNTAX("mov   %e0%0, #%1");
1238 #line 717 "rl78-decode.opc"
1239           ID(mov); DM(C, IMMU(2)); SC(IMMU(1));
1240
1241         }
1242       break;
1243     case 0x39:
1244         {
1245           /** 0011 1001                 mov     %e0%0, #%1                      */
1246           if (trace)
1247             {
1248               printf ("\033[33m%s\033[0m  %02x\n",
1249                      "/** 0011 1001                     mov     %e0%0, #%1                      */",
1250                      op[0]);
1251             }
1252           SYNTAX("mov   %e0%0, #%1");
1253 #line 711 "rl78-decode.opc"
1254           ID(mov); DM(BC, IMMU(2)); SC(IMMU(1));
1255
1256         }
1257       break;
1258     case 0x3a:
1259         {
1260           /** 0011 1010                 subc    %0, #%1                         */
1261           if (trace)
1262             {
1263               printf ("\033[33m%s\033[0m  %02x\n",
1264                      "/** 0011 1010                     subc    %0, #%1                         */",
1265                      op[0]);
1266             }
1267           SYNTAX("subc  %0, #%1");
1268 #line 1149 "rl78-decode.opc"
1269           ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac;
1270
1271         /*----------------------------------------------------------------------*/
1272
1273         }
1274       break;
1275     case 0x3b:
1276         {
1277           /** 0011 1011                 subc    %0, %1                          */
1278           if (trace)
1279             {
1280               printf ("\033[33m%s\033[0m  %02x\n",
1281                      "/** 0011 1011                     subc    %0, %1                          */",
1282                      op[0]);
1283             }
1284           SYNTAX("subc  %0, %1");
1285 #line 1146 "rl78-decode.opc"
1286           ID(subc); DR(A); SM(None, SADDR); Fzac;
1287
1288         }
1289       break;
1290     case 0x3c:
1291         {
1292           /** 0011 1100                 subc    %0, #%1                         */
1293           if (trace)
1294             {
1295               printf ("\033[33m%s\033[0m  %02x\n",
1296                      "/** 0011 1100                     subc    %0, #%1                         */",
1297                      op[0]);
1298             }
1299           SYNTAX("subc  %0, #%1");
1300 #line 1137 "rl78-decode.opc"
1301           ID(subc); DR(A); SC(IMMU(1)); Fzac;
1302
1303         }
1304       break;
1305     case 0x3d:
1306         {
1307           /** 0011 1101                 subc    %0, %e1%1                       */
1308           if (trace)
1309             {
1310               printf ("\033[33m%s\033[0m  %02x\n",
1311                      "/** 0011 1101                     subc    %0, %e1%1                       */",
1312                      op[0]);
1313             }
1314           SYNTAX("subc  %0, %e1%1");
1315 #line 1125 "rl78-decode.opc"
1316           ID(subc); DR(A); SM(HL, 0); Fzac;
1317
1318         }
1319       break;
1320     case 0x3e:
1321         {
1322           /** 0011 1110                 subc    %0, %e1%1                       */
1323           if (trace)
1324             {
1325               printf ("\033[33m%s\033[0m  %02x\n",
1326                      "/** 0011 1110                     subc    %0, %e1%1                       */",
1327                      op[0]);
1328             }
1329           SYNTAX("subc  %0, %e1%1");
1330 #line 1134 "rl78-decode.opc"
1331           ID(subc); DR(A); SM(HL, IMMU(1)); Fzac;
1332
1333         }
1334       break;
1335     case 0x3f:
1336         {
1337           /** 0011 1111                 subc    %0, %e1%!1                      */
1338           if (trace)
1339             {
1340               printf ("\033[33m%s\033[0m  %02x\n",
1341                      "/** 0011 1111                     subc    %0, %e1%!1                      */",
1342                      op[0]);
1343             }
1344           SYNTAX("subc  %0, %e1%!1");
1345 #line 1122 "rl78-decode.opc"
1346           ID(subc); DR(A); SM(None, IMMU(2)); Fzac;
1347
1348         }
1349       break;
1350     case 0x40:
1351         {
1352           /** 0100 0000                 cmp     %e0%!0, #%1                     */
1353           if (trace)
1354             {
1355               printf ("\033[33m%s\033[0m  %02x\n",
1356                      "/** 0100 0000                     cmp     %e0%!0, #%1                     */",
1357                      op[0]);
1358             }
1359           SYNTAX("cmp   %e0%!0, #%1");
1360 #line 459 "rl78-decode.opc"
1361           ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac;
1362
1363         }
1364       break;
1365     case 0x41:
1366         {
1367           /** 0100 0001                 mov     %0, #%1                         */
1368           if (trace)
1369             {
1370               printf ("\033[33m%s\033[0m  %02x\n",
1371                      "/** 0100 0001                     mov     %0, #%1                         */",
1372                      op[0]);
1373             }
1374           SYNTAX("mov   %0, #%1");
1375 #line 696 "rl78-decode.opc"
1376           ID(mov); DR(ES); SC(IMMU(1));
1377
1378         }
1379       break;
1380     case 0x42:
1381         {
1382           /** 0100 0010                 cmpw    %0, %e1%!1                      */
1383           if (trace)
1384             {
1385               printf ("\033[33m%s\033[0m  %02x\n",
1386                      "/** 0100 0010                     cmpw    %0, %e1%!1                      */",
1387                      op[0]);
1388             }
1389           SYNTAX("cmpw  %0, %e1%!1");
1390 #line 510 "rl78-decode.opc"
1391           ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac;
1392
1393         }
1394       break;
1395     case 0x43:
1396     case 0x45:
1397     case 0x47:
1398         {
1399           /** 0100 0ra1                 cmpw    %0, %1                          */
1400 #line 519 "rl78-decode.opc"
1401           int ra AU = (op[0] >> 1) & 0x03;
1402           if (trace)
1403             {
1404               printf ("\033[33m%s\033[0m  %02x\n",
1405                      "/** 0100 0ra1                     cmpw    %0, %1                          */",
1406                      op[0]);
1407               printf ("  ra = 0x%x\n", ra);
1408             }
1409           SYNTAX("cmpw  %0, %1");
1410 #line 519 "rl78-decode.opc"
1411           ID(cmp); W(); DR(AX); SRW(ra); Fzac;
1412
1413         }
1414       break;
1415     case 0x44:
1416         {
1417           /** 0100 0100                 cmpw    %0, #%1                         */
1418           if (trace)
1419             {
1420               printf ("\033[33m%s\033[0m  %02x\n",
1421                      "/** 0100 0100                     cmpw    %0, #%1                         */",
1422                      op[0]);
1423             }
1424           SYNTAX("cmpw  %0, #%1");
1425 #line 516 "rl78-decode.opc"
1426           ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac;
1427
1428         }
1429       break;
1430     case 0x46:
1431         {
1432           /** 0100 0110                 cmpw    %0, %1                          */
1433           if (trace)
1434             {
1435               printf ("\033[33m%s\033[0m  %02x\n",
1436                      "/** 0100 0110                     cmpw    %0, %1                          */",
1437                      op[0]);
1438             }
1439           SYNTAX("cmpw  %0, %1");
1440 #line 522 "rl78-decode.opc"
1441           ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac;
1442
1443         /*----------------------------------------------------------------------*/
1444
1445         }
1446       break;
1447     case 0x48:
1448         {
1449           /** 0100 1000                 mov     %e0%0, %1                       */
1450           if (trace)
1451             {
1452               printf ("\033[33m%s\033[0m  %02x\n",
1453                      "/** 0100 1000                     mov     %e0%0, %1                       */",
1454                      op[0]);
1455             }
1456           SYNTAX("mov   %e0%0, %1");
1457 #line 714 "rl78-decode.opc"
1458           ID(mov); DM(BC, IMMU(2)); SR(A);
1459
1460         }
1461       break;
1462     case 0x49:
1463         {
1464           /** 0100 1001                 mov     %0, %e1%1                       */
1465           if (trace)
1466             {
1467               printf ("\033[33m%s\033[0m  %02x\n",
1468                      "/** 0100 1001                     mov     %0, %e1%1                       */",
1469                      op[0]);
1470             }
1471           SYNTAX("mov   %0, %e1%1");
1472 #line 660 "rl78-decode.opc"
1473           ID(mov); DR(A); SM(BC, IMMU(2));
1474
1475         }
1476       break;
1477     case 0x4a:
1478         {
1479           /** 0100 1010                 cmp     %0, #%1                         */
1480           if (trace)
1481             {
1482               printf ("\033[33m%s\033[0m  %02x\n",
1483                      "/** 0100 1010                     cmp     %0, #%1                         */",
1484                      op[0]);
1485             }
1486           SYNTAX("cmp   %0, #%1");
1487 #line 462 "rl78-decode.opc"
1488           ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac;
1489
1490         }
1491       break;
1492     case 0x4b:
1493         {
1494           /** 0100 1011                 cmp     %0, %1                          */
1495           if (trace)
1496             {
1497               printf ("\033[33m%s\033[0m  %02x\n",
1498                      "/** 0100 1011                     cmp     %0, %1                          */",
1499                      op[0]);
1500             }
1501           SYNTAX("cmp   %0, %1");
1502 #line 489 "rl78-decode.opc"
1503           ID(cmp); DR(A); SM(None, SADDR); Fzac;
1504
1505         /*----------------------------------------------------------------------*/
1506
1507         }
1508       break;
1509     case 0x4c:
1510         {
1511           /** 0100 1100                 cmp     %0, #%1                         */
1512           if (trace)
1513             {
1514               printf ("\033[33m%s\033[0m  %02x\n",
1515                      "/** 0100 1100                     cmp     %0, #%1                         */",
1516                      op[0]);
1517             }
1518           SYNTAX("cmp   %0, #%1");
1519 #line 480 "rl78-decode.opc"
1520           ID(cmp); DR(A); SC(IMMU(1)); Fzac;
1521
1522         }
1523       break;
1524     case 0x4d:
1525         {
1526           /** 0100 1101                 cmp     %0, %e1%1                       */
1527           if (trace)
1528             {
1529               printf ("\033[33m%s\033[0m  %02x\n",
1530                      "/** 0100 1101                     cmp     %0, %e1%1                       */",
1531                      op[0]);
1532             }
1533           SYNTAX("cmp   %0, %e1%1");
1534 #line 468 "rl78-decode.opc"
1535           ID(cmp); DR(A); SM(HL, 0); Fzac;
1536
1537         }
1538       break;
1539     case 0x4e:
1540         {
1541           /** 0100 1110                 cmp     %0, %e1%1                       */
1542           if (trace)
1543             {
1544               printf ("\033[33m%s\033[0m  %02x\n",
1545                      "/** 0100 1110                     cmp     %0, %e1%1                       */",
1546                      op[0]);
1547             }
1548           SYNTAX("cmp   %0, %e1%1");
1549 #line 477 "rl78-decode.opc"
1550           ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac;
1551
1552         }
1553       break;
1554     case 0x4f:
1555         {
1556           /** 0100 1111                 cmp     %0, %e1%!1                      */
1557           if (trace)
1558             {
1559               printf ("\033[33m%s\033[0m  %02x\n",
1560                      "/** 0100 1111                     cmp     %0, %e1%!1                      */",
1561                      op[0]);
1562             }
1563           SYNTAX("cmp   %0, %e1%!1");
1564 #line 465 "rl78-decode.opc"
1565           ID(cmp); DR(A); SM(None, IMMU(2)); Fzac;
1566
1567         }
1568       break;
1569     case 0x50:
1570     case 0x51:
1571     case 0x52:
1572     case 0x53:
1573     case 0x54:
1574     case 0x55:
1575     case 0x56:
1576     case 0x57:
1577         {
1578           /** 0101 0reg                 mov     %0, #%1                         */
1579 #line 648 "rl78-decode.opc"
1580           int reg AU = op[0] & 0x07;
1581           if (trace)
1582             {
1583               printf ("\033[33m%s\033[0m  %02x\n",
1584                      "/** 0101 0reg                     mov     %0, #%1                         */",
1585                      op[0]);
1586               printf ("  reg = 0x%x\n", reg);
1587             }
1588           SYNTAX("mov   %0, #%1");
1589 #line 648 "rl78-decode.opc"
1590           ID(mov); DRB(reg); SC(IMMU(1));
1591
1592         }
1593       break;
1594     case 0x58:
1595         {
1596           /** 0101 1000                 movw    %e0%0, %1                       */
1597           if (trace)
1598             {
1599               printf ("\033[33m%s\033[0m  %02x\n",
1600                      "/** 0101 1000                     movw    %e0%0, %1                       */",
1601                      op[0]);
1602             }
1603           SYNTAX("movw  %e0%0, %1");
1604 #line 847 "rl78-decode.opc"
1605           ID(mov); W(); DM(B, IMMU(2)); SR(AX);
1606
1607         }
1608       break;
1609     case 0x59:
1610         {
1611           /** 0101 1001                 movw    %0, %e1%1                       */
1612           if (trace)
1613             {
1614               printf ("\033[33m%s\033[0m  %02x\n",
1615                      "/** 0101 1001                     movw    %0, %e1%1                       */",
1616                      op[0]);
1617             }
1618           SYNTAX("movw  %0, %e1%1");
1619 #line 838 "rl78-decode.opc"
1620           ID(mov); W(); DR(AX); SM(B, IMMU(2));
1621
1622         }
1623       break;
1624     case 0x5a:
1625         {
1626           /** 0101 1010                 and     %0, #%1                         */
1627           if (trace)
1628             {
1629               printf ("\033[33m%s\033[0m  %02x\n",
1630                      "/** 0101 1010                     and     %0, #%1                         */",
1631                      op[0]);
1632             }
1633           SYNTAX("and   %0, #%1");
1634 #line 291 "rl78-decode.opc"
1635           ID(and); DM(None, SADDR); SC(IMMU(1)); Fz;
1636
1637         /*----------------------------------------------------------------------*/
1638
1639         }
1640       break;
1641     case 0x5b:
1642         {
1643           /** 0101 1011                 and     %0, %1                          */
1644           if (trace)
1645             {
1646               printf ("\033[33m%s\033[0m  %02x\n",
1647                      "/** 0101 1011                     and     %0, %1                          */",
1648                      op[0]);
1649             }
1650           SYNTAX("and   %0, %1");
1651 #line 288 "rl78-decode.opc"
1652           ID(and); DR(A); SM(None, SADDR); Fz;
1653
1654         }
1655       break;
1656     case 0x5c:
1657         {
1658           /** 0101 1100                 and     %0, #%1                         */
1659           if (trace)
1660             {
1661               printf ("\033[33m%s\033[0m  %02x\n",
1662                      "/** 0101 1100                     and     %0, #%1                         */",
1663                      op[0]);
1664             }
1665           SYNTAX("and   %0, #%1");
1666 #line 279 "rl78-decode.opc"
1667           ID(and); DR(A); SC(IMMU(1)); Fz;
1668
1669         }
1670       break;
1671     case 0x5d:
1672         {
1673           /** 0101 1101                 and     %0, %e1%1                       */
1674           if (trace)
1675             {
1676               printf ("\033[33m%s\033[0m  %02x\n",
1677                      "/** 0101 1101                     and     %0, %e1%1                       */",
1678                      op[0]);
1679             }
1680           SYNTAX("and   %0, %e1%1");
1681 #line 267 "rl78-decode.opc"
1682           ID(and); DR(A); SM(HL, 0); Fz;
1683
1684         }
1685       break;
1686     case 0x5e:
1687         {
1688           /** 0101 1110                 and     %0, %e1%1                       */
1689           if (trace)
1690             {
1691               printf ("\033[33m%s\033[0m  %02x\n",
1692                      "/** 0101 1110                     and     %0, %e1%1                       */",
1693                      op[0]);
1694             }
1695           SYNTAX("and   %0, %e1%1");
1696 #line 273 "rl78-decode.opc"
1697           ID(and); DR(A); SM(HL, IMMU(1)); Fz;
1698
1699         }
1700       break;
1701     case 0x5f:
1702         {
1703           /** 0101 1111                 and     %0, %e1%!1                      */
1704           if (trace)
1705             {
1706               printf ("\033[33m%s\033[0m  %02x\n",
1707                      "/** 0101 1111                     and     %0, %e1%!1                      */",
1708                      op[0]);
1709             }
1710           SYNTAX("and   %0, %e1%!1");
1711 #line 264 "rl78-decode.opc"
1712           ID(and); DR(A); SM(None, IMMU(2)); Fz;
1713
1714         }
1715       break;
1716     case 0x60:
1717     case 0x62:
1718     case 0x63:
1719     case 0x64:
1720     case 0x65:
1721     case 0x66:
1722     case 0x67:
1723         {
1724           /** 0110 0rba                 mov     %0, %1                          */
1725 #line 651 "rl78-decode.opc"
1726           int rba AU = op[0] & 0x07;
1727           if (trace)
1728             {
1729               printf ("\033[33m%s\033[0m  %02x\n",
1730                      "/** 0110 0rba                     mov     %0, %1                          */",
1731                      op[0]);
1732               printf ("  rba = 0x%x\n", rba);
1733             }
1734           SYNTAX("mov   %0, %1");
1735 #line 651 "rl78-decode.opc"
1736           ID(mov); DR(A); SRB(rba);
1737
1738         }
1739       break;
1740     case 0x61:
1741         GETBYTE ();
1742         switch (op[1] & 0xff)
1743         {
1744           case 0x00:
1745           case 0x01:
1746           case 0x02:
1747           case 0x03:
1748           case 0x04:
1749           case 0x05:
1750           case 0x06:
1751           case 0x07:
1752               {
1753                 /** 0110 0001 0000 0reg         add     %0, %1                          */
1754 #line 204 "rl78-decode.opc"
1755                 int reg AU = op[1] & 0x07;
1756                 if (trace)
1757                   {
1758                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1759                            "/** 0110 0001 0000 0reg             add     %0, %1                          */",
1760                            op[0], op[1]);
1761                     printf ("  reg = 0x%x\n", reg);
1762                   }
1763                 SYNTAX("add     %0, %1");
1764 #line 204 "rl78-decode.opc"
1765                 ID(add); DRB(reg); SR(A); Fzac;
1766
1767               }
1768             break;
1769           case 0x08:
1770           case 0x0a:
1771           case 0x0b:
1772           case 0x0c:
1773           case 0x0d:
1774           case 0x0e:
1775           case 0x0f:
1776               {
1777                 /** 0110 0001 0000 1rba         add     %0, %1                          */
1778 #line 198 "rl78-decode.opc"
1779                 int rba AU = op[1] & 0x07;
1780                 if (trace)
1781                   {
1782                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1783                            "/** 0110 0001 0000 1rba             add     %0, %1                          */",
1784                            op[0], op[1]);
1785                     printf ("  rba = 0x%x\n", rba);
1786                   }
1787                 SYNTAX("add     %0, %1");
1788 #line 198 "rl78-decode.opc"
1789                 ID(add); DR(A); SRB(rba); Fzac;
1790
1791               }
1792             break;
1793           case 0x09:
1794               {
1795                 /** 0110 0001 0000 1001         addw    %0, %e1%1                       */
1796                 if (trace)
1797                   {
1798                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1799                            "/** 0110 0001 0000 1001             addw    %0, %e1%1                       */",
1800                            op[0], op[1]);
1801                   }
1802                 SYNTAX("addw    %0, %e1%1");
1803 #line 247 "rl78-decode.opc"
1804                 ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1805
1806               }
1807             break;
1808           case 0x10:
1809           case 0x11:
1810           case 0x12:
1811           case 0x13:
1812           case 0x14:
1813           case 0x15:
1814           case 0x16:
1815           case 0x17:
1816               {
1817                 /** 0110 0001 0001 0reg         addc    %0, %1                          */
1818 #line 233 "rl78-decode.opc"
1819                 int reg AU = op[1] & 0x07;
1820                 if (trace)
1821                   {
1822                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1823                            "/** 0110 0001 0001 0reg             addc    %0, %1                          */",
1824                            op[0], op[1]);
1825                     printf ("  reg = 0x%x\n", reg);
1826                   }
1827                 SYNTAX("addc    %0, %1");
1828 #line 233 "rl78-decode.opc"
1829                 ID(addc); DRB(reg); SR(A); Fzac;
1830
1831               }
1832             break;
1833           case 0x18:
1834           case 0x1a:
1835           case 0x1b:
1836           case 0x1c:
1837           case 0x1d:
1838           case 0x1e:
1839           case 0x1f:
1840               {
1841                 /** 0110 0001 0001 1rba         addc    %0, %1                          */
1842 #line 230 "rl78-decode.opc"
1843                 int rba AU = op[1] & 0x07;
1844                 if (trace)
1845                   {
1846                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1847                            "/** 0110 0001 0001 1rba             addc    %0, %1                          */",
1848                            op[0], op[1]);
1849                     printf ("  rba = 0x%x\n", rba);
1850                   }
1851                 SYNTAX("addc    %0, %1");
1852 #line 230 "rl78-decode.opc"
1853                 ID(addc); DR(A); SRB(rba); Fzac;
1854
1855               }
1856             break;
1857           case 0x20:
1858           case 0x21:
1859           case 0x22:
1860           case 0x23:
1861           case 0x24:
1862           case 0x25:
1863           case 0x26:
1864           case 0x27:
1865               {
1866                 /** 0110 0001 0010 0reg         sub     %0, %1                          */
1867 #line 1114 "rl78-decode.opc"
1868                 int reg AU = op[1] & 0x07;
1869                 if (trace)
1870                   {
1871                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1872                            "/** 0110 0001 0010 0reg             sub     %0, %1                          */",
1873                            op[0], op[1]);
1874                     printf ("  reg = 0x%x\n", reg);
1875                   }
1876                 SYNTAX("sub     %0, %1");
1877 #line 1114 "rl78-decode.opc"
1878                 ID(sub); DRB(reg); SR(A); Fzac;
1879
1880               }
1881             break;
1882           case 0x28:
1883           case 0x2a:
1884           case 0x2b:
1885           case 0x2c:
1886           case 0x2d:
1887           case 0x2e:
1888           case 0x2f:
1889               {
1890                 /** 0110 0001 0010 1rba         sub     %0, %1                          */
1891 #line 1108 "rl78-decode.opc"
1892                 int rba AU = op[1] & 0x07;
1893                 if (trace)
1894                   {
1895                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1896                            "/** 0110 0001 0010 1rba             sub     %0, %1                          */",
1897                            op[0], op[1]);
1898                     printf ("  rba = 0x%x\n", rba);
1899                   }
1900                 SYNTAX("sub     %0, %1");
1901 #line 1108 "rl78-decode.opc"
1902                 ID(sub); DR(A); SRB(rba); Fzac;
1903
1904               }
1905             break;
1906           case 0x29:
1907               {
1908                 /** 0110 0001 0010 1001         subw    %0, %e1%1                       */
1909                 if (trace)
1910                   {
1911                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1912                            "/** 0110 0001 0010 1001             subw    %0, %e1%1                       */",
1913                            op[0], op[1]);
1914                   }
1915                 SYNTAX("subw    %0, %e1%1");
1916 #line 1157 "rl78-decode.opc"
1917                 ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
1918
1919               }
1920             break;
1921           case 0x30:
1922           case 0x31:
1923           case 0x32:
1924           case 0x33:
1925           case 0x34:
1926           case 0x35:
1927           case 0x36:
1928           case 0x37:
1929               {
1930                 /** 0110 0001 0011 0reg         subc    %0, %1                          */
1931 #line 1143 "rl78-decode.opc"
1932                 int reg AU = op[1] & 0x07;
1933                 if (trace)
1934                   {
1935                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1936                            "/** 0110 0001 0011 0reg             subc    %0, %1                          */",
1937                            op[0], op[1]);
1938                     printf ("  reg = 0x%x\n", reg);
1939                   }
1940                 SYNTAX("subc    %0, %1");
1941 #line 1143 "rl78-decode.opc"
1942                 ID(subc); DRB(reg); SR(A); Fzac;
1943
1944               }
1945             break;
1946           case 0x38:
1947           case 0x3a:
1948           case 0x3b:
1949           case 0x3c:
1950           case 0x3d:
1951           case 0x3e:
1952           case 0x3f:
1953               {
1954                 /** 0110 0001 0011 1rba         subc    %0, %1                          */
1955 #line 1140 "rl78-decode.opc"
1956                 int rba AU = op[1] & 0x07;
1957                 if (trace)
1958                   {
1959                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1960                            "/** 0110 0001 0011 1rba             subc    %0, %1                          */",
1961                            op[0], op[1]);
1962                     printf ("  rba = 0x%x\n", rba);
1963                   }
1964                 SYNTAX("subc    %0, %1");
1965 #line 1140 "rl78-decode.opc"
1966                 ID(subc); DR(A); SRB(rba); Fzac;
1967
1968               }
1969             break;
1970           case 0x40:
1971           case 0x41:
1972           case 0x42:
1973           case 0x43:
1974           case 0x44:
1975           case 0x45:
1976           case 0x46:
1977           case 0x47:
1978               {
1979                 /** 0110 0001 0100 0reg         cmp     %0, %1                          */
1980 #line 486 "rl78-decode.opc"
1981                 int reg AU = op[1] & 0x07;
1982                 if (trace)
1983                   {
1984                     printf ("\033[33m%s\033[0m  %02x %02x\n",
1985                            "/** 0110 0001 0100 0reg             cmp     %0, %1                          */",
1986                            op[0], op[1]);
1987                     printf ("  reg = 0x%x\n", reg);
1988                   }
1989                 SYNTAX("cmp     %0, %1");
1990 #line 486 "rl78-decode.opc"
1991                 ID(cmp); DRB(reg); SR(A); Fzac;
1992
1993               }
1994             break;
1995           case 0x48:
1996           case 0x4a:
1997           case 0x4b:
1998           case 0x4c:
1999           case 0x4d:
2000           case 0x4e:
2001           case 0x4f:
2002               {
2003                 /** 0110 0001 0100 1rba         cmp     %0, %1                          */
2004 #line 483 "rl78-decode.opc"
2005                 int rba AU = op[1] & 0x07;
2006                 if (trace)
2007                   {
2008                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2009                            "/** 0110 0001 0100 1rba             cmp     %0, %1                          */",
2010                            op[0], op[1]);
2011                     printf ("  rba = 0x%x\n", rba);
2012                   }
2013                 SYNTAX("cmp     %0, %1");
2014 #line 483 "rl78-decode.opc"
2015                 ID(cmp); DR(A); SRB(rba); Fzac;
2016
2017               }
2018             break;
2019           case 0x49:
2020               {
2021                 /** 0110 0001 0100 1001         cmpw    %0, %e1%1                       */
2022                 if (trace)
2023                   {
2024                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2025                            "/** 0110 0001 0100 1001             cmpw    %0, %e1%1                       */",
2026                            op[0], op[1]);
2027                   }
2028                 SYNTAX("cmpw    %0, %e1%1");
2029 #line 513 "rl78-decode.opc"
2030                 ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac;
2031
2032               }
2033             break;
2034           case 0x50:
2035           case 0x51:
2036           case 0x52:
2037           case 0x53:
2038           case 0x54:
2039           case 0x55:
2040           case 0x56:
2041           case 0x57:
2042               {
2043                 /** 0110 0001 0101 0reg         and     %0, %1                          */
2044 #line 285 "rl78-decode.opc"
2045                 int reg AU = op[1] & 0x07;
2046                 if (trace)
2047                   {
2048                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2049                            "/** 0110 0001 0101 0reg             and     %0, %1                          */",
2050                            op[0], op[1]);
2051                     printf ("  reg = 0x%x\n", reg);
2052                   }
2053                 SYNTAX("and     %0, %1");
2054 #line 285 "rl78-decode.opc"
2055                 ID(and); DRB(reg); SR(A); Fz;
2056
2057               }
2058             break;
2059           case 0x58:
2060           case 0x5a:
2061           case 0x5b:
2062           case 0x5c:
2063           case 0x5d:
2064           case 0x5e:
2065           case 0x5f:
2066               {
2067                 /** 0110 0001 0101 1rba         and     %0, %1                          */
2068 #line 282 "rl78-decode.opc"
2069                 int rba AU = op[1] & 0x07;
2070                 if (trace)
2071                   {
2072                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2073                            "/** 0110 0001 0101 1rba             and     %0, %1                          */",
2074                            op[0], op[1]);
2075                     printf ("  rba = 0x%x\n", rba);
2076                   }
2077                 SYNTAX("and     %0, %1");
2078 #line 282 "rl78-decode.opc"
2079                 ID(and); DR(A); SRB(rba); Fz;
2080
2081               }
2082             break;
2083           case 0x59:
2084               {
2085                 /** 0110 0001 0101 1001         inc     %e0%0                           */
2086                 if (trace)
2087                   {
2088                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2089                            "/** 0110 0001 0101 1001             inc     %e0%0                           */",
2090                            op[0], op[1]);
2091                   }
2092                 SYNTAX("inc     %e0%0");
2093 #line 563 "rl78-decode.opc"
2094                 ID(add); DM(HL, IMMU(1)); SC(1); Fza;
2095
2096               }
2097             break;
2098           case 0x60:
2099           case 0x61:
2100           case 0x62:
2101           case 0x63:
2102           case 0x64:
2103           case 0x65:
2104           case 0x66:
2105           case 0x67:
2106               {
2107                 /** 0110 0001 0110 0reg         or      %0, %1                          */
2108 #line 932 "rl78-decode.opc"
2109                 int reg AU = op[1] & 0x07;
2110                 if (trace)
2111                   {
2112                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2113                            "/** 0110 0001 0110 0reg             or      %0, %1                          */",
2114                            op[0], op[1]);
2115                     printf ("  reg = 0x%x\n", reg);
2116                   }
2117                 SYNTAX("or      %0, %1");
2118 #line 932 "rl78-decode.opc"
2119                 ID(or); DRB(reg); SR(A); Fz;
2120
2121               }
2122             break;
2123           case 0x68:
2124           case 0x6a:
2125           case 0x6b:
2126           case 0x6c:
2127           case 0x6d:
2128           case 0x6e:
2129           case 0x6f:
2130               {
2131                 /** 0110 0001 0110 1rba         or      %0, %1                          */
2132 #line 929 "rl78-decode.opc"
2133                 int rba AU = op[1] & 0x07;
2134                 if (trace)
2135                   {
2136                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2137                            "/** 0110 0001 0110 1rba             or      %0, %1                          */",
2138                            op[0], op[1]);
2139                     printf ("  rba = 0x%x\n", rba);
2140                   }
2141                 SYNTAX("or      %0, %1");
2142 #line 929 "rl78-decode.opc"
2143                 ID(or); DR(A); SRB(rba); Fz;
2144
2145               }
2146             break;
2147           case 0x69:
2148               {
2149                 /** 0110 0001 0110 1001         dec     %e0%0                           */
2150                 if (trace)
2151                   {
2152                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2153                            "/** 0110 0001 0110 1001             dec     %e0%0                           */",
2154                            op[0], op[1]);
2155                   }
2156                 SYNTAX("dec     %e0%0");
2157 #line 530 "rl78-decode.opc"
2158                 ID(sub); DM(HL, IMMU(1)); SC(1); Fza;
2159
2160               }
2161             break;
2162           case 0x70:
2163           case 0x71:
2164           case 0x72:
2165           case 0x73:
2166           case 0x74:
2167           case 0x75:
2168           case 0x76:
2169           case 0x77:
2170               {
2171                 /** 0110 0001 0111 0reg         xor     %0, %1                          */
2172 #line 1236 "rl78-decode.opc"
2173                 int reg AU = op[1] & 0x07;
2174                 if (trace)
2175                   {
2176                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2177                            "/** 0110 0001 0111 0reg             xor     %0, %1                          */",
2178                            op[0], op[1]);
2179                     printf ("  reg = 0x%x\n", reg);
2180                   }
2181                 SYNTAX("xor     %0, %1");
2182 #line 1236 "rl78-decode.opc"
2183                 ID(xor); DRB(reg); SR(A); Fz;
2184
2185               }
2186             break;
2187           case 0x78:
2188           case 0x7a:
2189           case 0x7b:
2190           case 0x7c:
2191           case 0x7d:
2192           case 0x7e:
2193           case 0x7f:
2194               {
2195                 /** 0110 0001 0111 1rba         xor     %0, %1                          */
2196 #line 1233 "rl78-decode.opc"
2197                 int rba AU = op[1] & 0x07;
2198                 if (trace)
2199                   {
2200                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2201                            "/** 0110 0001 0111 1rba             xor     %0, %1                          */",
2202                            op[0], op[1]);
2203                     printf ("  rba = 0x%x\n", rba);
2204                   }
2205                 SYNTAX("xor     %0, %1");
2206 #line 1233 "rl78-decode.opc"
2207                 ID(xor); DR(A); SRB(rba); Fz;
2208
2209               }
2210             break;
2211           case 0x79:
2212               {
2213                 /** 0110 0001 0111 1001         incw    %e0%0                           */
2214                 if (trace)
2215                   {
2216                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2217                            "/** 0110 0001 0111 1001             incw    %e0%0                           */",
2218                            op[0], op[1]);
2219                   }
2220                 SYNTAX("incw    %e0%0");
2221 #line 577 "rl78-decode.opc"
2222                 ID(add); W(); DM(HL, IMMU(1)); SC(1);
2223
2224               }
2225             break;
2226           case 0x80:
2227           case 0x81:
2228               {
2229                 /** 0110 0001 1000 000          add     %0, %e1%1                       */
2230                 if (trace)
2231                   {
2232                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2233                            "/** 0110 0001 1000 000              add     %0, %e1%1                       */",
2234                            op[0], op[1]);
2235                   }
2236                 SYNTAX("add     %0, %e1%1");
2237 #line 186 "rl78-decode.opc"
2238                 ID(add); DR(A); SM2(HL, B, 0); Fzac;
2239
2240               }
2241             break;
2242           case 0x82:
2243               {
2244                 /** 0110 0001 1000 0010         add     %0, %e1%1                       */
2245                 if (trace)
2246                   {
2247                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2248                            "/** 0110 0001 1000 0010             add     %0, %e1%1                       */",
2249                            op[0], op[1]);
2250                   }
2251                 SYNTAX("add     %0, %e1%1");
2252 #line 192 "rl78-decode.opc"
2253                 ID(add); DR(A); SM2(HL, C, 0); Fzac;
2254
2255               }
2256             break;
2257           case 0x84:
2258           case 0x85:
2259           case 0x86:
2260           case 0x87:
2261           case 0x94:
2262           case 0x95:
2263           case 0x96:
2264           case 0x97:
2265           case 0xa4:
2266           case 0xa5:
2267           case 0xa6:
2268           case 0xa7:
2269           case 0xb4:
2270           case 0xb5:
2271           case 0xb6:
2272           case 0xb7:
2273           case 0xc4:
2274           case 0xc5:
2275           case 0xc6:
2276           case 0xc7:
2277           case 0xd4:
2278           case 0xd5:
2279           case 0xd6:
2280           case 0xd7:
2281           case 0xe4:
2282           case 0xe5:
2283           case 0xe6:
2284           case 0xe7:
2285           case 0xf4:
2286           case 0xf5:
2287           case 0xf6:
2288           case 0xf7:
2289               {
2290                 /** 0110 0001 1nnn 01mm         callt   [%x0]                           */
2291 #line 412 "rl78-decode.opc"
2292                 int nnn AU = (op[1] >> 4) & 0x07;
2293 #line 412 "rl78-decode.opc"
2294                 int mm AU = op[1] & 0x03;
2295                 if (trace)
2296                   {
2297                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2298                            "/** 0110 0001 1nnn 01mm             callt   [%x0]                           */",
2299                            op[0], op[1]);
2300                     printf ("  nnn = 0x%x,", nnn);
2301                     printf ("  mm = 0x%x\n", mm);
2302                   }
2303                 SYNTAX("callt   [%x0]");
2304 #line 412 "rl78-decode.opc"
2305                 ID(call); DM(None, 0x80 + mm*16 + nnn*2);
2306
2307               /*----------------------------------------------------------------------*/
2308
2309               }
2310             break;
2311           case 0x88:
2312           case 0x8a:
2313           case 0x8b:
2314           case 0x8c:
2315           case 0x8d:
2316           case 0x8e:
2317           case 0x8f:
2318               {
2319                 /** 0110 0001 1000 1reg         xch     %0, %1                          */
2320 #line 1195 "rl78-decode.opc"
2321                 int reg AU = op[1] & 0x07;
2322                 if (trace)
2323                   {
2324                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2325                            "/** 0110 0001 1000 1reg             xch     %0, %1                          */",
2326                            op[0], op[1]);
2327                     printf ("  reg = 0x%x\n", reg);
2328                   }
2329                 SYNTAX("xch     %0, %1");
2330 #line 1195 "rl78-decode.opc"
2331                 /* Note: DECW uses reg == X, so this must follow DECW */
2332                 ID(xch); DR(A); SRB(reg);
2333
2334               }
2335             break;
2336           case 0x89:
2337               {
2338                 /** 0110 0001 1000 1001         decw    %e0%0                           */
2339                 if (trace)
2340                   {
2341                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2342                            "/** 0110 0001 1000 1001             decw    %e0%0                           */",
2343                            op[0], op[1]);
2344                   }
2345                 SYNTAX("decw    %e0%0");
2346 #line 544 "rl78-decode.opc"
2347                 ID(sub); W(); DM(HL, IMMU(1)); SC(1);
2348
2349               }
2350             break;
2351           case 0x90:
2352               {
2353                 /** 0110 0001 1001 0000         addc    %0, %e1%1                       */
2354                 if (trace)
2355                   {
2356                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2357                            "/** 0110 0001 1001 0000             addc    %0, %e1%1                       */",
2358                            op[0], op[1]);
2359                   }
2360                 SYNTAX("addc    %0, %e1%1");
2361 #line 218 "rl78-decode.opc"
2362                 ID(addc); DR(A); SM2(HL, B, 0); Fzac;
2363
2364               }
2365             break;
2366           case 0x92:
2367               {
2368                 /** 0110 0001 1001 0010         addc    %0, %e1%1                       */
2369                 if (trace)
2370                   {
2371                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2372                            "/** 0110 0001 1001 0010             addc    %0, %e1%1                       */",
2373                            op[0], op[1]);
2374                   }
2375                 SYNTAX("addc    %0, %e1%1");
2376 #line 221 "rl78-decode.opc"
2377                 ID(addc); DR(A); SM2(HL, C, 0); Fzac;
2378
2379               }
2380             break;
2381           case 0xa0:
2382           case 0xa1:
2383               {
2384                 /** 0110 0001 1010 000          sub     %0, %e1%1                       */
2385                 if (trace)
2386                   {
2387                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2388                            "/** 0110 0001 1010 000              sub     %0, %e1%1                       */",
2389                            op[0], op[1]);
2390                   }
2391                 SYNTAX("sub     %0, %e1%1");
2392 #line 1096 "rl78-decode.opc"
2393                 ID(sub); DR(A); SM2(HL, B, 0); Fzac;
2394
2395               }
2396             break;
2397           case 0xa2:
2398               {
2399                 /** 0110 0001 1010 0010         sub     %0, %e1%1                       */
2400                 if (trace)
2401                   {
2402                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2403                            "/** 0110 0001 1010 0010             sub     %0, %e1%1                       */",
2404                            op[0], op[1]);
2405                   }
2406                 SYNTAX("sub     %0, %e1%1");
2407 #line 1102 "rl78-decode.opc"
2408                 ID(sub); DR(A); SM2(HL, C, 0); Fzac;
2409
2410               }
2411             break;
2412           case 0xa8:
2413               {
2414                 /** 0110 0001 1010 1000         xch     %0, %1                          */
2415                 if (trace)
2416                   {
2417                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2418                            "/** 0110 0001 1010 1000             xch     %0, %1                          */",
2419                            op[0], op[1]);
2420                   }
2421                 SYNTAX("xch     %0, %1");
2422 #line 1199 "rl78-decode.opc"
2423                 ID(xch); DR(A); SM(None, SADDR);
2424
2425               }
2426             break;
2427           case 0xa9:
2428               {
2429                 /** 0110 0001 1010 1001         xch     %0, %e1%1                       */
2430                 if (trace)
2431                   {
2432                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2433                            "/** 0110 0001 1010 1001             xch     %0, %e1%1                       */",
2434                            op[0], op[1]);
2435                   }
2436                 SYNTAX("xch     %0, %e1%1");
2437 #line 1192 "rl78-decode.opc"
2438                 ID(xch); DR(A); SM2(HL, C, 0);
2439
2440               }
2441             break;
2442           case 0xaa:
2443               {
2444                 /** 0110 0001 1010 1010         xch     %0, %e1%!1                      */
2445                 if (trace)
2446                   {
2447                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2448                            "/** 0110 0001 1010 1010             xch     %0, %e1%!1                      */",
2449                            op[0], op[1]);
2450                   }
2451                 SYNTAX("xch     %0, %e1%!1");
2452 #line 1174 "rl78-decode.opc"
2453                 ID(xch); DR(A); SM(None, IMMU(2));
2454
2455               }
2456             break;
2457           case 0xab:
2458               {
2459                 /** 0110 0001 1010 1011         xch     %0, %1                          */
2460                 if (trace)
2461                   {
2462                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2463                            "/** 0110 0001 1010 1011             xch     %0, %1                          */",
2464                            op[0], op[1]);
2465                   }
2466                 SYNTAX("xch     %0, %1");
2467 #line 1202 "rl78-decode.opc"
2468                 ID(xch); DR(A); SM(None, SFR);
2469
2470               }
2471             break;
2472           case 0xac:
2473               {
2474                 /** 0110 0001 1010 1100         xch     %0, %e1%1                       */
2475                 if (trace)
2476                   {
2477                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2478                            "/** 0110 0001 1010 1100             xch     %0, %e1%1                       */",
2479                            op[0], op[1]);
2480                   }
2481                 SYNTAX("xch     %0, %e1%1");
2482 #line 1183 "rl78-decode.opc"
2483                 ID(xch); DR(A); SM(HL, 0);
2484
2485               }
2486             break;
2487           case 0xad:
2488               {
2489                 /** 0110 0001 1010 1101         xch     %0, %e1%1                       */
2490                 if (trace)
2491                   {
2492                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2493                            "/** 0110 0001 1010 1101             xch     %0, %e1%1                       */",
2494                            op[0], op[1]);
2495                   }
2496                 SYNTAX("xch     %0, %e1%1");
2497 #line 1189 "rl78-decode.opc"
2498                 ID(xch); DR(A); SM(HL, IMMU(1));
2499
2500               }
2501             break;
2502           case 0xae:
2503               {
2504                 /** 0110 0001 1010 1110         xch     %0, %e1%1                       */
2505                 if (trace)
2506                   {
2507                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2508                            "/** 0110 0001 1010 1110             xch     %0, %e1%1                       */",
2509                            op[0], op[1]);
2510                   }
2511                 SYNTAX("xch     %0, %e1%1");
2512 #line 1177 "rl78-decode.opc"
2513                 ID(xch); DR(A); SM(DE, 0);
2514
2515               }
2516             break;
2517           case 0xaf:
2518               {
2519                 /** 0110 0001 1010 1111         xch     %0, %e1%1                       */
2520                 if (trace)
2521                   {
2522                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2523                            "/** 0110 0001 1010 1111             xch     %0, %e1%1                       */",
2524                            op[0], op[1]);
2525                   }
2526                 SYNTAX("xch     %0, %e1%1");
2527 #line 1180 "rl78-decode.opc"
2528                 ID(xch); DR(A); SM(DE, IMMU(1));
2529
2530               }
2531             break;
2532           case 0xb0:
2533               {
2534                 /** 0110 0001 1011 0000         subc    %0, %e1%1                       */
2535                 if (trace)
2536                   {
2537                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2538                            "/** 0110 0001 1011 0000             subc    %0, %e1%1                       */",
2539                            op[0], op[1]);
2540                   }
2541                 SYNTAX("subc    %0, %e1%1");
2542 #line 1128 "rl78-decode.opc"
2543                 ID(subc); DR(A); SM2(HL, B, 0); Fzac;
2544
2545               }
2546             break;
2547           case 0xb2:
2548               {
2549                 /** 0110 0001 1011 0010         subc    %0, %e1%1                       */
2550                 if (trace)
2551                   {
2552                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2553                            "/** 0110 0001 1011 0010             subc    %0, %e1%1                       */",
2554                            op[0], op[1]);
2555                   }
2556                 SYNTAX("subc    %0, %e1%1");
2557 #line 1131 "rl78-decode.opc"
2558                 ID(subc); DR(A); SM2(HL, C, 0); Fzac;
2559
2560               }
2561             break;
2562           case 0xb8:
2563               {
2564                 /** 0110 0001 1011 1000         mov     %0, %1                          */
2565                 if (trace)
2566                   {
2567                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2568                            "/** 0110 0001 1011 1000             mov     %0, %1                          */",
2569                            op[0], op[1]);
2570                   }
2571                 SYNTAX("mov     %0, %1");
2572 #line 702 "rl78-decode.opc"
2573                 ID(mov); DR(ES); SM(None, SADDR);
2574
2575               }
2576             break;
2577           case 0xb9:
2578               {
2579                 /** 0110 0001 1011 1001         xch     %0, %e1%1                       */
2580                 if (trace)
2581                   {
2582                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2583                            "/** 0110 0001 1011 1001             xch     %0, %e1%1                       */",
2584                            op[0], op[1]);
2585                   }
2586                 SYNTAX("xch     %0, %e1%1");
2587 #line 1186 "rl78-decode.opc"
2588                 ID(xch); DR(A); SM2(HL, B, 0);
2589
2590               }
2591             break;
2592           case 0xc0:
2593               {
2594                 /** 0110 0001 1100 0000         cmp     %0, %e1%1                       */
2595                 if (trace)
2596                   {
2597                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2598                            "/** 0110 0001 1100 0000             cmp     %0, %e1%1                       */",
2599                            op[0], op[1]);
2600                   }
2601                 SYNTAX("cmp     %0, %e1%1");
2602 #line 471 "rl78-decode.opc"
2603                 ID(cmp); DR(A); SM2(HL, B, 0); Fzac;
2604
2605               }
2606             break;
2607           case 0xc2:
2608               {
2609                 /** 0110 0001 1100 0010         cmp     %0, %e1%1                       */
2610                 if (trace)
2611                   {
2612                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2613                            "/** 0110 0001 1100 0010             cmp     %0, %e1%1                       */",
2614                            op[0], op[1]);
2615                   }
2616                 SYNTAX("cmp     %0, %e1%1");
2617 #line 474 "rl78-decode.opc"
2618                 ID(cmp); DR(A); SM2(HL, C, 0); Fzac;
2619
2620               }
2621             break;
2622           case 0xc3:
2623               {
2624                 /** 0110 0001 1100 0011         bh      $%a0                            */
2625                 if (trace)
2626                   {
2627                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2628                            "/** 0110 0001 1100 0011             bh      $%a0                            */",
2629                            op[0], op[1]);
2630                   }
2631                 SYNTAX("bh      $%a0");
2632 #line 319 "rl78-decode.opc"
2633                 ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H);
2634
2635               }
2636             break;
2637           case 0xc8:
2638               {
2639                 /** 0110 0001 1100 1000         sk%c1                                   */
2640                 if (trace)
2641                   {
2642                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2643                            "/** 0110 0001 1100 1000             sk%c1                                   */",
2644                            op[0], op[1]);
2645                   }
2646                 SYNTAX("sk%c1");
2647 #line 1065 "rl78-decode.opc"
2648                 ID(skip); COND(C);
2649
2650               }
2651             break;
2652           case 0xc9:
2653               {
2654                 /** 0110 0001 1100 1001         mov     %0, %e1%1                       */
2655                 if (trace)
2656                   {
2657                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2658                            "/** 0110 0001 1100 1001             mov     %0, %e1%1                       */",
2659                            op[0], op[1]);
2660                   }
2661                 SYNTAX("mov     %0, %e1%1");
2662 #line 639 "rl78-decode.opc"
2663                 ID(mov); DR(A); SM2(HL, B, 0);
2664
2665               }
2666             break;
2667           case 0xca:
2668           case 0xda:
2669           case 0xea:
2670           case 0xfa:
2671               {
2672                 /** 0110 0001 11rg 1010         call    %0                              */
2673 #line 409 "rl78-decode.opc"
2674                 int rg AU = (op[1] >> 4) & 0x03;
2675                 if (trace)
2676                   {
2677                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2678                            "/** 0110 0001 11rg 1010             call    %0                              */",
2679                            op[0], op[1]);
2680                     printf ("  rg = 0x%x\n", rg);
2681                   }
2682                 SYNTAX("call    %0");
2683 #line 409 "rl78-decode.opc"
2684                 ID(call); DRW(rg);
2685
2686               }
2687             break;
2688           case 0xcb:
2689               {
2690                 /** 0110 0001 1100 1011         br      ax                              */
2691                 if (trace)
2692                   {
2693                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2694                            "/** 0110 0001 1100 1011             br      ax                              */",
2695                            op[0], op[1]);
2696                   }
2697                 SYNTAX("br      ax");
2698 #line 359 "rl78-decode.opc"
2699                 ID(branch); DR(AX);
2700
2701               /*----------------------------------------------------------------------*/
2702
2703               }
2704             break;
2705           case 0xcc:
2706               {
2707                 /** 0110 0001 1100 1100         brk                                     */
2708                 if (trace)
2709                   {
2710                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2711                            "/** 0110 0001 1100 1100             brk                                     */",
2712                            op[0], op[1]);
2713                   }
2714                 SYNTAX("brk");
2715 #line 367 "rl78-decode.opc"
2716                 ID(break);
2717
2718               /*----------------------------------------------------------------------*/
2719
2720               }
2721             break;
2722           case 0xcd:
2723               {
2724                 /** 0110 0001 1100 1101         pop     %s0                             */
2725                 if (trace)
2726                   {
2727                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2728                            "/** 0110 0001 1100 1101             pop     %s0                             */",
2729                            op[0], op[1]);
2730                   }
2731                 SYNTAX("pop     %s0");
2732 #line 960 "rl78-decode.opc"
2733                 ID(mov); W(); DR(PSW); SPOP();
2734
2735               /*----------------------------------------------------------------------*/
2736
2737               }
2738             break;
2739           case 0xce:
2740               {
2741                 /** 0110 0001 1100 1110         movs    %e0%0, %1                       */
2742                 if (trace)
2743                   {
2744                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2745                            "/** 0110 0001 1100 1110             movs    %e0%0, %1                       */",
2746                            op[0], op[1]);
2747                   }
2748                 SYNTAX("movs    %e0%0, %1");
2749 #line 787 "rl78-decode.opc"
2750                 ID(mov); DM(HL, IMMU(1)); SR(X); Fzc;
2751
2752               /*----------------------------------------------------------------------*/
2753
2754               }
2755             break;
2756           case 0xcf:
2757           case 0xdf:
2758           case 0xef:
2759           case 0xff:
2760               {
2761                 /** 0110 0001 11rb 1111         sel     rb%1                            */
2762 #line 1012 "rl78-decode.opc"
2763                 int rb AU = (op[1] >> 4) & 0x03;
2764                 if (trace)
2765                   {
2766                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2767                            "/** 0110 0001 11rb 1111             sel     rb%1                            */",
2768                            op[0], op[1]);
2769                     printf ("  rb = 0x%x\n", rb);
2770                   }
2771                 SYNTAX("sel     rb%1");
2772 #line 1012 "rl78-decode.opc"
2773                 ID(sel); SC(rb);
2774
2775               /*----------------------------------------------------------------------*/
2776
2777               }
2778             break;
2779           case 0xd0:
2780               {
2781                 /** 0110 0001 1101 0000         and     %0, %e1%1                       */
2782                 if (trace)
2783                   {
2784                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2785                            "/** 0110 0001 1101 0000             and     %0, %e1%1                       */",
2786                            op[0], op[1]);
2787                   }
2788                 SYNTAX("and     %0, %e1%1");
2789 #line 270 "rl78-decode.opc"
2790                 ID(and); DR(A); SM2(HL, B, 0); Fz;
2791
2792               }
2793             break;
2794           case 0xd2:
2795               {
2796                 /** 0110 0001 1101 0010         and     %0, %e1%1                       */
2797                 if (trace)
2798                   {
2799                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2800                            "/** 0110 0001 1101 0010             and     %0, %e1%1                       */",
2801                            op[0], op[1]);
2802                   }
2803                 SYNTAX("and     %0, %e1%1");
2804 #line 276 "rl78-decode.opc"
2805                 ID(and); DR(A); SM2(HL, C, 0); Fz;
2806
2807               }
2808             break;
2809           case 0xd3:
2810               {
2811                 /** 0110 0001 1101 0011         bnh     $%a0                            */
2812                 if (trace)
2813                   {
2814                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2815                            "/** 0110 0001 1101 0011             bnh     $%a0                            */",
2816                            op[0], op[1]);
2817                   }
2818                 SYNTAX("bnh     $%a0");
2819 #line 322 "rl78-decode.opc"
2820                 ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH);
2821
2822               }
2823             break;
2824           case 0xd8:
2825               {
2826                 /** 0110 0001 1101 1000         sk%c1                                   */
2827                 if (trace)
2828                   {
2829                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2830                            "/** 0110 0001 1101 1000             sk%c1                                   */",
2831                            op[0], op[1]);
2832                   }
2833                 SYNTAX("sk%c1");
2834 #line 1071 "rl78-decode.opc"
2835                 ID(skip); COND(NC);
2836
2837               }
2838             break;
2839           case 0xd9:
2840               {
2841                 /** 0110 0001 1101 1001         mov     %e0%0, %1                       */
2842                 if (trace)
2843                   {
2844                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2845                            "/** 0110 0001 1101 1001             mov     %e0%0, %1                       */",
2846                            op[0], op[1]);
2847                   }
2848                 SYNTAX("mov     %e0%0, %1");
2849 #line 606 "rl78-decode.opc"
2850                 ID(mov); DM2(HL, B, 0); SR(A);
2851
2852               }
2853             break;
2854           case 0xdb:
2855               {
2856                 /** 0110 0001 1101 1011         ror     %0, %1                          */
2857                 if (trace)
2858                   {
2859                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2860                            "/** 0110 0001 1101 1011             ror     %0, %1                          */",
2861                            op[0], op[1]);
2862                   }
2863                 SYNTAX("ror     %0, %1");
2864 #line 993 "rl78-decode.opc"
2865                 ID(ror); DR(A); SC(1);
2866
2867               }
2868             break;
2869           case 0xdc:
2870               {
2871                 /** 0110 0001 1101 1100         rolc    %0, %1                          */
2872                 if (trace)
2873                   {
2874                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2875                            "/** 0110 0001 1101 1100             rolc    %0, %1                          */",
2876                            op[0], op[1]);
2877                   }
2878                 SYNTAX("rolc    %0, %1");
2879 #line 987 "rl78-decode.opc"
2880                 ID(rolc); DR(A); SC(1);
2881
2882               }
2883             break;
2884           case 0xdd:
2885               {
2886                 /** 0110 0001 1101 1101         push    %s1                             */
2887                 if (trace)
2888                   {
2889                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2890                            "/** 0110 0001 1101 1101             push    %s1                             */",
2891                            op[0], op[1]);
2892                   }
2893                 SYNTAX("push    %s1");
2894 #line 968 "rl78-decode.opc"
2895                 ID(mov); W(); DPUSH(); SR(PSW);
2896
2897               /*----------------------------------------------------------------------*/
2898
2899               }
2900             break;
2901           case 0xde:
2902               {
2903                 /** 0110 0001 1101 1110         cmps    %0, %e1%1                       */
2904                 if (trace)
2905                   {
2906                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2907                            "/** 0110 0001 1101 1110             cmps    %0, %e1%1                       */",
2908                            op[0], op[1]);
2909                   }
2910                 SYNTAX("cmps    %0, %e1%1");
2911 #line 505 "rl78-decode.opc"
2912                 ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac;
2913
2914               /*----------------------------------------------------------------------*/
2915
2916               }
2917             break;
2918           case 0xe0:
2919               {
2920                 /** 0110 0001 1110 0000         or      %0, %e1%1                       */
2921                 if (trace)
2922                   {
2923                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2924                            "/** 0110 0001 1110 0000             or      %0, %e1%1                       */",
2925                            op[0], op[1]);
2926                   }
2927                 SYNTAX("or      %0, %e1%1");
2928 #line 917 "rl78-decode.opc"
2929                 ID(or); DR(A); SM2(HL, B, 0); Fz;
2930
2931               }
2932             break;
2933           case 0xe2:
2934               {
2935                 /** 0110 0001 1110 0010         or      %0, %e1%1                       */
2936                 if (trace)
2937                   {
2938                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2939                            "/** 0110 0001 1110 0010             or      %0, %e1%1                       */",
2940                            op[0], op[1]);
2941                   }
2942                 SYNTAX("or      %0, %e1%1");
2943 #line 923 "rl78-decode.opc"
2944                 ID(or); DR(A); SM2(HL, C, 0); Fz;
2945
2946               }
2947             break;
2948           case 0xe3:
2949               {
2950                 /** 0110 0001 1110 0011         sk%c1                                   */
2951                 if (trace)
2952                   {
2953                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2954                            "/** 0110 0001 1110 0011             sk%c1                                   */",
2955                            op[0], op[1]);
2956                   }
2957                 SYNTAX("sk%c1");
2958 #line 1068 "rl78-decode.opc"
2959                 ID(skip); COND(H);
2960
2961               }
2962             break;
2963           case 0xe8:
2964               {
2965                 /** 0110 0001 1110 1000         sk%c1                                   */
2966                 if (trace)
2967                   {
2968                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2969                            "/** 0110 0001 1110 1000             sk%c1                                   */",
2970                            op[0], op[1]);
2971                   }
2972                 SYNTAX("sk%c1");
2973 #line 1080 "rl78-decode.opc"
2974                 ID(skip); COND(Z);
2975
2976               /*----------------------------------------------------------------------*/
2977
2978               }
2979             break;
2980           case 0xe9:
2981               {
2982                 /** 0110 0001 1110 1001         mov     %0, %e1%1                       */
2983                 if (trace)
2984                   {
2985                     printf ("\033[33m%s\033[0m  %02x %02x\n",
2986                            "/** 0110 0001 1110 1001             mov     %0, %e1%1                       */",
2987                            op[0], op[1]);
2988                   }
2989                 SYNTAX("mov     %0, %e1%1");
2990 #line 642 "rl78-decode.opc"
2991                 ID(mov); DR(A); SM2(HL, C, 0);
2992
2993               }
2994             break;
2995           case 0xeb:
2996               {
2997                 /** 0110 0001 1110 1011         rol     %0, %1                          */
2998                 if (trace)
2999                   {
3000                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3001                            "/** 0110 0001 1110 1011             rol     %0, %1                          */",
3002                            op[0], op[1]);
3003                   }
3004                 SYNTAX("rol     %0, %1");
3005 #line 984 "rl78-decode.opc"
3006                 ID(rol); DR(A); SC(1);
3007
3008               }
3009             break;
3010           case 0xec:
3011               {
3012                 /** 0110 0001 1110 1100         retb                                    */
3013                 if (trace)
3014                   {
3015                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3016                            "/** 0110 0001 1110 1100             retb                                    */",
3017                            op[0], op[1]);
3018                   }
3019                 SYNTAX("retb");
3020 #line 979 "rl78-decode.opc"
3021                 ID(reti);
3022
3023               /*----------------------------------------------------------------------*/
3024
3025               }
3026             break;
3027           case 0xed:
3028               {
3029                 /** 0110 0001 1110 1101         halt                                    */
3030                 if (trace)
3031                   {
3032                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3033                            "/** 0110 0001 1110 1101             halt                                    */",
3034                            op[0], op[1]);
3035                   }
3036                 SYNTAX("halt");
3037 #line 555 "rl78-decode.opc"
3038                 ID(halt);
3039
3040               /*----------------------------------------------------------------------*/
3041
3042               }
3043             break;
3044           case 0xee:
3045           case 0xfe:
3046               {
3047                 /** 0110 0001 111r 1110         rolwc   %0, %1                          */
3048 #line 990 "rl78-decode.opc"
3049                 int r AU = (op[1] >> 4) & 0x01;
3050                 if (trace)
3051                   {
3052                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3053                            "/** 0110 0001 111r 1110             rolwc   %0, %1                          */",
3054                            op[0], op[1]);
3055                     printf ("  r = 0x%x\n", r);
3056                   }
3057                 SYNTAX("rolwc   %0, %1");
3058 #line 990 "rl78-decode.opc"
3059                 ID(rolc); W(); DRW(r); SC(1);
3060
3061               }
3062             break;
3063           case 0xf0:
3064               {
3065                 /** 0110 0001 1111 0000         xor     %0, %e1%1                       */
3066                 if (trace)
3067                   {
3068                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3069                            "/** 0110 0001 1111 0000             xor     %0, %e1%1                       */",
3070                            op[0], op[1]);
3071                   }
3072                 SYNTAX("xor     %0, %e1%1");
3073 #line 1221 "rl78-decode.opc"
3074                 ID(xor); DR(A); SM2(HL, B, 0); Fz;
3075
3076               }
3077             break;
3078           case 0xf2:
3079               {
3080                 /** 0110 0001 1111 0010         xor     %0, %e1%1                       */
3081                 if (trace)
3082                   {
3083                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3084                            "/** 0110 0001 1111 0010             xor     %0, %e1%1                       */",
3085                            op[0], op[1]);
3086                   }
3087                 SYNTAX("xor     %0, %e1%1");
3088 #line 1227 "rl78-decode.opc"
3089                 ID(xor); DR(A); SM2(HL, C, 0); Fz;
3090
3091               }
3092             break;
3093           case 0xf3:
3094               {
3095                 /** 0110 0001 1111 0011         sk%c1                                   */
3096                 if (trace)
3097                   {
3098                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3099                            "/** 0110 0001 1111 0011             sk%c1                                   */",
3100                            op[0], op[1]);
3101                   }
3102                 SYNTAX("sk%c1");
3103 #line 1074 "rl78-decode.opc"
3104                 ID(skip); COND(NH);
3105
3106               }
3107             break;
3108           case 0xf8:
3109               {
3110                 /** 0110 0001 1111 1000         sk%c1                                   */
3111                 if (trace)
3112                   {
3113                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3114                            "/** 0110 0001 1111 1000             sk%c1                                   */",
3115                            op[0], op[1]);
3116                   }
3117                 SYNTAX("sk%c1");
3118 #line 1077 "rl78-decode.opc"
3119                 ID(skip); COND(NZ);
3120
3121               }
3122             break;
3123           case 0xf9:
3124               {
3125                 /** 0110 0001 1111 1001         mov     %e0%0, %1                       */
3126                 if (trace)
3127                   {
3128                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3129                            "/** 0110 0001 1111 1001             mov     %e0%0, %1                       */",
3130                            op[0], op[1]);
3131                   }
3132                 SYNTAX("mov     %e0%0, %1");
3133 #line 615 "rl78-decode.opc"
3134                 ID(mov); DM2(HL, C, 0); SR(A);
3135
3136               }
3137             break;
3138           case 0xfb:
3139               {
3140                 /** 0110 0001 1111 1011         rorc    %0, %1                          */
3141                 if (trace)
3142                   {
3143                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3144                            "/** 0110 0001 1111 1011             rorc    %0, %1                          */",
3145                            op[0], op[1]);
3146                   }
3147                 SYNTAX("rorc    %0, %1");
3148 #line 996 "rl78-decode.opc"
3149                 ID(rorc); DR(A); SC(1);
3150
3151               /*----------------------------------------------------------------------*/
3152
3153               /* Note that the branch insns need to be listed before the shift
3154                  ones, as "shift count of zero" means "branch insn" */
3155
3156               }
3157             break;
3158           case 0xfc:
3159               {
3160                 /** 0110 0001 1111 1100         reti                                    */
3161                 if (trace)
3162                   {
3163                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3164                            "/** 0110 0001 1111 1100             reti                                    */",
3165                            op[0], op[1]);
3166                   }
3167                 SYNTAX("reti");
3168 #line 976 "rl78-decode.opc"
3169                 ID(reti);
3170
3171               }
3172             break;
3173           case 0xfd:
3174               {
3175                 /** 0110 0001 1111 1101 stop                                    */
3176                 if (trace)
3177                   {
3178                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3179                            "/** 0110 0001 1111 1101     stop                                    */",
3180                            op[0], op[1]);
3181                   }
3182                 SYNTAX("stop");
3183 #line 1085 "rl78-decode.opc"
3184                 ID(stop);
3185
3186               /*----------------------------------------------------------------------*/
3187
3188               }
3189             break;
3190           default: UNSUPPORTED(); break;
3191         }
3192       break;
3193     case 0x68:
3194         {
3195           /** 0110 1000                 movw    %e0%0, %1                       */
3196           if (trace)
3197             {
3198               printf ("\033[33m%s\033[0m  %02x\n",
3199                      "/** 0110 1000                     movw    %e0%0, %1                       */",
3200                      op[0]);
3201             }
3202           SYNTAX("movw  %e0%0, %1");
3203 #line 850 "rl78-decode.opc"
3204           ID(mov); W(); DM(C, IMMU(2)); SR(AX);
3205
3206         }
3207       break;
3208     case 0x69:
3209         {
3210           /** 0110 1001                 movw    %0, %e1%1                       */
3211           if (trace)
3212             {
3213               printf ("\033[33m%s\033[0m  %02x\n",
3214                      "/** 0110 1001                     movw    %0, %e1%1                       */",
3215                      op[0]);
3216             }
3217           SYNTAX("movw  %0, %e1%1");
3218 #line 841 "rl78-decode.opc"
3219           ID(mov); W(); DR(AX); SM(C, IMMU(2));
3220
3221         }
3222       break;
3223     case 0x6a:
3224         {
3225           /** 0110 1010                 or      %0, #%1                         */
3226           if (trace)
3227             {
3228               printf ("\033[33m%s\033[0m  %02x\n",
3229                      "/** 0110 1010                     or      %0, #%1                         */",
3230                      op[0]);
3231             }
3232           SYNTAX("or    %0, #%1");
3233 #line 938 "rl78-decode.opc"
3234           ID(or); DM(None, SADDR); SC(IMMU(1)); Fz;
3235
3236         /*----------------------------------------------------------------------*/
3237
3238         }
3239       break;
3240     case 0x6b:
3241         {
3242           /** 0110 1011                 or      %0, %1                          */
3243           if (trace)
3244             {
3245               printf ("\033[33m%s\033[0m  %02x\n",
3246                      "/** 0110 1011                     or      %0, %1                          */",
3247                      op[0]);
3248             }
3249           SYNTAX("or    %0, %1");
3250 #line 935 "rl78-decode.opc"
3251           ID(or); DR(A); SM(None, SADDR); Fz;
3252
3253         }
3254       break;
3255     case 0x6c:
3256         {
3257           /** 0110 1100                 or      %0, #%1                         */
3258           if (trace)
3259             {
3260               printf ("\033[33m%s\033[0m  %02x\n",
3261                      "/** 0110 1100                     or      %0, #%1                         */",
3262                      op[0]);
3263             }
3264           SYNTAX("or    %0, #%1");
3265 #line 926 "rl78-decode.opc"
3266           ID(or); DR(A); SC(IMMU(1)); Fz;
3267
3268         }
3269       break;
3270     case 0x6d:
3271         {
3272           /** 0110 1101                 or      %0, %e1%1                       */
3273           if (trace)
3274             {
3275               printf ("\033[33m%s\033[0m  %02x\n",
3276                      "/** 0110 1101                     or      %0, %e1%1                       */",
3277                      op[0]);
3278             }
3279           SYNTAX("or    %0, %e1%1");
3280 #line 914 "rl78-decode.opc"
3281           ID(or); DR(A); SM(HL, 0); Fz;
3282
3283         }
3284       break;
3285     case 0x6e:
3286         {
3287           /** 0110 1110                 or      %0, %e1%1                       */
3288           if (trace)
3289             {
3290               printf ("\033[33m%s\033[0m  %02x\n",
3291                      "/** 0110 1110                     or      %0, %e1%1                       */",
3292                      op[0]);
3293             }
3294           SYNTAX("or    %0, %e1%1");
3295 #line 920 "rl78-decode.opc"
3296           ID(or); DR(A); SM(HL, IMMU(1)); Fz;
3297
3298         }
3299       break;
3300     case 0x6f:
3301         {
3302           /** 0110 1111                 or      %0, %e1%!1                      */
3303           if (trace)
3304             {
3305               printf ("\033[33m%s\033[0m  %02x\n",
3306                      "/** 0110 1111                     or      %0, %e1%!1                      */",
3307                      op[0]);
3308             }
3309           SYNTAX("or    %0, %e1%!1");
3310 #line 911 "rl78-decode.opc"
3311           ID(or); DR(A); SM(None, IMMU(2)); Fz;
3312
3313         }
3314       break;
3315     case 0x70:
3316     case 0x72:
3317     case 0x73:
3318     case 0x74:
3319     case 0x75:
3320     case 0x76:
3321     case 0x77:
3322         {
3323           /** 0111 0rba                 mov     %0, %1                          */
3324 #line 675 "rl78-decode.opc"
3325           int rba AU = op[0] & 0x07;
3326           if (trace)
3327             {
3328               printf ("\033[33m%s\033[0m  %02x\n",
3329                      "/** 0111 0rba                     mov     %0, %1                          */",
3330                      op[0]);
3331               printf ("  rba = 0x%x\n", rba);
3332             }
3333           SYNTAX("mov   %0, %1");
3334 #line 675 "rl78-decode.opc"
3335           ID(mov); DRB(rba); SR(A);
3336
3337         }
3338       break;
3339     case 0x71:
3340         GETBYTE ();
3341         switch (op[1] & 0xff)
3342         {
3343           case 0x00:
3344           case 0x10:
3345           case 0x20:
3346           case 0x30:
3347           case 0x40:
3348           case 0x50:
3349           case 0x60:
3350           case 0x70:
3351               {
3352                 /** 0111 0001 0bit 0000         set1    %e0%!0                          */
3353 #line 1017 "rl78-decode.opc"
3354                 int bit AU = (op[1] >> 4) & 0x07;
3355                 if (trace)
3356                   {
3357                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3358                            "/** 0111 0001 0bit 0000             set1    %e0%!0                          */",
3359                            op[0], op[1]);
3360                     printf ("  bit = 0x%x\n", bit);
3361                   }
3362                 SYNTAX("set1    %e0%!0");
3363 #line 1017 "rl78-decode.opc"
3364                 ID(mov); DM(None, IMMU(2)); DB(bit); SC(1);
3365
3366               }
3367             break;
3368           case 0x01:
3369           case 0x11:
3370           case 0x21:
3371           case 0x31:
3372           case 0x41:
3373           case 0x51:
3374           case 0x61:
3375           case 0x71:
3376               {
3377                 /** 0111 0001 0bit 0001         mov1    %0, cy                          */
3378 #line 779 "rl78-decode.opc"
3379                 int bit AU = (op[1] >> 4) & 0x07;
3380                 if (trace)
3381                   {
3382                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3383                            "/** 0111 0001 0bit 0001             mov1    %0, cy                          */",
3384                            op[0], op[1]);
3385                     printf ("  bit = 0x%x\n", bit);
3386                   }
3387                 SYNTAX("mov1    %0, cy");
3388 #line 779 "rl78-decode.opc"
3389                 ID(mov); DM(None, SADDR); DB(bit); SCY();
3390
3391               }
3392             break;
3393           case 0x02:
3394           case 0x12:
3395           case 0x22:
3396           case 0x32:
3397           case 0x42:
3398           case 0x52:
3399           case 0x62:
3400           case 0x72:
3401               {
3402                 /** 0111 0001 0bit 0010         set1    %0                              */
3403 #line 1035 "rl78-decode.opc"
3404                 int bit AU = (op[1] >> 4) & 0x07;
3405                 if (trace)
3406                   {
3407                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3408                            "/** 0111 0001 0bit 0010             set1    %0                              */",
3409                            op[0], op[1]);
3410                     printf ("  bit = 0x%x\n", bit);
3411                   }
3412                 SYNTAX("set1    %0");
3413 #line 1035 "rl78-decode.opc"
3414                 ID(mov); DM(None, SADDR); DB(bit); SC(1);
3415
3416               /*----------------------------------------------------------------------*/
3417
3418               }
3419             break;
3420           case 0x03:
3421           case 0x13:
3422           case 0x23:
3423           case 0x33:
3424           case 0x43:
3425           case 0x53:
3426           case 0x63:
3427           case 0x73:
3428               {
3429                 /** 0111 0001 0bit 0011         clr1    %0                              */
3430 #line 435 "rl78-decode.opc"
3431                 int bit AU = (op[1] >> 4) & 0x07;
3432                 if (trace)
3433                   {
3434                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3435                            "/** 0111 0001 0bit 0011             clr1    %0                              */",
3436                            op[0], op[1]);
3437                     printf ("  bit = 0x%x\n", bit);
3438                   }
3439                 SYNTAX("clr1    %0");
3440 #line 435 "rl78-decode.opc"
3441                 ID(mov); DM(None, SADDR); DB(bit); SC(0);
3442
3443               /*----------------------------------------------------------------------*/
3444
3445               }
3446             break;
3447           case 0x04:
3448           case 0x14:
3449           case 0x24:
3450           case 0x34:
3451           case 0x44:
3452           case 0x54:
3453           case 0x64:
3454           case 0x74:
3455               {
3456                 /** 0111 0001 0bit 0100         mov1    cy, %1                          */
3457 #line 773 "rl78-decode.opc"
3458                 int bit AU = (op[1] >> 4) & 0x07;
3459                 if (trace)
3460                   {
3461                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3462                            "/** 0111 0001 0bit 0100             mov1    cy, %1                          */",
3463                            op[0], op[1]);
3464                     printf ("  bit = 0x%x\n", bit);
3465                   }
3466                 SYNTAX("mov1    cy, %1");
3467 #line 773 "rl78-decode.opc"
3468                 ID(mov); DCY(); SM(None, SADDR); SB(bit);
3469
3470               }
3471             break;
3472           case 0x05:
3473           case 0x15:
3474           case 0x25:
3475           case 0x35:
3476           case 0x45:
3477           case 0x55:
3478           case 0x65:
3479           case 0x75:
3480               {
3481                 /** 0111 0001 0bit 0101         and1    cy, %s1                         */
3482 #line 305 "rl78-decode.opc"
3483                 int bit AU = (op[1] >> 4) & 0x07;
3484                 if (trace)
3485                   {
3486                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3487                            "/** 0111 0001 0bit 0101             and1    cy, %s1                         */",
3488                            op[0], op[1]);
3489                     printf ("  bit = 0x%x\n", bit);
3490                   }
3491                 SYNTAX("and1    cy, %s1");
3492 #line 305 "rl78-decode.opc"
3493                 ID(and); DCY(); SM(None, SADDR); SB(bit);
3494
3495               /*----------------------------------------------------------------------*/
3496
3497               /* Note that the branch insns need to be listed before the shift
3498                  ones, as "shift count of zero" means "branch insn" */
3499
3500               }
3501             break;
3502           case 0x06:
3503           case 0x16:
3504           case 0x26:
3505           case 0x36:
3506           case 0x46:
3507           case 0x56:
3508           case 0x66:
3509           case 0x76:
3510               {
3511                 /** 0111 0001 0bit 0110         or1     cy, %s1                         */
3512 #line 952 "rl78-decode.opc"
3513                 int bit AU = (op[1] >> 4) & 0x07;
3514                 if (trace)
3515                   {
3516                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3517                            "/** 0111 0001 0bit 0110             or1     cy, %s1                         */",
3518                            op[0], op[1]);
3519                     printf ("  bit = 0x%x\n", bit);
3520                   }
3521                 SYNTAX("or1     cy, %s1");
3522 #line 952 "rl78-decode.opc"
3523                 ID(or); DCY(); SM(None, SADDR); SB(bit);
3524
3525               /*----------------------------------------------------------------------*/
3526
3527               }
3528             break;
3529           case 0x07:
3530           case 0x17:
3531           case 0x27:
3532           case 0x37:
3533           case 0x47:
3534           case 0x57:
3535           case 0x67:
3536           case 0x77:
3537               {
3538                 /** 0111 0001 0bit 0111         xor1    cy, %s1                         */
3539 #line 1256 "rl78-decode.opc"
3540                 int bit AU = (op[1] >> 4) & 0x07;
3541                 if (trace)
3542                   {
3543                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3544                            "/** 0111 0001 0bit 0111             xor1    cy, %s1                         */",
3545                            op[0], op[1]);
3546                     printf ("  bit = 0x%x\n", bit);
3547                   }
3548                 SYNTAX("xor1    cy, %s1");
3549 #line 1256 "rl78-decode.opc"
3550                 ID(xor); DCY(); SM(None, SADDR); SB(bit);
3551
3552               /*----------------------------------------------------------------------*/
3553
3554               }
3555             break;
3556           case 0x08:
3557           case 0x18:
3558           case 0x28:
3559           case 0x38:
3560           case 0x48:
3561           case 0x58:
3562           case 0x68:
3563           case 0x78:
3564               {
3565                 /** 0111 0001 0bit 1000         clr1    %e0%!0                          */
3566 #line 417 "rl78-decode.opc"
3567                 int bit AU = (op[1] >> 4) & 0x07;
3568                 if (trace)
3569                   {
3570                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3571                            "/** 0111 0001 0bit 1000             clr1    %e0%!0                          */",
3572                            op[0], op[1]);
3573                     printf ("  bit = 0x%x\n", bit);
3574                   }
3575                 SYNTAX("clr1    %e0%!0");
3576 #line 417 "rl78-decode.opc"
3577                 ID(mov); DM(None, IMMU(2)); DB(bit); SC(0);
3578
3579               }
3580             break;
3581           case 0x09:
3582           case 0x19:
3583           case 0x29:
3584           case 0x39:
3585           case 0x49:
3586           case 0x59:
3587           case 0x69:
3588           case 0x79:
3589               {
3590                 /** 0111 0001 0bit 1001         mov1    %s0, cy                         */
3591 #line 782 "rl78-decode.opc"
3592                 int bit AU = (op[1] >> 4) & 0x07;
3593                 if (trace)
3594                   {
3595                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3596                            "/** 0111 0001 0bit 1001             mov1    %s0, cy                         */",
3597                            op[0], op[1]);
3598                     printf ("  bit = 0x%x\n", bit);
3599                   }
3600                 SYNTAX("mov1    %s0, cy");
3601 #line 782 "rl78-decode.opc"
3602                 ID(mov); DM(None, SFR); DB(bit); SCY();
3603
3604               /*----------------------------------------------------------------------*/
3605
3606               }
3607             break;
3608           case 0x0a:
3609           case 0x1a:
3610           case 0x2a:
3611           case 0x3a:
3612           case 0x4a:
3613           case 0x5a:
3614           case 0x6a:
3615           case 0x7a:
3616               {
3617                 /** 0111 0001 0bit 1010         set1    %s0                             */
3618 #line 1029 "rl78-decode.opc"
3619                 int bit AU = (op[1] >> 4) & 0x07;
3620                 if (trace)
3621                   {
3622                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3623                            "/** 0111 0001 0bit 1010             set1    %s0                             */",
3624                            op[0], op[1]);
3625                     printf ("  bit = 0x%x\n", bit);
3626                   }
3627                 SYNTAX("set1    %s0");
3628 #line 1029 "rl78-decode.opc"
3629                 op0 = SFR;
3630                 ID(mov); DM(None, op0); DB(bit); SC(1);
3631                 if (op0 == RL78_SFR_PSW && bit == 7)
3632                   rl78->syntax = "ei";
3633
3634               }
3635             break;
3636           case 0x0b:
3637           case 0x1b:
3638           case 0x2b:
3639           case 0x3b:
3640           case 0x4b:
3641           case 0x5b:
3642           case 0x6b:
3643           case 0x7b:
3644               {
3645                 /** 0111 0001 0bit 1011         clr1    %s0                             */
3646 #line 429 "rl78-decode.opc"
3647                 int bit AU = (op[1] >> 4) & 0x07;
3648                 if (trace)
3649                   {
3650                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3651                            "/** 0111 0001 0bit 1011             clr1    %s0                             */",
3652                            op[0], op[1]);
3653                     printf ("  bit = 0x%x\n", bit);
3654                   }
3655                 SYNTAX("clr1    %s0");
3656 #line 429 "rl78-decode.opc"
3657                 op0 = SFR;
3658                 ID(mov); DM(None, op0); DB(bit); SC(0);
3659                 if (op0 == RL78_SFR_PSW && bit == 7)
3660                   rl78->syntax = "di";
3661
3662               }
3663             break;
3664           case 0x0c:
3665           case 0x1c:
3666           case 0x2c:
3667           case 0x3c:
3668           case 0x4c:
3669           case 0x5c:
3670           case 0x6c:
3671           case 0x7c:
3672               {
3673                 /** 0111 0001 0bit 1100         mov1    cy, %s1                         */
3674 #line 776 "rl78-decode.opc"
3675                 int bit AU = (op[1] >> 4) & 0x07;
3676                 if (trace)
3677                   {
3678                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3679                            "/** 0111 0001 0bit 1100             mov1    cy, %s1                         */",
3680                            op[0], op[1]);
3681                     printf ("  bit = 0x%x\n", bit);
3682                   }
3683                 SYNTAX("mov1    cy, %s1");
3684 #line 776 "rl78-decode.opc"
3685                 ID(mov); DCY(); SM(None, SFR); SB(bit);
3686
3687               }
3688             break;
3689           case 0x0d:
3690           case 0x1d:
3691           case 0x2d:
3692           case 0x3d:
3693           case 0x4d:
3694           case 0x5d:
3695           case 0x6d:
3696           case 0x7d:
3697               {
3698                 /** 0111 0001 0bit 1101         and1    cy, %s1                         */
3699 #line 302 "rl78-decode.opc"
3700                 int bit AU = (op[1] >> 4) & 0x07;
3701                 if (trace)
3702                   {
3703                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3704                            "/** 0111 0001 0bit 1101             and1    cy, %s1                         */",
3705                            op[0], op[1]);
3706                     printf ("  bit = 0x%x\n", bit);
3707                   }
3708                 SYNTAX("and1    cy, %s1");
3709 #line 302 "rl78-decode.opc"
3710                 ID(and); DCY(); SM(None, SFR); SB(bit);
3711
3712               }
3713             break;
3714           case 0x0e:
3715           case 0x1e:
3716           case 0x2e:
3717           case 0x3e:
3718           case 0x4e:
3719           case 0x5e:
3720           case 0x6e:
3721           case 0x7e:
3722               {
3723                 /** 0111 0001 0bit 1110         or1     cy, %s1                         */
3724 #line 949 "rl78-decode.opc"
3725                 int bit AU = (op[1] >> 4) & 0x07;
3726                 if (trace)
3727                   {
3728                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3729                            "/** 0111 0001 0bit 1110             or1     cy, %s1                         */",
3730                            op[0], op[1]);
3731                     printf ("  bit = 0x%x\n", bit);
3732                   }
3733                 SYNTAX("or1     cy, %s1");
3734 #line 949 "rl78-decode.opc"
3735                 ID(or); DCY(); SM(None, SFR); SB(bit);
3736
3737               }
3738             break;
3739           case 0x0f:
3740           case 0x1f:
3741           case 0x2f:
3742           case 0x3f:
3743           case 0x4f:
3744           case 0x5f:
3745           case 0x6f:
3746           case 0x7f:
3747               {
3748                 /** 0111 0001 0bit 1111         xor1    cy, %s1                         */
3749 #line 1253 "rl78-decode.opc"
3750                 int bit AU = (op[1] >> 4) & 0x07;
3751                 if (trace)
3752                   {
3753                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3754                            "/** 0111 0001 0bit 1111             xor1    cy, %s1                         */",
3755                            op[0], op[1]);
3756                     printf ("  bit = 0x%x\n", bit);
3757                   }
3758                 SYNTAX("xor1    cy, %s1");
3759 #line 1253 "rl78-decode.opc"
3760                 ID(xor); DCY(); SM(None, SFR); SB(bit);
3761
3762               }
3763             break;
3764           case 0x80:
3765               {
3766                 /** 0111 0001 1000 0000         set1    cy                              */
3767                 if (trace)
3768                   {
3769                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3770                            "/** 0111 0001 1000 0000             set1    cy                              */",
3771                            op[0], op[1]);
3772                   }
3773                 SYNTAX("set1    cy");
3774 #line 1026 "rl78-decode.opc"
3775                 ID(mov); DCY(); SC(1);
3776
3777               }
3778             break;
3779           case 0x81:
3780           case 0x91:
3781           case 0xa1:
3782           case 0xb1:
3783           case 0xc1:
3784           case 0xd1:
3785           case 0xe1:
3786           case 0xf1:
3787               {
3788                 /** 0111 0001 1bit 0001         mov1    %e0%0, cy                       */
3789 #line 761 "rl78-decode.opc"
3790                 int bit AU = (op[1] >> 4) & 0x07;
3791                 if (trace)
3792                   {
3793                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3794                            "/** 0111 0001 1bit 0001             mov1    %e0%0, cy                       */",
3795                            op[0], op[1]);
3796                     printf ("  bit = 0x%x\n", bit);
3797                   }
3798                 SYNTAX("mov1    %e0%0, cy");
3799 #line 761 "rl78-decode.opc"
3800                 ID(mov); DM(HL, 0); DB(bit); SCY();
3801
3802               }
3803             break;
3804           case 0x82:
3805           case 0x92:
3806           case 0xa2:
3807           case 0xb2:
3808           case 0xc2:
3809           case 0xd2:
3810           case 0xe2:
3811           case 0xf2:
3812               {
3813                 /** 0111 0001 1bit 0010         set1    %e0%0                           */
3814 #line 1020 "rl78-decode.opc"
3815                 int bit AU = (op[1] >> 4) & 0x07;
3816                 if (trace)
3817                   {
3818                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3819                            "/** 0111 0001 1bit 0010             set1    %e0%0                           */",
3820                            op[0], op[1]);
3821                     printf ("  bit = 0x%x\n", bit);
3822                   }
3823                 SYNTAX("set1    %e0%0");
3824 #line 1020 "rl78-decode.opc"
3825                 ID(mov); DM(HL, 0); DB(bit); SC(1);
3826
3827               }
3828             break;
3829           case 0x83:
3830           case 0x93:
3831           case 0xa3:
3832           case 0xb3:
3833           case 0xc3:
3834           case 0xd3:
3835           case 0xe3:
3836           case 0xf3:
3837               {
3838                 /** 0111 0001 1bit 0011         clr1    %e0%0                           */
3839 #line 420 "rl78-decode.opc"
3840                 int bit AU = (op[1] >> 4) & 0x07;
3841                 if (trace)
3842                   {
3843                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3844                            "/** 0111 0001 1bit 0011             clr1    %e0%0                           */",
3845                            op[0], op[1]);
3846                     printf ("  bit = 0x%x\n", bit);
3847                   }
3848                 SYNTAX("clr1    %e0%0");
3849 #line 420 "rl78-decode.opc"
3850                 ID(mov); DM(HL, 0); DB(bit); SC(0);
3851
3852               }
3853             break;
3854           case 0x84:
3855           case 0x94:
3856           case 0xa4:
3857           case 0xb4:
3858           case 0xc4:
3859           case 0xd4:
3860           case 0xe4:
3861           case 0xf4:
3862               {
3863                 /** 0111 0001 1bit 0100         mov1    cy, %e1%1                       */
3864 #line 767 "rl78-decode.opc"
3865                 int bit AU = (op[1] >> 4) & 0x07;
3866                 if (trace)
3867                   {
3868                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3869                            "/** 0111 0001 1bit 0100             mov1    cy, %e1%1                       */",
3870                            op[0], op[1]);
3871                     printf ("  bit = 0x%x\n", bit);
3872                   }
3873                 SYNTAX("mov1    cy, %e1%1");
3874 #line 767 "rl78-decode.opc"
3875                 ID(mov); DCY(); SM(HL, 0); SB(bit);
3876
3877               }
3878             break;
3879           case 0x85:
3880           case 0x95:
3881           case 0xa5:
3882           case 0xb5:
3883           case 0xc5:
3884           case 0xd5:
3885           case 0xe5:
3886           case 0xf5:
3887               {
3888                 /** 0111 0001 1bit 0101         and1    cy, %e1%1                       */
3889 #line 296 "rl78-decode.opc"
3890                 int bit AU = (op[1] >> 4) & 0x07;
3891                 if (trace)
3892                   {
3893                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3894                            "/** 0111 0001 1bit 0101             and1    cy, %e1%1                       */",
3895                            op[0], op[1]);
3896                     printf ("  bit = 0x%x\n", bit);
3897                   }
3898                 SYNTAX("and1    cy, %e1%1");
3899 #line 296 "rl78-decode.opc"
3900                 ID(and); DCY(); SM(HL, 0); SB(bit);
3901
3902               }
3903             break;
3904           case 0x86:
3905           case 0x96:
3906           case 0xa6:
3907           case 0xb6:
3908           case 0xc6:
3909           case 0xd6:
3910           case 0xe6:
3911           case 0xf6:
3912               {
3913                 /** 0111 0001 1bit 0110         or1     cy, %e1%1                       */
3914 #line 943 "rl78-decode.opc"
3915                 int bit AU = (op[1] >> 4) & 0x07;
3916                 if (trace)
3917                   {
3918                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3919                            "/** 0111 0001 1bit 0110             or1     cy, %e1%1                       */",
3920                            op[0], op[1]);
3921                     printf ("  bit = 0x%x\n", bit);
3922                   }
3923                 SYNTAX("or1     cy, %e1%1");
3924 #line 943 "rl78-decode.opc"
3925                 ID(or); DCY(); SM(HL, 0); SB(bit);
3926
3927               }
3928             break;
3929           case 0x87:
3930           case 0x97:
3931           case 0xa7:
3932           case 0xb7:
3933           case 0xc7:
3934           case 0xd7:
3935           case 0xe7:
3936           case 0xf7:
3937               {
3938                 /** 0111 0001 1bit 0111         xor1    cy, %e1%1                       */
3939 #line 1247 "rl78-decode.opc"
3940                 int bit AU = (op[1] >> 4) & 0x07;
3941                 if (trace)
3942                   {
3943                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3944                            "/** 0111 0001 1bit 0111             xor1    cy, %e1%1                       */",
3945                            op[0], op[1]);
3946                     printf ("  bit = 0x%x\n", bit);
3947                   }
3948                 SYNTAX("xor1    cy, %e1%1");
3949 #line 1247 "rl78-decode.opc"
3950                 ID(xor); DCY(); SM(HL, 0); SB(bit);
3951
3952               }
3953             break;
3954           case 0x88:
3955               {
3956                 /** 0111 0001 1000 1000         clr1    cy                              */
3957                 if (trace)
3958                   {
3959                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3960                            "/** 0111 0001 1000 1000             clr1    cy                              */",
3961                            op[0], op[1]);
3962                   }
3963                 SYNTAX("clr1    cy");
3964 #line 426 "rl78-decode.opc"
3965                 ID(mov); DCY(); SC(0);
3966
3967               }
3968             break;
3969           case 0x89:
3970           case 0x99:
3971           case 0xa9:
3972           case 0xb9:
3973           case 0xc9:
3974           case 0xd9:
3975           case 0xe9:
3976           case 0xf9:
3977               {
3978                 /** 0111 0001 1bit 1001         mov1    %e0%0, cy                       */
3979 #line 764 "rl78-decode.opc"
3980                 int bit AU = (op[1] >> 4) & 0x07;
3981                 if (trace)
3982                   {
3983                     printf ("\033[33m%s\033[0m  %02x %02x\n",
3984                            "/** 0111 0001 1bit 1001             mov1    %e0%0, cy                       */",
3985                            op[0], op[1]);
3986                     printf ("  bit = 0x%x\n", bit);
3987                   }
3988                 SYNTAX("mov1    %e0%0, cy");
3989 #line 764 "rl78-decode.opc"
3990                 ID(mov); DR(A); DB(bit); SCY();
3991
3992               }
3993             break;
3994           case 0x8a:
3995           case 0x9a:
3996           case 0xaa:
3997           case 0xba:
3998           case 0xca:
3999           case 0xda:
4000           case 0xea:
4001           case 0xfa:
4002               {
4003                 /** 0111 0001 1bit 1010         set1    %0                              */
4004 #line 1023 "rl78-decode.opc"
4005                 int bit AU = (op[1] >> 4) & 0x07;
4006                 if (trace)
4007                   {
4008                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4009                            "/** 0111 0001 1bit 1010             set1    %0                              */",
4010                            op[0], op[1]);
4011                     printf ("  bit = 0x%x\n", bit);
4012                   }
4013                 SYNTAX("set1    %0");
4014 #line 1023 "rl78-decode.opc"
4015                 ID(mov); DR(A); DB(bit); SC(1);
4016
4017               }
4018             break;
4019           case 0x8b:
4020           case 0x9b:
4021           case 0xab:
4022           case 0xbb:
4023           case 0xcb:
4024           case 0xdb:
4025           case 0xeb:
4026           case 0xfb:
4027               {
4028                 /** 0111 0001 1bit 1011         clr1    %0                              */
4029 #line 423 "rl78-decode.opc"
4030                 int bit AU = (op[1] >> 4) & 0x07;
4031                 if (trace)
4032                   {
4033                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4034                            "/** 0111 0001 1bit 1011             clr1    %0                              */",
4035                            op[0], op[1]);
4036                     printf ("  bit = 0x%x\n", bit);
4037                   }
4038                 SYNTAX("clr1    %0");
4039 #line 423 "rl78-decode.opc"
4040                 ID(mov); DR(A); DB(bit); SC(0);
4041
4042               }
4043             break;
4044           case 0x8c:
4045           case 0x9c:
4046           case 0xac:
4047           case 0xbc:
4048           case 0xcc:
4049           case 0xdc:
4050           case 0xec:
4051           case 0xfc:
4052               {
4053                 /** 0111 0001 1bit 1100         mov1    cy, %e1%1                       */
4054 #line 770 "rl78-decode.opc"
4055                 int bit AU = (op[1] >> 4) & 0x07;
4056                 if (trace)
4057                   {
4058                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4059                            "/** 0111 0001 1bit 1100             mov1    cy, %e1%1                       */",
4060                            op[0], op[1]);
4061                     printf ("  bit = 0x%x\n", bit);
4062                   }
4063                 SYNTAX("mov1    cy, %e1%1");
4064 #line 770 "rl78-decode.opc"
4065                 ID(mov); DCY(); SR(A); SB(bit);
4066
4067               }
4068             break;
4069           case 0x8d:
4070           case 0x9d:
4071           case 0xad:
4072           case 0xbd:
4073           case 0xcd:
4074           case 0xdd:
4075           case 0xed:
4076           case 0xfd:
4077               {
4078                 /** 0111 0001 1bit 1101         and1    cy, %1                          */
4079 #line 299 "rl78-decode.opc"
4080                 int bit AU = (op[1] >> 4) & 0x07;
4081                 if (trace)
4082                   {
4083                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4084                            "/** 0111 0001 1bit 1101             and1    cy, %1                          */",
4085                            op[0], op[1]);
4086                     printf ("  bit = 0x%x\n", bit);
4087                   }
4088                 SYNTAX("and1    cy, %1");
4089 #line 299 "rl78-decode.opc"
4090                 ID(and); DCY(); SR(A); SB(bit);
4091
4092               }
4093             break;
4094           case 0x8e:
4095           case 0x9e:
4096           case 0xae:
4097           case 0xbe:
4098           case 0xce:
4099           case 0xde:
4100           case 0xee:
4101           case 0xfe:
4102               {
4103                 /** 0111 0001 1bit 1110         or1     cy, %1                          */
4104 #line 946 "rl78-decode.opc"
4105                 int bit AU = (op[1] >> 4) & 0x07;
4106                 if (trace)
4107                   {
4108                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4109                            "/** 0111 0001 1bit 1110             or1     cy, %1                          */",
4110                            op[0], op[1]);
4111                     printf ("  bit = 0x%x\n", bit);
4112                   }
4113                 SYNTAX("or1     cy, %1");
4114 #line 946 "rl78-decode.opc"
4115                 ID(or); DCY(); SR(A); SB(bit);
4116
4117               }
4118             break;
4119           case 0x8f:
4120           case 0x9f:
4121           case 0xaf:
4122           case 0xbf:
4123           case 0xcf:
4124           case 0xdf:
4125           case 0xef:
4126           case 0xff:
4127               {
4128                 /** 0111 0001 1bit 1111         xor1    cy, %1                          */
4129 #line 1250 "rl78-decode.opc"
4130                 int bit AU = (op[1] >> 4) & 0x07;
4131                 if (trace)
4132                   {
4133                     printf ("\033[33m%s\033[0m  %02x %02x\n",
4134                            "/** 0111 0001 1bit 1111             xor1    cy, %1                          */",
4135                            op[0], op[1]);
4136                     printf ("  bit = 0x%x\n", bit);
4137                   }
4138                 SYNTAX("xor1    cy, %1");
4139 #line 1250 "rl78-decode.opc"
4140                 ID(xor); DCY(); SR(A); SB(bit);
4141
4142               }
4143             break;
4144           default: UNSUPPORTED(); break;
4145         }
4146       break;
4147     case 0x78:
4148         {
4149           /** 0111 1000                 movw    %e0%0, %1                       */
4150           if (trace)
4151             {
4152               printf ("\033[33m%s\033[0m  %02x\n",
4153                      "/** 0111 1000                     movw    %e0%0, %1                       */",
4154                      op[0]);
4155             }
4156           SYNTAX("movw  %e0%0, %1");
4157 #line 853 "rl78-decode.opc"
4158           ID(mov); W(); DM(BC, IMMU(2)); SR(AX);
4159
4160         }
4161       break;
4162     case 0x79:
4163         {
4164           /** 0111 1001                 movw    %0, %e1%1                       */
4165           if (trace)
4166             {
4167               printf ("\033[33m%s\033[0m  %02x\n",
4168                      "/** 0111 1001                     movw    %0, %e1%1                       */",
4169                      op[0]);
4170             }
4171           SYNTAX("movw  %0, %e1%1");
4172 #line 844 "rl78-decode.opc"
4173           ID(mov); W(); DR(AX); SM(BC, IMMU(2));
4174
4175         }
4176       break;
4177     case 0x7a:
4178         {
4179           /** 0111 1010                 xor     %0, #%1                         */
4180           if (trace)
4181             {
4182               printf ("\033[33m%s\033[0m  %02x\n",
4183                      "/** 0111 1010                     xor     %0, #%1                         */",
4184                      op[0]);
4185             }
4186           SYNTAX("xor   %0, #%1");
4187 #line 1242 "rl78-decode.opc"
4188           ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz;
4189
4190         /*----------------------------------------------------------------------*/
4191
4192         }
4193       break;
4194     case 0x7b:
4195         {
4196           /** 0111 1011                 xor     %0, %1                          */
4197           if (trace)
4198             {
4199               printf ("\033[33m%s\033[0m  %02x\n",
4200                      "/** 0111 1011                     xor     %0, %1                          */",
4201                      op[0]);
4202             }
4203           SYNTAX("xor   %0, %1");
4204 #line 1239 "rl78-decode.opc"
4205           ID(xor); DR(A); SM(None, SADDR); Fz;
4206
4207         }
4208       break;
4209     case 0x7c:
4210         {
4211           /** 0111 1100                 xor     %0, #%1                         */
4212           if (trace)
4213             {
4214               printf ("\033[33m%s\033[0m  %02x\n",
4215                      "/** 0111 1100                     xor     %0, #%1                         */",
4216                      op[0]);
4217             }
4218           SYNTAX("xor   %0, #%1");
4219 #line 1230 "rl78-decode.opc"
4220           ID(xor); DR(A); SC(IMMU(1)); Fz;
4221
4222         }
4223       break;
4224     case 0x7d:
4225         {
4226           /** 0111 1101                 xor     %0, %e1%1                       */
4227           if (trace)
4228             {
4229               printf ("\033[33m%s\033[0m  %02x\n",
4230                      "/** 0111 1101                     xor     %0, %e1%1                       */",
4231                      op[0]);
4232             }
4233           SYNTAX("xor   %0, %e1%1");
4234 #line 1218 "rl78-decode.opc"
4235           ID(xor); DR(A); SM(HL, 0); Fz;
4236
4237         }
4238       break;
4239     case 0x7e:
4240         {
4241           /** 0111 1110                 xor     %0, %e1%1                       */
4242           if (trace)
4243             {
4244               printf ("\033[33m%s\033[0m  %02x\n",
4245                      "/** 0111 1110                     xor     %0, %e1%1                       */",
4246                      op[0]);
4247             }
4248           SYNTAX("xor   %0, %e1%1");
4249 #line 1224 "rl78-decode.opc"
4250           ID(xor); DR(A); SM(HL, IMMU(1)); Fz;
4251
4252         }
4253       break;
4254     case 0x7f:
4255         {
4256           /** 0111 1111                 xor     %0, %e1%!1                      */
4257           if (trace)
4258             {
4259               printf ("\033[33m%s\033[0m  %02x\n",
4260                      "/** 0111 1111                     xor     %0, %e1%!1                      */",
4261                      op[0]);
4262             }
4263           SYNTAX("xor   %0, %e1%!1");
4264 #line 1215 "rl78-decode.opc"
4265           ID(xor); DR(A); SM(None, IMMU(2)); Fz;
4266
4267         }
4268       break;
4269     case 0x80:
4270     case 0x81:
4271     case 0x82:
4272     case 0x83:
4273     case 0x84:
4274     case 0x85:
4275     case 0x86:
4276     case 0x87:
4277         {
4278           /** 1000 0reg                 inc     %0                              */
4279 #line 566 "rl78-decode.opc"
4280           int reg AU = op[0] & 0x07;
4281           if (trace)
4282             {
4283               printf ("\033[33m%s\033[0m  %02x\n",
4284                      "/** 1000 0reg                     inc     %0                              */",
4285                      op[0]);
4286               printf ("  reg = 0x%x\n", reg);
4287             }
4288           SYNTAX("inc   %0");
4289 #line 566 "rl78-decode.opc"
4290           ID(add); DRB(reg); SC(1); Fza;
4291
4292         }
4293       break;
4294     case 0x88:
4295         {
4296           /** 1000 1000                 mov     %0, %e1%1                       */
4297           if (trace)
4298             {
4299               printf ("\033[33m%s\033[0m  %02x\n",
4300                      "/** 1000 1000                     mov     %0, %e1%1                       */",
4301                      op[0]);
4302             }
4303           SYNTAX("mov   %0, %e1%1");
4304 #line 645 "rl78-decode.opc"
4305           ID(mov); DR(A); SM(SP, IMMU(1));
4306
4307         }
4308       break;
4309     case 0x89:
4310         {
4311           /** 1000 1001                 mov     %0, %e1%1                       */
4312           if (trace)
4313             {
4314               printf ("\033[33m%s\033[0m  %02x\n",
4315                      "/** 1000 1001                     mov     %0, %e1%1                       */",
4316                      op[0]);
4317             }
4318           SYNTAX("mov   %0, %e1%1");
4319 #line 627 "rl78-decode.opc"
4320           ID(mov); DR(A); SM(DE, 0);
4321
4322         }
4323       break;
4324     case 0x8a:
4325         {
4326           /** 1000 1010                 mov     %0, %e1%1                       */
4327           if (trace)
4328             {
4329               printf ("\033[33m%s\033[0m  %02x\n",
4330                      "/** 1000 1010                     mov     %0, %e1%1                       */",
4331                      op[0]);
4332             }
4333           SYNTAX("mov   %0, %e1%1");
4334 #line 630 "rl78-decode.opc"
4335           ID(mov); DR(A); SM(DE, IMMU(1));
4336
4337         }
4338       break;
4339     case 0x8b:
4340         {
4341           /** 1000 1011                 mov     %0, %e1%1                       */
4342           if (trace)
4343             {
4344               printf ("\033[33m%s\033[0m  %02x\n",
4345                      "/** 1000 1011                     mov     %0, %e1%1                       */",
4346                      op[0]);
4347             }
4348           SYNTAX("mov   %0, %e1%1");
4349 #line 633 "rl78-decode.opc"
4350           ID(mov); DR(A); SM(HL, 0);
4351
4352         }
4353       break;
4354     case 0x8c:
4355         {
4356           /** 1000 1100                 mov     %0, %e1%1                       */
4357           if (trace)
4358             {
4359               printf ("\033[33m%s\033[0m  %02x\n",
4360                      "/** 1000 1100                     mov     %0, %e1%1                       */",
4361                      op[0]);
4362             }
4363           SYNTAX("mov   %0, %e1%1");
4364 #line 636 "rl78-decode.opc"
4365           ID(mov); DR(A); SM(HL, IMMU(1));
4366
4367         }
4368       break;
4369     case 0x8d:
4370         {
4371           /** 1000 1101                 mov     %0, %1                          */
4372           if (trace)
4373             {
4374               printf ("\033[33m%s\033[0m  %02x\n",
4375                      "/** 1000 1101                     mov     %0, %1                          */",
4376                      op[0]);
4377             }
4378           SYNTAX("mov   %0, %1");
4379 #line 669 "rl78-decode.opc"
4380           ID(mov); DR(A); SM(None, SADDR);
4381
4382         }
4383       break;
4384     case 0x8e:
4385         {
4386           /** 1000 1110                 mov     %0, %s1                         */
4387           if (trace)
4388             {
4389               printf ("\033[33m%s\033[0m  %02x\n",
4390                      "/** 1000 1110                     mov     %0, %s1                         */",
4391                      op[0]);
4392             }
4393           SYNTAX("mov   %0, %s1");
4394 #line 666 "rl78-decode.opc"
4395           ID(mov); DR(A); SM(None, SFR);
4396
4397         }
4398       break;
4399     case 0x8f:
4400         {
4401           /** 1000 1111                 mov     %0, %e1%!1                      */
4402           if (trace)
4403             {
4404               printf ("\033[33m%s\033[0m  %02x\n",
4405                      "/** 1000 1111                     mov     %0, %e1%!1                      */",
4406                      op[0]);
4407             }
4408           SYNTAX("mov   %0, %e1%!1");
4409 #line 624 "rl78-decode.opc"
4410           ID(mov); DR(A); SM(None, IMMU(2));
4411
4412         }
4413       break;
4414     case 0x90:
4415     case 0x91:
4416     case 0x92:
4417     case 0x93:
4418     case 0x94:
4419     case 0x95:
4420     case 0x96:
4421     case 0x97:
4422         {
4423           /** 1001 0reg                 dec     %0                              */
4424 #line 533 "rl78-decode.opc"
4425           int reg AU = op[0] & 0x07;
4426           if (trace)
4427             {
4428               printf ("\033[33m%s\033[0m  %02x\n",
4429                      "/** 1001 0reg                     dec     %0                              */",
4430                      op[0]);
4431               printf ("  reg = 0x%x\n", reg);
4432             }
4433           SYNTAX("dec   %0");
4434 #line 533 "rl78-decode.opc"
4435           ID(sub); DRB(reg); SC(1); Fza;
4436
4437         }
4438       break;
4439     case 0x98:
4440         {
4441           /** 1001 1000                 mov     %0, %1                          */
4442           if (trace)
4443             {
4444               printf ("\033[33m%s\033[0m  %02x\n",
4445                      "/** 1001 1000                     mov     %0, %1                          */",
4446                      op[0]);
4447             }
4448           SYNTAX("mov   %0, %1");
4449 #line 621 "rl78-decode.opc"
4450           ID(mov); DM(SP, IMMU(1)); SR(A);
4451
4452         }
4453       break;
4454     case 0x99:
4455         {
4456           /** 1001 1001                 mov     %e0%0,%1                        */
4457           if (trace)
4458             {
4459               printf ("\033[33m%s\033[0m  %02x\n",
4460                      "/** 1001 1001                     mov     %e0%0,%1                        */",
4461                      op[0]);
4462             }
4463           SYNTAX("mov   %e0%0,%1");
4464 #line 594 "rl78-decode.opc"
4465           ID(mov); DM(DE, 0); SR(A);
4466
4467         }
4468       break;
4469     case 0x9a:
4470         {
4471           /** 1001 1010                 mov     %e0%0, %1                       */
4472           if (trace)
4473             {
4474               printf ("\033[33m%s\033[0m  %02x\n",
4475                      "/** 1001 1010                     mov     %e0%0, %1                       */",
4476                      op[0]);
4477             }
4478           SYNTAX("mov   %e0%0, %1");
4479 #line 600 "rl78-decode.opc"
4480           ID(mov); DM(DE, IMMU(1)); SR(A);
4481
4482         }
4483       break;
4484     case 0x9b:
4485         {
4486           /** 1001 1011                 mov     %e0%0,%1                        */
4487           if (trace)
4488             {
4489               printf ("\033[33m%s\033[0m  %02x\n",
4490                      "/** 1001 1011                     mov     %e0%0,%1                        */",
4491                      op[0]);
4492             }
4493           SYNTAX("mov   %e0%0,%1");
4494 #line 603 "rl78-decode.opc"
4495           ID(mov); DM(HL, 0); SR(A);
4496
4497         }
4498       break;
4499     case 0x9c:
4500         {
4501           /** 1001 1100                 mov     %e0%0, %1                       */
4502           if (trace)
4503             {
4504               printf ("\033[33m%s\033[0m  %02x\n",
4505                      "/** 1001 1100                     mov     %e0%0, %1                       */",
4506                      op[0]);
4507             }
4508           SYNTAX("mov   %e0%0, %1");
4509 #line 612 "rl78-decode.opc"
4510           ID(mov); DM(HL, IMMU(1)); SR(A);
4511
4512         }
4513       break;
4514     case 0x9d:
4515         {
4516           /** 1001 1101                 mov     %0, %1                          */
4517           if (trace)
4518             {
4519               printf ("\033[33m%s\033[0m  %02x\n",
4520                      "/** 1001 1101                     mov     %0, %1                          */",
4521                      op[0]);
4522             }
4523           SYNTAX("mov   %0, %1");
4524 #line 726 "rl78-decode.opc"
4525           ID(mov); DM(None, SADDR); SR(A);
4526
4527         }
4528       break;
4529     case 0x9e:
4530         {
4531           /** 1001 1110                 mov     %0, %1                          */
4532           if (trace)
4533             {
4534               printf ("\033[33m%s\033[0m  %02x\n",
4535                      "/** 1001 1110                     mov     %0, %1                          */",
4536                      op[0]);
4537             }
4538           SYNTAX("mov   %0, %1");
4539 #line 756 "rl78-decode.opc"
4540           ID(mov); DM(None, SFR); SR(A);
4541
4542         /*----------------------------------------------------------------------*/
4543
4544         }
4545       break;
4546     case 0x9f:
4547         {
4548           /** 1001 1111                 mov     %e0%!0, %1                      */
4549           if (trace)
4550             {
4551               printf ("\033[33m%s\033[0m  %02x\n",
4552                      "/** 1001 1111                     mov     %e0%!0, %1                      */",
4553                      op[0]);
4554             }
4555           SYNTAX("mov   %e0%!0, %1");
4556 #line 591 "rl78-decode.opc"
4557           ID(mov); DM(None, IMMU(2)); SR(A);
4558
4559         }
4560       break;
4561     case 0xa0:
4562         {
4563           /** 1010 0000                 inc     %e0%!0                          */
4564           if (trace)
4565             {
4566               printf ("\033[33m%s\033[0m  %02x\n",
4567                      "/** 1010 0000                     inc     %e0%!0                          */",
4568                      op[0]);
4569             }
4570           SYNTAX("inc   %e0%!0");
4571 #line 560 "rl78-decode.opc"
4572           ID(add); DM(None, IMMU(2)); SC(1); Fza;
4573
4574         }
4575       break;
4576     case 0xa1:
4577     case 0xa3:
4578     case 0xa5:
4579     case 0xa7:
4580         {
4581           /** 1010 0rg1                 incw    %0                              */
4582 #line 580 "rl78-decode.opc"
4583           int rg AU = (op[0] >> 1) & 0x03;
4584           if (trace)
4585             {
4586               printf ("\033[33m%s\033[0m  %02x\n",
4587                      "/** 1010 0rg1                     incw    %0                              */",
4588                      op[0]);
4589               printf ("  rg = 0x%x\n", rg);
4590             }
4591           SYNTAX("incw  %0");
4592 #line 580 "rl78-decode.opc"
4593           ID(add); W(); DRW(rg); SC(1);
4594
4595         }
4596       break;
4597     case 0xa2:
4598         {
4599           /** 1010 0010                 incw    %e0%!0                          */
4600           if (trace)
4601             {
4602               printf ("\033[33m%s\033[0m  %02x\n",
4603                      "/** 1010 0010                     incw    %e0%!0                          */",
4604                      op[0]);
4605             }
4606           SYNTAX("incw  %e0%!0");
4607 #line 574 "rl78-decode.opc"
4608           ID(add); W(); DM(None, IMMU(2)); SC(1);
4609
4610         }
4611       break;
4612     case 0xa4:
4613         {
4614           /** 1010 0100                 inc     %0                              */
4615           if (trace)
4616             {
4617               printf ("\033[33m%s\033[0m  %02x\n",
4618                      "/** 1010 0100                     inc     %0                              */",
4619                      op[0]);
4620             }
4621           SYNTAX("inc   %0");
4622 #line 569 "rl78-decode.opc"
4623           ID(add); DM(None, SADDR); SC(1); Fza;
4624
4625         /*----------------------------------------------------------------------*/
4626
4627         }
4628       break;
4629     case 0xa6:
4630         {
4631           /** 1010 0110                 incw    %0                              */
4632           if (trace)
4633             {
4634               printf ("\033[33m%s\033[0m  %02x\n",
4635                      "/** 1010 0110                     incw    %0                              */",
4636                      op[0]);
4637             }
4638           SYNTAX("incw  %0");
4639 #line 583 "rl78-decode.opc"
4640           ID(add); W(); DM(None, SADDR); SC(1);
4641
4642         /*----------------------------------------------------------------------*/
4643
4644         }
4645       break;
4646     case 0xa8:
4647         {
4648           /** 1010 1000                 movw    %0, %1                          */
4649           if (trace)
4650             {
4651               printf ("\033[33m%s\033[0m  %02x\n",
4652                      "/** 1010 1000                     movw    %0, %1                          */",
4653                      op[0]);
4654             }
4655           SYNTAX("movw  %0, %1");
4656 #line 826 "rl78-decode.opc"
4657           ID(mov); W(); DR(AX); SM(SP, IMMU(1));
4658
4659         }
4660       break;
4661     case 0xa9:
4662         {
4663           /** 1010 1001                 movw    %0, %e1%1                       */
4664           if (trace)
4665             {
4666               printf ("\033[33m%s\033[0m  %02x\n",
4667                      "/** 1010 1001                     movw    %0, %e1%1                       */",
4668                      op[0]);
4669             }
4670           SYNTAX("movw  %0, %e1%1");
4671 #line 814 "rl78-decode.opc"
4672           ID(mov); W(); DR(AX); SM(DE, 0);
4673
4674         }
4675       break;
4676     case 0xaa:
4677         {
4678           /** 1010 1010                 movw    %0, %e1%1                       */
4679           if (trace)
4680             {
4681               printf ("\033[33m%s\033[0m  %02x\n",
4682                      "/** 1010 1010                     movw    %0, %e1%1                       */",
4683                      op[0]);
4684             }
4685           SYNTAX("movw  %0, %e1%1");
4686 #line 817 "rl78-decode.opc"
4687           ID(mov); W(); DR(AX); SM(DE, IMMU(1));
4688
4689         }
4690       break;
4691     case 0xab:
4692         {
4693           /** 1010 1011                 movw    %0, %e1%1                       */
4694           if (trace)
4695             {
4696               printf ("\033[33m%s\033[0m  %02x\n",
4697                      "/** 1010 1011                     movw    %0, %e1%1                       */",
4698                      op[0]);
4699             }
4700           SYNTAX("movw  %0, %e1%1");
4701 #line 820 "rl78-decode.opc"
4702           ID(mov); W(); DR(AX); SM(HL, 0);
4703
4704         }
4705       break;
4706     case 0xac:
4707         {
4708           /** 1010 1100                 movw    %0, %e1%1                       */
4709           if (trace)
4710             {
4711               printf ("\033[33m%s\033[0m  %02x\n",
4712                      "/** 1010 1100                     movw    %0, %e1%1                       */",
4713                      op[0]);
4714             }
4715           SYNTAX("movw  %0, %e1%1");
4716 #line 823 "rl78-decode.opc"
4717           ID(mov); W(); DR(AX); SM(HL, IMMU(1));
4718
4719         }
4720       break;
4721     case 0xad:
4722         {
4723           /** 1010 1101                 movw    %0, %1                          */
4724           if (trace)
4725             {
4726               printf ("\033[33m%s\033[0m  %02x\n",
4727                      "/** 1010 1101                     movw    %0, %1                          */",
4728                      op[0]);
4729             }
4730           SYNTAX("movw  %0, %1");
4731 #line 856 "rl78-decode.opc"
4732           ID(mov); W(); DR(AX); SM(None, SADDR);
4733
4734         }
4735       break;
4736     case 0xae:
4737         {
4738           /** 1010 1110                 movw    %0, %s1                         */
4739           if (trace)
4740             {
4741               printf ("\033[33m%s\033[0m  %02x\n",
4742                      "/** 1010 1110                     movw    %0, %s1                         */",
4743                      op[0]);
4744             }
4745           SYNTAX("movw  %0, %s1");
4746 #line 859 "rl78-decode.opc"
4747           ID(mov); W(); DR(AX); SM(None, SFR);
4748
4749         }
4750       break;
4751     case 0xaf:
4752         {
4753           /** 1010 1111                 movw    %0, %e1%!1                      */
4754           if (trace)
4755             {
4756               printf ("\033[33m%s\033[0m  %02x\n",
4757                      "/** 1010 1111                     movw    %0, %e1%!1                      */",
4758                      op[0]);
4759             }
4760           SYNTAX("movw  %0, %e1%!1");
4761 #line 810 "rl78-decode.opc"
4762           ID(mov); W(); DR(AX); SM(None, IMMU(2));
4763
4764
4765         }
4766       break;
4767     case 0xb0:
4768         {
4769           /** 1011 0000                 dec     %e0%!0                          */
4770           if (trace)
4771             {
4772               printf ("\033[33m%s\033[0m  %02x\n",
4773                      "/** 1011 0000                     dec     %e0%!0                          */",
4774                      op[0]);
4775             }
4776           SYNTAX("dec   %e0%!0");
4777 #line 527 "rl78-decode.opc"
4778           ID(sub); DM(None, IMMU(2)); SC(1); Fza;
4779
4780         }
4781       break;
4782     case 0xb1:
4783     case 0xb3:
4784     case 0xb5:
4785     case 0xb7:
4786         {
4787           /** 1011 0rg1                         decw    %0                              */
4788 #line 547 "rl78-decode.opc"
4789           int rg AU = (op[0] >> 1) & 0x03;
4790           if (trace)
4791             {
4792               printf ("\033[33m%s\033[0m  %02x\n",
4793                      "/** 1011 0rg1                     decw    %0                              */",
4794                      op[0]);
4795               printf ("  rg = 0x%x\n", rg);
4796             }
4797           SYNTAX("decw  %0");
4798 #line 547 "rl78-decode.opc"
4799           ID(sub); W(); DRW(rg); SC(1);
4800
4801         }
4802       break;
4803     case 0xb2:
4804         {
4805           /** 1011 0010                 decw    %e0%!0                          */
4806           if (trace)
4807             {
4808               printf ("\033[33m%s\033[0m  %02x\n",
4809                      "/** 1011 0010                     decw    %e0%!0                          */",
4810                      op[0]);
4811             }
4812           SYNTAX("decw  %e0%!0");
4813 #line 541 "rl78-decode.opc"
4814           ID(sub); W(); DM(None, IMMU(2)); SC(1);
4815
4816         }
4817       break;
4818     case 0xb4:
4819         {
4820           /** 1011 0100                 dec     %0                              */
4821           if (trace)
4822             {
4823               printf ("\033[33m%s\033[0m  %02x\n",
4824                      "/** 1011 0100                     dec     %0                              */",
4825                      op[0]);
4826             }
4827           SYNTAX("dec   %0");
4828 #line 536 "rl78-decode.opc"
4829           ID(sub); DM(None, SADDR); SC(1); Fza;
4830
4831         /*----------------------------------------------------------------------*/
4832
4833         }
4834       break;
4835     case 0xb6:
4836         {
4837           /** 1011 0110                 decw    %0                              */
4838           if (trace)
4839             {
4840               printf ("\033[33m%s\033[0m  %02x\n",
4841                      "/** 1011 0110                     decw    %0                              */",
4842                      op[0]);
4843             }
4844           SYNTAX("decw  %0");
4845 #line 550 "rl78-decode.opc"
4846           ID(sub); W(); DM(None, SADDR); SC(1);
4847
4848         /*----------------------------------------------------------------------*/
4849
4850         }
4851       break;
4852     case 0xb8:
4853         {
4854           /** 1011 1000                 movw    %0, %1                          */
4855           if (trace)
4856             {
4857               printf ("\033[33m%s\033[0m  %02x\n",
4858                      "/** 1011 1000                     movw    %0, %1                          */",
4859                      op[0]);
4860             }
4861           SYNTAX("movw  %0, %1");
4862 #line 807 "rl78-decode.opc"
4863           ID(mov); W(); DM(SP, IMMU(1)); SR(AX);
4864
4865         }
4866       break;
4867     case 0xb9:
4868         {
4869           /** 1011 1001                 movw    %e0%0, %1                       */
4870           if (trace)
4871             {
4872               printf ("\033[33m%s\033[0m  %02x\n",
4873                      "/** 1011 1001                     movw    %e0%0, %1                       */",
4874                      op[0]);
4875             }
4876           SYNTAX("movw  %e0%0, %1");
4877 #line 795 "rl78-decode.opc"
4878           ID(mov); W(); DM(DE, 0); SR(AX);
4879
4880         }
4881       break;
4882     case 0xba:
4883         {
4884           /** 1011 1010                 movw    %e0%0, %1                       */
4885           if (trace)
4886             {
4887               printf ("\033[33m%s\033[0m  %02x\n",
4888                      "/** 1011 1010                     movw    %e0%0, %1                       */",
4889                      op[0]);
4890             }
4891           SYNTAX("movw  %e0%0, %1");
4892 #line 798 "rl78-decode.opc"
4893           ID(mov); W(); DM(DE, IMMU(1)); SR(AX);
4894
4895         }
4896       break;
4897     case 0xbb:
4898         {
4899           /** 1011 1011                 movw    %e0%0, %1                       */
4900           if (trace)
4901             {
4902               printf ("\033[33m%s\033[0m  %02x\n",
4903                      "/** 1011 1011                     movw    %e0%0, %1                       */",
4904                      op[0]);
4905             }
4906           SYNTAX("movw  %e0%0, %1");
4907 #line 801 "rl78-decode.opc"
4908           ID(mov); W(); DM(HL, 0); SR(AX);
4909
4910         }
4911       break;
4912     case 0xbc:
4913         {
4914           /** 1011 1100                 movw    %e0%0, %1                       */
4915           if (trace)
4916             {
4917               printf ("\033[33m%s\033[0m  %02x\n",
4918                      "/** 1011 1100                     movw    %e0%0, %1                       */",
4919                      op[0]);
4920             }
4921           SYNTAX("movw  %e0%0, %1");
4922 #line 804 "rl78-decode.opc"
4923           ID(mov); W(); DM(HL, IMMU(1)); SR(AX);
4924
4925         }
4926       break;
4927     case 0xbd:
4928         {
4929           /** 1011 1101                 movw    %0, %1                          */
4930           if (trace)
4931             {
4932               printf ("\033[33m%s\033[0m  %02x\n",
4933                      "/** 1011 1101                     movw    %0, %1                          */",
4934                      op[0]);
4935             }
4936           SYNTAX("movw  %0, %1");
4937 #line 871 "rl78-decode.opc"
4938           ID(mov); W(); DM(None, SADDR); SR(AX);
4939
4940         }
4941       break;
4942     case 0xbe:
4943         {
4944           /** 1011 1110                 movw    %0, %1                          */
4945           if (trace)
4946             {
4947               printf ("\033[33m%s\033[0m  %02x\n",
4948                      "/** 1011 1110                     movw    %0, %1                          */",
4949                      op[0]);
4950             }
4951           SYNTAX("movw  %0, %1");
4952 #line 877 "rl78-decode.opc"
4953           ID(mov); W(); DM(None, SFR); SR(AX);
4954
4955         /*----------------------------------------------------------------------*/
4956
4957         }
4958       break;
4959     case 0xbf:
4960         {
4961           /** 1011 1111                 movw    %e0%!0, %1                      */
4962           if (trace)
4963             {
4964               printf ("\033[33m%s\033[0m  %02x\n",
4965                      "/** 1011 1111                     movw    %e0%!0, %1                      */",
4966                      op[0]);
4967             }
4968           SYNTAX("movw  %e0%!0, %1");
4969 #line 792 "rl78-decode.opc"
4970           ID(mov); W(); DM(None, IMMU(2)); SR(AX);
4971
4972         }
4973       break;
4974     case 0xc0:
4975     case 0xc2:
4976     case 0xc4:
4977     case 0xc6:
4978         {
4979           /** 1100 0rg0                 pop     %0                              */
4980 #line 957 "rl78-decode.opc"
4981           int rg AU = (op[0] >> 1) & 0x03;
4982           if (trace)
4983             {
4984               printf ("\033[33m%s\033[0m  %02x\n",
4985                      "/** 1100 0rg0                     pop     %0                              */",
4986                      op[0]);
4987               printf ("  rg = 0x%x\n", rg);
4988             }
4989           SYNTAX("pop   %0");
4990 #line 957 "rl78-decode.opc"
4991           ID(mov); W(); DRW(rg); SPOP();
4992
4993         }
4994       break;
4995     case 0xc1:
4996     case 0xc3:
4997     case 0xc5:
4998     case 0xc7:
4999         {
5000           /** 1100 0rg1                 push    %1                              */
5001 #line 965 "rl78-decode.opc"
5002           int rg AU = (op[0] >> 1) & 0x03;
5003           if (trace)
5004             {
5005               printf ("\033[33m%s\033[0m  %02x\n",
5006                      "/** 1100 0rg1                     push    %1                              */",
5007                      op[0]);
5008               printf ("  rg = 0x%x\n", rg);
5009             }
5010           SYNTAX("push  %1");
5011 #line 965 "rl78-decode.opc"
5012           ID(mov); W(); DPUSH(); SRW(rg);
5013
5014         }
5015       break;
5016     case 0xc8:
5017         {
5018           /** 1100 1000                 mov     %0, #%1                         */
5019           if (trace)
5020             {
5021               printf ("\033[33m%s\033[0m  %02x\n",
5022                      "/** 1100 1000                     mov     %0, #%1                         */",
5023                      op[0]);
5024             }
5025           SYNTAX("mov   %0, #%1");
5026 #line 618 "rl78-decode.opc"
5027           ID(mov); DM(SP, IMMU(1)); SC(IMMU(1));
5028
5029         }
5030       break;
5031     case 0xc9:
5032         {
5033           /** 1100 1001                 movw    %0, #%1                         */
5034           if (trace)
5035             {
5036               printf ("\033[33m%s\033[0m  %02x\n",
5037                      "/** 1100 1001                     movw    %0, #%1                         */",
5038                      op[0]);
5039             }
5040           SYNTAX("movw  %0, #%1");
5041 #line 868 "rl78-decode.opc"
5042           ID(mov); W(); DM(None, SADDR); SC(IMMU(2));
5043
5044         }
5045       break;
5046     case 0xca:
5047         {
5048           /** 1100 1010                 mov     %e0%0, #%1                      */
5049           if (trace)
5050             {
5051               printf ("\033[33m%s\033[0m  %02x\n",
5052                      "/** 1100 1010                     mov     %e0%0, #%1                      */",
5053                      op[0]);
5054             }
5055           SYNTAX("mov   %e0%0, #%1");
5056 #line 597 "rl78-decode.opc"
5057           ID(mov); DM(DE, IMMU(1)); SC(IMMU(1));
5058
5059         }
5060       break;
5061     case 0xcb:
5062         {
5063           /** 1100 1011                 movw    %0, #%1                         */
5064           if (trace)
5065             {
5066               printf ("\033[33m%s\033[0m  %02x\n",
5067                      "/** 1100 1011                     movw    %0, #%1                         */",
5068                      op[0]);
5069             }
5070           SYNTAX("movw  %0, #%1");
5071 #line 874 "rl78-decode.opc"
5072           ID(mov); W(); DM(None, SFR); SC(IMMU(2));
5073
5074         }
5075       break;
5076     case 0xcc:
5077         {
5078           /** 1100 1100                 mov     %e0%0, #%1                      */
5079           if (trace)
5080             {
5081               printf ("\033[33m%s\033[0m  %02x\n",
5082                      "/** 1100 1100                     mov     %e0%0, #%1                      */",
5083                      op[0]);
5084             }
5085           SYNTAX("mov   %e0%0, #%1");
5086 #line 609 "rl78-decode.opc"
5087           ID(mov); DM(HL, IMMU(1)); SC(IMMU(1));
5088
5089         }
5090       break;
5091     case 0xcd:
5092         {
5093           /** 1100 1101                 mov     %0, #%1                         */
5094           if (trace)
5095             {
5096               printf ("\033[33m%s\033[0m  %02x\n",
5097                      "/** 1100 1101                     mov     %0, #%1                         */",
5098                      op[0]);
5099             }
5100           SYNTAX("mov   %0, #%1");
5101 #line 723 "rl78-decode.opc"
5102           ID(mov); DM(None, SADDR); SC(IMMU(1));
5103
5104         }
5105       break;
5106     case 0xce:
5107         {
5108           /** 1100 1110                 mov     %s0, #%1                        */
5109           if (trace)
5110             {
5111               printf ("\033[33m%s\033[0m  %02x\n",
5112                      "/** 1100 1110                     mov     %s0, #%1                        */",
5113                      op[0]);
5114             }
5115           SYNTAX("mov   %s0, #%1");
5116 #line 729 "rl78-decode.opc"
5117           op0 = SFR;
5118           op1 = IMMU(1);
5119           ID(mov); DM(None, op0); SC(op1);
5120           if (op0 == 0xffffb)
5121             switch (op1)
5122               {
5123               case 0x01:
5124                 rl78->syntax = "mulhu"; ID(mulhu);
5125                 break;
5126               case 0x02:
5127                 rl78->syntax = "mulh"; ID(mulh);
5128                 break;
5129               case 0x03:
5130                 rl78->syntax = "divhu"; ID(divhu);
5131                 break;
5132               case 0x04:
5133                 rl78->syntax = "divwu"; ID(divwu);
5134                 break;
5135               case 0x05:
5136                 rl78->syntax = "machu"; ID(machu);
5137                 break;
5138               case 0x06:
5139                 rl78->syntax = "mach"; ID(mach);
5140                 break;
5141               }
5142
5143         }
5144       break;
5145     case 0xcf:
5146         {
5147           /** 1100 1111                 mov     %e0%!0, #%1                     */
5148           if (trace)
5149             {
5150               printf ("\033[33m%s\033[0m  %02x\n",
5151                      "/** 1100 1111                     mov     %e0%!0, #%1                     */",
5152                      op[0]);
5153             }
5154           SYNTAX("mov   %e0%!0, #%1");
5155 #line 588 "rl78-decode.opc"
5156           ID(mov); DM(None, IMMU(2)); SC(IMMU(1));
5157
5158         }
5159       break;
5160     case 0xd0:
5161     case 0xd1:
5162     case 0xd2:
5163     case 0xd3:
5164         {
5165           /** 1101 00rg                 cmp0    %0                              */
5166 #line 497 "rl78-decode.opc"
5167           int rg AU = op[0] & 0x03;
5168           if (trace)
5169             {
5170               printf ("\033[33m%s\033[0m  %02x\n",
5171                      "/** 1101 00rg                     cmp0    %0                              */",
5172                      op[0]);
5173               printf ("  rg = 0x%x\n", rg);
5174             }
5175           SYNTAX("cmp0  %0");
5176 #line 497 "rl78-decode.opc"
5177           ID(cmp); DRB(rg); SC(0); Fzac;
5178
5179         }
5180       break;
5181     case 0xd4:
5182         {
5183           /** 1101 0100                 cmp0    %0                              */
5184           if (trace)
5185             {
5186               printf ("\033[33m%s\033[0m  %02x\n",
5187                      "/** 1101 0100                     cmp0    %0                              */",
5188                      op[0]);
5189             }
5190           SYNTAX("cmp0  %0");
5191 #line 500 "rl78-decode.opc"
5192           ID(cmp); DM(None, SADDR); SC(0); Fzac;
5193
5194         /*----------------------------------------------------------------------*/
5195
5196         }
5197       break;
5198     case 0xd5:
5199         {
5200           /** 1101 0101                 cmp0    %e0%!0                          */
5201           if (trace)
5202             {
5203               printf ("\033[33m%s\033[0m  %02x\n",
5204                      "/** 1101 0101                     cmp0    %e0%!0                          */",
5205                      op[0]);
5206             }
5207           SYNTAX("cmp0  %e0%!0");
5208 #line 494 "rl78-decode.opc"
5209           ID(cmp); DM(None, IMMU(2)); SC(0); Fzac;
5210
5211         }
5212       break;
5213     case 0xd6:
5214         {
5215           /** 1101 0110                 mulu    x                               */
5216           if (trace)
5217             {
5218               printf ("\033[33m%s\033[0m  %02x\n",
5219                      "/** 1101 0110                     mulu    x                               */",
5220                      op[0]);
5221             }
5222           SYNTAX("mulu  x");
5223 #line 882 "rl78-decode.opc"
5224           ID(mulu);
5225
5226         /*----------------------------------------------------------------------*/
5227
5228         }
5229       break;
5230     case 0xd7:
5231         {
5232           /** 1101 0111                 ret                                     */
5233           if (trace)
5234             {
5235               printf ("\033[33m%s\033[0m  %02x\n",
5236                      "/** 1101 0111                     ret                                     */",
5237                      op[0]);
5238             }
5239           SYNTAX("ret");
5240 #line 973 "rl78-decode.opc"
5241           ID(ret);
5242
5243         }
5244       break;
5245     case 0xd8:
5246         {
5247           /** 1101 1000                 mov     %0, %1                          */
5248           if (trace)
5249             {
5250               printf ("\033[33m%s\033[0m  %02x\n",
5251                      "/** 1101 1000                     mov     %0, %1                          */",
5252                      op[0]);
5253             }
5254           SYNTAX("mov   %0, %1");
5255 #line 690 "rl78-decode.opc"
5256           ID(mov); DR(X); SM(None, SADDR);
5257
5258         }
5259       break;
5260     case 0xd9:
5261         {
5262           /** 1101 1001                 mov     %0, %e1%!1                      */
5263           if (trace)
5264             {
5265               printf ("\033[33m%s\033[0m  %02x\n",
5266                      "/** 1101 1001                     mov     %0, %e1%!1                      */",
5267                      op[0]);
5268             }
5269           SYNTAX("mov   %0, %e1%!1");
5270 #line 687 "rl78-decode.opc"
5271           ID(mov); DR(X); SM(None, IMMU(2));
5272
5273         }
5274       break;
5275     case 0xda:
5276     case 0xea:
5277     case 0xfa:
5278         {
5279           /** 11ra 1010                 movw    %0, %1                          */
5280 #line 865 "rl78-decode.opc"
5281           int ra AU = (op[0] >> 4) & 0x03;
5282           if (trace)
5283             {
5284               printf ("\033[33m%s\033[0m  %02x\n",
5285                      "/** 11ra 1010                     movw    %0, %1                          */",
5286                      op[0]);
5287               printf ("  ra = 0x%x\n", ra);
5288             }
5289           SYNTAX("movw  %0, %1");
5290 #line 865 "rl78-decode.opc"
5291           ID(mov); W(); DRW(ra); SM(None, SADDR);
5292
5293         }
5294       break;
5295     case 0xdb:
5296     case 0xeb:
5297     case 0xfb:
5298         {
5299           /** 11ra 1011                 movw    %0, %e1%!1                      */
5300 #line 862 "rl78-decode.opc"
5301           int ra AU = (op[0] >> 4) & 0x03;
5302           if (trace)
5303             {
5304               printf ("\033[33m%s\033[0m  %02x\n",
5305                      "/** 11ra 1011                     movw    %0, %e1%!1                      */",
5306                      op[0]);
5307               printf ("  ra = 0x%x\n", ra);
5308             }
5309           SYNTAX("movw  %0, %e1%!1");
5310 #line 862 "rl78-decode.opc"
5311           ID(mov); W(); DRW(ra); SM(None, IMMU(2));
5312
5313         }
5314       break;
5315     case 0xdc:
5316         {
5317           /** 1101 1100                 bc      $%a0                            */
5318           if (trace)
5319             {
5320               printf ("\033[33m%s\033[0m  %02x\n",
5321                      "/** 1101 1100                     bc      $%a0                            */",
5322                      op[0]);
5323             }
5324           SYNTAX("bc    $%a0");
5325 #line 313 "rl78-decode.opc"
5326           ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C);
5327
5328         }
5329       break;
5330     case 0xdd:
5331         {
5332           /** 1101 1101                 bz      $%a0                            */
5333           if (trace)
5334             {
5335               printf ("\033[33m%s\033[0m  %02x\n",
5336                      "/** 1101 1101                     bz      $%a0                            */",
5337                      op[0]);
5338             }
5339           SYNTAX("bz    $%a0");
5340 #line 325 "rl78-decode.opc"
5341           ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z);
5342
5343         }
5344       break;
5345     case 0xde:
5346         {
5347           /** 1101 1110                 bnc     $%a0                            */
5348           if (trace)
5349             {
5350               printf ("\033[33m%s\033[0m  %02x\n",
5351                      "/** 1101 1110                     bnc     $%a0                            */",
5352                      op[0]);
5353             }
5354           SYNTAX("bnc   $%a0");
5355 #line 316 "rl78-decode.opc"
5356           ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC);
5357
5358         }
5359       break;
5360     case 0xdf:
5361         {
5362           /** 1101 1111                 bnz     $%a0                            */
5363           if (trace)
5364             {
5365               printf ("\033[33m%s\033[0m  %02x\n",
5366                      "/** 1101 1111                     bnz     $%a0                            */",
5367                      op[0]);
5368             }
5369           SYNTAX("bnz   $%a0");
5370 #line 328 "rl78-decode.opc"
5371           ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ);
5372
5373         /*----------------------------------------------------------------------*/
5374
5375         }
5376       break;
5377     case 0xe0:
5378     case 0xe1:
5379     case 0xe2:
5380     case 0xe3:
5381         {
5382           /** 1110 00rg                 oneb    %0                              */
5383 #line 895 "rl78-decode.opc"
5384           int rg AU = op[0] & 0x03;
5385           if (trace)
5386             {
5387               printf ("\033[33m%s\033[0m  %02x\n",
5388                      "/** 1110 00rg                     oneb    %0                              */",
5389                      op[0]);
5390               printf ("  rg = 0x%x\n", rg);
5391             }
5392           SYNTAX("oneb  %0");
5393 #line 895 "rl78-decode.opc"
5394           ID(mov); DRB(rg); SC(1);
5395
5396         }
5397       break;
5398     case 0xe4:
5399         {
5400           /** 1110 0100                 oneb    %0                              */
5401           if (trace)
5402             {
5403               printf ("\033[33m%s\033[0m  %02x\n",
5404                      "/** 1110 0100                     oneb    %0                              */",
5405                      op[0]);
5406             }
5407           SYNTAX("oneb  %0");
5408 #line 898 "rl78-decode.opc"
5409           ID(mov); DM(None, SADDR); SC(1);
5410
5411         /*----------------------------------------------------------------------*/
5412
5413         }
5414       break;
5415     case 0xe5:
5416         {
5417           /** 1110 0101                 oneb    %e0%!0                          */
5418           if (trace)
5419             {
5420               printf ("\033[33m%s\033[0m  %02x\n",
5421                      "/** 1110 0101                     oneb    %e0%!0                          */",
5422                      op[0]);
5423             }
5424           SYNTAX("oneb  %e0%!0");
5425 #line 892 "rl78-decode.opc"
5426           ID(mov); DM(None, IMMU(2)); SC(1);
5427
5428         }
5429       break;
5430     case 0xe6:
5431         {
5432           /** 1110 0110                 onew    %0                              */
5433           if (trace)
5434             {
5435               printf ("\033[33m%s\033[0m  %02x\n",
5436                      "/** 1110 0110                     onew    %0                              */",
5437                      op[0]);
5438             }
5439           SYNTAX("onew  %0");
5440 #line 903 "rl78-decode.opc"
5441           ID(mov); DR(AX); SC(1);
5442
5443         }
5444       break;
5445     case 0xe7:
5446         {
5447           /** 1110 0111                 onew    %0                              */
5448           if (trace)
5449             {
5450               printf ("\033[33m%s\033[0m  %02x\n",
5451                      "/** 1110 0111                     onew    %0                              */",
5452                      op[0]);
5453             }
5454           SYNTAX("onew  %0");
5455 #line 906 "rl78-decode.opc"
5456           ID(mov); DR(BC); SC(1);
5457
5458         /*----------------------------------------------------------------------*/
5459
5460         }
5461       break;
5462     case 0xe8:
5463         {
5464           /** 1110 1000                 mov     %0, %1                          */
5465           if (trace)
5466             {
5467               printf ("\033[33m%s\033[0m  %02x\n",
5468                      "/** 1110 1000                     mov     %0, %1                          */",
5469                      op[0]);
5470             }
5471           SYNTAX("mov   %0, %1");
5472 #line 678 "rl78-decode.opc"
5473           ID(mov); DR(B); SM(None, SADDR);
5474
5475         }
5476       break;
5477     case 0xe9:
5478         {
5479           /** 1110 1001                 mov     %0, %e1%!1                      */
5480           if (trace)
5481             {
5482               printf ("\033[33m%s\033[0m  %02x\n",
5483                      "/** 1110 1001                     mov     %0, %e1%!1                      */",
5484                      op[0]);
5485             }
5486           SYNTAX("mov   %0, %e1%!1");
5487 #line 672 "rl78-decode.opc"
5488           ID(mov); DR(B); SM(None, IMMU(2));
5489
5490         }
5491       break;
5492     case 0xec:
5493         {
5494           /** 1110 1100                 br      !%!a0                           */
5495           if (trace)
5496             {
5497               printf ("\033[33m%s\033[0m  %02x\n",
5498                      "/** 1110 1100                     br      !%!a0                           */",
5499                      op[0]);
5500             }
5501           SYNTAX("br    !%!a0");
5502 #line 347 "rl78-decode.opc"
5503           ID(branch); DC(IMMU(3));
5504
5505         }
5506       break;
5507     case 0xed:
5508         {
5509           /** 1110 1101                 br      %!a0                            */
5510           if (trace)
5511             {
5512               printf ("\033[33m%s\033[0m  %02x\n",
5513                      "/** 1110 1101                     br      %!a0                            */",
5514                      op[0]);
5515             }
5516           SYNTAX("br    %!a0");
5517 #line 350 "rl78-decode.opc"
5518           ID(branch); DC(IMMU(2));
5519
5520         }
5521       break;
5522     case 0xee:
5523         {
5524           /** 1110 1110                 br      $%!a0                           */
5525           if (trace)
5526             {
5527               printf ("\033[33m%s\033[0m  %02x\n",
5528                      "/** 1110 1110                     br      $%!a0                           */",
5529                      op[0]);
5530             }
5531           SYNTAX("br    $%!a0");
5532 #line 353 "rl78-decode.opc"
5533           ID(branch); DC(pc+IMMS(2)+3);
5534
5535         }
5536       break;
5537     case 0xef:
5538         {
5539           /** 1110 1111                 br      $%a0                            */
5540           if (trace)
5541             {
5542               printf ("\033[33m%s\033[0m  %02x\n",
5543                      "/** 1110 1111                     br      $%a0                            */",
5544                      op[0]);
5545             }
5546           SYNTAX("br    $%a0");
5547 #line 356 "rl78-decode.opc"
5548           ID(branch); DC(pc+IMMS(1)+2);
5549
5550         }
5551       break;
5552     case 0xf0:
5553     case 0xf1:
5554     case 0xf2:
5555     case 0xf3:
5556         {
5557           /** 1111 00rg                 clrb    %0                              */
5558 #line 443 "rl78-decode.opc"
5559           int rg AU = op[0] & 0x03;
5560           if (trace)
5561             {
5562               printf ("\033[33m%s\033[0m  %02x\n",
5563                      "/** 1111 00rg                     clrb    %0                              */",
5564                      op[0]);
5565               printf ("  rg = 0x%x\n", rg);
5566             }
5567           SYNTAX("clrb  %0");
5568 #line 443 "rl78-decode.opc"
5569           ID(mov); DRB(rg); SC(0);
5570
5571         }
5572       break;
5573     case 0xf4:
5574         {
5575           /** 1111 0100                 clrb    %0                              */
5576           if (trace)
5577             {
5578               printf ("\033[33m%s\033[0m  %02x\n",
5579                      "/** 1111 0100                     clrb    %0                              */",
5580                      op[0]);
5581             }
5582           SYNTAX("clrb  %0");
5583 #line 446 "rl78-decode.opc"
5584           ID(mov); DM(None, SADDR); SC(0);
5585
5586         /*----------------------------------------------------------------------*/
5587
5588         }
5589       break;
5590     case 0xf5:
5591         {
5592           /** 1111 0101                 clrb    %e0%!0                          */
5593           if (trace)
5594             {
5595               printf ("\033[33m%s\033[0m  %02x\n",
5596                      "/** 1111 0101                     clrb    %e0%!0                          */",
5597                      op[0]);
5598             }
5599           SYNTAX("clrb  %e0%!0");
5600 #line 440 "rl78-decode.opc"
5601           ID(mov); DM(None, IMMU(2)); SC(0);
5602
5603         }
5604       break;
5605     case 0xf6:
5606         {
5607           /** 1111 0110                 clrw    %0                              */
5608           if (trace)
5609             {
5610               printf ("\033[33m%s\033[0m  %02x\n",
5611                      "/** 1111 0110                     clrw    %0                              */",
5612                      op[0]);
5613             }
5614           SYNTAX("clrw  %0");
5615 #line 451 "rl78-decode.opc"
5616           ID(mov); DR(AX); SC(0);
5617
5618         }
5619       break;
5620     case 0xf7:
5621         {
5622           /** 1111 0111                 clrw    %0                              */
5623           if (trace)
5624             {
5625               printf ("\033[33m%s\033[0m  %02x\n",
5626                      "/** 1111 0111                     clrw    %0                              */",
5627                      op[0]);
5628             }
5629           SYNTAX("clrw  %0");
5630 #line 454 "rl78-decode.opc"
5631           ID(mov); DR(BC); SC(0);
5632
5633         /*----------------------------------------------------------------------*/
5634
5635         }
5636       break;
5637     case 0xf8:
5638         {
5639           /** 1111 1000                 mov     %0, %1                          */
5640           if (trace)
5641             {
5642               printf ("\033[33m%s\033[0m  %02x\n",
5643                      "/** 1111 1000                     mov     %0, %1                          */",
5644                      op[0]);
5645             }
5646           SYNTAX("mov   %0, %1");
5647 #line 684 "rl78-decode.opc"
5648           ID(mov); DR(C); SM(None, SADDR);
5649
5650         }
5651       break;
5652     case 0xf9:
5653         {
5654           /** 1111 1001                 mov     %0, %e1%!1                      */
5655           if (trace)
5656             {
5657               printf ("\033[33m%s\033[0m  %02x\n",
5658                      "/** 1111 1001                     mov     %0, %e1%!1                      */",
5659                      op[0]);
5660             }
5661           SYNTAX("mov   %0, %e1%!1");
5662 #line 681 "rl78-decode.opc"
5663           ID(mov); DR(C); SM(None, IMMU(2));
5664
5665         }
5666       break;
5667     case 0xfc:
5668         {
5669           /** 1111 1100                 call    !%!a0                           */
5670           if (trace)
5671             {
5672               printf ("\033[33m%s\033[0m  %02x\n",
5673                      "/** 1111 1100                     call    !%!a0                           */",
5674                      op[0]);
5675             }
5676           SYNTAX("call  !%!a0");
5677 #line 400 "rl78-decode.opc"
5678           ID(call); DC(IMMU(3));
5679
5680         }
5681       break;
5682     case 0xfd:
5683         {
5684           /** 1111 1101                 call    %!a0                            */
5685           if (trace)
5686             {
5687               printf ("\033[33m%s\033[0m  %02x\n",
5688                      "/** 1111 1101                     call    %!a0                            */",
5689                      op[0]);
5690             }
5691           SYNTAX("call  %!a0");
5692 #line 403 "rl78-decode.opc"
5693           ID(call); DC(IMMU(2));
5694
5695         }
5696       break;
5697     case 0xfe:
5698         {
5699           /** 1111 1110                 call    $%!a0                           */
5700           if (trace)
5701             {
5702               printf ("\033[33m%s\033[0m  %02x\n",
5703                      "/** 1111 1110                     call    $%!a0                           */",
5704                      op[0]);
5705             }
5706           SYNTAX("call  $%!a0");
5707 #line 406 "rl78-decode.opc"
5708           ID(call); DC(pc+IMMS(2)+3);
5709
5710         }
5711       break;
5712     case 0xff:
5713         {
5714           /** 1111 1111                 brk1                                    */
5715           if (trace)
5716             {
5717               printf ("\033[33m%s\033[0m  %02x\n",
5718                      "/** 1111 1111                     brk1                                    */",
5719                      op[0]);
5720             }
5721           SYNTAX("brk1");
5722 #line 364 "rl78-decode.opc"
5723           ID(break);
5724
5725         }
5726       break;
5727   }
5728 #line 1261 "rl78-decode.opc"
5729
5730   return rl78->n_bytes;
5731 }